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Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging
2021-02-02
Bin
Meng
hw/ssi: imx_spi:
Co
r
r
ect
t
x a
n
d
rx fifo endianness
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-02-02
Bin
Meng
hw/ssi:
imx_
s
pi:
C
orrec
t
the burst length > 32
b
i
t
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-02-02
Bin M
e
ng
hw/ssi:
imx_spi: Ro
u
nd up the burst length
t
o be multiple
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-02-02
Bin Men
g
hw/ssi: im
x
_sp
i
: R
e
move
imx_spi_upda
t
e_irq() i
n
imx_
s
pi_
r
eset
(
)
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-02-02
Bin Meng
hw
/
s
s
i: imx_spi: Use a macro for number of
c
hip selects
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-01-25
Bin Meng
ne
t
: checksum:
In
t
roduce
fine co
n
trol over ch
e
c
k
sum
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-01-24
Bin Meng
hw/sd: s
d
.
h:
Cosmetic ch
a
n
ge of using spa
c
e
s
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-01-24
Bin
Men
g
hw
/
sd: ss
i
-sd:
Use macr
o
s
f
o
r the dummy
v
alue and to
k
ens
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-01-24
Bin Meng
hw/
s
d: ssi-
s
d: Fix the wr
o
ng command in
d
e
x
for STOP
_
TRANSM
I
SS
I
ON
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-01-24
B
in Meng
hw/
s
d
: ss
i
-sd:
A
dd a st
a
te representing
N
ac
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-01-24
Bin Meng
h
w/sd:
ssi-sd: Suf
f
ix a d
a
ta bloc
k
with CRC16
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-01-24
Bin
M
eng
util:
A
dd C
R
C
16 (CCITT
)
calculation
r
outi
n
es
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-01-24
Bin Meng
hw/sd:
sd
:
Drop sd_crc16()
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-01-24
Bin Men
g
hw/sd: sd: Suppo
r
t CMD59
f
or SPI mode
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-01-24
Bin Meng
h
w
/sd: s
s
i-s
d
:
Fix
i
nco
r
rect card respo
n
se sequence
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-01-16
Bin Meng
t
a
r
get/riscv: R
e
mo
v
e built
-
in GDB XML files f
o
r CS
R
s
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-01-16
Bin M
e
ng
ta
r
get/riscv: Generate t
h
e
GDB
X
ML file
f
or C
S
R registers
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-01-16
Bin M
e
ng
target/ri
s
cv: Add CSR name in the CSR func
t
ion tab
l
e
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-01-16
Bin Meng
target/
r
iscv: Make csr_ops[C
S
R_TABLE_SIZE] external
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-01-16
Bi
n
Meng
hw/ris
c
v
: sifi
v
e_u: Use SIFIVE_U_CPU
for m
c
->d
e
fault
_
cpu_type
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-01-16
Bin
M
eng
hw
/
block:
m25p80: Don't write
to
f
lash
i
f wr
i
te is
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-01-08
Bi
n
Meng
docs/sys
t
em: arm: Add sabrelite board
de
s
cription
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-01-08
Bin
Meng
hw/arm: sa
b
relite: Con
n
ect the E
t
h
e
rnet PHY at address 6
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-01-08
Bin Men
g
hw/
m
sic: imx6_ccm: Corr
e
c
t register val
u
e for silico
n
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-01-08
Bin M
e
n
g
hw/misc
:
imx6_cc
m
:
Update PMU_MIS
C
0
reset value
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-12-10
Bin Meng
target/i386: seg
_
helper: C
o
rre
c
t s
e
gm
e
nt
s
elector nul
l
i
f
icat
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-11-17
Bin Meng
hw/sd: Fix 2 GiB ca
r
d
C
SD r
e
gister value
s
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-11-03
B
i
n
M
e
ng
hw/riscv:
m
icrochip_
p
fsoc: Hook the I
2
C1 controller
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-11-03
Bin Meng
hw/
r
iscv: microc
h
ip_pfsoc: Correct
DDR memory
map
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-11-03
B
i
n
Men
g
hw/riscv: micro
c
hip_pf
s
oc: Map the res
e
rved memory
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-11-03
Bi
n
Meng
hw/r
i
s
cv: microchip
_
pfsoc: C
o
nnec
t
the
S
YSREG module
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-11-03
B
in
M
eng
hw/misc: Add Mi
c
roch
i
p P
o
larFire SoC SYSR
E
G module
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-11-03
Bin
Me
n
g
h
w
/riscv: mic
r
ochip_pfsoc: C
o
nne
c
t the IOSCB module
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-11-03
Bi
n
Meng
hw/m
i
sc:
Add Microch
i
p PolarFire SoC IOSCB module sup
p
ort
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-11-03
Bin Meng
hw/riscv
:
mic
r
ochip_pfsoc:
Connect
D
DR memory con
t
r
o
ller
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-11-03
Bin
M
en
g
hw/mis
c
:
Add Mi
c
rochi
p
PolarFi
r
e
So
C
DDR
Memory Controller
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-11-03
Bin
Meng
hw/riscv: microchip_pfsoc: D
o
cument where to lo
o
k at
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-10-26
Bin
M
eng
hw/sd/sdcard: Zer
o
o
ut f
u
nction
selection
f
ields before
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-10-22
B
in
M
eng
hw/intc: M
o
ve si
f
ive_
p
l
i
c
.
h
t
o the in
c
lude
d
irectory
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-09-09
Bin M
e
n
g
hw/
r
iscv:
S
ort the Kconfig options in
a
lphabetical
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-09-09
Bi
n
Meng
h
w
/r
i
scv:
D
rop CONFI
G
_SIFIVE
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-09-09
Bin M
e
ng
hw/riscv
:
A
lways b
u
ild riscv_hart
.
c
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-09-09
Bin Meng
hw/ri
s
c
v
: Move sifi
v
e_test model to h
w
/misc
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-09-09
Bin Meng
h
w/r
i
s
cv: Move si
f
ive_ua
r
t
model to hw/char
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-09-09
B
i
n Meng
hw/riscv: Move riscv_htif model to hw/
c
har
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-09-09
Bin
M
eng
hw/
r
iscv: M
o
ve sifive_
p
lic
m
odel to h
w
/intc
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-09-09
Bin Meng
hw
/
ri
s
c
v
: Mo
v
e sifiv
e
_clint
model to hw/
i
nt
c
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-09-09
Bin M
e
ng
hw/ri
s
cv: Move sifive_gpio model to hw/gpio
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-09-09
Bin Meng
hw/ri
s
cv: Move sifive_u
_
otp
model to hw/misc
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-09-09
Bi
n
Me
n
g
hw/riscv: Move sifiv
e
_u_prci model to hw/misc
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-09-09
Bin Meng
hw/ri
s
cv: Mo
v
e sifive_e_prc
i
mod
e
l to hw/m
i
sc
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-09-09
Bin
M
eng
hw/riscv: sifive_u:
Con
n
ect a DMA contro
l
l
e
r
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-09-09
B
i
n Meng
h
w/riscv
:
c
l
int: Avoid using
hard
-
coded ti
m
ebase frequency
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-09-09
B
i
n M
e
ng
hw
/
ris
c
v: microchip
_
pfsoc: Hook GPIO controllers
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-09-09
Bin M
e
ng
hw/ri
s
c
v:
m
icr
o
chip_pfsoc: Connect 2 Cadence
G
EMs
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-09-09
Bi
n
Meng
hw/
a
rm: xlnx: Se
t
all b
o
a
r
d
s' G
E
M
'
phy-ad
d
r' p
r
o
p
erty
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-09-09
Bin Meng
hw/
n
et: cad
e
nce_gem: Add a new '
p
hy-a
d
dr' property
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-09-09
Bi
n
Meng
hw/riscv: microchip
_
pfsoc
:
Connect a
DMA
c
ontrolle
r
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-09-09
B
i
n
Meng
hw
/
d
m
a: Add
S
i
Five platform D
M
A cont
r
oller emu
l
at
i
on
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-09-09
Bin Meng
hw/riscv: m
i
cro
c
hip_pfsoc: Con
n
e
c
t
a Cad
e
n
c
e S
D
HCI
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-09-09
B
i
n M
e
n
g
hw/sd
:
A
d
d
Cad
e
nc
e
SD
H
C
I emulation
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-09-09
Bin M
e
n
g
hw
/
ris
c
v: mic
r
och
i
p_p
f
so
c
: Conn
e
ct 5 MMUARTs
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-09-09
Bin M
e
ng
hw
/
char
:
A
dd Micr
o
ch
i
p PolarFire
S
oC MMUART
em
u
l
ation
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-09-09
B
in Me
n
g
hw/r
i
scv: Initial
support f
o
r Microchip
PolarFire So
C
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-09-09
Bin Men
g
t
a
rget/risc
v
: cpu: Set reset ve
c
tor based on t
h
e
c
onf
i
gur
e
d
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-09-09
Bin Meng
hw/riscv: hart: Add a new '
r
es
e
t
vec' pro
p
e
rty
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-09-09
Bin Meng
target/ri
s
c
v: cpu: A
d
d
a
new 'resetvec' proper
t
y
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-08-22
Bi
n
Men
g
gitlab
-
ci/open
s
b
i:
Update GitLab CI
to bui
l
d
g
en
e
r
i
c
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-08-22
Bin Meng
hw/
r
i
scv
:
spike: Change the default bio
s
to use generic
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-08-22
Bin Meng
hw/risc
v
:
U
se pre-bui
l
t bios
image of generic platform
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-08-22
Bin Men
g
roms/Makefile: Bu
i
ld the
g
eneric plat
f
o
rm for RISC
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-08-22
Bin Meng
roms/opensbi: Up
g
r
a
d
e
f
rom v0
.
7 to v0
.
8
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-08-22
Bin Meng
configure: Creat
e
symbolic
link
s
fo
r
pc-bios/*
.
elf
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-08-22
Bin
Meng
hw/riscv: sifive_u: Add
a dummy L2 cache controller
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-08-21
Bi
n
Meng
hw/sd:
Corre
c
t the maxim
u
m size of
a Stan
d
a
rd Capacit
y
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-08-21
Bin Meng
h
w/s
d
:
F
ix incorrect
populated
f
u
nc
t
ion s
w
i
tch status
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-07-22
Bin Meng
h
w/riscv: sifi
v
e_e: C
o
rrect debug block size
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
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tree
2020-07-14
Bin
M
eng
hw/riscv: Mo
d
ify MROM size to
end at
0x1
0
000
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
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commitdiff
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tree
2020-07-14
Bi
n
Meng
hw/riscv: virt
:
Sort the SoC
m
emmap ta
b
le
e
ntri
e
s
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
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commitdiff
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tree
2020-07-14
Bin Men
g
M
A
INTAIN
E
RS
:
A
d
d
a
n
e
n
t
ry for OpenSBI
f
i
rmware
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
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commitdiff
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tree
2020-06-19
Bin
Meng
hw/
r
i
s
c
v: sifive_u: Add a dumm
y
DDR m
e
m
o
ry con
t
roller
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
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commitdiff
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tree
2020-06-19
Bin
M
e
n
g
h
w/riscv: sifive_u:
Sort the SoC memmap table
entries
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
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commitdiff
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tree
2020-06-19
B
i
n Meng
h
w
/riscv:
s
ifive_u: Support differ
e
nt boo
t
sourc
e
per
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
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commitdiff
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tree
2020-06-19
B
in Meng
h
w/ri
s
cv
:
si
f
ive: Change S
i
Five E/U CPU re
s
et vector
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
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commitdiff
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tree
2020-06-19
Bin Me
n
g
target/riscv: Rename IB
E
X
CPU ini
t
routine
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
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commitdiff
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tree
2020-06-19
B
i
n
Men
g
hw/risc
v
:
s
i
f
iv
e
_
u
: Add a n
e
w pro
p
e
rty
m
sel for M
S
EL
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
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commitdiff
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tree
2020-06-19
Bin Men
g
hw/riscv: sifive_u:
R
e
n
ame serial property get/set
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
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commitdiff
|
tree
2020-06-19
Bin Meng
hw/riscv: si
f
ive_u:
Add reset funct
i
onality
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
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tree
2020-06-19
Bin M
e
ng
hw/riscv
:
s
ifive_gpio
:
Do n
o
t blindly
tr
i
g
g
er output
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-06-19
Bin M
e
ng
hw/risc
v
: si
f
i
v
e_u:
H
ook a
GPIO controller
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-06-19
Bin Meng
hw/
r
iscv
:
s
i
five_
g
pio: Add
a new 'n
g
pio' property
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-06-19
Bin Men
g
hw/r
i
scv
:
sifi
v
e
_gpio: Cl
e
an
up the codes
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-06-19
B
i
n
Meng
hw
/
ris
c
v: sifi
v
e_
u
: Ge
n
erat
e
device tree
n
ode for OT
P
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-06-19
Bin Meng
hw/riscv: sifive_u: Simpli
f
y
the GEM IRQ co
n
nect
c
ode
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-06-19
Bin Meng
hw
/
riscv: opentitan: Rem
o
ve the risc
v
_ prefix of the
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-06-19
B
in Meng
hw/
r
iscv: s
i
f
ive_
e
:
Rem
o
ve the
riscv_ prefix
o
f the
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-06-19
B
in Meng
r
i
scv: Kee
p
the C
P
U init routine
names con
s
istent
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-06-19
Bin Meng
riscv:
G
eneralize CPU in
i
t routine for the imacu
CP
U
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-06-19
Bin
Meng
riscv: Generalize CPU
in
i
t ro
u
tine
for
t
h
e
gcsu
CPU
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-06-19
Bin Men
g
riscv: Gen
e
ralize C
P
U
in
i
t routine
for th
e
base CPU
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
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|
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