| commit | 8f2ac39d5d307589faca1d00d55a1a8054d53b0e | |
| author | Bin Meng <bin.meng@windriver.com> | |
| Tue, 1 Sep 2020 01:39:01 +0000 (1 09:39 +0800) | ||
| committer | Alistair Francis <alistair.francis@wdc.com> | |
| Wed, 9 Sep 2020 22:54:18 +0000 (9 15:54 -0700) | ||
| tree | 79fb47b7a672992620c6ffc6ef5b58b615148884 | treesnapshot (tar.gz zip) |
| parent | a8fb0a500a695104cda5837b7aba93dee3abddde | commitdiff |
hw/riscv: microchip_pfsoc: Connect 5 MMUARTs
Microchip PolarFire SoC has 5 MMUARTs, and the Icicle Kit board
wires 4 of them out. Let's connect all 5 MMUARTs.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <1598924352-89526-7-git-send-email-bmeng.cn@gmail.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Microchip PolarFire SoC has 5 MMUARTs, and the Icicle Kit board
wires 4 of them out. Let's connect all 5 MMUARTs.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <1598924352-89526-7-git-send-email-bmeng.cn@gmail.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
| hw/riscv/Kconfig | diffblobblamehistory | |
| hw/riscv/microchip_pfsoc.c | diffblobblamehistory | |
| include/hw/riscv/microchip_pfsoc.h | diffblobblamehistory |