| commit | a4b84608ba0eecce1d4858181457dc26582e6d28 | |
| author | Bin Meng <bin.meng@windriver.com> | |
| Thu, 3 Sep 2020 10:40:20 +0000 (3 18:40 +0800) | ||
| committer | Alistair Francis <alistair.francis@wdc.com> | |
| Wed, 9 Sep 2020 22:54:19 +0000 (9 15:54 -0700) | ||
| tree | c657deeba29792d6cda5b76235810d8763cc2497 | treesnapshot (tar.gz zip) |
| parent | b609b7e3199912e16ef3b0447823f21fed73597e | commitdiff |
hw/riscv: Move sifive_test model to hw/misc
This is an effort to clean up the hw/riscv directory. Ideally it
should only contain the RISC-V SoC / machine codes plus generic
codes. Let's move sifive_test model to hw/misc directory.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <1599129623-68957-10-git-send-email-bmeng.cn@gmail.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
This is an effort to clean up the hw/riscv directory. Ideally it
should only contain the RISC-V SoC / machine codes plus generic
codes. Let's move sifive_test model to hw/misc directory.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <1599129623-68957-10-git-send-email-bmeng.cn@gmail.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
| hw/misc/Kconfig | diffblobblamehistory | |
| hw/misc/meson.build | diffblobblamehistory | |
| hw/misc/sifive_test.c | [moved from hw/riscv/sifive_test.c with 98% similarity] | diffblobblamehistory |
| hw/riscv/Kconfig | diffblobblamehistory | |
| hw/riscv/meson.build | diffblobblamehistory | |
| hw/riscv/virt.c | diffblobblamehistory | |
| include/hw/misc/sifive_test.h | [moved from include/hw/riscv/sifive_test.h with 100% similarity] | blobblamehistory |