| commit | 2c44bbf32cda5fbf85b697e3a12127f59d2c2e80 | |
| author | Bin Meng <bin.meng@windriver.com> | |
| Fri, 3 Jul 2020 03:21:51 +0000 (2 20:21 -0700) | ||
| committer | Alistair Francis <alistair.francis@wdc.com> | |
| Tue, 14 Jul 2020 00:25:37 +0000 (13 17:25 -0700) | ||
| tree | 6f750f26ac604faf2a8f1938d52848b7a817cc8d | treesnapshot (tar.gz zip) |
| parent | e92fb01639cadbeb9c6fc5d5189e35ef3e45836f | commitdiff |
hw/riscv: virt: Sort the SoC memmap table entries
Adjust the PCIe memory maps to follow the order.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <1593746511-19517-1-git-send-email-bmeng.cn@gmail.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Adjust the PCIe memory maps to follow the order.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <1593746511-19517-1-git-send-email-bmeng.cn@gmail.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
| hw/riscv/virt.c | diffblobblamehistory |