| commit | cfa32630d914373413c0b42faf756ccaabc4bbb9 | |
| author | Bin Meng <bin.meng@windriver.com> | |
| Mon, 8 Jun 2020 14:17:40 +0000 (8 07:17 -0700) | ||
| committer | Alistair Francis <alistair.francis@wdc.com> | |
| Fri, 19 Jun 2020 15:25:27 +0000 (19 08:25 -0700) | ||
| tree | 6837bfe195735b0eaee325e139577c33d7f3c2f4 | treesnapshot (tar.gz zip) |
| parent | 3e9667cdaa7d552bad232b7da0e116c50e15b3b5 | commitdiff |
hw/riscv: sifive_u: Add a new property msel for MSEL pin state
On SiFive FU540 SoC, the value stored at physical address 0x1000
stores the MSEL pin state that is used to control the next boot
location that ROM codes jump to.
Add a new property msel to sifive_u machine for this.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 1591625864-31494-12-git-send-email-bmeng.cn@gmail.com
Message-Id: <1591625864-31494-12-git-send-email-bmeng.cn@gmail.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
On SiFive FU540 SoC, the value stored at physical address 0x1000
stores the MSEL pin state that is used to control the next boot
location that ROM codes jump to.
Add a new property msel to sifive_u machine for this.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 1591625864-31494-12-git-send-email-bmeng.cn@gmail.com
Message-Id: <1591625864-31494-12-git-send-email-bmeng.cn@gmail.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
| hw/riscv/sifive_u.c | diffblobblamehistory | |
| include/hw/riscv/sifive_u.h | diffblobblamehistory |