hw/riscv: sifive_u: Hook a GPIO controller
commit8a88b9f54f5fb2acecf73760903b1f58fb40d0cd
authorBin Meng <bin.meng@windriver.com>
Mon, 8 Jun 2020 14:17:36 +0000 (8 07:17 -0700)
committerAlistair Francis <alistair.francis@wdc.com>
Fri, 19 Jun 2020 15:25:23 +0000 (19 08:25 -0700)
tree6d7fe807ed48d26971c2ba711807f62f67cd3379
parent4bb216f637d16b6deed499d0be1c34ff03bd625c
hw/riscv: sifive_u: Hook a GPIO controller

SiFive FU540 SoC integrates a GPIO controller with 16 GPIO lines.
This hooks the exsiting SiFive GPIO model to the SoC, and adds its
device tree data as well.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 1591625864-31494-8-git-send-email-bmeng.cn@gmail.com
Message-Id: <1591625864-31494-8-git-send-email-bmeng.cn@gmail.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
hw/riscv/sifive_u.c
include/hw/riscv/sifive_u.h