| commit | 5133ed17906d1116c7ce47fd49ae77373cd41e29 | |
| author | Bin Meng <bin.meng@windriver.com> | |
| Mon, 8 Jun 2020 14:17:38 +0000 (8 07:17 -0700) | ||
| committer | Alistair Francis <alistair.francis@wdc.com> | |
| Fri, 19 Jun 2020 15:25:27 +0000 (19 08:25 -0700) | ||
| tree | 4830dcf0ab92afdeeb8f91874ef543dee4485e0f | treesnapshot (tar.gz zip) |
| parent | 621c1006d2d82da9f266f21ad8e887c38769a11b | commitdiff |
hw/riscv: sifive_u: Add reset functionality
The HiFive Unleashed board wires GPIO pin#10 to the input of the
system reset signal. Let's set up the GPIO pin#10 and insert a
"gpio-restart" device tree node so that reboot is now functional
with QEMU 'sifive_u' machine.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 1591625864-31494-10-git-send-email-bmeng.cn@gmail.com
Message-Id: <1591625864-31494-10-git-send-email-bmeng.cn@gmail.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
The HiFive Unleashed board wires GPIO pin#10 to the input of the
system reset signal. Let's set up the GPIO pin#10 and insert a
"gpio-restart" device tree node so that reboot is now functional
with QEMU 'sifive_u' machine.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 1591625864-31494-10-git-send-email-bmeng.cn@gmail.com
Message-Id: <1591625864-31494-10-git-send-email-bmeng.cn@gmail.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
| hw/riscv/sifive_u.c | diffblobblamehistory |