hw/riscv: microchip_pfsoc: Connect a Cadence SDHCI controller and an SD card
commit898dc008e8cd474c21f98a63f151265673aea305
authorBin Meng <bin.meng@windriver.com>
Tue, 1 Sep 2020 01:39:03 +0000 (1 09:39 +0800)
committerAlistair Francis <alistair.francis@wdc.com>
Wed, 9 Sep 2020 22:54:18 +0000 (9 15:54 -0700)
treea6aa6e35d848f42bbfcf9c28936f61a2d2a18598
parentc696e1f2b392af19653e82da26df3c61b85ab5a2
hw/riscv: microchip_pfsoc: Connect a Cadence SDHCI controller and an SD card

Microchip PolarFire SoC integrates one Cadence SDHCI controller.
On the Icicle Kit board, one eMMC chip and an external SD card
connect to this controller depending on different configuration.

As QEMU does not support eMMC yet, we just emulate the SD card
configuration. To test this, the Hart Software Services (HSS)
should choose the SD card configuration:

$ cp boards/icicle-kit-es/def_config.sdcard .config
$ make BOARD=icicle-kit-es

The SD card image can be built from the Yocto BSP at:
https://github.com/polarfire-soc/meta-polarfire-soc-yocto-bsp

Note the generated SD card image should be resized before use:
$ qemu-img resize /path/to/sdcard.img 4G

Launch QEMU with the following command:
$ qemu-system-riscv64 -nographic -M microchip-icicle-kit -sd sdcard.img

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <1598924352-89526-9-git-send-email-bmeng.cn@gmail.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
hw/riscv/Kconfig
hw/riscv/microchip_pfsoc.c
include/hw/riscv/microchip_pfsoc.h