| commit | 0f25065cb616f74729383fbf30369c374305ebb1 | |
| author | Bin Meng <bin.meng@windriver.com> | |
| Wed, 28 Oct 2020 05:30:06 +0000 (28 13:30 +0800) | ||
| committer | Alistair Francis <alistair.francis@wdc.com> | |
| Tue, 3 Nov 2020 15:17:23 +0000 (3 07:17 -0800) | ||
| tree | bd068b95daa705a154638e7932bdebf16462639c | treesnapshot (tar.gz zip) |
| parent | e35d617919a76b92af799baa483c4ff0e7c090e3 | commitdiff |
hw/misc: Add Microchip PolarFire SoC SYSREG module support
This creates a minimum model for Microchip PolarFire SoC SYSREG
module. It only implements the ENVM_CR register to tell guest
software that eNVM is running at the configured divider rate.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 1603863010-15807-7-git-send-email-bmeng.cn@gmail.com
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
This creates a minimum model for Microchip PolarFire SoC SYSREG
module. It only implements the ENVM_CR register to tell guest
software that eNVM is running at the configured divider rate.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 1603863010-15807-7-git-send-email-bmeng.cn@gmail.com
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
| MAINTAINERS | diffblobblamehistory | |
| hw/misc/Kconfig | diffblobblamehistory | |
| hw/misc/mchp_pfsoc_sysreg.c | [new file with mode: 0644] | blob |
| hw/misc/meson.build | diffblobblamehistory | |
| include/hw/misc/mchp_pfsoc_sysreg.h | [new file with mode: 0644] | blob |