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Merge remote-tracking branch 'remotes/dgilbert/tags/pull-migration-20210208a' into...
2021-02-02
Bin Me
n
g
hw
/
ssi: imx_spi:
Correct t
x
and r
x
fifo endian
n
ess
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-02-02
Bin
M
eng
hw/ssi:
imx_spi: Corre
c
t the bu
r
st length
> 32
b
it
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-02-02
B
i
n
M
eng
hw/ssi: imx
_
spi: Ro
u
nd up the burst l
e
n
gth to
be multiple
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-02-02
Bin Meng
hw/ssi: imx_spi: Rem
o
v
e
imx_s
p
i_up
d
at
e
_irq() in imx_spi_reset()
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-02-02
B
i
n
Meng
hw/ssi: imx_s
p
i: Use a macro for number of chip
se
l
ects
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-01-25
B
in Me
n
g
net: check
s
um: Intro
d
u
ce fine control
o
ver checksum
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-01-24
Bin Meng
hw/sd: sd
.
h: Cosmetic cha
n
ge
o
f u
s
ing s
p
aces
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-01-24
Bin Me
n
g
hw/sd: ssi-sd
:
Use macros for the du
m
my value
a
nd t
o
k
e
n
s
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-01-24
Bin Meng
hw/sd: ssi-sd: Fix
t
he wrong
comm
a
nd index for
S
T
OP_TRANSMISSION
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-01-24
Bi
n
Meng
h
w
/sd: ssi-sd: Add a state repre
s
enting
N
ac
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-01-24
B
i
n
Meng
hw/sd: s
s
i
-s
d
: Suffix
a data block with CRC16
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-01-24
Bin Meng
util:
A
d
d
CRC16 (C
C
I
T
T) calculation routines
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-01-24
Bin Meng
hw/
s
d: sd: Drop sd_crc16()
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-01-24
Bin M
e
n
g
h
w
/sd: sd: Suppo
r
t CMD59 for SP
I
m
o
de
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-01-24
B
in Meng
h
w
/
sd: ssi-sd:
F
ix i
n
correct card response sequen
c
e
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-01-16
Bin Men
g
target/riscv: Remove bui
l
t-in GDB XML f
i
l
e
s f
o
r
C
SRs
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-01-16
Bi
n
Meng
target/risc
v
:
Genera
t
e
the GDB XML f
i
l
e for CSR
r
egisters
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-01-16
Bin Meng
target/riscv: Add CSR nam
e
in
the CSR fun
c
ti
o
n
table
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-01-16
Bi
n
Meng
target/riscv: Make csr_ops
[
CSR_T
A
B
LE_
S
IZE] exter
n
al
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-01-16
Bin Meng
hw/riscv: sifive
_
u: Us
e
SIFIVE_
U
_CPU for
mc->
d
efault_cpu_type
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-01-16
B
i
n
M
en
g
hw/block:
m
2
5p8
0
: Don't
w
rite to
f
l
ash
i
f write i
s
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-01-08
B
i
n Meng
docs
/
system: arm: Add sabrelite board
d
escripti
o
n
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-01-08
Bin Meng
hw
/
arm: s
a
brelite: Connect
t
he Ethernet PHY at address
6
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-01-08
Bin
Meng
h
w/
m
s
i
c:
i
mx6_ccm: Co
r
rect reg
i
ster val
u
e for silicon
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-01-08
Bin M
e
ng
hw/misc: imx6_c
c
m: Update PMU_
M
ISC0 reset value
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-12-10
Bin Meng
t
a
rget/i3
8
6: seg_hel
p
er: Cor
r
ec
t
segment sel
e
ctor nul
l
ifi
c
at
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-11-17
Bin M
e
ng
hw
/
sd: Fix 2 GiB card CSD
regis
t
e
r
values
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-11-03
Bin Meng
hw
/
riscv: microchip_pfsoc: Hook the I2
C
1 contr
o
l
l
er
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-11-03
Bin Meng
hw/riscv: microchip_pf
s
o
c: Correct DDR
m
em
o
ry map
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-11-03
Bin Meng
hw/r
i
scv: micr
o
chip_pf
s
oc: Map
t
he reserved me
m
ory
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-11-03
Bin Meng
hw/riscv: microc
h
ip
_
p
fsoc: Connect
t
h
e
SYS
R
EG module
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-11-03
B
i
n
Me
n
g
hw/misc: Add Microchip
P
olarFire SoC S
Y
SREG module
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-11-03
Bin Meng
hw/riscv: microchi
p
_pfsoc: Connect the IOSCB modul
e
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-11-03
B
in
M
eng
h
w
/mi
s
c: Add Microch
i
p PolarFire SoC IOSC
B
mod
u
le support
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-11-03
B
i
n
Men
g
hw/riscv: microchip
_
pfsoc
:
Connect DDR me
m
o
r
y controller
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-11-03
B
in Men
g
hw/mis
c
: Add Microchip
P
olarFire SoC DDR Memory Controll
e
r
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-11-03
Bin M
e
ng
h
w
/
riscv: microc
h
ip_
p
f
soc: Docu
m
e
n
t w
h
ere to
l
o
o
k at
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-10-26
Bin Meng
hw/sd/s
d
card: Zero ou
t
f
u
n
c
tion selection fields be
f
ore
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-10-22
Bin Men
g
hw/in
t
c: Mov
e
sifi
v
e_plic
.
h
to the include directory
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-09-09
Bin Meng
hw/riscv: Sort
t
he Kco
n
fig option
s
in alphabeti
c
al
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-09-09
B
in
M
e
n
g
hw/riscv: Drop CO
N
F
I
G_S
I
FIVE
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-09-09
Bin
M
e
ng
hw/ri
s
cv: Al
w
ays build
r
i
s
cv_hart
.
c
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-09-09
Bin Me
n
g
hw/riscv
:
Move sifive_te
s
t
model to hw/misc
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-09-09
B
in Meng
hw/riscv: M
o
v
e sif
i
ve_
u
a
r
t
model to hw
/
char
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-09-09
Bin
M
e
n
g
hw/riscv
:
Move
riscv_htif model to hw/char
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-09-09
Bin
Men
g
hw
/
riscv: Mo
v
e
sifive_
p
lic m
o
del to hw
/
intc
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-09-09
Bi
n
Men
g
hw
/
riscv:
M
ove
s
i
f
ive
_
c
lint
m
odel
to hw/in
t
c
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-09-09
Bin
Men
g
hw/riscv: Move sifive_
g
pio
m
od
e
l to
hw/gpio
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-09-09
B
in M
e
ng
hw/riscv: Move sifive_u_otp model to hw
/
m
isc
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-09-09
Bin
Meng
h
w/ris
c
v: Move sifive_u_pr
c
i m
o
del to hw/misc
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-09-09
Bin Meng
hw/riscv: Move si
f
ive_e_
p
rc
i
model to hw/m
i
sc
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-09-09
Bin
Meng
h
w
/ri
s
cv: s
i
fiv
e
_u:
C
onnect
a
DMA con
t
ro
l
ler
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-09-09
Bin Meng
hw/riscv: clint: A
v
oid u
s
ing hard
-
c
o
ded
timebase
freque
n
cy
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-09-09
Bin M
e
ng
hw/riscv: microchi
p
_pfsoc: Hook GPIO contr
o
llers
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-09-09
Bin Men
g
hw/riscv: m
i
c
rochip_p
f
soc: Connec
t
2 C
a
dence G
E
Ms
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-09-09
Bin Meng
hw/ar
m
: xlnx: Set all boards' GEM
'
phy-a
d
dr'
proper
t
y
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-09-09
B
in Me
n
g
hw/net: caden
c
e_gem: Add a new 'phy-ad
d
r
'
property
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-09-09
B
in Meng
h
w
/riscv
:
microc
h
ip_p
f
soc: Connect
a
DMA controller
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-09-09
Bin Meng
h
w
/dma: Add SiFive pl
a
tform
DMA controller emulation
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-09-09
Bin Meng
h
w/riscv:
m
ic
r
ochip_pfsoc: Conn
e
ct a Cadence SDHC
I
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-09-09
B
in
M
en
g
hw/s
d
: Add
Cadence SDH
C
I emula
t
ion
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-09-09
Bin Meng
h
w/riscv: microchip
_
p
f
soc: Connect 5 MMUARTs
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-09-09
Bin Meng
hw/char: Add Micr
o
chip Polar
F
ire S
o
C MMUART emulation
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-09-09
Bin
M
e
n
g
h
w/riscv: Initi
a
l support
f
o
r
M
i
cro
c
hi
p
P
o
larFire SoC
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-09-09
Bi
n
Meng
target/riscv:
c
pu: Set
reset vector bas
e
d on the configured
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-09-09
Bin Meng
hw/riscv: hart: A
d
d a new 'resetv
e
c' pr
o
perty
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-09-09
Bi
n
M
en
g
target
/
r
i
scv: cpu: Add
a n
e
w
'res
e
tve
c
' prop
e
rty
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-08-22
Bin Meng
g
i
tlab-ci/opensbi: Update GitLab CI to build gener
i
c
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-08-22
Bin Meng
h
w
/
riscv: spike: Change the def
a
ult bios
to use generic
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-08-22
Bi
n
Meng
hw/riscv
:
U
s
e pre-built
bios im
a
ge
of generi
c
plat
f
orm
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-08-22
Bi
n
Meng
roms/Makefile:
B
uild th
e
generic platform for RISC
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-08-22
Bin Meng
roms/opensbi: Up
g
rade from v0
.
7
to v0
.
8
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-08-22
Bin
Meng
config
u
re: Cr
e
at
e
sym
b
olic links for pc-b
i
os/*
.
el
f
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-08-22
Bin Meng
hw/riscv: sifive_u:
A
dd a dummy L2 c
a
c
he controll
e
r
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-08-21
Bin Meng
hw/
s
d:
Cor
r
ect th
e
m
a
ximu
m
size of
a
Sta
n
dar
d
C
apaci
t
y
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-08-21
Bin Meng
hw/sd: Fix incorrect populated f
u
nction
s
witch status
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-07-22
Bin Meng
hw/riscv: sifiv
e
_e: Corr
e
c
t de
b
u
g block size
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2020-07-14
Bin Meng
h
w
/riscv:
Modify MROM size to end at 0x100
0
0
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-07-14
Bi
n
Meng
h
w/ri
s
cv: vir
t
: Sort
the SoC memmap tab
l
e
entries
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
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tree
2020-07-14
B
in Meng
MAINTAINERS:
Add an entry for Ope
n
S
B
I
firmware
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
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commitdiff
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tree
2020-06-19
B
i
n
Meng
hw/riscv: sifive
_
u: Ad
d
a dumm
y
DDR me
m
o
r
y contr
o
ller
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
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commitdiff
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tree
2020-06-19
Bin M
e
n
g
hw/ris
c
v
: sifive_u: Sor
t
the SoC memma
p
t
ab
l
e entries
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
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commitdiff
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tree
2020-06-19
Bin M
e
n
g
hw/riscv
:
sifive
_
u
:
Su
p
port different boot s
o
urce per
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
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tree
2020-06-19
Bin Meng
hw/ris
c
v: sifive: Change S
i
F
i
ve E/U CPU reset vector
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
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tree
2020-06-19
Bin Meng
target/riscv: Rename IB
E
X CPU init rou
t
ine
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-06-19
B
in M
e
ng
h
w
/riscv: sif
i
ve_u
:
Add a new property msel for
MS
E
L
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
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tree
2020-06-19
Bin Men
g
hw/
r
isc
v
: sifiv
e
_u: Renam
e
serial
p
roperty get/set
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
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tree
2020-06-19
Bin Meng
hw/r
i
s
cv
:
s
i
fiv
e
_u:
Ad
d
reset fu
n
ctionality
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
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tree
2020-06-19
Bin
M
eng
hw/riscv:
sifive_gpio:
D
o
n
o
t bl
i
ndly trigger ou
t
pu
t
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-06-19
Bin Meng
hw/risc
v
: sifive_u:
H
ook a GPIO controller
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-06-19
B
in Meng
hw/r
i
scv: sif
i
ve_gpio: A
d
d a new 'ng
p
io' pro
p
erty
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
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tree
2020-06-19
Bin Meng
h
w/riscv: s
i
five_gp
i
o
: Clea
n
up th
e
c
o
des
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-06-19
B
i
n
Meng
hw/riscv: sifive_u: Generate device tree node for OTP
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-06-19
Bin
M
eng
hw
/
ri
s
c
v:
sifi
v
e
_
u: Simplify th
e
G
E
M IRQ
c
onnect
code
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-06-19
Bin M
e
ng
hw/risc
v
: o
p
ent
i
tan: Remove the riscv_ pref
i
x of the
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-06-19
B
i
n Meng
hw/riscv: si
f
i
v
e
_e: Remove the riscv_
p
re
f
ix of the
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-06-19
Bin Meng
riscv: Keep the
CPU ini
t
r
outine nam
e
s consistent
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-06-19
Bin Me
n
g
riscv:
Gener
a
l
i
ze CPU
i
nit routine for t
h
e imacu
C
PU
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-06-19
Bin Men
g
riscv: Generalize CP
U
in
i
t
routine for the gcsu
CPU
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-06-19
Bin Me
n
g
riscv: Generalize
C
PU
i
nit routine for
t
he base
CPU
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
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