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hw/block/nvme: Fix a build error in nvme_get_feature()
2021-02-11
Bin Meng
hw/
b
lock/nvme:
F
i
x
a bu
i
ld error i
n
nvme_get_feature()
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-02-10
Bin Men
g
target/p
p
c
:
Add E500 L2CSR0 write hel
p
er
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-02-10
Bin Men
g
hw/net: f
s
l_etse
c
: Reverse
th
e
RCT
R
L
.
RSF logic
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-02-10
Bi
n
Meng
hw
/
ppc: e500: Fill in correct <clock-frequency> for
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-02-10
B
in Meng
hw/ppc: e500: U
s
e
a
macro for the pl
a
tform
cl
o
ck
frequen
c
y
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-02-02
Bin Meng
hw/ssi: imx_spi: Correct tx
an
d
rx fifo
e
ndianness
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-02-02
B
i
n Meng
h
w/ss
i
:
i
mx_spi:
Co
r
r
ec
t
th
e
burst
length > 32 bit
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-02-02
Bin Meng
hw/ss
i
:
imx_spi:
R
ound up the burst
len
g
th to be m
u
lti
p
le
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-02-02
Bin Me
n
g
hw/ssi: imx_spi: Remov
e
imx_spi_update_irq() in imx_spi_r
e
set
(
)
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-02-02
Bi
n
Me
n
g
hw/ssi
:
imx_sp
i
: Use a ma
c
ro for number of chi
p
select
s
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-01-25
Bin Meng
net: checks
u
m
:
Introduce fine
c
ontrol over
c
h
ecksum
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-01-24
Bi
n
Me
n
g
h
w/sd: sd
.
h:
C
osmetic change of using spaces
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-01-24
Bin
Meng
hw/sd: ssi-
s
d: U
s
e macros fo
r
the dummy value and tokens
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-01-24
Bin Meng
h
w
/
s
d
:
ssi-sd: Fix th
e
wro
n
g
com
m
and
i
n
d
ex for STOP_TRANSMISSION
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-01-24
B
i
n Meng
hw/s
d
: ss
i
-sd: Add a state represe
n
ting Nac
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-01-24
Bin Men
g
h
w/sd: ssi-sd: Su
f
f
i
x
a
data block
with CRC16
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-01-24
Bin Meng
util: Add CRC16
(CCIT
T
) c
a
lc
u
l
a
tion rou
t
ines
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-01-24
Bin Meng
hw/sd: sd: Drop sd
_
c
rc
1
6()
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-01-24
Bin Meng
hw/sd: s
d
: S
u
pport CMD59 for SPI mo
d
e
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-01-24
B
i
n
Meng
hw/sd: ssi-sd
:
Fix in
c
orrec
t
card re
s
ponse sequence
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-01-16
Bin Meng
target/risc
v
: Remove bui
l
t-in GD
B
XML files for CSRs
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-01-16
B
in Meng
ta
r
get/riscv: Ge
n
era
t
e
t
he GDB XML fi
l
e for CSR registers
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-01-16
Bi
n
Meng
target/riscv: A
d
d CSR name in the CSR function
t
able
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-01-16
B
i
n Meng
target/
r
is
c
v
:
Ma
k
e cs
r
_ops[CSR_TABLE_SIZE] external
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-01-16
Bin Meng
hw/riscv: sifive_u: Use SIFIVE_U_CPU for mc->default_cpu_type
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-01-16
Bin
M
e
ng
hw/b
l
ock: m2
5
p80: Do
n
't w
r
i
te to flash if w
r
ite is
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-01-08
Bin Meng
docs/sy
s
t
e
m: a
r
m: Add sabrelite boa
r
d
d
e
s
c
r
iption
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-01-08
Bin Meng
hw/arm: sab
r
eli
t
e: Connect the Ethernet PH
Y
at a
d
dr
e
ss 6
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-01-08
Bi
n
Meng
h
w
/msic: imx6_c
c
m: Correct register va
l
ue for silic
o
n
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-01-08
Bin Meng
hw/misc: imx6_ccm
:
Update PM
U
_
MISC0
reset
va
l
ue
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-12-10
Bin Meng
target/i386:
s
e
g
_
helper: Correct segme
n
t selector nullificat
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-11-17
Bin Meng
h
w
/sd: Fix 2 GiB card CS
D
regis
t
er values
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-11-03
B
i
n
M
e
ng
hw/riscv: microchip_pfsoc: Hook the I2C1 c
o
ntro
l
ler
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-11-03
Bin
M
eng
hw/riscv
:
microchip_pfsoc: Cor
r
ec
t
DDR
m
emory ma
p
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-11-03
Bin Meng
hw/
r
isc
v
: m
i
crochip_p
f
so
c
: Map the reserved mem
o
ry
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-11-03
Bin Meng
hw/r
i
sc
v
:
microchip_pfso
c
: C
o
nnect the SYSRE
G
module
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-11-03
B
i
n Meng
hw/misc: Add Microchi
p
PolarFire SoC SYSRE
G
modu
l
e
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-11-03
Bin Meng
hw/
r
iscv: mic
r
ochip_pfsoc: Conn
e
c
t the IOSCB module
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-11-03
B
i
n
Meng
hw/misc
:
Add Microch
i
p
P
olarFire SoC I
O
SC
B
module suppo
r
t
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-11-03
Bin Meng
hw/riscv: microchip_pfsoc: Connect DDR memor
y
c
o
ntroller
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-11-03
Bin
M
eng
hw/misc
:
A
d
d
Microchip
P
olar
F
ire SoC DDR Memory
Controller
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-11-03
Bin Meng
h
w/
r
iscv: micr
o
chip_pfsoc: Do
c
umen
t
where to loo
k
at
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-10-26
Bi
n
M
eng
hw/sd/sdc
a
rd: Zero out funct
i
on selection fields
before
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-10-22
Bin Meng
hw
/
intc: Move sifive_plic
.
h to t
h
e inc
l
u
d
e d
i
rec
t
o
r
y
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
Bin Meng
hw/r
i
scv: Sort th
e
Kconfig optio
n
s
i
n a
l
phabetical
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
Bin Meng
h
w/riscv: Drop CONFIG_SIFIVE
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
B
i
n Me
n
g
hw
/
riscv: A
l
way
s
build riscv_hart
.
c
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
B
in Meng
hw
/
riscv: Move sifive_test mo
d
el to hw/m
i
s
c
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
Bi
n
Meng
hw/riscv: Move
sifive_uart model to hw/char
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
Bin Meng
hw
/
riscv: Move riscv_htif model to hw/char
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
Bin Meng
h
w
/
riscv: Move sifive_pl
i
c model to hw
/
intc
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
Bi
n
Meng
hw/riscv: Move sifive_
c
lint model to hw/intc
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
Bin Me
n
g
h
w
/ris
c
v: Mo
v
e sifive_gpio model to hw/gp
i
o
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
B
in Meng
hw/risc
v
: Move
sifiv
e
_u_otp model
to h
w
/misc
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
Bin Meng
hw/r
i
scv
:
Mov
e
sifive_u_pr
c
i model to hw/m
i
sc
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
Bin Meng
hw/ri
s
cv: Move s
i
five_e_prci
m
odel to hw/misc
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
Bin M
e
ng
hw/r
i
scv
:
sifiv
e
_u: Con
n
ect a D
M
A c
o
nt
r
ol
l
er
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
B
i
n Meng
hw/
r
iscv: cli
n
t
: Av
o
i
d
u
sing hard-co
d
ed t
i
m
e
base f
r
equen
c
y
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
Bin Meng
hw/riscv:
m
icr
o
c
h
ip_
p
f
s
oc:
Ho
o
k
GPIO
c
ontrollers
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
Bin M
e
n
g
hw/r
i
s
cv:
mic
r
oc
h
ip_
p
fsoc:
Connect 2 Ca
d
ence GEMs
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
Bin Meng
hw/ar
m
: xlnx: Set all boards' GEM 'phy-addr' property
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
B
i
n
Men
g
hw/n
e
t: cade
n
ce_gem: Add a new 'ph
y
-addr' p
r
ope
r
t
y
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
B
i
n
Meng
hw/
r
iscv: microchip_
p
f
s
oc: Connect a DMA c
o
ntroll
e
r
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
Bin Meng
hw/dma: A
d
d
SiFive pl
a
tform
D
MA c
o
n
t
roller
e
mul
a
tion
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
Bin
Meng
hw/riscv: micr
o
chip_p
f
soc: Conne
c
t a Ca
d
ence
S
DHCI
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
Bin Meng
hw/
s
d: Add Cadence
S
DHCI emulatio
n
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
Bin M
e
ng
hw/ri
s
cv
:
mic
r
ochip_pfs
o
c: Co
n
nect 5 MMUARTs
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
Bin Meng
hw/char: Add Mic
r
ochip
PolarFi
r
e SoC MMUART emulation
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
Bin Meng
hw/riscv:
Initial support
f
or Microchi
p
PolarFir
e
SoC
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
Bin Me
n
g
targ
e
t/riscv: cpu
:
S
et reset vector based
on the con
f
igured
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
Bin Meng
h
w
/riscv
:
hart
:
Add a new 're
s
e
tvec' property
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
Bin M
e
ng
targe
t
/
r
i
s
c
v: cpu
:
Add a
new 're
s
e
t
vec' propert
y
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-08-22
Bin Meng
gitlab-ci/opens
b
i: Update
G
itL
a
b CI to build g
e
neric
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-08-22
Bin Me
n
g
hw/risc
v
:
spike: Change the d
e
f
ault bios to use generic
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-08-22
Bin Meng
h
w
/
riscv:
Use pre-bui
l
t bios im
a
ge of ge
n
eric platform
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-08-22
B
i
n M
e
ng
r
o
ms/Makefi
l
e:
Build th
e
generic pl
a
tform for RISC
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-08-22
B
i
n Meng
roms/
o
pensbi: Upgrade fr
o
m v
0
.
7
to v0
.
8
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-08-22
Bin Meng
con
f
ig
u
re: Create
s
ymbolic links for pc-b
i
os/*
.
elf
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-08-22
B
in
Meng
hw/riscv: sif
i
ve_u: Add a dummy L
2
ca
c
h
e
c
o
n
t
r
o
ller
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
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2020-08-21
B
i
n
Me
n
g
h
w
/sd: Corr
e
ct
the maximum size of a Sta
n
da
r
d Capacity
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
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2020-08-21
Bin Meng
hw/
s
d: F
i
x incorr
e
ct populated
f
uncti
o
n
s
witch
s
tatus
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
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2020-07-14
B
i
n Meng
hw/risc
v
: Mo
d
ify M
R
OM size to e
n
d at
0
x10000
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
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commitdiff
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tree
2020-07-14
Bin
M
eng
hw/riscv:
v
irt: S
o
rt the SoC memmap
table entr
i
es
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
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commitdiff
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tree
2020-06-19
Bin Meng
h
w
/riscv: sif
i
ve_
u
: Ad
d
a
d
ummy
DDR memory
c
ontroller
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
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commitdiff
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tree
2020-06-19
B
in Meng
h
w
/riscv: sifive_u
:
S
ort the SoC memmap
table
entries
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
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tree
2020-06-19
Bin Meng
hw/riscv: s
i
five_u: Support differe
n
t boot sourc
e
per
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
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commitdiff
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tree
2020-06-19
Bin Meng
hw/riscv
:
sifive: Change SiFive E/U CP
U
reset vector
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
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commitdiff
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tree
2020-06-19
Bin Meng
targ
e
t
/r
i
scv: Re
n
a
m
e IBEX CPU init routine
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
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commitdiff
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tree
2020-06-19
B
i
n Meng
hw/riscv: sifive_u: Add a
n
ew pr
o
p
erty msel for MSEL
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
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commitdiff
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tree
2020-06-19
Bin Me
n
g
hw/riscv: si
f
iv
e
_u: Rename serial prop
e
rty get
/
set
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
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tree
2020-06-19
Bin Meng
hw/
r
iscv: sif
i
ve_u: Add
reset functional
i
ty
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-06-19
Bin Meng
hw/r
i
scv: sif
i
v
e_g
p
i
o
: Do not blindly t
r
igger output
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
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tree
2020-06-19
B
in Meng
h
w
/riscv:
s
ifive
_
u: Ho
o
k a
GPIO co
n
troller
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-06-19
Bin Meng
hw/r
i
scv: sifiv
e
_g
p
io
:
A
d
d a new 'n
g
pio' prope
r
ty
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
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tree
2020-06-19
B
i
n
Meng
hw/riscv: sifive_g
p
i
o
: Clean up t
h
e codes
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-06-19
Bin
M
e
ng
hw/risc
v
: sifive_u
:
Gen
e
rate device tree node
for OTP
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
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tree
2020-06-19
Bin Meng
hw/riscv: sifiv
e
_
u
: S
i
m
pl
i
fy
t
he G
E
M IRQ conne
c
t code
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
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tree
2020-06-19
Bin Meng
hw/riscv: opentitan:
R
emove th
e
riscv_ pref
i
x
of the
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-06-19
B
in Meng
hw
/
riscv: sifive_
e
:
R
emove
the riscv_ prefix of the
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-06-19
Bin Meng
riscv: Kee
p
the CPU init routi
n
e names co
n
sist
e
nt
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
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