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hw/sd: ssi-sd: Support multiple block read
2021-02-19
B
i
n
Meng
hw
/
sd: ssi-sd: Suppor
t
multiple block read
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-02-11
Bin Meng
hw/block/nvme:
F
ix a bui
l
d e
r
ror in nvme_get
_
feature()
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-02-10
Bin
Meng
tar
g
et/ppc: Add E
5
00 L2CSR0 wri
t
e
h
elper
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-02-10
Bi
n
Me
n
g
h
w/net:
f
sl_
e
tsec: Reverse the RCTRL
.
R
S
F logic
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-02-10
B
in Men
g
h
w/
p
p
c: e
5
00: Fill
i
n correct <clock-frequency> fo
r
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-02-10
Bin Meng
hw/ppc:
e
50
0
: U
s
e
a macro for the platform
c
lock fr
e
q
u
e
ncy
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-02-02
Bin Meng
hw/ssi
:
i
m
x_sp
i
: Cor
r
ect tx and rx fifo
endia
n
n
ess
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-02-02
Bin
M
e
ng
hw/ssi: imx_spi: Correct the burst
length >
3
2
b
i
t
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-02-02
Bin Meng
hw/ssi:
im
x
_spi: Ro
u
nd up the burst
l
en
g
th to be
m
ul
t
iple
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-02-02
B
i
n
Men
g
h
w/ssi: i
m
x_spi: R
e
m
ove imx_s
p
i_updat
e
_irq(
)
in imx_spi_reset()
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-02-02
Bi
n
Me
n
g
hw/ss
i
:
i
m
x_spi: Use a
m
acro for number
o
f chip selects
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-01-25
Bi
n
Meng
ne
t
: check
s
um: In
t
rodu
c
e fine cont
r
ol over checksu
m
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-01-24
B
in Meng
hw/sd: sd
.
h: Cosmetic change of using s
p
aces
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-01-24
Bin
Men
g
hw/sd: ssi-sd
:
Use macros for the d
u
mm
y
v
a
lue and to
k
ens
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-01-24
Bin Meng
hw/sd: ssi-s
d
: Fix the wrong
command index fo
r
STOP_TRANSM
I
SSION
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-01-24
Bin Meng
hw/
s
d: ssi-sd: Add a state representi
n
g N
a
c
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-01-24
Bin Meng
h
w
/sd: ssi-sd: Suffi
x
a
d
a
ta block with C
R
C16
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-01-24
B
i
n Meng
util: Ad
d
C
RC16 (CCITT) calculation
r
outin
e
s
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-01-24
Bin
M
eng
hw/sd
:
s
d
: Drop sd_crc16
(
)
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-01-24
Bin Meng
hw/
s
d
:
sd
:
Support
C
M
D59
f
or
SPI mod
e
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-01-24
Bin Meng
h
w/sd: s
s
i-sd: Fix incorrect card respo
n
se sequ
e
n
ce
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-01-16
Bin Me
n
g
targ
e
t
/ri
s
cv: Remove
built-
i
n GDB XML files for CSRs
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-01-16
Bin Meng
t
a
rget/riscv:
G
enera
t
e the
G
DB XM
L
fil
e
for CSR regist
e
r
s
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-01-16
Bin Me
n
g
t
arget/riscv: Ad
d
CSR name in
th
e
CSR funct
i
on table
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-01-16
B
in
M
eng
target/r
i
s
cv:
M
ake csr_o
p
s
[
CSR_TABLE_SIZE] external
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-01-16
Bin Meng
h
w/
r
iscv:
sifive_u: Use
S
IFIVE_U_CPU for mc->
d
efault_cpu_typ
e
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-01-16
Bin Meng
hw/block: m
2
5p80: Don't writ
e
to flas
h
i
f w
r
i
t
e is
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-01-08
Bin Meng
docs/syst
e
m:
a
r
m:
A
dd sab
r
elite
b
oard desc
r
ip
t
i
on
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-01-08
B
i
n
Meng
hw/arm
:
sabrelite:
Connect the Ethernet PHY at address 6
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-01-08
B
i
n Men
g
hw/msic: i
m
x
6
_ccm: Correct register value for silic
o
n
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-01-08
B
in Meng
hw/m
i
sc: imx6_ccm: Updat
e
PM
U
_
M
ISC0 r
e
s
e
t
v
alue
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-12-10
Bin Meng
target/i386: seg_help
e
r
: Correc
t
s
e
g
m
e
n
t se
l
ector
nullifica
t
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-11-17
Bin Meng
h
w
/sd: Fix 2
Gi
B
ca
r
d CSD
register valu
e
s
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-11-03
Bi
n
Meng
h
w
/r
i
scv: micr
o
chip_pf
s
o
c
: Hook th
e
I2C1 controller
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-11-03
Bin Meng
h
w/ris
c
v: mic
r
ochip_pfsoc
:
Co
r
rect DDR memory map
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-11-03
B
i
n Me
n
g
h
w
/r
i
scv: micro
c
hip
_
pfsoc: M
a
p the reserved memo
r
y
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-11-03
Bin
M
e
n
g
h
w
/riscv: micr
o
chip_pfsoc: Connect the SYSREG module
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-11-03
Bin
Meng
h
w
/mi
s
c: Add Microchip PolarF
i
re SoC SYSREG module
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-11-03
B
i
n Meng
hw
/
ris
c
v: microchip_pfsoc:
C
onnect the I
O
SCB modul
e
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-11-03
Bin Meng
hw/misc: Add Microchip PolarFire SoC
I
OS
C
B
module sup
p
o
r
t
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-11-03
B
in Meng
hw/riscv: micr
o
chip_pfsoc: Connect DDR mem
o
ry controller
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-11-03
Bin Meng
hw/mis
c
: Add Micro
c
hip PolarFire
So
C
DDR
Memory Controlle
r
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-11-03
Bin Meng
h
w
/riscv: microchip_
p
fsoc
:
Document where to loo
k
at
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-10-26
Bin Meng
hw/s
d
/sdcard: Zero o
u
t function selec
t
i
o
n
f
ield
s
b
efore
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-10-22
Bin M
e
ng
h
w/intc:
M
ove sif
i
ve_pl
i
c
.
h
t
o th
e
include dir
e
ctory
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
Bin
Meng
h
w/riscv: So
r
t the Kc
o
nf
i
g options
in alphabetical
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
B
i
n Me
n
g
hw/riscv
:
Drop
C
O
NFIG_SIFIVE
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
Bin Meng
hw/ri
s
cv: Always bui
l
d riscv_
h
art
.
c
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
Bi
n
Meng
hw/riscv: Move sifive_test model t
o
hw/misc
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
Bin Meng
hw/r
i
scv: M
o
ve sifive_uart mode
l
to
hw/char
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
Bin Meng
h
w
/riscv: Move riscv_ht
i
f model t
o
hw/char
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
Bin Meng
hw/riscv:
M
ove
sifive_
p
l
i
c
model to hw/intc
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
Bin Meng
hw/ri
s
cv: Move sifive_cli
n
t model
to h
w
/intc
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
B
i
n Meng
hw/riscv: Move sifive_gpio model to hw/
g
pi
o
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
Bin
Meng
hw/riscv: Mov
e
sifive_u
_
o
t
p m
o
del to hw/misc
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
Bin Meng
hw/riscv: Move sifive_u_prc
i
model to hw/misc
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
Bin M
e
ng
h
w/ri
s
cv: Mo
v
e
sifive_e_pr
c
i
m
odel t
o
hw/misc
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
Bin Meng
hw/riscv: s
i
five
_
u: Con
n
ect a
DMA controller
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
Bin Meng
hw/riscv
:
clint: Avoid
u
sing
har
d
-coded timebase frequency
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
Bin
M
eng
hw/riscv: microch
i
p_pfso
c
: Hook G
P
I
O
c
o
ntrollers
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
Bin Meng
h
w
/risc
v
: microc
h
ip
_
pfsoc: Connect 2 Ca
d
e
n
ce GEMs
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
Bin Meng
hw/arm:
x
lnx:
S
et all boards' GEM 'p
h
y
-addr' pr
o
pert
y
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
Bin Meng
hw/net: cadence_g
e
m: A
d
d
a new 'phy
-
addr' pro
p
e
r
ty
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
Bin Meng
hw/
r
is
c
v: microchip_pfsoc:
C
on
n
ect
a DMA controller
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
Bin Meng
hw
/
dma:
Add
S
iFiv
e
platfo
r
m
DMA c
o
ntroller emulation
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
Bin Meng
hw
/
riscv: microch
i
p_pfsoc: Connect a Cad
e
nce SDHCI
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
B
in Meng
hw/sd: Add Cadence SDHCI emula
t
ion
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
Bin Meng
hw/riscv: microch
i
p_pfsoc: Connect 5
MMUARTs
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
Bin Meng
hw/char: Add
M
icroch
i
p P
o
larF
i
re SoC MM
U
ART emu
l
ation
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
B
in Me
n
g
h
w/riscv:
Initial support for Micr
o
chip
Pola
r
Fire
SoC
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
Bin Meng
target/
r
iscv:
c
pu
:
Set reset ve
c
tor base
d
on the confi
g
ured
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
Bin Meng
hw
/
riscv: hart
:
Add a
n
ew 'res
e
tvec' pr
o
perty
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
Bin
M
eng
targe
t
/riscv: cpu: Add a
n
ew 'resetv
e
c'
p
roperty
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-08-22
Bin Meng
gitlab
-
c
i/opensbi:
U
pdat
e
GitLab CI to build generic
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-08-22
B
in Meng
h
w
/riscv: spi
k
e
: C
h
a
n
ge t
h
e default
b
ios to use generic
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-08-22
Bin Meng
hw/riscv: Us
e
pre-built bios im
a
ge
of generic platform
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-08-22
Bin Meng
roms/Mak
e
f
ile: Build
the g
e
neric pla
t
form
f
o
r RISC
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-08-22
Bin Meng
roms/opensbi: Upgrad
e
from
v
0
.
7
t
o v0
.
8
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-08-22
Bin M
e
ng
configure
:
Create symbolic links for pc
-
bios/
*
.
elf
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
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commitdiff
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tree
2020-08-22
B
i
n
M
eng
hw/r
i
scv: s
i
five_u: Add a
dummy L2 cache cont
r
oller
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
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commitdiff
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tree
2020-08-21
B
in Men
g
hw/sd: Cor
r
ect the
m
aximum
s
i
z
e of a Standard Capacity
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
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commitdiff
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tree
2020-08-21
Bin Meng
h
w
/sd: Fix inco
r
rect popu
l
a
ted f
u
nction switc
h
status
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
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commitdiff
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tree
2020-07-14
B
in
M
eng
h
w/riscv: Modi
f
y
M
R
OM size to end at 0x10000
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
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commitdiff
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tree
2020-07-14
Bin Meng
hw/
r
i
scv: virt: Sort the SoC memmap table
e
ntries
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
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commitdiff
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tree
2020-06-19
Bi
n
Meng
hw/riscv: s
i
five_u: Add
a
dummy
D
DR m
e
mory
c
ontr
o
l
le
r
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-06-19
Bi
n
Men
g
hw/riscv: sifive_u: Sort th
e
SoC memmap table entries
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-06-19
Bi
n
Meng
hw/riscv
:
s
i
f
i
ve_u: Support
d
ifferent boot s
o
ur
c
e p
e
r
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
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tree
2020-06-19
Bin Meng
hw/riscv: si
f
i
v
e: Chang
e
S
iFive E/U CPU
reset vector
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
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commitdiff
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tree
2020-06-19
B
i
n Me
n
g
target/risc
v
: Rename IBE
X
CPU i
n
it ro
u
t
ine
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-06-19
Bin
M
eng
hw/ri
s
cv: s
i
five_u
:
A
d
d a new pro
p
erty msel for MSE
L
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-06-19
Bin
M
eng
hw
/
ri
s
c
v:
s
ifive_u: Ren
a
me se
r
ial propert
y
get/set
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-06-19
Bin Meng
hw/riscv:
s
ifive_u: Add
r
es
e
t functionalit
y
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-06-19
Bin Meng
hw/riscv: sifive
_
gpio: D
o
not
bl
i
n
d
ly trigger
o
u
tput
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-06-19
Bin Meng
hw/riscv: sifive_u:
Ho
o
k a GPIO
c
ontro
l
ler
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-06-19
B
in Meng
hw/riscv
:
s
ifive
_
gpio: Add a new 'ngpio' propert
y
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-06-19
Bin Meng
h
w
/riscv: sifive_gpio: Clean
up the codes
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-06-19
Bi
n
Meng
hw/r
i
s
c
v: sifive_u: Generat
e
device t
r
ee node for OTP
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-06-19
Bin
M
e
ng
hw/riscv: sifiv
e
_u:
S
imp
l
ify the GEM
I
RQ
c
onne
c
t code
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-06-19
Bin Meng
hw/r
i
scv: open
t
ita
n
: Remo
v
e the r
i
scv_
p
refi
x
o
f the
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-06-19
Bi
n
Meng
hw/r
i
scv: sifive_e: Remove th
e
risc
v
_ pre
f
ix of
t
he
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
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