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hw/ppc: e500: Fill in correct <clock-frequency> for the serial nodes
2021-02-10
Bin Meng
hw/
p
pc
:
e5
0
0: Fil
l
in correct
<clo
c
k-frequ
e
ncy>
f
or
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-02-10
Bi
n
Meng
h
w
/
p
pc: e50
0
:
Use a m
a
c
r
o
for the pl
a
tfo
r
m cloc
k
frequency
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-02-02
Bin M
e
n
g
hw/ssi: imx_spi: Correct tx
a
n
d rx
f
i
f
o en
d
ianness
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-02-02
Bin Me
n
g
hw/ssi: i
m
x_spi: C
o
rrect the
b
u
r
st length > 3
2
bit
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-02-02
B
i
n Meng
hw/s
s
i: imx_sp
i
: R
o
u
nd up the burst length to be m
u
ltiple
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-02-02
B
in Meng
hw/ssi: imx_spi:
R
emove im
x
_s
p
i_update_irq()
i
n im
x
_
s
pi_
r
eset()
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-02-02
Bin Meng
hw/ss
i
: imx_
s
pi: Use a macro for
n
umber of chip select
s
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-01-25
Bin
Meng
net: checksum: Introduce fine
c
ontrol ove
r
checksum
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-01-24
Bin Meng
hw/sd: sd
.
h: Cosmet
i
c change of using spac
e
s
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-01-24
Bin M
e
n
g
hw/sd:
s
s
i
-s
d
: Use
macros for the dummy value a
n
d tokens
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-01-24
Bin M
e
n
g
h
w
/sd: ssi-sd
:
Fix the wrong comman
d
index for STOP
_
TR
A
NS
M
IS
S
ION
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-01-24
Bin Me
n
g
hw/sd: ssi-sd: Add a
s
t
a
te represe
n
ting N
a
c
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-01-24
Bin Meng
hw/sd: ssi-sd: Su
f
fix a data block w
i
th CRC16
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-01-24
Bin Meng
util: Add CRC16 (CCITT)
calculation routines
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-01-24
Bin Meng
hw/sd: sd: Drop sd_crc
1
6(
)
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-01-24
Bin Meng
hw/sd: sd: Support CMD59
f
or SP
I
mo
d
e
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-01-24
Bin Meng
hw/s
d
: ssi
-
sd: Fix incorrect card re
s
ponse sequence
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-01-16
Bin Meng
target/
r
isc
v
: Remove bui
l
t-in GDB XML files for CSRs
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-01-16
Bin Meng
target/riscv: Gen
e
rate the GDB
XML file
f
o
r
CSR registers
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-01-16
Bi
n
Meng
t
arget
/
r
iscv: Ad
d
C
SR name in the C
S
R fu
n
c
tion tabl
e
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-01-16
B
i
n
Meng
target/riscv: Make
csr
_
ops[C
S
R_TABLE_SIZE] e
x
te
r
nal
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-01-16
Bin Meng
hw/riscv: sifive_u: Use SIF
I
VE_U_CPU f
o
r mc->default_cpu_t
y
pe
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-01-16
Bin Meng
hw/block: m25p80: Don't write to f
l
ash if wri
t
e is
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-01-08
Bin
M
eng
docs/syst
e
m:
arm: Add
s
abreli
t
e board description
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-01-08
Bin Meng
hw
/
arm: sabrelite:
C
onnect
the Etherne
t
P
H
Y at address
6
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-01-08
B
i
n
Meng
hw/
m
s
i
c: im
x
6_ccm: C
o
r
rect register value for
s
ilicon
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2021-01-08
Bin Me
n
g
hw/misc: imx6_ccm: Up
d
ate PMU_MISC0
r
eset value
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-12-10
B
in
Meng
target/
i
386: seg_helper: Correc
t
s
e
gment selector n
u
llificat
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-11-17
Bin Meng
hw
/
sd: Fix 2 GiB card C
S
D r
e
gister v
a
lues
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-11-03
Bin Meng
hw/riscv: microchip_p
f
s
o
c:
H
ook the I2C1 controller
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-11-03
Bin M
e
ng
hw/riscv: microc
h
ip_
p
fsoc
:
Corre
c
t DD
R
memo
r
y
map
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-11-03
B
i
n
M
e
ng
hw/riscv
:
micro
c
hip_
p
fsoc: Map
the reserved memory
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-11-03
Bin Meng
hw/r
i
scv: microchip_pfsoc: Connect the
S
YSRE
G
mod
u
l
e
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-11-03
Bin Me
n
g
h
w/
m
isc: Add
Micro
c
hip PolarFire
SoC SYSREG
m
odule
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-11-03
B
in
Meng
hw/riscv: microch
i
p_pfsoc: C
o
nnect the IOSCB mod
u
l
e
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-11-03
Bin
M
eng
hw/misc: Add Mi
c
rochi
p
P
o
l
arF
i
re SoC IOSCB module support
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-11-03
Bin Meng
h
w
/risc
v
: microchip_pfso
c
: Connect DDR
m
emory controll
e
r
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-11-03
Bin Meng
hw/
m
isc
:
Ad
d
M
icr
o
chip
P
olarFi
r
e SoC DDR
M
emory Contro
l
ler
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-11-03
Bin Meng
hw/r
i
s
c
v: microchip_pfsoc: Docum
e
nt where to
l
o
ok a
t
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-10-26
Bin Meng
hw/sd/sdcard: Zero out
function selection fi
e
lds bef
o
r
e
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-10-22
Bin Men
g
hw/intc: Move sifive_plic
.
h
t
o
the include di
r
ectory
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
Bin Me
n
g
h
w/
r
iscv: Sort
the Kconfig options
i
n alp
h
a
b
e
tical
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
B
i
n
Meng
h
w/riscv: Drop CON
F
IG_SIF
I
VE
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
B
i
n Meng
hw/riscv: Always build riscv
_
h
a
rt
.
c
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
B
i
n Men
g
hw
/
risc
v
: Move sifive_
t
est m
o
d
e
l to hw/mis
c
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
Bin Meng
hw/ri
s
cv: Mo
v
e
sifive_uart model
t
o
h
w
/char
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
Bin M
e
ng
hw/risc
v
: Move riscv_
h
tif
m
ode
l
to hw
/
c
h
ar
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
Bin Meng
hw/ri
s
cv: Move
sifive_plic m
o
del to hw/intc
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
B
i
n Meng
hw/riscv: Mov
e
sifi
v
e_clint model to hw/intc
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
Bin Meng
hw/
r
i
s
cv: Move
sifive_gpio m
o
del to h
w
/
g
pio
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
Bi
n
Meng
hw/
r
i
s
c
v: Move s
i
five_u_otp model to hw/misc
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
Bin Meng
hw/riscv: Move sifive_u_
p
rci
m
odel
to hw/misc
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
Bin Me
n
g
hw/riscv: Move
sifive_e_prci model to hw/misc
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
B
i
n
Meng
hw
/
r
iscv: sif
i
ve_u: Connect a DMA con
t
roller
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
Bin Meng
hw/riscv: clin
t
:
A
void using hard-coded timebase frequenc
y
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
Bin Meng
hw/riscv: mi
c
rochip_pfsoc:
H
ook
G
PIO contro
l
lers
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
Bin Me
n
g
hw/riscv:
m
icrochip_
p
fsoc: Connec
t
2 Cadenc
e
GE
M
s
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
Bi
n
Meng
hw/a
r
m: xlnx: Set all
board
s
' G
E
M '
p
hy-addr' prop
e
rty
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
Bin Meng
hw/net: caden
c
e_ge
m
: Add a new 'phy-
a
ddr' p
r
operty
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
Bin
Meng
hw/risc
v
: microc
h
ip_pfsoc: Conne
c
t a DMA
controlle
r
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
Bin Meng
h
w
/dma
:
A
dd Si
F
iv
e
pl
a
tform DMA co
n
troll
e
r
emulation
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
B
i
n
Men
g
hw/riscv: microchip_pfs
o
c
:
Connect a Cadence
SDHCI
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
B
i
n Me
n
g
hw
/
s
d: Add Cad
e
nc
e
SDHC
I
em
u
la
t
i
o
n
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
Bin Meng
hw/
r
iscv: microch
i
p
_
pfsoc: Connect 5
MM
U
A
R
T
s
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
Bin Meng
hw/cha
r
:
A
d
d Micr
o
chip PolarFire SoC MMUART
e
mulation
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
Bi
n
Meng
hw/r
i
scv
:
I
n
itial supp
o
rt for Microchip PolarFire SoC
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
B
i
n Me
n
g
targ
e
t
/
ris
c
v: c
p
u: S
e
t reset ve
c
tor b
a
sed on
the
c
onfigured
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
Bin
Meng
h
w
/riscv: hart: Add a new 're
s
etvec' property
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-09-09
B
in Meng
target
/
riscv: cpu:
A
dd
a new 'resetve
c
'
p
roperty
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-08-22
Bin Meng
gitlab
-
ci/ope
n
sbi:
Up
d
ate GitLab CI to b
u
ild generi
c
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-08-22
Bin Meng
hw/riscv:
s
pike: Ch
a
n
g
e
the
d
efault
b
i
o
s
to use gen
e
ric
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-08-22
B
i
n
M
eng
hw/riscv: Use pre-buil
t
bi
o
s image
o
f generic
platfor
m
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-08-22
B
i
n Me
n
g
r
oms/
M
ake
f
ile: Bu
i
l
d
the gener
i
c platform
f
or RIS
C
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-08-22
Bin Meng
rom
s
/op
e
nsbi: Upgrade from v
0
.
7 to v0
.
8
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-08-22
Bin Meng
co
n
figure: Cr
e
ate
symbolic links for
p
c-bios/
*
.
elf
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-08-22
Bin M
e
ng
hw/riscv: si
f
ive_u: Ad
d
a
d
ummy L2 cach
e
c
ontroller
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-08-21
Bin Me
n
g
hw/sd: Correct
t
h
e
maximum size o
f
a Standard
C
apacity
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-08-21
B
in Meng
hw/sd:
F
ix in
c
orrect populated functio
n
switch status
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
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2020-07-14
Bin Meng
hw/risc
v
: Modify M
R
OM size
t
o end
a
t
0x100
0
0
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
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commitdiff
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tree
2020-07-14
Bin Meng
hw
/
riscv: virt: Sort
t
he SoC
memmap tab
l
e entries
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
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tree
2020-06-19
Bin Meng
hw/ris
c
v: sifive_u: Ad
d
a
dummy D
D
R memory
c
ont
r
oller
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
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2020-06-19
B
in Me
n
g
hw/riscv: sif
i
ve_u: Sor
t
the SoC
m
e
mmap table en
t
ries
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
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tree
2020-06-19
Bin Men
g
hw/risc
v
: sif
i
ve_u: Support differe
n
t boot source p
e
r
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
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tree
2020-06-19
B
in M
e
n
g
hw/ris
c
v: sifi
v
e: Change
SiF
i
ve E
/
U CPU
r
eset
vector
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-06-19
Bin Meng
tar
g
et/
r
iscv: Rename IBEX CPU in
i
t
routi
n
e
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
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commitdiff
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tree
2020-06-19
Bin Meng
hw/r
i
sc
v
:
s
ifive_u: Add
a ne
w
property ms
e
l
for MSEL
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-06-19
Bin
M
eng
hw/ri
s
cv: sifive_
u
: Rename
se
r
ial p
r
o
p
e
rty get/set
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-06-19
Bin
M
eng
hw/ri
s
cv: sifive_u: Add reset func
t
ionality
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
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2020-06-19
Bi
n
Meng
hw/riscv: sifi
v
e_gpio: Do not b
l
indl
y
trigger output
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-06-19
B
in
M
e
ng
hw/riscv: sifiv
e
_u
:
H
ook a GPIO contr
o
l
l
er
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
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tree
2020-06-19
Bin
M
eng
hw/riscv:
s
ifiv
e
_gpio:
Add a new 'ngpio' pr
o
perty
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
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2020-06-19
Bin Meng
hw/riscv
:
sifive_gpio: Clean
up the
codes
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-06-19
Bin Meng
hw/ri
s
cv: si
f
ive_u: Gen
e
rate device
t
ree node for
OTP
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-06-19
Bin Men
g
h
w
/riscv: sifive
_
u: S
i
mplify the GEM IRQ connect code
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-06-19
Bin Meng
hw/riscv:
o
pentitan: Remove the riscv_ pre
f
i
x
o
f the
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-06-19
Bin Meng
hw/riscv: sifiv
e
_e: Re
m
ov
e
th
e
risc
v
_ prefix of the
.
.
.
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-06-19
Bin Meng
riscv
:
Keep the CPU ini
t
routine
names consi
s
tent
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-06-19
Bin M
e
ng
riscv:
G
eneralize CP
U
init rou
t
ine f
o
r
the imacu C
P
U
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-06-19
B
i
n Meng
riscv: G
e
neralize CP
U
in
i
t routin
e
for
t
h
e
gc
s
u CPU
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
commit
|
commitdiff
|
tree
2020-06-19
B
i
n Men
g
ris
c
v: Generalize CPU init r
o
u
ti
n
e fo
r
the bas
e
CPU
Signed-off-by: Bin Meng <
bin.meng@windriver.com
>
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