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vt82c686: Fix superio_cfg_{read,write}() functions
2020-07-14
B
in
M
e
ng
hw/r
i
scv:
M
o
di
f
y MROM
s
ize t
o
e
n
d at 0x10000
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-07-14
Bi
n
Meng
hw/riscv: virt: Sort the SoC memmap table entries
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-07-14
B
i
n
M
eng
MAINTAI
N
ER
S
:
Ad
d
an entry for
O
penS
B
I firmware
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2020-06-19
Bin M
e
ng
hw/ris
c
v: sifive_u: Ad
d
a du
m
my
D
DR memory c
o
ntroller
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-06-19
B
in Meng
hw/ris
c
v
:
s
ifive_u: Sort the SoC memmap table
e
ntries
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-06-19
Bin Meng
hw/
r
is
c
v
: sifi
v
e_u: Sup
p
ort d
i
fferent boot source
per
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-06-19
Bi
n
Meng
h
w
/r
i
scv:
s
ifive
:
Ch
a
nge SiFive E/U CPU re
s
et vector
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-06-19
Bin Meng
targ
e
t/ris
c
v
:
Rename I
B
EX CPU init rou
t
i
n
e
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-06-19
B
in Meng
h
w
/
riscv: sifive_u: Add a new propert
y
mse
l
for MSEL
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-06-19
Bin Meng
hw/riscv
:
sifive_u: Rename s
e
rial
property get/set
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-06-19
B
i
n
Men
g
hw/riscv: sifive_u: Add reset functio
n
ality
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-06-19
Bin
M
e
ng
hw/riscv:
s
i
f
ive_gp
i
o: Do
n
o
t
bl
i
ndly tri
g
ger
o
utput
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-06-19
Bin
Meng
hw/r
i
scv
:
sifive_u: Hook a GPI
O
controller
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-06-19
B
i
n Meng
hw/riscv: sifive_
g
pio: A
d
d a n
e
w 'ng
p
io' prope
r
ty
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-06-19
Bin Men
g
hw/
r
iscv:
sifive_gpio: Clean
u
p the codes
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-06-19
B
i
n Meng
hw/riscv: sifive_u
:
Gen
e
rate device tree node for OTP
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-06-19
Bin Meng
h
w
/r
i
scv: sifive_u: Si
m
plify t
h
e GEM IRQ connec
t
co
d
e
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-06-19
Bin
Meng
hw/riscv: opentit
a
n
: R
e
mov
e
the riscv
_
prefix of the
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-06-19
Bi
n
M
eng
hw/
r
iscv: sifive_e: Remove the
r
i
s
cv_
prefix of the
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-06-19
Bi
n
M
en
g
riscv
:
Keep the CPU
i
nit rou
t
ine
n
a
mes co
n
sistent
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-06-19
B
i
n Meng
riscv
:
Generalize C
P
U init routi
n
e for the
imacu CPU
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-06-19
B
i
n
Meng
riscv:
G
eneralize CPU init routine for
the
g
csu
C
PU
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-06-19
B
in Meng
riscv: Gener
a
liz
e
CP
U
i
n
it
routine for the base CPU
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-06-03
Bin
M
e
n
g
hw/riscv: virt: R
e
move
the riscv_ prefix of
t
he mac
h
ine
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-06-03
B
in M
e
ng
hw/riscv: si
f
ive_u: Remove the ris
c
v_ prefix of the
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-06-03
Bin Men
g
riscv: Change the
de
f
ault behavior i
f
no -bios option
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-06-03
Bin Meng
riscv: Suppr
e
ss
the error
r
ep
o
rt
f
or QEMU tes
t
ing with
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2020-04-29
Bin
M
eng
roms: opens
b
i: Upgrade from v0
.
6
t
o v0
.
7
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2020-04-29
B
i
n
Meng
hw/riscv: Generate correct "mmu-type"
f
or 32-bi
t
machine
s
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2020-04-29
Bin Meng
ris
c
v/sifive_u: Add a seria
l
pro
p
e
r
ty to th
e
si
f
iv
e
_u
.
.
.
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2020-03-17
Bin Meng
g
i
tla
b
-
ci
.
y
m
l: Add jo
b
s to b
u
ild OpenSBI firmwa
r
e binari
e
s
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2020-03-17
Bi
n
Meng
riscv: sifive_
u
:
Upda
t
e
BIOS_
F
IL
E
NAME
f
o
r
3
2
-b
i
t
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2020-03-17
Bin Meng
roms
:
opensb
i
: Add 32-bi
t
f
irmware image for sifive_u
.
.
.
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2020-03-17
Bin Meng
roms: open
s
bi: Upgrade f
r
o
m
v
0
.
5 to
v
0
.
6
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2020-03-03
B
in Meng
hw: net: ca
d
e
nc
e
_
g
em: Fix build errors in
D
B_PRINT()
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2020-02-27
Bin
M
eng
ri
s
cv: virt: Allow PCI a
d
dress 0
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2019-10-28
Bin Meng
riscv: sifive_u: Add et
h
ernet0 to the aliases node
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2019-10-28
Bin Meng
riscv: hw: Drop "cl
o
ck-frequen
c
y" property of cpu
n
odes
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2019-10-28
Bin Men
g
risc
v
:
S
kip
c
hecking CSR
p
rivilege level in
d
eb
u
gger
.
.
.
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2019-09-17
Bi
n
M
eng
riscv: sif
i
ve_u: Update model and c
o
mpatibl
e
s
t
rings
.
.
.
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2019-09-17
Bi
n
Men
g
riscv:
s
ifive_u: Remove handc
r
afted
c
l
o
c
k nod
e
s for
.
.
.
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2019-09-17
Bin
Meng
ris
c
v: sif
i
ve_
u
:
F
ix broken GEM
s
uppo
r
t
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2019-09-17
B
i
n Meng
ris
c
v: sifive_u: Instant
i
a
te OTP memory with a seria
l
.
.
.
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2019-09-17
B
i
n Me
n
g
riscv: s
i
fiv
e
: Implement a model for SiFive FU
5
4
0 OTP
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2019-09-17
Bin Me
n
g
ris
c
v: r
o
ms: Update de
f
ault bios fo
r
s
i
five_u mac
h
ine
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2019-09-17
Bin
M
eng
r
iscv: sifive_
u
: Ch
a
nge UART node name in device tr
e
e
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2019-09-17
Bin Meng
ri
s
cv: sifive_u: Update
U
ART base addre
s
ses and IRQs
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2019-09-17
Bi
n
Meng
r
iscv: sifive_u: Ref
e
rence PRCI clocks
i
n UA
R
T an
d
.
.
.
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2019-09-17
Bin M
e
ng
riscv: s
i
five_u: Add PRCI b
l
o
ck to the SoC
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2019-09-17
Bi
n
Meng
risc
v
:
s
ifiv
e
_
u
: Gene
r
ate
h
f
c
lk and rtcclk nodes
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2019-09-17
Bin M
e
n
g
riscv: sifi
v
e: Implement
P
RCI mode
l
fo
r
F
U
540
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2019-09-17
Bin Meng
ris
c
v:
s
i
five_u:
U
p
d
at
e
PLIC ha
r
t topology conf
i
g
u
ration
.
.
.
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2019-09-17
Bin Me
n
g
r
i
scv: sifi
v
e_u: Update har
t
co
n
fig
u
ration to re
f
lect
.
.
.
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2019-09-17
Bin M
e
ng
r
iscv: si
f
iv
e
_u: S
e
t
the minim
u
m number
of cpus to 2
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2019-09-17
B
in Meng
riscv:
hart: Ad
d
a "hartid-bas
e
"
p
roperty to RISC-V
.
.
.
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2019-09-17
Bin Meng
ri
s
cv: hart: Extract har
t
re
a
lize to a se
p
arate rou
t
ine
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2019-09-17
Bin Meng
riscv: Add a si
f
ive_cpu
.
h to include bo
t
h E and
U
cpu
.
.
.
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2019-09-17
Bin Men
g
r
iscv:
s
ifive_e
:
Dro
p
sifive_mm
i
o_emul
a
t
e
()
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2019-09-17
Bin Meng
r
i
scv:
sif
i
ve
_
e: prci: Upd
a
te the PRCI r
e
g
iste
r
block
.
.
.
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2019-09-17
Bin M
e
ng
riscv: sifive_e: prci:
F
ix a t
y
po of hf
x
os
c
cfg regis
t
er
.
.
.
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2019-09-17
B
in Meng
riscv: sifive: Re
n
ame sifi
v
e
_
prci
.
{c, h} to si
f
ive_e_p
r
ci
.
.
.
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2019-09-17
Bi
n
Meng
ri
s
c
v
: sifive_u: Remove the un
n
e
cessary incl
u
de of
.
.
.
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2019-09-17
Bin
M
eng
riscv: roms: Rem
o
ve executab
l
e attribute o
f
opensbi
.
.
.
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2019-09-17
Bi
n
Meng
riscv:
h
w: R
e
m
o
v
e the unnecessary
i
n
c
lude o
f
target
.
.
.
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2019-09-17
Bin Me
n
g
riscv: hw: Change to us
e
q
e
m
u_lo
g
_
m
ask(LOG_GUEST_ERROR
.
.
.
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2019-09-17
Bin Meng
r
i
scv: hw:
C
hange create_fd
t
() to return
void
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2019-09-17
Bin Meng
r
i
sc
v
:
h
w
: Remo
v
e not
n
eeded PLIC proper
t
ie
s
i
n
device
.
.
.
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2019-09-17
B
i
n
M
e
n
g
riscv: hw: Use
qemu_fdt_
s
etprop_cell() for pr
o
per
t
y
.
.
.
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2019-09-17
B
i
n Meng
ris
c
v: hw: Remove super
f
l
u
ous
"
linux,
phand
l
e" p
r
operty
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2019-09-17
Bin Meng
ri
s
c
v
: hw: Remove duplica
t
ed "hw/hw
.
h" inclus
i
on
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2019-09-17
B
i
n Me
n
g
riscv: s
i
five
_
test: Add reset functional
i
ty
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2019-09-17
Bi
n
Me
n
g
riscv: hmp: Add a command
t
o show virtual memo
r
y mappings
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2019-09-17
Bin Men
g
riscv: Resolve full
p
a
th of the given bios ima
g
e
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2019-09-17
Bin Meng
r
i
scv:
A
dd a helper
r
o
u
tine
f
o
r
finding firmwa
r
e
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2019-09-17
B
in Meng
riscv:
r
v32: Root page ta
b
le
addr
e
ss
c
an be
larger
.
.
.
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2019-08-13
B
i
n Meng
riscv:
roms:
F
ix mak
e
r
u
les for buildi
n
g sifive_u bios
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2019-06-27
Bin
M
eng
riscv: sif
i
ve_u: Upda
t
e
t
he plic
ha
r
t config to support
.
.
.
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
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2019-06-27
Bin Meng
r
iscv:
s
ifive_u: Do not create ha
r
d-co
d
ed phandle
s
.
.
.
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
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tree
2019-06-24
Bin Meng
riscv: virt:
C
orr
e
ct
p
ci "bus-r
a
n
ge
"
encodin
g
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
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2019-03-19
B
i
n M
e
ng
riscv: sifive
_
u:
Cor
r
e
c
t UAR
T
0's IRQ
i
n
t
he device
.
.
.
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
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tree
2019-03-19
B
i
n Meng
ri
s
cv:
sifive_uart: G
e
nerat
e
TX interrupt
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
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