repo.or.cz
/
qemu
/
ar7.git
/
search
commit
grep
author
committer
pickaxe
?
search:
re
summary
|
log
|
graphiclog1
|
graphiclog2
|
commit
|
commitdiff
|
tree
|
refs
|
edit
|
fork
first
·
prev
·
next
hw/sd/sdcard: Do not attempt to erase out of range addresses
2020-09-25
Ali
s
tair F
r
a
ncis
core/register: S
p
ecify inst
a
n
c
e_size in the TypeInfo
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-08-25
A
l
istai
r
Fr
a
ncis
t
a
rget/riscv:
S
up
p
ort the Virtual Instru
c
ti
o
n
f
ault
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-08-25
Alistair Francis
targe
t
/
r
iscv: Return
t
h
e e
x
ceptio
n
from inv
a
lid
C
SR
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-08-25
Alistair Franc
i
s
target
/
riscv: Support
the
v
0
.
6 Hyp
e
rvisor extension
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-08-25
Al
i
stair Franc
i
s
t
arget/
r
iscv: Only support little endian guests
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-08-25
Al
i
stair F
r
ancis
targe
t
/riscv
:
Only
s
uppor
t
a single VSXL len
g
th
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-08-25
Alistair Francis
t
a
rget/ri
s
cv:
Update
t
he CSR
s
to the v0
.
6 H
y
p
e
x
tension
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-08-25
Alista
i
r Fr
a
ncis
target/riscv: Update the Hypervisor tr
a
p re
t
urn
/
e
ntry
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-08-25
Alistair Franci
s
t
a
rge
t
/riscv:
Fi
x
the interrupt cau
s
e co
d
e
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-08-25
Alistair Francis
t
a
rg
e
t/
r
iscv: Convert MSTATU
S
MTL
to GVA
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-08-25
Alistai
r
Franci
s
target/riscv:
Don't all
o
w guest to wri
t
e to htinst
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-08-25
Al
i
stair Franc
i
s
target/riscv: Do two-stage loo
k
ups on
hlv/hlvx/hs
v
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-08-25
Alistair Fr
a
ncis
t
a
rget
/
risc
v
:
Allow gene
r
at
i
ng hlv
/
hlvx/
h
sv i
n
structions
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-08-25
Ali
s
tair Francis
tar
g
et/riscv: Allo
w
s
e
tting a two-s
t
age lookup in
t
he
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-08-22
A
li
s
tair F
r
a
n
ci
s
hw/i
n
t
c
: ibex_plic: Hon
o
ur source priorities
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-08-22
Ali
s
tair Francis
hw/in
t
c
:
ib
e
x_plic: Don't allow repeat
i
nterrupts on
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-08-22
Alistair Fran
c
is
h
w
/i
n
tc
:
ibex_plic: Upda
t
e the pending irqs
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-08-21
Alistair Francis
hw/sd/
p
l
1
81: Repl
a
c
e
fpr
i
ntf(s
t
derr, "
*
\n") with error_report()
Signed-off-by:
Alistair Francis
<alistair.francis@xilinx.com>
commit
|
commitdiff
|
tree
2020-07-14
Alista
i
r
Fra
n
cis
hw/char:
Conve
r
t
the I
b
ex
U
A
RT to use the registerfields A
P
I
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-07-14
Ali
s
t
a
ir Franci
s
hw/char: Convert
t
he Ibex UA
R
T
t
o us
e
the qdev Clock
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-07-02
Alistair Franci
s
h
w
/riscv
:
All
o
w
6
4
b
it ac
c
e
ss to SiFive CLINT
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-19
A
l
istair
F
rancis
ta
r
g
e
t/r
i
s
cv: Use a smal
l
e
r guess size f
o
r no-MMU PMP
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-19
Alistai
r
Francis
r
is
c
v
/
opentitan: Connect the UART device
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-19
Ali
s
tair Fra
n
cis
riscv/o
p
entita
n
: Connect
the PLIC device
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-19
Alistair
Fra
n
cis
hw/in
t
c: Initial commit of lowRISC
I
bex PLIC
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-19
Alistair Francis
h
w
/char: Initial
comm
i
t of Ibex UART
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-19
Alista
i
r F
r
ancis
riscv/o
p
entitan
:
Fix the
ROM size
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-19
Ali
s
t
air
F
ran
c
is
target/ri
s
cv: Implement ch
e
cks for hfenc
e
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-19
Alistair
Francis
target/riscv:
M
ove
the h
f
ence instruct
i
ons to the
r
v
h
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-19
Alist
a
ir Francis
target/riscv:
Report
e
rror
s
validat
i
ng 2n
d
-s
t
age P
T
Es
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-19
Ali
s
tair
F
r
ancis
target/ris
c
v: Set
a
ccess as d
a
ta_lo
a
d w
h
e
n validatin
g
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-19
Alist
a
ir Franci
s
sifive_e: Support the revB
machine
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-03
Al
i
stair Francis
riscv
:
Initial c
o
m
m
it of OpenTitan
m
achine
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-03
Alist
a
ir F
r
ancis
ta
r
get/riscv: Add the lowRIS
C
Ibex CPU
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-03
A
listai
r
Francis
tar
g
e
t/riscv:
D
on't set PMP
f
eature in the c
p
u init
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-03
A
l
istair Fr
a
ncis
target/riscv: Disab
l
e
the
M
MU corr
e
ctly
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-03
Alistair Fra
n
cis
target/riscv: Don'
t
overwrite the
reset v
e
ctor
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-03
Alistair Fra
n
cis
ri
s
cv/bo
o
t:
A
d
d
a
m
i
ssing header include
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-03
Alistair Franc
i
s
riscv: sifive_e: Manually define the machine
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-03
Alistair Fr
a
ncis
docs: deprecated
:
U
p
d
ate the -bios
d
ocumentation
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-03
Ali
s
tair
F
ranc
i
s
ta
r
get/riscv: D
r
op suppor
t
for ISA spec versio
n
1
.
09
.
1
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-03
A
l
istair F
r
a
ncis
t
arge
t
/
r
iscv: Remo
v
e
t
h
e
deprecated
C
PUs
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-03
Alistair Francis
hw/r
i
scv
:
spike:
Remov
e
d
epre
c
at
e
d ISA spe
c
ific mach
i
nes
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-04-29
Alistair F
r
ancis
r
i
scv: AND
s
tage-1 and
stage-2
p
r
otection flags
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-04-29
Alis
t
a
ir Francis
riscv:
Don't use stage-2 PTE
l
ookup
prote
c
tion flags
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-04-29
Alis
t
air Fra
n
ci
s
riscv/
s
ifive_u: Add a
s
e
rial property to th
e
sifive_
u
SoC
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-04-29
Alistair Fra
n
cis
riscv/sifive_
u
: Fix u
p
file ordering
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-03-30
Alistair Francis
linux-use
r
:
Supp
o
rt fut
e
x
_
t
ime64
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-03-20
Alist
a
ir
F
rancis
l
inux-user/riscv:
U
pdate the syscall
_
nr'
s
to
t
h
e
5
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-03-20
Alistair Francis
linux-user/sysca
l
l: Add su
p
p
o
r
t
for clock_
g
ett
i
me64
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-03-20
A
lis
t
a
ir Fra
n
cis
linux-user: Prot
e
c
t
more syscal
l
s
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-03-17
Alistair Francis
target/risc
v
:
Correctly impl
e
ment TSR trap
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
A
l
i
s
t
air Fran
c
is
target/riscv: Allow enabling the
H
yperviso
r
ex
t
e
n
sion
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
Alistai
r
F
r
ancis
target
/
riscv
:
Ad
d
the MSTAT
U
S_
M
PV_ISSE
T
helpe
r
macro
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
Alistair Francis
target/riscv: Add
s
up
p
ort for the 3
2
-bit MST
A
TUSH CSR
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
Alistair Francis
target/riscv
:
Set htval and mtval2
o
n exec
p
ti
o
ns
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
Alistai
r
Fra
n
cis
target/riscv: Raise the new e
x
ecp
t
ions when 2n
d
stage
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
Alistair Francis
tar
g
et/riscv: Implement se
c
ond st
a
ge M
M
U
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
Alistai
r
Fra
n
cis
targe
t
/r
i
scv: Allow
s
pecify
i
ng M
M
U
s
tage
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
Alistair Francis
targ
e
t
/riscv: Respect
M
PRV an
d
S
PRV for floating point ops
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
A
l
ist
a
ir Francis
target/riscv: Mark b
o
t
h
sstat
u
s and
mssta
t
us_hs as
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
Alist
a
i
r
F
r
ancis
target/
r
iscv
:
D
i
sable guest FP support bas
e
d on virt
u
al
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
Alistair F
r
ancis
target/ri
s
cv:
O
nly set
T
B flags with FP
s
tatus if e
n
ab
l
e
d
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
Alistair
F
rancis
target/r
i
sc
v
: Remove
t
he hret ins
t
ruct
i
on
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
Alistair Francis
targ
e
t/ris
c
v: Add hfence instructions
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
A
listair
Francis
target/riscv: Add Hyper
v
isor trap r
e
turn support
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
A
listair
Franc
i
s
ta
r
g
et/riscv: Add hy
p
vervis
o
r
trap
suppo
r
t
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
Alistair Franc
i
s
target/riscv: Gener
a
te illega
l
in
s
truct
i
on on WFI
w
hen V
=
1
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
A
l
istair
Francis
tar
g
e
t
/ricsv:
F
lush
the TLB on vi
r
t
ulisation
m
ode changes
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
Alistair Francis
tar
g
et/riscv: Add support fo
r
virtual
i
nt
e
rru
p
t setting
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
Alistair F
r
ancis
target/riscv
:
Extend the SIP CSR to sup
p
ort virtulisat
i
on
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
Alistair Francis
target/riscv
:
Exten
d
the MIE
C
S
R
t
o
supp
o
rt virtulisation
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
Alistair Fran
c
is
target
/
risc
v
: Set VS b
i
ts in mideleg for Hyp ex
t
ension
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
Alistair Francis
targe
t
/riscv
:
A
dd
vi
r
tual re
g
ister swapping function
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
A
l
istair Francis
target
/
riscv: Add Hypervisor machine CSRs
a
ccesses
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
Alista
i
r Francis
target/riscv: Add Hypervisor
v
i
rtual CSRs accesses
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
Al
i
s
tair Francis
target/riscv: Add Hypervisor CSR access function
s
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
Ali
s
tair Francis
target
/
riscv: Dump Hypervisor registers if enabled
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
A
listai
r
Francis
target/riscv: Print priv and virt in disas log
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
A
listair
Fr
a
ncis
t
arget/riscv: Fix CS
R
pe
r
m
c
hecki
n
g for
H
S mode
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
A
l
i
stair Francis
t
a
rget/riscv: Add
t
he
f
orce
H
S
excep
t
ion mode
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
Alistair F
r
anci
s
t
arget/riscv: Add th
e
virtulisati
o
n mode
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
Alistair Francis
target/
r
is
c
v
: R
e
name th
e
H
i
rq
s
to VS irqs
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
Alistair Francis
tar
g
et
/
risc
v
: Add sup
p
o
r
t for the new execption numbers
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
Alistair Fr
a
ncis
t
arge
t
/riscv: Add the H
y
pervisor CSRs to CPUS
t
ate
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
A
l
istair
F
rancis
targ
e
t/r
i
s
c
v: Add the Hypervisor extens
i
on
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
Al
i
s
t
a
i
r Francis
target
/
ris
c
v: Convert MIP CSR to ta
r
get_ulong
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-01-17
Alist
a
ir Francis
hw/ar
m
: Add the Netduin
o
Plus 2
Signed-off-by:
Alistair Francis
<alistair@alistair23.me>
commit
|
commitdiff
|
tree
2020-01-17
Ali
s
ta
i
r Francis
hw/arm: Add the S
T
M32F4x
x
SoC
Signed-off-by:
Alistair Francis
<alistair@alistair23.me>
commit
|
commitdiff
|
tree
2020-01-17
Alistair Franc
i
s
hw
/
misc: Add the STM32F4xx EXT
I
devic
e
Signed-off-by:
Alistair Francis
<alistair@alistair23.me>
commit
|
commitdiff
|
tree
2020-01-17
Al
i
s
t
a
i
r Francis
h
w/mi
s
c
: Add
t
he STM32
F
4xx S
y
sconfig devic
e
Signed-off-by:
Alistair Francis
<alistair@alistair23.me>
commit
|
commitdiff
|
tree
2019-11-14
Alistair Francis
riscv/virt: I
n
crease f
l
a
sh size
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-11-14
Ali
s
tair Francis
opensbi: Upgr
a
de from
v
0
.
4
t
o v0
.
5
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-11-14
Alistair Francis
t
arget/riscv: Remov
e
atomi
c
accesses
t
o MIP CSR
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-10-28
Alistair Franc
i
s
r
i
scv/boot:
Fi
x
possible memory leak
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-10-28
Alistair Fra
n
cis
riscv
/
virt
:
Jump to pflash if
s
pecified
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-10-28
Ali
s
tair Francis
ri
s
cv/virt: Ad
d
the PFlash
C
FI01 d
e
vice
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-10-28
Alistair F
r
ancis
ris
c
v/vir
t
: Manua
l
ly de
f
ine the ma
c
hi
n
e
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-10-28
Ali
s
tair F
r
ancis
riscv/sif
i
ve_u:
A
dd the
s
tar
t
-in-
f
lash property
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-10-28
A
listair Francis
riscv/sifi
v
e_u: Manually de
f
ine
t
he
m
achine
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
next