target/riscv: Add the Hypervisor extension
commitaf1fa0039c799a350bcde07b3d8a71dfde07d11b
authorAlistair Francis <alistair.francis@wdc.com>
Sat, 1 Feb 2020 01:01:41 +0000 (31 17:01 -0800)
committerPalmer Dabbelt <palmerdabbelt@google.com>
Thu, 27 Feb 2020 21:45:24 +0000 (27 13:45 -0800)
treeff37ad821b9db32b5c5519ab366cd955b6fc3887
parent028616130d5f0abc8a3b96f28963da51a875024b
target/riscv: Add the Hypervisor extension

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Chih-Min Chao <chihmin.chao@sifive.com>
Reviewed-by: Palmer Dabbelt <palmer@sifive.com>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
target/riscv/cpu.h