repo.or.cz
/
qemu
/
ar7.git
/
search
commit
grep
author
committer
pickaxe
?
search:
re
summary
|
log
|
graphiclog1
|
graphiclog2
|
commit
|
commitdiff
|
tree
|
refs
|
edit
|
fork
first
·
prev
·
next
linux-user: Use getcwd syscall directly
2020-07-14
Alistair
F
ra
n
cis
hw/
c
har: Con
v
ert the Ibex UART to
use t
h
e registerfi
e
lds API
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-07-14
A
lis
t
air Francis
h
w/char: Convert the Ibex UART
t
o use
the
q
dev C
l
ock
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-07-02
Alista
i
r F
r
ancis
hw/riscv: A
l
lo
w
64
b
it acce
s
s to
S
iFi
v
e CLIN
T
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-19
Al
i
stair Francis
target/ris
c
v: Use a s
m
all
e
r
g
uess s
i
z
e
for no-MMU PMP
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-19
Al
i
st
a
ir Francis
r
iscv/op
e
ntit
a
n: Co
n
nect the UART d
e
v
i
c
e
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-19
A
l
ist
a
i
r
F
rancis
r
i
scv/opent
i
ta
n
: Connect th
e
PLIC device
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-19
Alis
t
a
ir Francis
h
w/in
t
c: Ini
t
ial commi
t
of
l
owRIS
C
Ibex
P
LIC
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-19
A
l
istair
Francis
hw/cha
r
:
I
nitial c
o
mmit of Ibex UA
R
T
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-19
Alistair Francis
riscv/
o
p
en
t
i
tan: Fix the R
O
M size
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-19
A
l
istai
r
Francis
target/riscv: Implement checks fo
r
hfence
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-19
A
listai
r
Francis
target/riscv: Move the hfen
c
e ins
t
r
uctions to th
e
r
v
h
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-19
Alistair
Fran
c
is
target/riscv
:
R
e
por
t
errors valid
a
ting 2nd-stage P
T
Es
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-19
Alistair Franc
i
s
t
a
rge
t
/risc
v
: Set access as data_load when v
a
lidating
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-19
Alistai
r
Francis
sifi
v
e
_e: Sup
p
o
rt the
revB m
a
chine
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-03
Alistair
F
rancis
riscv:
Ini
t
ial
c
o
mmit of OpenTi
t
a
n
m
achi
n
e
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-03
A
listair Francis
t
arget/riscv:
Add the lowRISC Ibex
CP
U
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-03
Alistair Francis
target/riscv: Don'
t
s
e
t PMP
f
eatu
r
e in the c
p
u init
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-03
Alistair Francis
ta
r
ge
t
/riscv:
D
isable the MMU correct
l
y
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-03
Ali
s
t
air
F
rancis
target/risc
v
: Don't overwrite the reset vec
t
or
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-03
Alis
t
air Francis
riscv/boo
t
: Add a miss
i
ng he
a
der inc
l
ude
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-03
Alistair
F
rancis
r
i
sc
v
: sifive_e
:
Manually defi
n
e the machine
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-03
Alistair Francis
docs: dep
r
ecated: Update the -bios docu
m
entat
i
on
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-03
Ali
s
ta
i
r Franc
i
s
t
a
r
g
et/r
i
scv: Drop support fo
r
ISA
s
pec
versi
o
n 1
.
09
.
1
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-03
Al
i
sta
i
r Franci
s
target/riscv:
R
emove the deprec
a
t
ed CPUs
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-03
Alista
i
r F
r
anci
s
hw/riscv: s
p
ike: Remo
v
e deprecated ISA specific machines
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-04-29
A
list
a
ir
F
rancis
riscv: AND stage-1 a
n
d stage-2 protection f
l
ags
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-04-29
Alistair Francis
riscv: Don't use stage-2
PTE lookup prot
e
ction flags
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-04-29
Ali
s
tair Francis
riscv
/
si
f
ive_u: Add a se
r
i
al
p
rop
e
r
ty to the sifive_u SoC
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-04-29
Alistair Francis
ris
c
v/sifive
_
u: Fix up file
o
r
dering
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-03-30
A
l
i
s
tair
F
rancis
linux-use
r
:
Su
p
port futex_
t
i
m
e64
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-03-20
Alistair
Franc
i
s
lin
u
x-user/riscv: Updat
e
the syscal
l
_nr's to
the
5
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-03-20
A
l
istair Franci
s
linux-user/s
y
scall: Add support for clock_gettime64
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-03-20
Alist
a
ir Francis
linu
x
-user: Pro
t
ect more
s
yscalls
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-03-17
Al
i
stair Franci
s
target/
r
iscv: Correctly im
p
lement
TSR
trap
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
A
listair Fra
n
cis
target/ris
c
v: A
l
low en
a
bli
n
g
the H
y
pervisor
extension
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
Alistair Fran
c
i
s
target
/
riscv: Add the MSTATUS_M
P
V_ISSE
T
helper
macro
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
A
l
istai
r
Francis
target/r
i
scv:
Ad
d
support for the 32
-
b
it
M
ST
A
TUSH CSR
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
Alis
t
ai
r
Fra
n
cis
target/ri
s
cv
:
S
e
t htval an
d
mtval2
on
e
xecp
t
i
ons
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
A
lis
t
air F
r
ancis
t
a
rget/riscv: R
a
ise the
new
e
xecptions when 2
n
d stage
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
Alistair Francis
tar
g
e
t/riscv: I
m
pleme
n
t s
e
cond stage
MMU
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
A
l
i
stair Francis
target/riscv: A
l
low specifying MMU
s
tage
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
Al
i
stair Franci
s
target/riscv:
Respect MPRV a
n
d SPRV for floating point ops
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
A
l
i
stai
r
Francis
target/riscv: Mark both sstatus and msst
a
tus_hs a
s
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
Ali
s
tair Fr
a
nci
s
target/riscv:
D
isable gue
s
t FP support
based on virtual
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
Alistair Fran
c
is
target/riscv
:
Only set TB
f
l
ags with FP status if
enabled
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
Alistair Francis
ta
r
get/riscv:
R
emove the hret
i
nst
r
uction
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
Alistair Fr
a
nc
i
s
target/ri
s
cv: Add
h
fence instructions
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
Alistair Francis
target/risc
v
:
Add
Hypervisor t
r
a
p
r
eturn
support
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
Alistair Francis
target/riscv: Ad
d
hypvervisor trap supp
o
rt
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
Alist
a
ir Francis
targ
e
t
/
riscv: Gen
e
ra
t
e
i
llegal
i
ns
t
ruction
on WFI w
h
en
V
=1
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
Ali
s
tair Fra
n
ci
s
target/r
i
c
s
v:
F
lush the TL
B
on v
i
rtulisation m
o
de changes
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
Alistair
Francis
target/risc
v
: Add sup
p
ort for virtua
l
interrupt setting
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
A
l
ist
a
ir Francis
target/riscv:
E
x
tend the SIP
CSR
t
o
su
p
port virtulisa
t
ion
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
Alist
a
ir Francis
t
a
r
get/riscv:
E
xte
n
d the MIE CSR to
s
upport virtulisation
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
Alist
a
i
r Francis
target/riscv:
Set
VS bits
i
n mideleg fo
r
Hyp
extension
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
Alistair Francis
target/riscv: Add virt
u
al
r
egiste
r
swapping function
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
Alistair
F
rancis
target/
r
iscv: Add
Hyper
v
iso
r
machi
n
e CSRs
acc
e
sses
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
Alistair Franc
i
s
tar
g
et/riscv: A
d
d Hypervisor virtual
C
SRs accesse
s
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
Alistair F
r
ancis
target/r
i
scv: Add Hypervisor CSR a
c
c
ess functions
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
Alistair
F
r
a
n
cis
target/riscv: Dump Hypervisor registe
r
s if enab
l
ed
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
Alistai
r
Francis
targ
e
t/r
i
s
cv: Print pri
v
and virt in disas log
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
Alistair
Francis
ta
r
get/riscv: Fix CSR perm
c
hecking for HS mo
d
e
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
Alistair Francis
targe
t
/riscv: Ad
d
the force HS
excepti
o
n
mod
e
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
Alista
i
r
F
r
a
ncis
target/riscv: Add the vi
r
tulisation
m
ode
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
A
l
istai
r
Francis
target/riscv: Rename the H irqs
t
o VS irqs
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
Al
i
stai
r
Franc
i
s
ta
r
get/riscv: Add
s
upport
for
t
h
e ne
w
execptio
n
numbers
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
Alistair Francis
ta
r
get/riscv: Add the Hy
p
er
v
i
sor CSRs
t
o CPUState
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
A
l
is
t
ai
r
Fr
a
ncis
tar
g
et/riscv: Add the Hypervis
o
r extension
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
Alistair Fr
a
ncis
target/r
i
scv: C
o
nvert MIP CSR to target_ul
o
ng
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-01-17
Ali
s
tair Franc
i
s
hw/a
r
m
:
Ad
d
t
he
Ne
t
duino P
l
us 2
Signed-off-by:
Alistair Francis
<alistair@alistair23.me>
commit
|
commitdiff
|
tree
2020-01-17
Alistair Fra
n
cis
h
w
/arm: A
d
d the STM32F4xx SoC
Signed-off-by:
Alistair Francis
<alistair@alistair23.me>
commit
|
commitdiff
|
tree
2020-01-17
Alista
i
r Francis
hw/mi
s
c: Add the ST
M
32F4xx
EXTI
device
Signed-off-by:
Alistair Francis
<alistair@alistair23.me>
commit
|
commitdiff
|
tree
2020-01-17
Alistai
r
Fra
n
cis
hw/mi
s
c: Add the
S
TM32F4x
x
Sysco
n
fi
g
device
Signed-off-by:
Alistair Francis
<alistair@alistair23.me>
commit
|
commitdiff
|
tree
2019-11-14
Ali
s
t
air Fr
a
ncis
r
i
scv/vi
r
t: Incre
a
se f
l
a
s
h
siz
e
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-11-14
Alistair Franci
s
opensbi
:
Upgrade
f
rom
v
0
.
4 t
o
v0
.
5
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-11-14
Alistair F
r
a
ncis
target/riscv: Remo
v
e atomic
a
c
cesses to MIP CSR
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-10-28
Alistai
r
Fr
a
ncis
riscv/boo
t
:
Fix possible memory leak
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-10-28
Al
i
stair Francis
riscv/v
i
rt
:
Jum
p
t
o
pflash if s
p
ecified
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-10-28
Al
i
s
t
a
i
r Francis
risc
v
/virt: Ad
d
the
P
Fla
s
h CFI01 devi
c
e
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-10-28
Alistai
r
Fr
a
ncis
riscv/vi
r
t: Ma
n
u
ally def
i
ne
the m
a
chine
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-10-28
Alistair Francis
r
i
scv/sifive_u: Add the star
t
-in-flash prop
e
rty
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-10-28
Alistair
Francis
riscv/sifive_
u
: Man
u
ally de
f
ine the machine
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-10-28
Alista
i
r
Franc
i
s
riscv/sifive_u: Add QSPI memory regio
n
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-10-28
Alistair
Fra
n
cis
riscv/sifive
_
u
: Add L2-LIM cache me
m
ory
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-09-17
Alist
a
ir
F
ranc
i
s
target/
r
i
scv: Use TB_
F
LAGS_MSTATUS_FS fo
r
floating
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-09-17
Alistair Fran
c
is
target/riscv: Fix mstatus dirty mask
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-09-17
Ali
s
tair Fran
c
is
t
arget/riscv:
U
pdat
e
the Hypervisor CSRs to v0
.
4
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-09-17
Al
i
sta
i
r Francis
t
a
rge
t
/riscv: Create f
u
ncti
o
n t
o
t
e
st if FP is enabled
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-09-17
Ali
s
tair Francis
riscv:
p
lic: Remove un
u
sed interr
u
pt function
s
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-07-26
Ali
s
tair Francis
r
iscv/boot: Fixup t
h
e RISC-V firmware
warning
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-07-18
Alistair Francis
hw/riscv: Lo
a
d
O
penSBI as the defa
u
lt
f
ir
m
ware
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-07-18
Alistair Fra
n
cis
r
oms: Add Op
e
nSBI version 0
.
4
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-07-09
Alistair Francis
tcg/riscv: Fix
RISC-VH host build
failure
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-06-27
Alistair Francis
hw/r
i
scv: Ex
t
e
nd
the
k
ernel load
i
ng
s
u
pp
o
rt
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-06-27
Alistai
r
Franc
i
s
hw/
r
isc
v
: Add support for loading a firmw
a
re
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-06-27
Alistair Francis
hw
/
riscv: Split out
the boot functions
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-06-25
Alistair Francis
t
a
rget/riscv: A
d
d
support fo
r
disabling/enabling Cou
n
ters
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-06-25
Alistair Franc
i
s
target/riscv: Remove
u
se
r
v
ersion inf
o
rmatio
n
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-06-25
A
l
istair Francis
ta
r
get/ris
c
v
: Req
u
ire e
i
ther
I
or E base extension
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-06-25
A
list
a
ir F
r
anc
i
s
qemu-dep
r
ecate
d
.
texi: Depreca
t
e the RI
S
C-V priv
l
edge
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
next