repo.or.cz
/
qemu
/
ar7.git
/
search
commit
grep
author
committer
pickaxe
?
search:
re
summary
|
log
|
graphiclog1
|
graphiclog2
|
commit
|
commitdiff
|
tree
|
refs
|
edit
|
fork
first
·
prev
·
next
linux-user: add missing UDP get/setsockopt option
2021-01-16
Alistair Franc
i
s
riscv: Pass RISCV
H
artA
r
raySt
a
te
by pointer
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-12-18
A
l
istair Francis
riscv/op
e
ntitan: Up
d
ate the OpenTitan
m
emory
layout
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-12-18
Alist
a
ir Francis
h
w
/
risc
v
: Use the CPU to determin
e
if 32-
b
it
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-12-18
A
l
istair F
r
ancis
target/riscv: cpu: Set XL
E
N
i
n
d
ep
e
n
dently from t
a
rget
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-12-18
A
l
i
stair Francis
target/riscv:
c
sr: Re
m
ove compile ti
m
e XLEN che
c
ks
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-12-18
Alistair Franc
i
s
target/riscv: cpu_helper: Remo
v
e compile time XLEN
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-12-18
Alistair Francis
t
a
r
get/riscv: cpu: Remove c
o
m
p
ile time XLEN checks
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-12-18
Alistair
F
rancis
t
arget/riscv: Spec
i
fy the
X
LEN fo
r
CPUs
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-12-18
Ali
s
tair
F
rancis
target/risc
v
:
A
dd a risc
v
_cpu_is_32bit()
h
elper function
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-12-18
Alistair Fr
a
ncis
target/riscv:
fpu
_
h
elper: Match
f
u
nction defs in HELPER
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-12-18
Alistair Francis
hw/risc
v
:
sifive
_
u: Remove
c
ompil
e
time XLEN
c
hecks
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-12-18
Alistair
F
ranc
i
s
hw/riscv:
spike: Rem
o
ve
compile ti
m
e XLEN checks
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-12-18
A
listai
r
Francis
hw/riscv: virt: Re
m
ov
e
c
o
mpi
l
e time XLEN
ch
e
cks
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-12-18
Alistair
F
r
a
ncis
hw/ris
c
v
:
boot: R
e
mov
e
compile time XLEN check
s
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-12-18
Alista
i
r Francis
riscv:
v
i
rt: Remove target macro
con
d
iti
o
na
l
s
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-12-18
Ali
s
tair Francis
riscv: spi
k
e: R
e
move ta
r
get macro
conditionals
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-12-18
Alistair Francis
targ
e
t/r
i
scv: Add a TYPE_RIS
C
V_C
P
U_BAS
E
C
P
U
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-12-18
Alistair Francis
hw/riscv: Expand
t
he is
3
2
-
b
it
c
he
c
k
t
o
s
upport more
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-12-18
Alistair
Fran
c
i
s
i
n
tc/ibex_pl
i
c:
C
lear i
n
terrupts that
o
ccur dur
i
n
g
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-11-17
Alistair
F
ra
n
cis
register: Rem
o
ve unn
e
cessary NULL
check
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-11-14
Alistair
F
ran
c
is
intc/ibex_pl
i
c: Ensure we don't loos
e
int
e
rrup
t
s
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-11-14
Alistair Francis
i
n
tc/i
b
ex_plic: Fix some typos in
t
h
e comme
n
ts
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-11-09
Alistai
r
Francis
hw/intc/ibex_
p
lic: Clea
r
the claim
r
egister when read
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-11-09
Alistai
r
Francis
tar
g
et
/
riscv: Split the Hypervi
s
or
execute load he
l
p
ers
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-11-09
Alistai
r
Francis
targ
e
t/ris
c
v: Remove
the hyp load and store f
u
n
ctions
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-11-09
Alist
a
i
r Francis
t
a
r
ge
t
/r
i
scv:
Remove the HS_TWO
_
STAGE
f
lag
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-11-09
A
listair Francis
target/riscv:
S
et the virtualise
d
MMU
mode w
h
en
d
o
i
n
g
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-11-09
Alista
i
r Francis
targ
e
t/riscv:
Add a virtual
i
se
d
MMU Mode
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-11-04
A
listair F
r
ancis
linux-us
e
r/
s
ys
c
all: Fix mi
s
sing target
_
to_host_times
p
ec64
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-10-22
Al
i
st
a
ir Francis
hw
/
riscv: Load t
h
e kernel after the f
i
r
mware
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-10-22
A
l
is
t
a
i
r Fr
a
ncis
hw/r
i
scv: Add a ris
c
v_is_32_b
i
t() function
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-10-22
Ali
s
ta
i
r Fra
n
cis
h
w
/
r
iscv: Re
t
urn
t
h
e end
address of the loaded firmware
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-10-22
Alistair F
r
ancis
hw/riscv:
s
ifive_u: Allow s
p
ecifying
the CPU
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-10-22
Alistair Fran
c
is
risc
v
: C
o
nvert interrup
t
logs
t
o
use qemu_log_
m
ask()
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-09-25
A
lista
i
r
Francis
core/register
:
Sp
e
cify instance_siz
e
in the TypeInfo
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-08-25
Alistair Fran
c
is
t
a
rget
/
riscv: Sup
p
ort the Vir
t
ual
I
nstruc
t
ion fa
u
l
t
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-08-25
Alistair Francis
target/ris
c
v: Return the exception
f
rom invalid CSR
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-08-25
Al
i
s
t
air Francis
target/riscv:
Suppor
t
t
he v
0
.
6
Hypervisor e
x
tension
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-08-25
Alist
a
ir
F
rancis
target
/
r
iscv:
O
n
ly sup
p
ort little endian
g
uests
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-08-25
Alistair F
r
ancis
t
a
rget/riscv: O
n
ly su
p
po
r
t a single VSXL length
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-08-25
A
l
i
stair Francis
target/riscv: Upd
a
te t
h
e
CSRs to the v0
.
6 Hyp extensio
n
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-08-25
Alista
i
r Francis
target/ri
s
cv: U
p
date the Hypervisor trap retur
n
/entry
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-08-25
Alistair Fr
a
n
cis
target
/
ris
c
v
:
Fix
the int
e
r
r
upt cau
s
e
c
o
de
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-08-25
A
l
ist
a
ir Franc
i
s
tar
g
et/r
i
scv: Convert MSTATUS MTL
t
o GVA
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-08-25
Alistai
r
Francis
targe
t
/
ris
c
v: Don't al
l
ow guest to
w
rite to htins
t
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-08-25
Alistair Francis
t
a
rget/ris
c
v: Do two-s
t
age lookups
o
n
hlv/h
l
vx/hsv
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-08-25
A
li
s
tair Fr
a
ncis
target/risc
v
: All
o
w
g
enerating hlv
/
hlvx/hsv instructions
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-08-25
Alist
a
ir
F
rancis
tar
g
e
t
/riscv: Allow setting a t
w
o-stage l
o
okup
in the
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-08-22
Alis
t
air Francis
hw/
i
ntc: i
b
ex_plic: Honour
source
p
riori
t
ies
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-08-22
Alistair F
r
an
c
is
h
w
/int
c
: ibex_pl
i
c: Don't all
o
w
r
epeat
i
nterrupts on
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-08-22
Al
i
s
t
ai
r
Francis
h
w/int
c
: ibex_plic: Update
t
he p
e
nding
i
r
q
s
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-08-21
Alistair F
r
a
ncis
hw/sd/pl181: Rep
l
ace fprintf(s
t
derr, "*\n") wi
t
h erro
r
_
r
e
po
r
t()
Signed-off-by:
Alistair Francis
<alistair.francis@xilinx.com>
commit
|
commitdiff
|
tree
2020-07-14
A
l
istai
r
Fr
a
ncis
hw
/
char: Convert th
e
Ibex UA
R
T to
use the
r
eg
i
s
t
e
r
fields
A
P
I
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-07-14
Alistair Fr
a
n
cis
hw/
c
har: Convert t
h
e Ibex UART to use the qdev Clock
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-07-02
Alistair Fran
c
is
hw/r
i
scv:
A
llow 64
bit access to Si
F
ive CLI
N
T
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-19
Alistair Fr
a
nc
i
s
target/r
i
scv: U
s
e a sm
a
ller gues
s
s
i
ze
f
or no-MMU PMP
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-19
Alistair
Francis
riscv/openti
t
an
:
Co
n
nect the
UART device
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-19
Alistair Francis
ri
s
cv/opentita
n
: Connect the PLIC dev
i
ce
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-19
A
listair Franc
i
s
hw/
i
n
tc:
Initial commit of lowRI
S
C
Ibex PLIC
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-19
Alistair Francis
h
w/ch
a
r: Initial commit of I
b
e
x
U
A
R
T
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-19
Alistair Francis
riscv/opentitan: Fix the R
O
M
size
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-19
Alista
i
r Francis
target/ris
c
v: Implement checks for hfence
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-19
Alistair
Fr
a
ncis
target/riscv:
M
o
v
e the hfence in
s
t
r
uctions to the rvh
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-19
Alistair Franci
s
target/riscv: Report err
o
r
s validating 2nd-st
a
g
e PTEs
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-19
Alista
i
r
Francis
target/riscv: Set
ac
c
ess as data_load when val
i
dating
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-19
Alistair Franc
i
s
sif
i
v
e
_e: Support th
e
revB m
a
chin
e
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-03
A
l
ista
i
r Francis
r
i
scv
:
I
nitial commit of O
p
enTitan machine
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-03
Alistair Francis
t
a
rget/riscv: Add the low
R
ISC Ibex CPU
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-03
Alist
a
i
r Fra
n
cis
target
/
riscv: Don't set PMP f
e
a
t
ure in the c
p
u init
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-03
A
listair Fran
c
is
target/riscv: Disable the MMU
c
o
rrect
l
y
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-03
Alistair Fran
c
is
t
arget/riscv: Don
'
t overwri
t
e the reset v
e
c
tor
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-03
Ali
s
t
a
ir Francis
r
i
scv/boot: Add a missing
heade
r
incl
u
de
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-03
Alistai
r
F
r
ancis
riscv
:
sifi
v
e_e: Manual
l
y define the
machine
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-03
A
listair Francis
docs:
d
epreca
t
e
d
:
Update the
-
bio
s
do
c
umentat
i
on
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-03
Alista
i
r
Francis
target/riscv: Drop suppor
t
for I
S
A
s
p
ec
v
ersion 1
.
09
.
1
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-03
Alistair Francis
target/
r
iscv: Remove t
h
e depre
c
ated CPUs
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-03
A
l
istair Francis
hw/riscv: sp
i
k
e
: Remove deprecated IS
A
sp
e
cific
machines
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-04-29
Ali
s
tair Franc
i
s
riscv: AND stage-1 and stage-2 pr
o
tect
i
o
n flags
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-04-29
Al
i
sta
i
r
F
rancis
riscv: D
o
n't
u
se stage-2 PT
E
lookup protection fla
g
s
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-04-29
Alistair Francis
r
iscv/sifive_u: Add
a
serial proper
t
y
to the sifive_u SoC
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-04-29
Alistair Francis
riscv/sifive
_
u: Fix up file ordering
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-03-30
A
lista
i
r Francis
li
n
ux-user: Support fut
e
x_time64
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-03-20
Alistair Franc
i
s
linu
x
-user/
r
i
s
cv: Update the
s
yscall
_
nr's to
th
e
5
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-03-20
Alist
a
ir Francis
linux-us
e
r/sysc
a
ll: Add
s
upport f
o
r clock_getti
m
e64
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-03-20
Alistair Fr
a
ncis
linux-user: Protect mo
r
e sy
s
calls
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-03-17
Alistair F
r
an
c
i
s
target/riscv: Cor
r
ectly imple
m
en
t
T
S
R trap
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
A
l
i
s
t
air Francis
target/riscv: Allow enabling the Hypervisor extension
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
A
listair Francis
target
/
r
i
scv: Add the MSTATUS_MPV_IS
S
ET helper mac
r
o
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
Alistair
Francis
targe
t
/
riscv: Add support for the 32-b
i
t
M
STAT
U
SH CSR
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
Alista
i
r Francis
t
a
rget/risc
v
: Set htval and mtval2 on
e
xecptions
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
A
li
s
tair Francis
target/riscv: Raise
t
h
e new
e
x
ec
p
ti
o
ns when
2
nd st
a
ge
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
Alis
t
air
F
r
ancis
target/r
i
scv: Implemen
t
s
econd stage
MMU
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
Alistair Francis
t
a
r
g
e
t/riscv: All
o
w sp
e
c
ifying
M
MU
s
t
age
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
Al
i
stair
F
ran
c
is
targ
e
t/riscv: Respect MP
R
V
and SPR
V
for
f
loating point ops
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
Alistair
F
r
a
n
c
is
targe
t
/ris
c
v:
M
ark bo
t
h sst
a
t
us and mss
t
at
u
s_
h
s as
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
Alistair
F
ra
n
cis
targe
t
/r
i
scv
:
Disable guest
FP su
p
port based on
virtual
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
Ali
s
tair Franci
s
t
a
rget/riscv: O
n
l
y
s
et TB flag
s
with FP
sta
t
us i
f
e
n
abled
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
Alistair Francis
target/riscv: Remove the
hr
e
t i
n
st
r
uction
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
A
listair
Franc
i
s
target/riscv: Add hfen
c
e inst
r
uctio
n
s
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-02-27
Al
i
stair Francis
t
arget/
r
iscv
:
Add Hypervisor trap
r
et
u
rn suppo
r
t
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
next