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linux-user: add missing UDP get/setsockopt option
2021-01-16
Alistair Fran
c
is
ri
s
cv: P
a
ss RISCVHartAr
r
ayState by pointer
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-12-18
Alistair
Francis
ri
s
cv/o
p
entitan
:
U
p
date
the Op
e
nTitan memory layout
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-12-18
Alistair Francis
hw/riscv:
Use
t
h
e
C
PU to deter
m
ine i
f
32-b
i
t
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-12-18
Alistair Fra
n
c
i
s
target/
r
iscv:
cpu: Set XLEN inde
p
endently from target
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-12-18
Alistair Francis
target/riscv: cs
r
: Remove compil
e
ti
m
e XLEN
c
hecks
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-12-18
Alistair Francis
t
a
rget/ri
s
c
v
:
cpu_helpe
r
:
R
emove compile
t
ime XLEN
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-12-18
Alist
a
i
r Franc
i
s
target/riscv: cpu: Remove
c
om
p
i
l
e
t
i
me X
L
EN c
h
ecks
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-12-18
Alistair
F
ranc
i
s
t
a
rget/riscv: Spec
i
f
y the X
L
EN fo
r
CPUs
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-12-18
Al
i
stair Fr
a
ncis
targe
t
/riscv: Add a r
i
s
c
v_
c
pu_is
_
32bit() helper func
t
ion
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-12-18
Alistair
F
r
a
n
cis
target/riscv: fpu_he
l
per: Match
f
unc
t
io
n
defs i
n
HELPER
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-12-18
Alistair Francis
hw/riscv: si
f
i
ve_u:
R
e
move co
m
pile time XLEN checks
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-12-18
Alistair Franci
s
h
w
/
riscv
:
spike: Remo
v
e compi
l
e
ti
m
e XLEN ch
e
cks
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-12-18
Alistair F
r
ancis
hw/ri
s
cv: vi
r
t: Remove compile time XL
E
N checks
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-12-18
Alistair
F
rancis
hw/riscv: boot: Remove compile
t
im
e
XLEN
c
hecks
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-12-18
Alistai
r
Francis
risc
v
:
v
irt
:
Remove ta
r
get macro c
o
nditionals
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-12-18
Alistair Francis
r
iscv: spike: Remo
v
e ta
r
g
e
t mac
r
o conditionals
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-12-18
Al
i
s
t
air Fr
a
n
cis
t
a
rge
t
/riscv
:
Add a TYPE_
R
ISCV_CPU_BAS
E
CPU
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-12-18
Alistair Francis
h
w
/riscv: Expand the is 32-b
i
t check to support more
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-12-18
Alis
t
a
i
r
F
ran
c
is
intc/ibex_pli
c
: Clear interrupts that occur during
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-11-17
A
li
s
t
air Francis
r
e
g
ister:
Remove unnecessary NULL check
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-11-14
Alistair
F
rancis
intc/ibex_plic: Ensure w
e
don'
t
loose
interrupts
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-11-14
A
listair Francis
intc
/
ibe
x
_pl
i
c
:
Fix some typos
i
n the comments
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-11-09
Alistair F
r
ancis
hw/intc/ibex_
p
lic: Cl
e
a
r
the
claim
r
egist
e
r when read
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-11-09
Alistair
Francis
targe
t
/riscv
:
Split the
H
y
p
ervisor exe
c
ute load helpers
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-11-09
Al
i
st
a
ir Franc
i
s
targe
t
/
riscv: Remove th
e
hyp
l
oad
and
store
fu
n
c
tions
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-11-09
Alistair Francis
target/risc
v
: Rem
o
ve t
h
e
HS_TWO
_
ST
A
GE flag
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-11-09
Alista
i
r Francis
t
a
rget/risc
v
: S
e
t th
e
vi
r
t
ualised MMU mod
e
when d
o
in
g
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-11-09
A
l
istair Francis
target/ri
s
cv: A
d
d a v
i
r
tu
a
l
ised MMU Mode
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-11-04
Alistair Francis
l
i
nu
x
-
u
se
r
/
s
y
s
call: Fix m
i
ssing t
a
rg
e
t
_
to_hos
t
_
time
s
pec64
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-10-22
Alistair
Francis
h
w/riscv: Loa
d
the k
e
rnel after th
e
firmware
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-10-22
Ali
s
ta
i
r
Francis
h
w/riscv: Ad
d
a ri
s
cv_is_3
2
_bi
t
()
f
unction
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-10-22
A
lis
t
air Fr
a
ncis
hw/r
i
scv: Return the end address of the loa
d
e
d firmware
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-10-22
Alistair Franci
s
hw/ri
s
cv: sifive_u: Allow spe
c
ifying the CPU
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-10-22
Al
i
stair Francis
riscv: Conv
e
rt inte
r
ru
p
t logs to
use qe
m
u_log
_
m
a
sk()
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-09-25
Alis
t
air Franc
i
s
core/r
e
g
i
ster
:
Specify instance_size i
n
the TypeInfo
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-08-25
A
listair Franci
s
target/riscv: Support
t
he
V
irtual In
s
truction fau
l
t
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-08-25
Alistair Fr
a
ncis
targ
e
t/
r
iscv: Return the e
x
cepti
o
n from invalid CS
R
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-08-25
Alistair Fra
n
cis
target/riscv: Support the v0
.
6 Hyperviso
r
e
x
tension
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-08-25
A
l
i
s
tair Francis
targ
e
t
/
risc
v
: Only support l
i
t
tle endian gu
e
s
t
s
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-08-25
Al
i
st
a
ir Francis
t
arget/riscv: Only
s
upport a s
i
ngle VS
X
L lengt
h
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-08-25
Alistai
r
Francis
target/riscv
:
Update the CSRs to the v0
.
6 Hyp
e
x
t
e
nsi
o
n
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-08-25
Al
i
stair Fran
c
i
s
target/ris
c
v:
U
pdate the Hypervi
s
or trap
r
et
u
rn/entr
y
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-08-25
Alistair Franc
i
s
targe
t
/riscv: Fi
x
t
h
e interr
u
p
t
cau
s
e code
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-08-25
Al
i
stair
F
ranc
i
s
tar
g
et/riscv: Con
v
er
t
MSTATU
S
MTL to
GVA
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-08-25
Alistair Fran
c
is
target/riscv:
Do
n
't
a
llow
g
ue
s
t to write to htinst
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-08-25
Ali
s
tair Fran
c
i
s
ta
r
get/ri
s
c
v
:
Do
t
wo-st
a
ge looku
p
s
o
n
h
l
v/h
l
vx/hsv
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-08-25
Al
i
stair Francis
target/riscv: Allow ge
n
era
t
ing hlv/hlvx/hsv instruction
s
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-08-25
A
l
istair Fran
c
is
target/r
i
scv: A
l
low setting a t
w
o-stage
l
ookup in the
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-08-22
A
listair Francis
hw/intc: ibex_plic: Honour source prio
r
ities
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-08-22
Alistair Fran
c
is
hw/intc: ibex_plic: Don't all
o
w
r
epea
t
i
nterrupts
o
n
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-08-22
A
listair Franci
s
hw/intc: ibex_plic: Update the pendi
n
g
i
rq
s
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-08-21
Alistair Fra
n
cis
hw/sd/pl1
8
1: Replace fprintf(s
t
derr,
"*\
n
") with error_report()
Signed-off-by:
Alistair Francis
<alistair.francis@xilinx.com>
commit
|
commitdiff
|
tree
2020-07-14
Alistair Francis
hw/char: Convert t
h
e Ibex U
A
RT to
u
s
e
the registerfields API
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-07-14
Alistair
F
rancis
hw/char: C
o
nver
t
the
I
bex UA
R
T
t
o
u
s
e the qdev Clock
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-07-02
A
l
istair Fr
a
ncis
hw/riscv: Allow 64 bit
access to SiFive CLINT
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-19
Alist
a
i
r Francis
ta
r
g
et/risc
v
: Use
a
small
e
r gues
s
size for no
-
MMU PMP
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-19
Alista
i
r
F
r
a
ncis
r
i
s
cv/opentitan: Connect the UART de
v
ice
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-19
Alistair
Francis
r
i
s
c
v/opentit
a
n
:
Con
n
ect the PLIC dev
i
ce
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-19
A
listair Francis
hw/intc: In
i
tial commit
o
f
l
owRISC Ibex PLI
C
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-19
Ali
s
t
a
ir
F
ranc
i
s
h
w
/c
h
ar: Initial commit of Ibex UART
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-19
Alistair Fran
c
is
riscv/opentitan: Fix the R
O
M siz
e
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-19
Alistair Fr
a
ncis
targ
e
t/riscv: Implement checks for hfenc
e
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-19
A
l
istai
r
Francis
target/riscv: Move the
h
fence instructions to the rvh
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-19
Alista
i
r Fra
n
cis
targ
e
t/risc
v
: Report e
r
ror
s
validating 2nd
-
stage
P
TEs
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-19
Alistair Fran
c
is
target/riscv: Set acc
e
s
s
as
data_load whe
n
valida
t
i
ng
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-19
A
l
ist
a
ir Fr
a
ncis
sifive_e: Su
p
port the revB machine
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-03
Alistair Francis
r
i
scv: Initial
c
ommit
o
f Open
T
it
a
n machine
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-03
Al
i
s
t
air F
r
anci
s
target/riscv: Add the lowRISC Ibex CPU
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-03
Alistair Francis
target/
r
iscv: Don't set
P
MP
feat
u
re in the cpu i
n
i
t
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-03
Alis
t
air Fr
a
n
c
is
target/ris
c
v: Disable the
M
MU cor
r
ectly
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-03
A
l
is
t
air Franci
s
t
arget/riscv
:
Don't ove
r
write the reset vector
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-03
Alistair Francis
r
i
scv/boot: Add a missing header in
c
l
u
d
e
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-03
A
listair
F
ra
n
cis
riscv:
sif
i
ve_
e
:
M
a
nually define
t
he machine
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-03
Alistair
F
ranci
s
docs
:
d
e
precat
e
d
: Upd
a
t
e
t
h
e -bios d
o
cumentat
i
on
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
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2020-06-03
Alistair Franci
s
ta
r
get/riscv: Drop suppo
r
t
f
or ISA spec version 1
.
09
.
1
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
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2020-06-03
A
list
a
i
r
Francis
target/ris
c
v: Remove the deprecated CPUs
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
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2020-06-03
Alistair Francis
hw
/
r
is
c
v
: spik
e
: Remove depreca
t
ed ISA specific m
a
chines
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
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2020-04-29
Alista
i
r Francis
riscv: AND stage
-
1 and stage-2
p
r
o
tect
i
o
n f
l
a
g
s
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
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2020-04-29
A
l
i
s
tair
Francis
riscv: Don't
u
s
e
s
tage-2 PTE
loo
k
up prot
e
ction flags
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
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2020-04-29
A
listair Francis
riscv/s
i
five_u: Add a
serial pr
o
perty to the sifive_u
SoC
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
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2020-04-29
A
listair Franci
s
r
i
s
cv/si
f
iv
e
_
u
: Fix u
p
file ordering
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
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2020-03-30
Ali
s
tair Francis
l
i
nux
-
u
ser: Support futex_time64
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
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2020-03-20
Al
i
stair Franc
i
s
linux-user/r
i
scv: Update t
h
e syscall
_
nr's to the 5
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
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2020-03-20
Ali
s
tair Francis
li
n
u
x-user/s
y
scall:
A
dd support for cloc
k
_gettime64
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
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2020-03-20
Alistair F
r
ancis
linux-user: Protect more s
y
scalls
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
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2020-03-17
Ali
s
tair Franci
s
target
/
riscv: Cor
r
ectly implement
TSR
t
rap
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
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2020-02-27
Alistair Fr
a
ncis
t
a
rget/
r
iscv:
Allow e
n
abling
t
he Hype
r
visor extension
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
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2020-02-27
A
listai
r
F
r
ancis
targ
e
t/ris
c
v
:
Add the MSTA
T
US_MPV_ISSET he
l
per macro
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
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2020-02-27
A
l
istair Francis
target/
r
iscv: A
d
d
s
upport for the 32-bit MSTATUSH CSR
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
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2020-02-27
Alistai
r
F
r
a
ncis
target
/
r
i
scv: Set h
t
val and mtval2 on execptions
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
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2020-02-27
A
l
istair Franc
i
s
target
/
riscv: Rais
e
the new execptions whe
n
2
n
d sta
g
e
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
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2020-02-27
Al
i
stair
Franc
i
s
t
a
rget/riscv: I
m
pl
e
ment
se
c
ond st
a
ge MMU
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
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2020-02-27
Alistair Francis
ta
r
get
/
risc
v
:
Allow spec
i
f
ying
M
MU stage
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
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2020-02-27
Alist
a
i
r
F
rancis
ta
r
ge
t
/riscv: Respect MPRV and SPRV for floatin
g
point ops
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
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2020-02-27
Alistair Francis
target/riscv: Mark both
s
status a
n
d
m
s
s
tatus_hs
a
s
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
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2020-02-27
Ali
s
tair F
r
ancis
target/riscv: Disab
l
e guest FP support b
a
sed on vi
r
t
u
al
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
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2020-02-27
Alistair Fran
c
is
t
arget/riscv:
Only set
T
B
fl
a
gs
w
ith FP
status if
enabl
e
d
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
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2020-02-27
Alistai
r
Franci
s
targ
e
t/
r
iscv: Remov
e
th
e
h
r
et
i
nstructio
n
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
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2020-02-27
Al
i
s
tair Francis
target/riscv: Add hfence i
n
struc
t
i
o
ns
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
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2020-02-27
A
l
istair Fra
n
cis
target/r
i
scv: Ad
d
Hypervisor trap r
e
turn supp
o
r
t
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
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