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target/mips: Do not abort on invalid instruction
2019-09-17
Bin Meng
riscv: sifive_u
:
Upda
t
e
h
art configuration to refl
e
ct
.
.
.
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2019-09-17
Bin Meng
r
i
scv: sifive_u: Set the mi
n
imum num
b
er of cpus t
o
2
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2019-09-17
Bin Meng
riscv: hart:
A
dd
a "hartid-b
a
se" p
r
op
e
rty t
o
RISC-V
.
.
.
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2019-09-17
Bin M
e
ng
risc
v
: hart:
Extract hart
r
ealize
to
a separate routine
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2019-09-17
Bin Men
g
r
iscv:
A
dd a sif
i
ve_cpu
.
h
t
o include both E and U
c
pu
.
.
.
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2019-09-17
B
in Meng
riscv: sifive_e: Dro
p
sifive_mmio
_
emu
l
a
t
e()
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2019-09-17
Bin Meng
ris
c
v:
s
if
i
v
e_e: prci: Update the
P
RCI register block
.
.
.
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2019-09-17
Bin Meng
ris
c
v: sifive_e:
p
r
ci:
F
ix a
t
ypo
o
f h
f
xosc
c
fg
register
.
.
.
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2019-09-17
Bin Meng
r
i
scv:
s
ifive: Rename sifive_prci
.
{c, h} to
sifive_e_prci
.
.
.
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2019-09-17
Bin Meng
ris
c
v
:
sifi
v
e_u: Re
m
ove the unnecessary
i
n
clude
o
f
.
.
.
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2019-09-17
Bin Me
n
g
r
iscv: r
o
m
s: Remove execu
t
able attribute of ope
n
sbi
.
.
.
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2019-09-17
Bin
Meng
riscv: hw: Remove the unnece
s
sar
y
include o
f
target
.
.
.
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2019-09-17
Bin Me
n
g
riscv:
hw: Chan
g
e to u
s
e qemu_log_
m
ask(LOG
_
GU
E
ST_ERROR
.
.
.
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2019-09-17
Bi
n
Meng
riscv:
h
w
:
Change cre
a
t
e_fdt() to r
e
turn vo
i
d
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2019-09-17
Bin Meng
riscv: hw: R
e
move
not needed PLIC pr
o
pertie
s
in device
.
.
.
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2019-09-17
Bin Meng
riscv: hw: Use qemu_fdt_setprop_ce
l
l(
)
for prope
r
t
y
.
.
.
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2019-09-17
Bin
M
eng
riscv: hw: Remove superfluous "linux
,
phandle
"
property
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2019-09-17
Bin
M
en
g
riscv:
h
w: Remove d
u
p
licated "
h
w/
h
w
.
h" i
n
c
l
usion
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2019-09-17
Bin Meng
riscv: sifive_test: Add reset func
t
ionality
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2019-09-17
Bin Men
g
riscv: hmp: Add a com
m
and
t
o show vi
r
tual memory mappings
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2019-09-17
Bin Meng
ri
s
cv: Resolve full pat
h
of the g
i
ven bios im
a
ge
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2019-09-17
Bin Meng
riscv:
Add
a helper
r
o
u
tine for f
i
nding
firmware
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2019-09-17
B
i
n Meng
riscv: rv32: Root page
t
able ad
d
re
s
s can
b
e larger
.
.
.
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2019-08-13
Bin Meng
riscv:
roms: Fix ma
k
e rules f
o
r
b
uilding sifive
_
u bio
s
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2019-06-27
Bin Meng
riscv: sif
i
ve_u:
U
pdate the p
l
ic
h
art config
to support
.
.
.
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2019-06-27
B
i
n
M
e
n
g
riscv: sifive_u: Do not cr
e
ate h
a
rd-co
d
ed phandle
s
.
.
.
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2019-06-24
Bin Meng
riscv
:
vir
t
:
Correct pci "bus-
r
ange"
enc
o
di
n
g
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2019-03-19
Bin Me
n
g
riscv
:
sifive_u: Correct UART0
'
s IRQ in th
e
devic
e
.
.
.
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2019-03-19
Bin
M
eng
riscv: sifive_uart:
G
enerate TX interrupt
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree