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2023-01-20	Bin Meng	hw/char: riscv_htif: Move registers from CPUArchState... Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2023-01-20	Bin Meng	hw/char: riscv_htif: Use conventional 's' for HTIFState Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2023-01-20	Bin Meng	hw/char: riscv_htif: Drop useless assignment of memory... Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2023-01-20	Bin Meng	hw/char: riscv_htif: Drop {to, from}host_size in HTIFState Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2023-01-20	Bin Meng	hw/char: riscv_htif: Avoid using magic numbers Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2023-01-06	Bin Meng	hw/intc: sifive_plic: Fix the pending register range... Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2023-01-06	Bin Meng	hw/riscv: opentitan: Drop "hartid-base" and "priority... Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2023-01-06	Bin Meng	hw/intc: sifive_plic: Change "priority-base" to start... Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2023-01-06	Bin Meng	hw/riscv: virt: Fix the value of "riscv, ndev" in the dtb Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2023-01-06	Bin Meng	hw/riscv: sifive_u: Avoid using magic number for "riscv... Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2023-01-06	Bin Meng	hw/riscv: sifive_e: Fix the number of interrupt sources... Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2023-01-06	Bin Meng	hw/riscv: microchip_pfsoc: Fix the number of interrupt... Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2023-01-06	Bin Meng	hw/intc: sifive_plic: Update "num-sources" property... Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2023-01-06	Bin Meng	hw/intc: sifive_plic: Use error_setg() to propagate... Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2023-01-06	Bin Meng	hw/intc: sifive_plic: Improve robustness of the PLIC... Acked-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2023-01-06	Bin Meng	hw/intc: sifive_plic: Drop PLICMode_H Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2023-01-06	Bin Meng	hw/riscv: spike: Remove misleading comments Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2023-01-06	Bin Meng	hw/riscv: Sort machines Kconfig options in alphabetical... Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2023-01-06	Bin Meng	hw/riscv: Fix opentitan dependency to SIFIVE_PLIC Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2023-01-06	Bin Meng	hw/intc: Select MSI_NONBROKEN in RISC-V AIA interrupt... Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2023-01-06	Bin Meng	hw/riscv: Select MSI_NONBROKEN in SIFIVE_PLIC Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2023-01-06	Christoph Muellner	RISC-V: Add Zawrs ISA extension support Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2023-01-06	Bin Meng	target/riscv: Clear mstatus.MPRV when leaving M-mode... Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2023-01-06	Bin Meng	target/riscv: Simplify helper_sret() a little bit Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2023-01-06	Richard Henderson	target/riscv: Set pc_succ_insn for !rvc illegal insn Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2023-01-06	Bin Meng	target/riscv: Fix mret exception cause when no pmp... Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2023-01-06	Jim Shu	hw/intc: sifive_plic: fix out-of-bound access of source_prio... Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2023-01-06	Conor Dooley	hw/{misc, riscv}: pfsoc: add system controller as unimplemented Acked-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2023-01-06	Conor Dooley	hw/riscv: pfsoc: add missing FICs as unimplemented Acked-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2023-01-06	Conor Dooley	hw/misc: pfsoc: add fabric clocks to ioscb Acked-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2023-01-06	Bin Meng	target/riscv: Add some comments for sstatus CSR in... Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2023-01-06	Jim Shu	target/riscv: support cache-related PMU events in virtual... Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2023-01-06	Atish Patra	hw/riscv: virt: Remove the redundant ipi-id property Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2023-01-06	Anup Patel	target/riscv: Typo fix in sstc() predicate Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2023-01-06	Frédéric Pétrot	hw/intc: sifive_plic: Renumber the S irqs for numa... Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2023-01-06	LIU Zhiwei	target/riscv: Add itrigger_enabled field to CPURISCVState Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2023-01-06	LIU Zhiwei	target/riscv: Enable native debug itrigger Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2023-01-06	LIU Zhiwei	target/riscv: Add itrigger support when icount is enabled Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2023-01-06	LIU Zhiwei	target/riscv: Add itrigger support when icount is not... Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2023-01-06	Mayuresh Chitale	target/riscv: generate virtual instruction exception Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2023-01-06	Mayuresh Chitale	target/riscv: smstateen check for h/s/envcfg Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2023-01-06	Mayuresh Chitale	target/riscv: Add smstateen support Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2023-01-06	Wilfred Mallawa	hw/riscv/opentitan: add aon_timer base unimpl Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2023-01-06	Wilfred Mallawa	hw/riscv/opentitan: bump opentitan Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2023-01-06	Richard Henderson	tcg/riscv: Fix base register for user-only qemu_ld/st Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2023-01-06	Richard Henderson	tcg/riscv: Fix reg overlap case in tcg_out_addsub2 Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2023-01-06	Richard Henderson	tcg/riscv: Fix range matched by TCG_CT_CONST_M12 Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2023-01-06	LIU Zhiwei	target/riscv: Fix PMP propagation for tlb Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2022-10-14	Alistair Francis	target/riscv: pmp: Fixup TLB size calculation Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2022-10-14	Jim Shu	hw/intc: sifive_plic: change interrupt priority register... Acked-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2022-10-14	Jim Shu	hw/intc: sifive_plic: fix hard-coded max priority level Acked-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2022-10-14	Yang Liu	disas/riscv.c: rvv: Add disas support for vector instructions Acked-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2022-10-14	Sunil V L	hw/riscv: virt: Enable booting S-mode firmware from... Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2022-10-14	Sunil V L	hw/riscv: virt: Move create_fw_cfg() prior to loading... Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2022-10-14	Sunil V L	hw/arm, loongarch: Move load_image_to_fw_cfg() to common... Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2022-10-14	Wilfred Mallawa	hw/ssi: ibex_spi: fixup/add rw1c functionality Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2022-10-14	Wilfred Mallawa	hw/ssi: ibex_spi: fixup coverity issue Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2022-10-14	Bin Meng	hw/riscv: Update comment for qtest check in riscv_find_firmw... Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2022-09-27	Yang Liu	target/riscv: rvv-1.0: vf[w]redsum distinguish between... Acked-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2022-09-27	Yang Liu	target/riscv: rvv-1.0: Simplify vfwredsum code Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2022-09-27	Frank Chang	target/riscv: debug: Add initial support of type 6... Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2022-09-27	Frank Chang	target/riscv: debug: Check VU/VS modes for type 2 trigger Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2022-09-27	Frank Chang	target/riscv: debug: Create common trigger actions... Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2022-09-27	Frank Chang	target/riscv: debug: Introduce tinfo CSR Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2022-09-27	Frank Chang	target/riscv: debug: Restrict the range of tselect... Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2022-09-27	Frank Chang	target/riscv: debug: Introduce tdata1, tdata2, and... Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2022-09-27	Frank Chang	target/riscv: debug: Introduce build_tdata1() to build... Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2022-09-27	Frank Chang	target/riscv: debug: Determine the trigger type from... Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2022-09-26	Bernhard Beschow	hw/riscv/sifive_e: Fix inheritance of SiFiveEState Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2022-09-26	Frank Chang	target/riscv: Check the correct exception cause in... Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2022-09-26	Alistair Francis	hw/riscv: opentitan: Expose the resetvec as a SoC property Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2022-09-26	Alistair Francis	hw/riscv: opentitan: Fixup resetvec Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2022-09-26	Alistair Francis	target/riscv: Set the CPU resetvec directly Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2022-09-26	Andrew Burgess	target/riscv: remove fixed numbering from GDB xml feature... Acked-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2022-09-26	Andrew Burgess	target/riscv: remove fflags, frm, and fcsr from riscv... Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2022-09-26	Weiwei Li	target/riscv: fix csr check for cycle{h}, instret{h... Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2022-09-26	Rahul Pathak	target/riscv: Remove sideleg and sedeleg Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2022-09-26	Alex Bennée	docs/system: clean up code escape for riscv virt platform Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2022-09-26	Wilfred Mallawa	hw/ssi: ibex_spi: update reg addr Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2022-09-26	Wilfred Mallawa	hw/ssi: ibex_spi: fixup typos in ibex_spi_host Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2022-09-07	Atish Patra	target/riscv: Update the privilege field for sscofpmf... Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2022-09-07	Atish Patra	hw/riscv: virt: Add PMU DT node to the device tree Acked-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2022-09-07	Atish Patra	target/riscv: Add few cache related PMU events Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2022-09-07	Atish Patra	target/riscv: Simplify counter predicate function Acked-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2022-09-07	Atish Patra	target/riscv: Add sscofpmf extension support Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2022-09-07	Atish Patra	target/riscv: Add vstimecmp support Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2022-09-07	Atish Patra	target/riscv: Add stimecmp support Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2022-09-07	Atish Patra	hw/intc: Move mtimer/mtimecmp to aclint Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2022-09-07	Anup Patel	target/riscv: Use official extension names for AIA... Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2022-09-07	Rahul Pathak	target/riscv: Add xicondops in ISA entry Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2022-09-07	Conor Dooley	hw/core: fix platform bus node name Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2022-09-07	Conor Dooley	hw/riscv: virt: fix syscon subnode paths Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2022-09-07	Conor Dooley	hw/riscv: virt: fix the plic's address cells Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2022-09-07	Conor Dooley	hw/riscv: virt: fix uart node name Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2022-09-07	Atish Patra	target/riscv: Remove additional priv version check... Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2022-09-07	Conor Dooley	hw/riscv: microchip_pfsoc: fix kernel panics due to... Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2022-09-07	Wilfred Mallawa	hw/riscv: opentitan: bump opentitan version Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2022-09-07	Weiwei Li	target/riscv: Fix priority of csr related check in... Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2022-09-07	Daniel Henrique...	hw/riscv: remove 'fdt' param from riscv_setup_rom_reset_vec() Cc: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
2022-09-07	Dao Lu	target/riscv: Add Zihintpause support Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	commit \| commitdiff \| tree
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