target/riscv: Add some comments for sstatus CSR in riscv_cpu_dump_state()
commitbc7dca13b7ac81832c66b5dc67d0568c7b08d064
authorBin Meng <bmeng@tinylab.org>
Fri, 25 Nov 2022 05:03:54 +0000 (25 13:03 +0800)
committerAlistair Francis <alistair.francis@wdc.com>
Fri, 6 Jan 2023 00:42:55 +0000 (6 10:42 +1000)
tree5db73d2549816b52e68e11c2b097f0a20533f6a4
parenteacd03cb9e51f98c19dc97270c9e4745f441abbe
target/riscv: Add some comments for sstatus CSR in riscv_cpu_dump_state()

sstatus register dump is currently missing in riscv_cpu_dump_state().
As sstatus is a copy of mstatus, which is described in the priv spec,
it seems redundant to print the same information twice.

Add some comments for this to let people know this is intentional.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20221125050354.3166023-1-bmeng@tinylab.org>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
target/riscv/cpu.c