2021-09-01 | LIU Zhiwei | target/riscv: Add User CSRs read-only check Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-id: 20210810014552.4884-1-zhiwei_liu@c-sky.com |
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2021-09-01 | LIU Zhiwei | target/riscv: Don't wrongly override isa version Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-id: 20210811144612.68674-1-zhiwei_liu@c-sky.com |
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2021-06-29 | LIU Zhiwei | tcg: Implement tcg_gen_vec_add{sub}32_tl Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-Id: <20210624105023.3852-6-zhiwei_liu@c-sky.com> |
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2021-06-29 | LIU Zhiwei | tcg: Add tcg_gen_vec_shl{shr}{sar}8i_i32 Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-Id: <20210624105023.3852-5-zhiwei_liu@c-sky.com> |
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2021-06-29 | LIU Zhiwei | tcg: Add tcg_gen_vec_shl{shr}{sar}16i_i32 Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-Id: <20210624105023.3852-4-zhiwei_liu@c-sky.com> |
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2021-06-29 | LIU Zhiwei | tcg: Add tcg_gen_vec_add{sub}8_i32 Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-Id: <20210624105023.3852-3-zhiwei_liu@c-sky.com> |
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2021-06-29 | LIU Zhiwei | tcg: Add tcg_gen_vec_add{sub}16_i32 Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-Id: <20210624105023.3852-2-zhiwei_liu@c-sky.com> |
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2021-06-07 | LIU Zhiwei | target/riscv: Pass the same value to oprsz and maxsz. Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-id: 20210521054816.1784297-1-zhiwei_liu@c-sky.com |
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2021-05-11 | LIU Zhiwei | target/riscv: Fixup saturate subtract function Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-id: 20210212150256.885-4-zhiwei_liu@c-sky.com |
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2020-08-28 | LIU Zhiwei | softfloat: Define misc operations for bfloat16 Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-Id: <20200813071421.2509-4-zhiwei_liu@c-sky.com> |
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2020-08-28 | LIU Zhiwei | softfloat: Define convert operations for bfloat16 Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-Id: <20200813071421.2509-3-zhiwei_liu@c-sky.com> |
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2020-08-28 | LIU Zhiwei | softfloat: Define operations for bfloat16 Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-Id: <20200813071421.2509-2-zhiwei_liu@c-sky.com> |
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2020-08-22 | LIU Zhiwei | target/riscv: check before allocating TCG temps Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-Id: <20200626205917.4545-5-zhiwei_liu@c-sky.com> |
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2020-08-22 | LIU Zhiwei | target/riscv: Clean up fmv.w.x Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-Id: <20200626205917.4545-7-zhiwei_liu@c-sky.com> |
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2020-07-22 | LIU Zhiwei | target/riscv: fix vector index load/store constraints Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-Id: <20200721133742.2298-2-zhiwei_liu@c-sky.com> |
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2020-07-22 | LIU Zhiwei | target/riscv: Quiet Coverity complains about vamo* Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-Id: <20200721133742.2298-1-zhiwei_liu@c-sky.com> |
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2020-07-15 | LIU Zhiwei | fpu/softfloat: fix up float16 nan recognition Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-Id: <20200712234521.3972-2-zhiwei_liu@c-sky.com> |
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2020-07-02 | LIU Zhiwei | target/riscv: configure and turn on vector extension... Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-Id: <20200701152549.1218-62-zhiwei_liu@c-sky.com> |
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2020-07-02 | LIU Zhiwei | target/riscv: vector compress instruction Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-Id: <20200701152549.1218-61-zhiwei_liu@c-sky.com> |
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2020-07-02 | LIU Zhiwei | target/riscv: vector register gather instruction Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-Id: <20200701152549.1218-60-zhiwei_liu@c-sky.com> |
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2020-07-02 | LIU Zhiwei | target/riscv: vector slide instructions Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-Id: <20200701152549.1218-59-zhiwei_liu@c-sky.com> |
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2020-07-02 | LIU Zhiwei | target/riscv: floating-point scalar move instructions Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-Id: <20200701152549.1218-58-zhiwei_liu@c-sky.com> |
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2020-07-02 | LIU Zhiwei | target/riscv: integer scalar move instruction Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-Id: <20200701152549.1218-57-zhiwei_liu@c-sky.com> |
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2020-07-02 | LIU Zhiwei | target/riscv: integer extract instruction Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-Id: <20200701152549.1218-56-zhiwei_liu@c-sky.com> |
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2020-07-02 | LIU Zhiwei | target/riscv: vector element index instruction Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-Id: <20200701152549.1218-55-zhiwei_liu@c-sky.com> |
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2020-07-02 | LIU Zhiwei | target/riscv: vector iota instruction Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-Id: <20200701152549.1218-54-zhiwei_liu@c-sky.com> |
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2020-07-02 | LIU Zhiwei | target/riscv: set-X-first mask bit Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-Id: <20200701152549.1218-53-zhiwei_liu@c-sky.com> |
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2020-07-02 | LIU Zhiwei | target/riscv: vmfirst find-first-set mask bit Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-Id: <20200701152549.1218-52-zhiwei_liu@c-sky.com> |
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2020-07-02 | LIU Zhiwei | target/riscv: vector mask population count vmpopc Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-Id: <20200701152549.1218-51-zhiwei_liu@c-sky.com> |
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2020-07-02 | LIU Zhiwei | target/riscv: vector mask-register logical instructions Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-Id: <20200701152549.1218-50-zhiwei_liu@c-sky.com> |
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2020-07-02 | LIU Zhiwei | target/riscv: vector widening floating-point reduction... Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-Id: <20200701152549.1218-49-zhiwei_liu@c-sky.com> |
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2020-07-02 | LIU Zhiwei | target/riscv: vector single-width floating-point reduction... Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-Id: <20200701152549.1218-48-zhiwei_liu@c-sky.com> |
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2020-07-02 | LIU Zhiwei | target/riscv: vector wideing integer reduction instructions Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-Id: <20200701152549.1218-47-zhiwei_liu@c-sky.com> |
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2020-07-02 | LIU Zhiwei | target/riscv: vector single-width integer reduction... Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-Id: <20200701152549.1218-46-zhiwei_liu@c-sky.com> |
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2020-07-02 | LIU Zhiwei | target/riscv: narrowing floating-point/integer type... Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-Id: <20200701152549.1218-45-zhiwei_liu@c-sky.com> |
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2020-07-02 | LIU Zhiwei | target/riscv: widening floating-point/integer type... Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-Id: <20200701152549.1218-44-zhiwei_liu@c-sky.com> |
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2020-07-02 | LIU Zhiwei | target/riscv: vector floating-point/integer type-convert... Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-Id: <20200701152549.1218-43-zhiwei_liu@c-sky.com> |
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2020-07-02 | LIU Zhiwei | target/riscv: vector floating-point merge instructions Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-Id: <20200701152549.1218-42-zhiwei_liu@c-sky.com> |
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2020-07-02 | LIU Zhiwei | target/riscv: vector floating-point classify instructions Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-Id: <20200701152549.1218-41-zhiwei_liu@c-sky.com> |
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2020-07-02 | LIU Zhiwei | target/riscv: vector floating-point compare instructions Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-Id: <20200701152549.1218-40-zhiwei_liu@c-sky.com> |
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2020-07-02 | LIU Zhiwei | target/riscv: vector floating-point sign-injection... Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-Id: <20200701152549.1218-39-zhiwei_liu@c-sky.com> |
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2020-07-02 | LIU Zhiwei | target/riscv: vector floating-point min/max instructions Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-Id: <20200701152549.1218-38-zhiwei_liu@c-sky.com> |
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2020-07-02 | LIU Zhiwei | target/riscv: vector floating-point square-root instruction Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-Id: <20200701152549.1218-37-zhiwei_liu@c-sky.com> |
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2020-07-02 | LIU Zhiwei | target/riscv: vector widening floating-point fused... Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-Id: <20200701152549.1218-36-zhiwei_liu@c-sky.com> |
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2020-07-02 | LIU Zhiwei | target/riscv: vector single-width floating-point fused... Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-Id: <20200701152549.1218-35-zhiwei_liu@c-sky.com> |
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2020-07-02 | LIU Zhiwei | target/riscv: vector widening floating-point multiply Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-Id: <20200701152549.1218-34-zhiwei_liu@c-sky.com> |
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2020-07-02 | LIU Zhiwei | target/riscv: vector single-width floating-point multiply... Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-Id: <20200701152549.1218-33-zhiwei_liu@c-sky.com> |
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2020-07-02 | LIU Zhiwei | target/riscv: vector widening floating-point add/subtract... Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-Id: <20200701152549.1218-32-zhiwei_liu@c-sky.com> |
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2020-07-02 | LIU Zhiwei | target/riscv: vector single-width floating-point add... Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-Id: <20200701152549.1218-31-zhiwei_liu@c-sky.com> |
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2020-07-02 | LIU Zhiwei | target/riscv: vector narrowing fixed-point clip instructions Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-Id: <20200701152549.1218-30-zhiwei_liu@c-sky.com> |
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2020-07-02 | LIU Zhiwei | target/riscv: vector single-width scaling shift instructions Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-Id: <20200701152549.1218-29-zhiwei_liu@c-sky.com> |
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2020-07-02 | LIU Zhiwei | target/riscv: vector widening saturating scaled multiply-add Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-Id: <20200701152549.1218-28-zhiwei_liu@c-sky.com> |
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2020-07-02 | LIU Zhiwei | target/riscv: vector single-width fractional multiply... Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-Id: <20200701152549.1218-27-zhiwei_liu@c-sky.com> |
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2020-07-02 | LIU Zhiwei | target/riscv: vector single-width averaging add and... Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-Id: <20200701152549.1218-26-zhiwei_liu@c-sky.com> |
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2020-07-02 | LIU Zhiwei | target/riscv: vector single-width saturating add and... Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-Id: <20200701152549.1218-25-zhiwei_liu@c-sky.com> |
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2020-07-02 | LIU Zhiwei | target/riscv: vector integer merge and move instructions Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-Id: <20200701152549.1218-24-zhiwei_liu@c-sky.com> |
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2020-07-02 | LIU Zhiwei | target/riscv: vector widening integer multiply-add... Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-Id: <20200701152549.1218-23-zhiwei_liu@c-sky.com> |
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2020-07-02 | LIU Zhiwei | target/riscv: vector single-width integer multiply... Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-Id: <20200701152549.1218-22-zhiwei_liu@c-sky.com> |
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2020-07-02 | LIU Zhiwei | target/riscv: vector widening integer multiply instructions Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-Id: <20200701152549.1218-21-zhiwei_liu@c-sky.com> |
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2020-07-02 | LIU Zhiwei | target/riscv: vector integer divide instructions Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-Id: <20200701152549.1218-20-zhiwei_liu@c-sky.com> |
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2020-07-02 | LIU Zhiwei | target/riscv: vector single-width integer multiply... Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-Id: <20200701152549.1218-19-zhiwei_liu@c-sky.com> |
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2020-07-02 | LIU Zhiwei | target/riscv: vector integer min/max instructions Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-Id: <20200701152549.1218-18-zhiwei_liu@c-sky.com> |
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2020-07-02 | LIU Zhiwei | target/riscv: vector integer comparison instructions Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-Id: <20200701152549.1218-17-zhiwei_liu@c-sky.com> |
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2020-07-02 | LIU Zhiwei | target/riscv: vector narrowing integer right shift... Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-Id: <20200701152549.1218-16-zhiwei_liu@c-sky.com> |
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2020-07-02 | LIU Zhiwei | target/riscv: vector single-width bit shift instructions Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-Id: <20200701152549.1218-15-zhiwei_liu@c-sky.com> |
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2020-07-02 | LIU Zhiwei | target/riscv: vector bitwise logical instructions Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-Id: <20200701152549.1218-14-zhiwei_liu@c-sky.com> |
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2020-07-02 | LIU Zhiwei | target/riscv: vector integer add-with-carry / subtract... Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-Id: <20200701152549.1218-13-zhiwei_liu@c-sky.com> |
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2020-07-02 | LIU Zhiwei | target/riscv: vector widening integer add and subtract Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-Id: <20200701152549.1218-12-zhiwei_liu@c-sky.com> |
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2020-07-02 | LIU Zhiwei | target/riscv: vector single-width integer add and subtract Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-Id: <20200701152549.1218-11-zhiwei_liu@c-sky.com> |
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2020-07-02 | LIU Zhiwei | target/riscv: add vector amo operations Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-Id: <20200701152549.1218-10-zhiwei_liu@c-sky.com> |
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2020-07-02 | LIU Zhiwei | target/riscv: add fault-only-first unit stride load Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-Id: <20200701152549.1218-9-zhiwei_liu@c-sky.com> |
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2020-07-02 | LIU Zhiwei | target/riscv: add vector index load and store instructions Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-Id: <20200701152549.1218-8-zhiwei_liu@c-sky.com> |
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2020-07-02 | LIU Zhiwei | target/riscv: add vector stride load and store instructions Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-Id: <20200701152549.1218-7-zhiwei_liu@c-sky.com> |
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2020-07-02 | LIU Zhiwei | target/riscv: add an internals.h header Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-Id: <20200701152549.1218-6-zhiwei_liu@c-sky.com> |
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2020-07-02 | LIU Zhiwei | target/riscv: add vector configure instruction Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-Id: <20200701152549.1218-5-zhiwei_liu@c-sky.com> |
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2020-07-02 | LIU Zhiwei | target/riscv: support vector extension csr Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-Id: <20200701152549.1218-4-zhiwei_liu@c-sky.com> |
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2020-07-02 | LIU Zhiwei | target/riscv: implementation-defined constant parameters Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-Id: <20200701152549.1218-3-zhiwei_liu@c-sky.com> |
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2020-07-02 | LIU Zhiwei | target/riscv: add vector extension field in CPURISCVState Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-Id: <20200701152549.1218-2-zhiwei_liu@c-sky.com> |
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2020-04-29 | LIU Zhiwei | linux-user/riscv: fix up struct target_ucontext definition Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Message-id: 20200412020830.607-1-zhiwei_liu@c-sky.com Message-Id: <20200412020830.607-1-zhiwei_liu@c-sky.com> |
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