repo.or.cz
/
qemu
/
ar7.git
/
search
commit
grep
author
committer
pickaxe
?
search:
re
summary
|
log
|
graphiclog1
|
graphiclog2
|
commit
|
commitdiff
|
tree
|
refs
|
edit
|
fork
first
·
prev
·
next
target/riscv: rvv-1.0: remove widening saturating scaled multiply-add
2021-12-20
Frank Chang
target/riscv:
r
vv-1
.
0: re
m
ove
w
iden
i
ng saturati
n
g scaled
.
.
.
Signed-off-by:
Frank Chang
<frank.chang@sifive.com>
commit
|
commitdiff
|
tree
2021-12-20
Frank Chang
target/riscv:
rvv-1
.
0: single-width sca
l
ing shift instru
c
tio
n
s
Signed-off-by:
Frank Chang
<frank.chang@sifive.com>
commit
|
commitdiff
|
tree
2021-12-20
Frank Chang
target/riscv: rvv-1
.
0: widening
fl
o
ating-point reduc
t
ion
.
.
.
Signed-off-by:
Frank Chang
<frank.chang@sifive.com>
commit
|
commitdiff
|
tree
2021-12-20
F
rank
C
h
a
ng
tar
g
et/
r
iscv: rvv-1
.
0: single-width floating-poi
n
t
.
.
.
Signed-off-by:
Frank Chang
<frank.chang@sifive.com>
commit
|
commitdiff
|
tree
2021-12-20
Frank C
h
ang
target/r
i
scv: r
v
v-1
.
0: narrow
i
ng fix
e
d
-
point
c
lip i
n
s
tructions
Signed-off-by:
Frank Chang
<frank.chang@sifive.com>
commit
|
commitdiff
|
tree
2021-12-20
Frank Chang
ta
r
ge
t
/
risc
v
: r
v
v-1
.
0:
f
loat
i
ng-point slide instructions
Signed-off-by:
Frank Chang
<frank.chang@sifive.com>
commit
|
commitdiff
|
tree
2021-12-20
Frank
Chang
targe
t
/
ris
c
v: rvv-
1
.
0: slide in
s
tructions
Signed-off-by:
Frank Chang
<frank.chang@sifive.com>
commit
|
commitdiff
|
tree
2021-12-20
Frank Chang
t
a
r
get/ri
s
cv:
rvv-1
.
0: mask-re
g
ister logical
i
nstruc
t
ions
Signed-off-by:
Frank Chang
<frank.chang@sifive.com>
commit
|
commitdiff
|
tree
2021-12-20
Frank Chang
target
/
ri
s
cv:
rv
v
-
1
.
0: float
i
ng-
p
oint compare instruc
t
ions
Signed-off-by:
Frank Chang
<frank.chang@sifive.com>
commit
|
commitdiff
|
tree
2021-12-20
F
rank Chang
target/ri
s
cv: rvv-1
.
0: in
t
eger compariso
n
i
nstruct
i
ons
Signed-off-by:
Frank Chang
<frank.chang@sifive.com>
commit
|
commitdiff
|
tree
2021-12-20
Frank Chang
target/
r
iscv: r
v
v-1
.
0
:
s
i
ngle-width s
a
t
u
rat
i
ng add
.
.
.
Signed-off-by:
Frank Chang
<frank.chang@sifive.com>
commit
|
commitdiff
|
tree
2021-12-20
Frank
C
h
ang
t
a
r
get/riscv: r
v
v-1
.
0: wide
n
i
n
g
integer
m
u
l
tiply-add
.
.
.
Signed-off-by:
Frank Chang
<frank.chang@sifive.com>
commit
|
commitdiff
|
tree
2021-12-20
Frank Chang
target
/
riscv: rv
v
-1
.
0
:
narrowing
i
ntege
r
right shi
f
t
.
.
.
Signed-off-by:
Frank Chang
<frank.chang@sifive.com>
commit
|
commitdiff
|
tree
2021-12-20
Frank Chang
target/riscv: rvv-1
.
0
:
i
nte
g
er add-w
i
th-
c
arry/sub
t
ract
.
.
.
Signed-off-by:
Frank Chang
<frank.chang@sifive.com>
commit
|
commitdiff
|
tree
2021-12-20
F
r
ank
C
h
ang
target/riscv: rvv
-
1
.
0: single
-
widt
h
bi
t
shi
f
t instructions
Signed-off-by:
Frank Chang
<frank.chang@sifive.com>
commit
|
commitdiff
|
tree
2021-12-20
Fran
k
C
han
g
target/
r
iscv: rvv-1
.
0: s
i
ngle-
w
idth aver
a
gin
g
add a
n
d
.
.
.
Signed-off-by:
Frank Chang
<frank.chang@sifive.com>
commit
|
commitdiff
|
tree
2021-12-20
F
rank
Cha
n
g
target/riscv: rvv-1
.
0: integer e
x
tens
i
on instruc
t
ions
Signed-off-by:
Frank Chang
<frank.chang@sifive.com>
commit
|
commitdiff
|
tree
2021-12-20
F
r
a
n
k
Chang
targe
t
/ri
s
cv: rvv-1
.
0:
who
l
e
regi
s
ter m
o
ve ins
t
ructions
Signed-off-by:
Frank Chang
<frank.chang@sifive.com>
commit
|
commitdiff
|
tree
2021-12-20
F
rank Chang
tar
g
et/riscv: rvv-1
.
0: f
l
oating-point scalar
m
ove instructi
o
ns
Signed-off-by:
Frank Chang
<frank.chang@sifive.com>
commit
|
commitdiff
|
tree
2021-12-20
Fra
n
k Ch
a
ng
target/riscv
:
rvv-1
.
0: floating-point
m
o
v
e instruction
Signed-off-by:
Frank Chang
<frank.chang@sifive.com>
commit
|
commitdiff
|
tree
2021-12-20
Frank C
h
ang
ta
r
get/ris
c
v
:
rvv-1
.
0: integer
scalar
move instructions
Signed-off-by:
Frank Chang
<frank.chang@sifive.com>
commit
|
commitdiff
|
tree
2021-12-20
F
ra
n
k
Chang
targe
t
/
riscv: rvv-1
.
0: register gather instructions
Signed-off-by:
Frank Chang
<frank.chang@sifive.com>
commit
|
commitdiff
|
tree
2021-12-20
Frank
C
hang
targe
t
/riscv: rvv-1
.
0: allow load el
e
men
t
w
i
th sign
.
.
.
Signed-off-by:
Frank Chang
<frank.chang@sifive.com>
commit
|
commitdiff
|
tree
2021-12-20
Frank Chang
t
ar
g
et/
r
iscv: rvv-1
.
0
: el
e
ment inde
x
inst
r
u
c
ti
o
n
Signed-off-by:
Frank Chang
<frank.chang@sifive.com>
commit
|
commitdiff
|
tree
2021-12-20
Frank Cha
n
g
target
/
r
i
scv: rvv-1
.
0: io
t
a i
n
str
u
ction
Signed-off-by:
Frank Chang
<frank.chang@sifive.com>
commit
|
commitdiff
|
tree
2021-12-20
Frank Chang
target/ri
s
cv: rvv-1
.
0: set-X-first mask
b
i
t instruct
i
ons
Signed-off-by:
Frank Chang
<frank.chang@sifive.com>
commit
|
commitdiff
|
tree
2021-12-20
Frank Chang
t
a
rget/risc
v
:
r
vv-1
.
0: fi
n
d-fi
r
st-set mask bit instruction
Signed-off-by:
Frank Chang
<frank.chang@sifive.com>
commit
|
commitdiff
|
tree
2021-12-20
Frank Chan
g
target/
r
iscv: rvv-1
.
0:
count pop
u
lation i
n
mask
instruction
Signed-off-by:
Frank Chang
<frank.chang@sifive.com>
commit
|
commitdiff
|
tree
2021-12-20
Frank
C
ha
n
g
target/riscv: rvv-1
.
0: fl
o
ating-p
o
i
n
t clas
s
i
fy inst
r
u
ctions
Signed-off-by:
Frank Chang
<frank.chang@sifive.com>
commit
|
commitdiff
|
tree
2021-12-20
F
rank C
h
ang
target
/
riscv: rv
v
-1
.
0
:
floating
-
po
i
nt squa
r
e-root i
n
stru
c
tion
Signed-off-by:
Frank Chang
<frank.chang@sifive.com>
commit
|
commitdiff
|
tree
2021-12-20
Frank Chan
g
targ
e
t/riscv: rvv-1
.
0: t
a
ke fr
a
c
t
ional LMUL into
ve
c
tor
.
.
.
Signed-off-by:
Frank Chang
<frank.chang@sifive.com>
commit
|
commitdiff
|
tree
2021-12-20
Frank Chang
target
/
riscv: r
v
v-1
.
0
:
update vext_ma
x
_elems() for
.
.
.
Signed-off-by:
Frank Chang
<frank.chang@sifive.com>
commit
|
commitdiff
|
tree
2021-12-20
Frank Chang
t
arge
t
/
riscv: rvv-1
.
0: lo
a
d/store wh
o
le regist
e
r
i
n
s
tructions
Signed-off-by:
Frank Chang
<frank.chang@sifive.com>
commit
|
commitdiff
|
tree
2021-12-20
F
rank C
h
ang
target/ri
s
cv: rvv-1
.
0:
fault-only-first
unit stride
.
.
.
Signed-off-by:
Frank Chang
<frank.chang@sifive.com>
commit
|
commitdiff
|
tree
2021-12-20
Frank Chang
t
arge
t
/riscv: rvv-1
.
0: fix address index ove
r
f
low bug
.
.
.
Signed-off-by:
Frank Chang
<frank.chang@sifive.com>
commit
|
commitdiff
|
tree
2021-12-20
Frank Chan
g
ta
r
g
et/ri
s
cv: rvv
-
1
.
0
: i
n
dex load
and store inst
r
uctio
n
s
Signed-off-by:
Frank Chang
<frank.chang@sifive.com>
commit
|
commitdiff
|
tree
2021-12-20
Frank
C
hang
ta
r
get/
r
iscv:
r
vv-1
.
0: stride load and store
instructi
o
ns
Signed-off-by:
Frank Chang
<frank.chang@sifive.com>
commit
|
commitdiff
|
tree
2021-12-20
Frank Chang
ta
r
get/ri
s
cv: rvv-
1
.
0: configure instructions
Signed-off-by:
Frank Chang
<frank.chang@sifive.com>
commit
|
commitdiff
|
tree
2021-12-20
Frank
Chan
g
target/ris
c
v: rvv-1
.
0: remo
v
e
a
mo operations instructions
Signed-off-by:
Frank Chang
<frank.chang@sifive.com>
commit
|
commitdiff
|
tree
2021-12-20
Frank Chang
t
a
rg
e
t/riscv: r
v
v:1
.
0
:
add translation-time nan-bo
x
.
.
.
Signed-off-by:
Frank Chang
<frank.chang@sifive.com>
commit
|
commitdiff
|
tree
2021-12-20
Fra
n
k Chang
target/ris
c
v: introduce more i
m
m value
modes in tr
a
n
slato
r
.
.
.
Signed-off-by:
Frank Chang
<frank.chang@sifive.com>
commit
|
commitdiff
|
tree
2021-12-20
Frank C
h
ang
target/ris
c
v: rvv-1
.
0: update che
c
k functions
Signed-off-by:
Frank Chang
<frank.chang@sifive.com>
commit
|
commitdiff
|
tree
2021-12-20
F
rank Ch
a
ng
targ
e
t
/ris
c
v: rvv-1
.
0
:
add VMA and VTA
Signed-off-by:
Frank Chang
<frank.chang@sifive.com>
commit
|
commitdiff
|
tree
2021-12-20
Frank Chan
g
targ
e
t/riscv: rvv-1
.
0: add fractional LMUL
Signed-off-by:
Frank Chang
<frank.chang@sifive.com>
commit
|
commitdiff
|
tree
2021-12-20
F
rank Chang
target/ri
s
cv: rvv-1
.
0
:
re
m
ove MLEN calculations
Signed-off-by:
Frank Chang
<frank.chang@sifive.com>
commit
|
commitdiff
|
tree
2021-12-20
F
r
a
n
k Chang
t
arget/
r
iscv: rvv-1
.
0
: check MSTATUS_VS when
a
ccess
i
ng
.
.
.
Signed-off-by:
Frank Chang
<frank.chang@sifive.com>
commit
|
commitdiff
|
tree
2021-12-20
Frank Chang
target
/
riscv: rvv-1
.
0: re
m
ove r
v
v
related codes from
.
.
.
Signed-off-by:
Frank Chang
<frank.chang@sifive.com>
commit
|
commitdiff
|
tree
2021-12-20
Fran
k
Chang
target
/
riscv: rvv
-
1
.
0: add transl
a
t
ion-time ve
c
tor
.
.
.
Signed-off-by:
Frank Chang
<frank.chang@sifive.com>
commit
|
commitdiff
|
tree
2021-12-20
Frank Chang
target/riscv: rvv-1
.
0: introduce writable
m
isa
.
v field
Signed-off-by:
Frank Chang
<frank.chang@sifive.com>
commit
|
commitdiff
|
tree
2021-12-20
F
rank
Chan
g
t
arg
e
t/riscv: rvv-1
.
0: set mstatus
.
SD b
i
t if mstatus
.
.
.
Signed-off-by:
Frank Chang
<frank.chang@sifive.com>
commit
|
commitdiff
|
tree
2021-12-20
F
rank Chang
tar
g
et/r
i
scv:
U
se FIELD_EX32() to extra
c
t wd field
Signed-off-by:
Frank Chang
<frank.chang@sifive.com>
commit
|
commitdiff
|
tree
2021-12-20
F
rank Chang
target/r
i
scv: drop vector 0
.
7
.
1 and add 1
.
0 support
Signed-off-by:
Frank Chang
<frank.chang@sifive.com>
commit
|
commitdiff
|
tree
2021-12-20
F
r
ank Chang
target/ris
c
v
: zfh: add
Zf
h
min cpu property
Signed-off-by:
Frank Chang
<frank.chang@sifive.com>
commit
|
commitdiff
|
tree
2021-12-20
Fr
a
nk Chan
g
target/riscv: zfh: im
p
l
ement zfhmin exten
s
ion
Signed-off-by:
Frank Chang
<frank.chang@sifive.com>
commit
|
commitdiff
|
tree
2021-12-20
Frank Chang
t
arget
/
riscv: zfh: add Zfh cpu property
Signed-off-by:
Frank Chang
<frank.chang@sifive.com>
commit
|
commitdiff
|
tree
2021-10-21
Frank Chan
g
target/riscv: fix T
B
_FLAGS bits o
v
erlappi
n
g bug for
.
.
.
Signed-off-by:
Frank Chang
<frank.chang@sifive.com>
commit
|
commitdiff
|
tree
2021-10-21
Frank Chang
targ
e
t/riscv: P
a
ss the same valu
e
t
o
oprsz and
maxs
z
.
.
.
Signed-off-by:
Frank Chang
<frank.chang@sifive.com>
commit
|
commitdiff
|
tree
2021-10-06
Frank Cha
n
g
target/r
i
scv: Se
t
mstatus_hs
.
[SD|FS] bits
i
f Clean
.
.
.
Signed-off-by:
Frank Chang
<frank.chang@sifive.com>
commit
|
commitdiff
|
tree
2021-09-21
Fran
k
Ch
a
ng
target/riscv: Backup/restore mstatus
.
SD bit wh
e
n
virtual
.
.
.
Signed-off-by:
Frank Chang
<frank.chang@sifive.com>
commit
|
commitdiff
|
tree
2021-09-20
Frank Chang
hw
/
dma: s
i
f
i
v
e_pd
m
a: don't set
Cont
r
ol
.
error
i
f 0 bytes
.
.
.
Signed-off-by:
Frank Chang
<frank.chang@sifive.com>
commit
|
commitdiff
|
tree
2021-09-20
Frank Ch
a
ng
hw/dma: sifive_pdma:
c
laim bit
m
u
st be set before DMA
.
.
.
Signed-off-by:
Frank Chang
<frank.chang@sifive.com>
commit
|
commitdiff
|
tree
2021-09-20
Frank Chang
hw
/
dma: sifive_p
d
ma: res
e
t Next*
registers
w
h
e
n Control
.
.
.
Signed-off-by:
Frank Chang
<frank.chang@sifive.com>
commit
|
commitdiff
|
tree
2021-06-07
F
r
a
nk Chang
target/riscv: rvb: add b-ext
v
ersion
c
pu o
p
tion
Signed-off-by:
Frank Chang
<frank.chang@sifive.com>
commit
|
commitdiff
|
tree
2021-06-07
Frank Chang
target/riscv: rvb:
g
eneralize
d
o
r
-
comb
i
ne
Signed-off-by:
Frank Chang
<frank.chang@sifive.com>
commit
|
commitdiff
|
tree
2021-06-07
Frank Chang
ta
r
g
et/riscv: rvb: generalized
reverse
Signed-off-by:
Frank Chang
<frank.chang@sifive.com>
commit
|
commitdiff
|
tree
2021-06-07
Frank Chang
target/riscv: rvb: single-bit instructions
Signed-off-by:
Frank Chang
<frank.chang@sifive.com>
commit
|
commitdiff
|
tree
2021-06-07
Frank C
h
a
n
g
target/riscv
:
add gen_shi
f
ti(
)
an
d
g
e
n_
s
hiftiw
(
) helper
.
.
.
Signed-off-by:
Frank Chang
<frank.chang@sifive.com>
commit
|
commitdiff
|
tree
2021-06-07
F
rank Chang
target/riscv: rvb: c
o
u
n
t bits set
Signed-off-by:
Frank Chang
<frank.chang@sifive.com>
commit
|
commitdiff
|
tree
2021-05-11
Frank Chang
fpu/softfloat: set invali
d
excp flag for RISC-V muladd
.
.
.
Signed-off-by:
Frank Chang
<frank.chang@sifive.com>
commit
|
commitdiff
|
tree
2021-05-11
Frank Chang
tar
g
e
t/r
i
scv:
fix
vrgather mac
r
o index variable type
bug
Signed-off-by:
Frank Chang
<frank.chang@sifive.com>
commit
|
commitdiff
|
tree
2021-03-23
Frank Chang
t
a
rge
t
/ris
c
v: fix
v
s() to
re
t
ur
n
proper erro
r
c
o
de
Signed-off-by:
Frank Chang
<frank.chang@sifive.com>
commit
|
commitdiff
|
tree
2020-08-28
F
r
ank Chang
s
o
ftf
l
o
a
t
:
Add fp16 and u
i
nt8/int8 conv
e
r
s
ion functions
Signed-off-by:
Frank Chang
<frank.chang@sifive.com>
commit
|
commitdiff
|
tree
2020-07-14
Frank Chang
target/r
i
scv: fix vill
b
it in
d
ex in vtype register
Signed-off-by:
Frank Chang
<frank.chang@sifive.com>
commit
|
commitdiff
|
tree
2020-07-14
Frank Chang
t
arget/riscv: fix return
value o
f
do_opi
v
x_widen()
Signed-off-by:
Frank Chang
<frank.chang@sifive.com>
commit
|
commitdiff
|
tree
2020-07-14
Fran
k
Ch
a
n
g
target/ris
c
v
: correct the gvec IR cal
l
e
d
in
g
en_vec_r
s
ub
1
6_i64()
Signed-off-by:
Frank Chang
<frank.chang@sifive.com>
commit
|
commitdiff
|
tree
2020-07-14
Frank Chang
target/riscv: fix
r
sub gve
c
tcg_assert
_
listed_vecop
.
.
.
Signed-off-by:
Frank Chang
<frank.chang@sifive.com>
commit
|
commitdiff
|
tree