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target/sh4: Fix code style for checkpatch.pl
2021-03-06 Philippe Mathieu... target/sh4: Fix code style for checkpatch.pl
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210127232151.3523581-2-f4bug@amsat.org>
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2021-02-22 Philippe Mathieu... target/cris: Let cris_mmu_translate() use MMUAccessType...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210128003223.3561108-3-f4bug@amsat.org>
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2021-02-22 Philippe Mathieu... target/cris: Use MMUAccessType enum type when possible
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210128003223.3561108-2-f4bug@amsat.org>
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2021-02-21 Philippe Mathieu... target/mips: Use GPR move functions in gen_HILO1_tx79()
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210214175912.732946-8-f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2021-02-21 Philippe Mathieu... target/mips: Introduce gen_load_gpr_hi() / gen_store_gpr_hi...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210214175912.732946-7-f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2021-02-21 Philippe Mathieu... target/mips: Rename 128-bit upper halve GPR registers
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210214175912.732946-6-f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2021-02-21 Philippe Mathieu... target/mips: Promote 128-bit multimedia registers as...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210214175912.732946-5-f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2021-02-21 Philippe Mathieu... target/mips: Make cpu_HI/LO registers public
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210214175912.732946-4-f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2021-02-21 Philippe Mathieu... target/mips: Include missing "tcg/tcg.h" header
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210207232310.2505283-4-f4bug@amsat.org>
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2021-02-21 Philippe Mathieu... target/mips: Remove unused 'rw' argument from page_table_wal...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210220202026.2305667-1-f4bug@amsat.org>
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2021-02-21 Philippe Mathieu... target/mips: Let CPUMIPSTLBContext::map_address() take...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210128144125.3696119-14-f4bug@amsat.org>
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2021-02-21 Philippe Mathieu... target/mips: Let get_seg*_physical_address() take MMUAccessT...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210128144125.3696119-13-f4bug@amsat.org>
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2021-02-21 Philippe Mathieu... target/mips: Let get_physical_address() take MMUAccessType...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210128144125.3696119-12-f4bug@amsat.org>
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2021-02-21 Philippe Mathieu... target/mips: Let raise_mmu_exception() take MMUAccessType...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210128144125.3696119-11-f4bug@amsat.org>
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2021-02-21 Philippe Mathieu... target/mips: Let cpu_mips_translate_address() take...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210128144125.3696119-10-f4bug@amsat.org>
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2021-02-21 Philippe Mathieu... target/mips: Let do_translate_address() take MMUAccessType...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210128144125.3696119-9-f4bug@amsat.org>
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2021-02-21 Philippe Mathieu... target/mips: Replace magic value by MMU_DATA_LOAD definition
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210128144125.3696119-7-f4bug@amsat.org>
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2021-02-21 Philippe Mathieu... target/mips: Remove unused MMU definitions
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210128144125.3696119-6-f4bug@amsat.org>
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2021-02-21 Philippe Mathieu... target/mips: Remove access_type argument from get_physical_a...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210128144125.3696119-5-f4bug@amsat.org>
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2021-02-21 Philippe Mathieu... target/mips: Remove access_type arg from get_segctl_physical...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210128144125.3696119-4-f4bug@amsat.org>
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2021-02-21 Philippe Mathieu... target/mips: Remove access_type argument from get_seg_physic...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210128144125.3696119-3-f4bug@amsat.org>
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2021-02-21 Philippe Mathieu... target/mips: Remove access_type argument from map_address...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210128144125.3696119-2-f4bug@amsat.org>
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2021-02-21 Philippe Mathieu... target/mips: fetch code with translator_ld
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210125105818.2707067-1-f4bug@amsat.org>
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2021-02-20 Philippe Mathieu... MAINTAINERS: Fix default-configs/ entries
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201117114656.1222555-1-f4bug@amsat.org>
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2021-02-20 Philippe Mathieu... target/avr/cpu: Use device_class_set_parent_realize()
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210201080348.438095-1-f4bug@amsat.org>
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2021-02-20 Philippe Mathieu... hw/scsi/megasas: Remove pointless parenthesis
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201011195001.3219730-1-f4bug@amsat.org>
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2021-02-20 Philippe Mathieu... MAINTAINERS: Add Bin Meng as co-maintainer for SD/MMC...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210216132841.1121653-1-f4bug@amsat.org>
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2021-02-19 Philippe Mathieu... gitlab-ci: Disable vhost-kernel in build-disable job
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210131104621.221602-1-f4bug@amsat.org>
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2021-02-19 Philippe Mathieu... tests/qtest/boot-serial-test: Test Virt machine with...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210205144345.2068758-4-f4bug@amsat.org>
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2021-02-15 Philippe Mathieu... travis-ci: Disable C++ optional objects on AArch64...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210207121239.2288530-1-f4bug@amsat.org>
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2021-02-13 Philippe Mathieu... linux-user/mips64: Support o32 ABI syscalls
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201119161710.1985083-3-f4bug@amsat.org>
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2021-02-13 Philippe Mathieu... linux-user/mips64: Restore setup_frame() for o32 ABI
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201119161710.1985083-2-f4bug@amsat.org>
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2021-02-09 Philippe Mathieu... target/ppc: Remove unused MMU definitions
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210127232401.3525126-1-f4bug@amsat.org>
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2021-02-08 Philippe Mathieu... tests/acceptance: Test U-Boot/Linux from Armbian 20...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201023131808.3198005-5-f4bug@amsat.org>
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2021-02-08 Philippe Mathieu... tests/acceptance: Extract do_test_arm_orangepi_armbian_uboot...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201023131808.3198005-4-f4bug@amsat.org>
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2021-02-08 Philippe Mathieu... tests/acceptance: Introduce tesseract_ocr() helper
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201021105035.2477784-5-f4bug@amsat.org>
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2021-02-08 Philippe Mathieu... tests/acceptance: Extract tesseract_available() helper...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201021105035.2477784-4-f4bug@amsat.org>
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2021-02-08 Philippe Mathieu... tests/docker: Fix typo in help message
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210119052120.522069-1-f4bug@amsat.org>
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2021-02-08 Philippe Mathieu... tests/docker: Fix _get_so_libs() for docker-binfmt...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210119050149.516910-1-f4bug@amsat.org>
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2021-02-05 Philippe Mathieu... exec/cpu-defs: Remove TCG backends dependency
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210204191423.1754158-1-f4bug@amsat.org>
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2021-02-05 Philippe Mathieu... tcg/s390: Fix compare instruction from extended-immediate...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210204182902.1742826-1-f4bug@amsat.org>
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2021-02-03 Philippe Mathieu... hw/arm: Display CPU type in machine description
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20210131184449.382425-7-f4bug@amsat.org
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2021-02-03 Philippe Mathieu... hw/net/can: ZynqMP CAN device requires PTIMER
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20210131184449.382425-6-f4bug@amsat.org
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2021-02-03 Philippe Mathieu... hw/arm/xlnx-versal: Versal SoC requires ZynqMP peripherals
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20210131184449.382425-5-f4bug@amsat.org
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2021-02-03 Philippe Mathieu... hw/arm/xlnx-versal: Versal SoC requires ZDMA
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20210131184449.382425-4-f4bug@amsat.org
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2021-02-03 Philippe Mathieu... hw/arm/exynos4210: Add missing dependency on OR_IRQ
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20210131184449.382425-3-f4bug@amsat.org
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2021-02-03 Philippe Mathieu... hw/arm/stm32f405_soc: Add missing dependency on OR_IRQ
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20210131184449.382425-2-f4bug@amsat.org
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2021-02-02 Philippe Mathieu... hw/intc/arm_gic: Fix interrupt ID in GICD_SGIR register
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20210131103401.217160-1-f4bug@amsat.org
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2021-02-02 Philippe Mathieu... hw/ssi: imx_spi: Rework imx_spi_write() to handle block...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210115153049.3353008-6-f4bug@amsat.org>
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2021-02-02 Philippe Mathieu... hw/ssi: imx_spi: Rework imx_spi_read() to handle block...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210115153049.3353008-5-f4bug@amsat.org>
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2021-02-02 Philippe Mathieu... hw/ssi: imx_spi: Rework imx_spi_reset() to keep CONREG...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2021-02-02 Philippe Mathieu... hw/ssi: imx_spi: Remove pointless variable initialization
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210115153049.3353008-3-f4bug@amsat.org>
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2021-01-29 Philippe Mathieu... target/arm: Replace magic value by MMU_DATA_LOAD definition
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20210127232822.3530782-1-f4bug@amsat.org
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2021-01-27 Philippe Mathieu... tcg/tci: Restrict tci_write_reg16() to 64-bit hosts
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210123094107.2340222-1-f4bug@amsat.org>
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2021-01-26 Philippe Mathieu... gitlab-ci: Test building linux-user targets on CentOS 7
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210121172829.1643620-3-f4bug@amsat.org>
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2021-01-26 Philippe Mathieu... tests/docker: Install static libc package in CentOS 7
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210121172829.1643620-2-f4bug@amsat.org>
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2021-01-23 Philippe Mathieu... accel/tcg: Restrict cpu_io_recompile() from other accelerators
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210117164813.4101761-6-f4bug@amsat.org>
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2021-01-23 Philippe Mathieu... accel/tcg: Declare missing cpu_loop_exit*() stubs
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210117164813.4101761-5-f4bug@amsat.org>
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2021-01-23 Philippe Mathieu... accel/tcg: Restrict tb_gen_code() from other accelerators
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210117164813.4101761-4-f4bug@amsat.org>
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2021-01-23 Philippe Mathieu... accel/tcg: Make cpu_gen_init() static
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210117164813.4101761-2-f4bug@amsat.org>
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2021-01-23 Philippe Mathieu... softmmu/physmem: Silence GCC 10 maybe-uninitialized...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210117170411.4106949-1-f4bug@amsat.org>
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2021-01-19 Philippe Mathieu... target/arm/m_helper: Silence GCC 10 maybe-uninitialized...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20210119062739.589049-1-f4bug@amsat.org
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2021-01-18 Philippe Mathieu... shippable.yml: Remove jobs duplicated on Gitlab-CI
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210108145103.269353-1-f4bug@amsat.org>
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2021-01-18 Philippe Mathieu... tests/docker: Remove Debian 9 remnant lines
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210107072933.3828450-1-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... docs/system: Remove deprecated 'fulong2e' machine alias
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210106184602.3771551-1-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Remove vendor specific CPU definitions
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210112210152.2072996-4-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Remove CPU_NANOMIPS32 definition
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210112210152.2072996-3-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Remove CPU_R5900 definition
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210112210152.2072996-2-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Convert Rel6 LL/SC opcodes to decodetree
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201208203704.243704-14-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Convert Rel6 LLD/SCD opcodes to decodetree
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201208203704.243704-13-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Convert Rel6 LDL/LDR/SDL/SDR opcodes to...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201208203704.243704-12-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Convert Rel6 LWLE/LWRE/SWLE/SWRE opcodes...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201208203704.243704-11-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Convert Rel6 LWL/LWR/SWL/SWR opcodes to...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201208203704.243704-10-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Convert Rel6 CACHE/PREF opcodes to decodetree
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20201208203704.243704-9-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Convert Rel6 COP1X opcode to decodetree
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20201208203704.243704-8-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Convert Rel6 Special2 opcode to decodetree
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20201208203704.243704-7-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Remove now unreachable LSA/DLSA opcodes...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20201208203704.243704-6-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Introduce decodetree helpers for Release6...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201215225757.764263-24-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Introduce decodetree helpers for MSA LSA...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201215225757.764263-23-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Extract LSA/DLSA translation generators
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201215225757.764263-22-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Use decode_ase_msa() generated from decodetree
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201215225757.764263-21-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Introduce decode tree bindings for MSA ASE
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201215225757.764263-20-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Pass TCGCond argument to MSA gen_check_zero_ele...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201215225757.764263-25-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Extract MSA translation routines
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201120210844.2625602-5-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Declare gen_msa/_branch() in 'translate.h'
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201215225757.764263-18-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Extract MSA helper definitions
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201120210844.2625602-4-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Extract MSA helpers from op_helper.c
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201123204448.3260804-5-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Move msa_reset() to msa_helper.c
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201215225757.764263-15-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Explode gen_msa_branch() as gen_msa_BxZ_V...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201208003702.4088927-10-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Remove CPUMIPSState* argument from gen_msa...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201208003702.4088927-9-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Extract msa_translate_init() from mips_tcg_init()
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201208003702.4088927-8-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Alias MSA vector registers on FPU scalar...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201208003702.4088927-7-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Remove now unused ASE_MSA definition
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201208003702.4088927-6-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Simplify MSA TCG logic
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201208003702.4088927-5-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Use CP0_Config3 to set MIPS_HFLAG_MSA
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201208003702.4088927-4-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Simplify msa_reset()
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201208003702.4088927-3-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Introduce ase_msa_available() helper
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201208003702.4088927-2-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips/translate: Expose check_mips_64() to 32...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20201215225757.764263-3-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips/translate: Extract decode_opc_legacy()...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20201215225757.764263-2-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Only build TCG code when CONFIG_TCG is set
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201206233949.3783184-20-f4bug@amsat.org>
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AR7 emulation for QEMU