hw/ssi: imx_spi: Rework imx_spi_write() to handle block disabled
commitfb116b5456c818ae7c3b788adcbc05dfa416c90c
authorPhilippe Mathieu-Daudé <f4bug@amsat.org>
Fri, 29 Jan 2021 13:23:19 +0000 (29 21:23 +0800)
committerPeter Maydell <peter.maydell@linaro.org>
Tue, 2 Feb 2021 17:00:55 +0000 (2 17:00 +0000)
treead7cc194350124d3d82a681c274e8f4090492348
parent7c87bb5333f0fdb17fee7e52acff1d915a68857e
hw/ssi: imx_spi: Rework imx_spi_write() to handle block disabled

When the block is disabled, only the ECSPI_CONREG register can
be modified. Setting the EN bit enabled the device, clearing it
"disables the block and resets the internal logic with the
exception of the ECSPI_CONREG" register.

Ignore all other registers write except ECSPI_CONREG when the
block is disabled.

Ref: i.MX 6DQ Applications Processor Reference Manual (IMX6DQRM),
     chapter 21.7.3: Control Register (ECSPIx_CONREG)

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20210129132323.30946-7-bmeng.cn@gmail.com
Message-Id: <20210115153049.3353008-6-f4bug@amsat.org>
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
hw/ssi/imx_spi.c