repo.or.cz
/
qemu
/
ar7.git
/
search
commit
grep
author
committer
pickaxe
?
search:
re
summary
|
log
|
graphiclog1
|
graphiclog2
|
commit
|
commitdiff
|
tree
|
refs
|
edit
|
fork
first
·
prev
·
next
target/riscv: Enable the Hypervisor extension by default
2022-01-08
A
l
istair Franci
s
target/riscv: En
a
ble the
H
y
p
erviso
r
extension by defa
u
lt
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2022-01-08
Alista
i
r Franc
i
s
tar
g
et/riscv:
M
ark the Hypervi
s
or exten
s
i
o
n as n
o
n
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2022-01-08
A
listair
F
ranci
s
hw/intc: sifive_plic: Cl
e
an
u
p remaining func
t
ions
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2022-01-08
Alistair
F
rancis
hw/
i
ntc:
s
ifive_plic: Clean
u
p
the read function
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2022-01-08
Al
i
st
a
i
r Francis
hw/in
t
c: si
f
ive_pl
i
c: C
l
eanu
p
the writ
e
function
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2022-01-08
Alistair Francis
h
w/intc: s
i
five_plic
:
Add a reset funct
i
on
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-10-28
Alistair Francis
hw/riscv: openti
t
a
n
: F
i
xup
t
he PLIC context
a
d
d
resses
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-10-28
Alis
t
air Franci
s
hw/
r
iscv
:
virt: Us
e
the PLIC co
n
fi
g
h
e
lper f
u
n
ction
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-10-28
Ali
s
tair Franci
s
hw/riscv: microchi
p
_p
f
s
o
c: Use the PLIC config helper
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-10-28
A
l
istair Francis
hw/riscv:
sifive_
u
: Use the
P
LIC config hel
p
er functi
o
n
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-10-28
Alistai
r
Francis
hw/riscv: boot:
A
dd a P
L
IC c
o
n
f
ig stri
n
g function
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-10-28
Alistai
r
F
r
a
ncis
hw/riscv
:
vir
t
: D
o
n't use a macro for the PL
I
C configuration
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-10-22
Al
i
stair F
r
anci
s
h
w/intc: sifive_plic:
Clean
u
p t
h
e
irq_request function
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-10-22
Alist
a
ir Francis
hw/int
c
: sifive_
p
lic: Cleanu
p
t
h
e realize func
t
ion
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-10-22
Alistair Fr
a
nci
s
hw/intc: sifive_plic: Move t
h
e
properties
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-10-22
Alistair Francis
hw/intc: Remove t
h
e Ibex PLIC
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-10-22
Al
i
stair Francis
hw/riscv: ope
n
titan: Update to the latest build
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-10-21
Ali
s
t
air Francis
target/riscv: Organise the
C
PU properties
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-10-21
A
listair Fr
a
nci
s
target/riscv: Remove some unused
macros
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-10-06
Alistair Francis
h
w
/risc
v
: shakti_c: Mark a
s
not user c
r
e
a
table
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-09-21
Alistair Fr
a
nci
s
hw/ri
s
cv
:
o
p
entitan:
Co
r
r
ect the USB Dev
address
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-09-20
Alistair Fra
n
cis
sifi
v
e_u: Conne
c
t the SiFive
P
WM device
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-09-20
Ali
s
tair Francis
hw/ti
m
er: Ad
d
SiFive PWM support
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-09-20
Ali
s
tai
r
Francis
hw/in
t
c: i
b
ex_timer
:
C
o
nver
t
t
he
t
i
m
er
to use RISC
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-09-20
A
l
istair Francis
hw/intc: sif
i
ve_plic: Co
n
vert the PL
I
C to use RISC
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-09-20
A
l
istair Francis
hw/
i
ntc:
ib
e
x_plic: Con
v
ert the PLIC to use RISC
-
V
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-09-20
Alistair Francis
hw/intc: sifive_clin
t
: Use
R
ISC-V CPU GPIO lines
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-09-20
Alistair Fran
c
i
s
t
a
rget/ris
c
v
: Expose i
n
terrupt
p
ending bits as GPIO
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-09-20
A
l
istair Francis
ta
r
ge
t
/riscv: Update the e
P
MP CSR address
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-07-14
Alistair Fran
c
i
s
hw/r
i
scv
/
bo
o
t: C
h
eck the error of fdt
_
pac
k
()
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-07-14
Alist
a
ir Francis
hw/riscv: opentitan: A
d
d
the flash a
l
i
as
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-07-14
Alistair Franc
i
s
hw/r
i
scv
:
o
pent
i
tan:
A
dd
t
h
e
uni
m
p
lement rv_c
o
re_ibex_peri
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-07-14
Al
i
stair Fran
c
is
ch
a
r: ibex_uart:
U
pdate the r
e
gister layo
u
t
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-06-24
Alistair Fra
n
cis
hw/risc
v
: OpenTitan: Connec
t
the mti
m
e and
mtime
c
mp
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-06-24
Alistair
F
rancis
hw/timer: I
n
i
tial co
m
mit
o
f
Ibex Timer
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-06-24
Alistair Franci
s
h
w
/char/ibex_uart: Make
t
he
r
e
gis
t
er
l
ay
o
ut private
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-06-24
Alistair Francis
target/r
i
scv: Use tar
g
et_ulong fo
r
the Disa
s
Co
n
t
e
xt
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-06-07
A
li
s
tair
F
r
a
ncis
tar
g
et/riscv/pmp:
Add assert for eP
M
P
o
perations
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-06-07
Alist
a
i
r
Francis
docs/s
y
st
e
m: Mov
e
the RISC-V -bios information to r
e
moved
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-05-11
Alistair Fr
a
ncis
target/r
i
scv
:
Fix the R
V
64H
decode comme
n
t
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-05-11
Alista
i
r Franc
i
s
t
arget/riscv:
Consolid
a
te RV32
/
64
16-bit instructio
n
s
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-05-11
Alistair Francis
tar
g
et/riscv:
C
onsolidat
e
R
V
32/64 32-
b
it inst
r
uctions
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-05-11
Alista
i
r
Fran
c
is
t
arget/ris
c
v: Rem
o
ve
a
n unused
CAS
E
_
O
P
_32_64 macro
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-05-11
Alist
a
ir Francis
target/ris
c
v: Remove the u
n
used HST
A
TUS_WPRI
ma
c
r
o
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-05-11
Alistair Francis
target/ri
s
cv: Remove the hardcoded SA
T
P_MODE macro
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-05-11
A
l
ista
i
r Franc
i
s
target/
r
iscv: Remo
v
e
t
he h
a
rdcoded MSTATUS_SD macro
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-05-11
Alistair Francis
ta
r
get/risc
v
:
R
e
m
o
ve the hardcoded HGAT
P
_
M
ODE macro
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-05-11
A
listair Francis
target/
r
iscv: Remove
the hardcoded S
S
TATUS
_
SD macro
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-05-11
A
listair Franc
i
s
t
a
rg
e
t/riscv: Remove th
e
hardcoded
R
VXLEN macro
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-05-11
Alista
i
r Francis
ta
r
get
/
risc
v
: Add ePMP
s
upp
o
rt for the I
b
ex CPU
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-05-11
Al
i
stair Francis
targ
e
t/
r
iscv/pmp:
R
emove outdated co
m
m
ent
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-05-11
Alistair Francis
target
/
r
iscv: Add the ePMP
featu
r
e
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-05-11
A
listair Francis
t
a
rge
t
/riscv: Fix the PMP is
lock
e
d check when using
T
O
R
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-05-11
Alistair Fr
a
ncis
hw/riscv: Ena
b
le VIRTIO_VGA for
R
ISC-V virt
m
achi
n
e
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-05-11
A
l
istair
Fr
a
ncis
h
w
/opentitan: Update t
h
e interru
p
t layout
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-05-11
Ali
s
tair Francis
MAINTAIN
E
RS
:
Upd
a
te the R
I
S
C
-V CP
U
Maintaine
r
s
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-05-11
Alista
i
r Francis
target/ri
s
cv: Use RISCVExce
p
ti
o
n en
u
m for C
S
R access
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-05-11
Ali
s
tair Francis
target/riscv: Use the RISCVExcep
t
ion enum
f
o
r
C
SR operations
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-05-11
Alistair Francis
tar
g
et/riscv:
F
ix 32
-
bit HS mo
d
e access perm
i
ssions
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-05-11
Alistair Fran
c
is
target/riscv: Use the
R
ISCV
E
x
c
eption enum
for CSR pr
e
d
ica
t
es
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-05-11
Alistair
Francis
t
a
rget/riscv: Conver
t
the
R
ISC-V ex
c
e
p
tion
s
to an enum
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-03-04
Alist
a
ir Francis
M
AINTAIN
E
RS: Add
a SiFive
m
achine section
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-02-13
A
listair Francis
l
i
nux-user/signal:
D
ecod
e
w
a
itid si
_
code
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-01-16
Alis
t
air Francis
riscv: Pass RISCVHartArrayState by pointer
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-12-18
Ali
s
tair F
r
ancis
risc
v
/openti
t
a
n
: Update the OpenT
i
tan memory layout
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-12-18
Alistai
r
Franci
s
hw/riscv: Use t
h
e CPU to d
e
termi
n
e if 32-bi
t
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-12-18
A
l
i
s
tair Francis
target
/
risc
v
:
cpu: Set XLEN i
n
dep
e
ndently from
t
a
rget
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-12-18
A
l
ist
a
ir Francis
target/ris
c
v:
csr: Remove com
p
il
e
time XLEN
c
hecks
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-12-18
Alistair Francis
target/
r
iscv
:
cpu_helper: Remove com
p
ile ti
m
e
XLEN
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-12-18
Al
i
stair Fr
a
ncis
target/riscv: cpu:
R
emove
c
omp
i
le time X
L
E
N
c
h
ecks
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-12-18
Alistair Francis
target/ris
c
v: Specify the XL
E
N for C
P
Us
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-12-18
Alis
t
air Francis
target/riscv: A
d
d
a r
i
s
c
v_cpu_is_32bit() helper
function
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-12-18
Alistair
F
rancis
ta
r
g
et/riscv: fpu_helper
:
Match func
t
ion def
s
in HELP
E
R
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-12-18
Alistair Fra
n
cis
hw/riscv: sifive
_
u
:
Remo
v
e
c
ompile time XLEN checks
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-12-18
Alistair Francis
hw/riscv: s
p
i
k
e: Remove compile time XLEN checks
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-12-18
Alist
a
ir
F
rancis
hw/ris
c
v: virt: Remove compile time XLEN ch
e
cks
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-12-18
A
l
i
stair Francis
hw/risc
v
: boot: Remove compile ti
m
e XL
E
N checks
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-12-18
Alistair
F
r
anc
i
s
riscv: virt: Re
m
o
v
e ta
r
get m
a
cro c
o
ndi
t
ionals
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-12-18
Alistair Franci
s
riscv: spi
k
e:
R
e
move target macr
o
cond
i
tionals
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-12-18
Alistair Francis
target/
r
iscv
:
Add a TYP
E
_RISCV_CPU_BASE CPU
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-12-18
Alis
t
air Fra
n
cis
hw
/
r
isc
v
: E
x
pand
t
he is 32-bit chec
k
to
supp
o
rt more
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-12-18
Alistair F
r
ancis
intc/ibex_pl
i
c: Clear interrupts that occu
r
during
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-11-17
Alistair Franci
s
regis
t
er
:
Remove unnecessary NULL check
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-11-14
Alis
t
ai
r
Francis
i
ntc/ibex_plic: Ensure
we don't loose interrupts
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-11-14
Ali
s
ta
i
r Fra
n
cis
intc/ibex_plic: Fix some typos
i
n
the c
o
m
m
e
nts
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-11-09
A
l
istair Francis
hw/
i
ntc/ibe
x
_plic: Clear the claim r
e
gister when rea
d
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-11-09
Alistair Francis
target/
r
iscv: Split the H
y
per
v
isor exe
c
ute l
o
a
d
h
e
lpers
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-11-09
A
l
i
st
a
ir Fran
c
is
target
/
ris
c
v: Re
m
o
v
e
the hyp load and
store functions
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-11-09
A
listair
Francis
tar
g
et
/
riscv: Remove the
H
S_TW
O
_STAGE flag
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-11-09
Alistair Francis
target/ris
c
v: Set
t
he virtual
i
sed
M
MU
mode when doing
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-11-09
Alistair Franc
i
s
target/riscv: Add a vi
r
tua
l
ised M
M
U Mode
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-11-04
Alistair Franc
i
s
l
i
n
ux-user
/
syscall: F
i
x m
i
ssi
n
g target_to_hos
t
_times
p
e
c
64
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-10-22
Alistair Francis
h
w
/riscv
:
Load th
e
k
ernel aft
e
r
t
he fi
r
mware
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-10-22
A
l
istair Francis
hw/riscv: Add a riscv_
i
s
_32_bit() function
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-10-22
Alist
a
i
r Francis
h
w
/risc
v
: Return t
h
e end add
r
ess of the load
e
d firmwar
e
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-10-22
A
l
ist
a
ir Francis
h
w/ris
c
v: sifive_u: Allo
w
specifying the
CP
U
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-10-22
Alistair Francis
riscv: Convert interrupt logs
t
o use qem
u
_log_mask()
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-09-25
Alistair Francis
core
/
registe
r
:
Sp
e
cify instanc
e
_size in the TypeInfo
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-08-25
A
l
i
st
a
ir Francis
target/riscv: Suppor
t
the Virtua
l
Instr
u
c
t
ion
f
ault
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-08-25
Alistair Francis
target/riscv: Return the except
i
on
from invali
d
C
S
R
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
next