target/riscv/insn_trans/trans_privileged.inc.c

   1 /*
   2  * RISC-V translation routines for the RISC-V privileged instructions.
   3  *
   4  * Copyright (c) 2016-2017 Sagar Karandikar, sagark@eecs.berkeley.edu
   5  * Copyright (c) 2018 Peer Adelt, peer.adelt@hni.uni-paderborn.de
   6  *                    Bastian Koppelmann, kbastian@mail.uni-paderborn.de
   7  *
   8  * This program is free software; you can redistribute it and/or modify it
   9  * under the terms and conditions of the GNU General Public License,
  10  * version 2 or later, as published by the Free Software Foundation.
  11  *
  12  * This program is distributed in the hope it will be useful, but WITHOUT
  13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  15  * more details.
  16  *
  17  * You should have received a copy of the GNU General Public License along with
  18  * this program.  If not, see <http://www.gnu.org/licenses/>.
  19  */
  20
  21 static bool trans_ecall(DisasContext *ctx, arg_ecall *a)
  22 {
  23     /* always generates U-level ECALL, fixed in do_interrupt handler */
  24     generate_exception(ctx, RISCV_EXCP_U_ECALL);
  25     exit_tb(ctx); /* no chaining */
  26     ctx->base.is_jmp = DISAS_NORETURN;
  27     return true;
  28 }
  29
  30 static bool trans_ebreak(DisasContext *ctx, arg_ebreak *a)
  31 {
  32     generate_exception(ctx, RISCV_EXCP_BREAKPOINT);
  33     exit_tb(ctx); /* no chaining */
  34     ctx->base.is_jmp = DISAS_NORETURN;
  35     return true;
  36 }
  37
  38 static bool trans_uret(DisasContext *ctx, arg_uret *a)
  39 {
  40     return false;
  41 }
  42
  43 static bool trans_sret(DisasContext *ctx, arg_sret *a)
  44 {
  45 #ifndef CONFIG_USER_ONLY
  46     tcg_gen_movi_tl(cpu_pc, ctx->base.pc_next);
  47
  48     if (has_ext(ctx, RVS)) {
  49         gen_helper_sret(cpu_pc, cpu_env, cpu_pc);
  50         exit_tb(ctx); /* no chaining */
  51         ctx->base.is_jmp = DISAS_NORETURN;
  52     } else {
  53         return false;
  54     }
  55     return true;
  56 #else
  57     return false;
  58 #endif
  59 }
  60
  61 static bool trans_mret(DisasContext *ctx, arg_mret *a)
  62 {
  63 #ifndef CONFIG_USER_ONLY
  64     tcg_gen_movi_tl(cpu_pc, ctx->base.pc_next);
  65     gen_helper_mret(cpu_pc, cpu_env, cpu_pc);
  66     exit_tb(ctx); /* no chaining */
  67     ctx->base.is_jmp = DISAS_NORETURN;
  68     return true;
  69 #else
  70     return false;
  71 #endif
  72 }
  73
  74 static bool trans_wfi(DisasContext *ctx, arg_wfi *a)
  75 {
  76 #ifndef CONFIG_USER_ONLY
  77     tcg_gen_movi_tl(cpu_pc, ctx->pc_succ_insn);
  78     gen_helper_wfi(cpu_env);
  79     return true;
  80 #else
  81     return false;
  82 #endif
  83 }
  84
  85 static bool trans_sfence_vma(DisasContext *ctx, arg_sfence_vma *a)
  86 {
  87 #ifndef CONFIG_USER_ONLY
  88     gen_helper_tlb_flush(cpu_env);
  89     return true;
  90 #endif
  91     return false;
  92 }
  93
  94 static bool trans_sfence_vm(DisasContext *ctx, arg_sfence_vm *a)
  95 {
  96     return false;
  97 }