hw/pc.c

   1 /*
   2  * QEMU PC System Emulator
   3  *
   4  * Copyright (c) 2003-2004 Fabrice Bellard
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24 #include "hw.h"
  25 #include "pc.h"
  26 #include "fdc.h"
  27 #include "pci.h"
  28 #include "block.h"
  29 #include "sysemu.h"
  30 #include "audio/audio.h"
  31 #include "net.h"
  32 #include "smbus.h"
  33 #include "boards.h"
  34 #include "console.h"
  35 #include "fw_cfg.h"
  36 #include "virtio-blk.h"
  37 #include "virtio-balloon.h"
  38 #include "virtio-console.h"
  39 #include "hpet_emul.h"
  40
  41 /* output Bochs bios info messages */
  42 //#define DEBUG_BIOS
  43
  44 #define BIOS_FILENAME "bios.bin"
  45 #define VGABIOS_FILENAME "vgabios.bin"
  46 #define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin"
  47
  48 #define PC_MAX_BIOS_SIZE (4 * 1024 * 1024)
  49
  50 /* Leave a chunk of memory at the top of RAM for the BIOS ACPI tables.  */
  51 #define ACPI_DATA_SIZE       0x10000
  52 #define BIOS_CFG_IOPORT 0x510
  53 #define FW_CFG_ACPI_TABLES (FW_CFG_ARCH_LOCAL + 0)
  54
  55 #define MAX_IDE_BUS 2
  56
  57 extern uint8_t *acpi_tables;
  58 extern size_t acpi_tables_len;
  59
  60 static fdctrl_t *floppy_controller;
  61 static RTCState *rtc_state;
  62 static PITState *pit;
  63 static IOAPICState *ioapic;
  64 static PCIDevice *i440fx_state;
  65
  66 typedef struct rom_reset_data {
  67     uint8_t *data;
  68     target_phys_addr_t addr;
  69     unsigned size;
  70 } RomResetData;
  71
  72 static void option_rom_reset(void *_rrd)
  73 {
  74     RomResetData *rrd = _rrd;
  75
  76     cpu_physical_memory_write_rom(rrd->addr, rrd->data, rrd->size);
  77 }
  78
  79 static void option_rom_setup_reset(target_phys_addr_t addr, unsigned size)
  80 {
  81     RomResetData *rrd = qemu_malloc(sizeof *rrd);
  82
  83     rrd->data = qemu_malloc(size);
  84     cpu_physical_memory_read(addr, rrd->data, size);
  85     rrd->addr = addr;
  86     rrd->size = size;
  87     qemu_register_reset(option_rom_reset, rrd);
  88 }
  89
  90 static void ioport80_write(void *opaque, uint32_t addr, uint32_t data)
  91 {
  92 }
  93
  94 /* MSDOS compatibility mode FPU exception support */
  95 static qemu_irq ferr_irq;
  96 /* XXX: add IGNNE support */
  97 void cpu_set_ferr(CPUX86State *s)
  98 {
  99     qemu_irq_raise(ferr_irq);
 100 }
 101
 102 static void ioportF0_write(void *opaque, uint32_t addr, uint32_t data)
 103 {
 104     qemu_irq_lower(ferr_irq);
 105 }
 106
 107 /* TSC handling */
 108 uint64_t cpu_get_tsc(CPUX86State *env)
 109 {
 110     /* Note: when using kqemu, it is more logical to return the host TSC
 111        because kqemu does not trap the RDTSC instruction for
 112        performance reasons */
 113 #ifdef USE_KQEMU
 114     if (env->kqemu_enabled) {
 115         return cpu_get_real_ticks();
 116     } else
 117 #endif
 118     {
 119         return cpu_get_ticks();
 120     }
 121 }
 122
 123 /* SMM support */
 124 void cpu_smm_update(CPUState *env)
 125 {
 126     if (i440fx_state && env == first_cpu)
 127         i440fx_set_smm(i440fx_state, (env->hflags >> HF_SMM_SHIFT) & 1);
 128 }
 129
 130
 131 /* IRQ handling */
 132 int cpu_get_pic_interrupt(CPUState *env)
 133 {
 134     int intno;
 135
 136     intno = apic_get_interrupt(env);
 137     if (intno >= 0) {
 138         /* set irq request if a PIC irq is still pending */
 139         /* XXX: improve that */
 140         pic_update_irq(isa_pic);
 141         return intno;
 142     }
 143     /* read the irq from the PIC */
 144     if (!apic_accept_pic_intr(env))
 145         return -1;
 146
 147     intno = pic_read_irq(isa_pic);
 148     return intno;
 149 }
 150
 151 static void pic_irq_request(void *opaque, int irq, int level)
 152 {
 153     CPUState *env = first_cpu;
 154
 155     if (env->apic_state) {
 156         while (env) {
 157             if (apic_accept_pic_intr(env))
 158                 apic_deliver_pic_intr(env, level);
 159             env = env->next_cpu;
 160         }
 161     } else {
 162         if (level)
 163             cpu_interrupt(env, CPU_INTERRUPT_HARD);
 164         else
 165             cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
 166     }
 167 }
 168
 169 /* PC cmos mappings */
 170
 171 #define REG_EQUIPMENT_BYTE          0x14
 172
 173 static int cmos_get_fd_drive_type(int fd0)
 174 {
 175     int val;
 176
 177     switch (fd0) {
 178     case 0:
 179         /* 1.44 Mb 3"5 drive */
 180         val = 4;
 181         break;
 182     case 1:
 183         /* 2.88 Mb 3"5 drive */
 184         val = 5;
 185         break;
 186     case 2:
 187         /* 1.2 Mb 5"5 drive */
 188         val = 2;
 189         break;
 190     default:
 191         val = 0;
 192         break;
 193     }
 194     return val;
 195 }
 196
 197 static void cmos_init_hd(int type_ofs, int info_ofs, BlockDriverState *hd)
 198 {
 199     RTCState *s = rtc_state;
 200     int cylinders, heads, sectors;
 201     bdrv_get_geometry_hint(hd, &cylinders, &heads, &sectors);
 202     rtc_set_memory(s, type_ofs, 47);
 203     rtc_set_memory(s, info_ofs, cylinders);
 204     rtc_set_memory(s, info_ofs + 1, cylinders >> 8);
 205     rtc_set_memory(s, info_ofs + 2, heads);
 206     rtc_set_memory(s, info_ofs + 3, 0xff);
 207     rtc_set_memory(s, info_ofs + 4, 0xff);
 208     rtc_set_memory(s, info_ofs + 5, 0xc0 | ((heads > 8) << 3));
 209     rtc_set_memory(s, info_ofs + 6, cylinders);
 210     rtc_set_memory(s, info_ofs + 7, cylinders >> 8);
 211     rtc_set_memory(s, info_ofs + 8, sectors);
 212 }
 213
 214 /* convert boot_device letter to something recognizable by the bios */
 215 static int boot_device2nibble(char boot_device)
 216 {
 217     switch(boot_device) {
 218     case 'a':
 219     case 'b':
 220         return 0x01; /* floppy boot */
 221     case 'c':
 222         return 0x02; /* hard drive boot */
 223     case 'd':
 224         return 0x03; /* CD-ROM boot */
 225     case 'n':
 226         return 0x04; /* Network boot */
 227     }
 228     return 0;
 229 }
 230
 231 /* copy/pasted from cmos_init, should be made a general function
 232  and used there as well */
 233 static int pc_boot_set(void *opaque, const char *boot_device)
 234 {
 235 #define PC_MAX_BOOT_DEVICES 3
 236     RTCState *s = (RTCState *)opaque;
 237     int nbds, bds[3] = { 0, };
 238     int i;
 239
 240     nbds = strlen(boot_device);
 241     if (nbds > PC_MAX_BOOT_DEVICES) {
 242         term_printf("Too many boot devices for PC\n");
 243         return(1);
 244     }
 245     for (i = 0; i < nbds; i++) {
 246         bds[i] = boot_device2nibble(boot_device[i]);
 247         if (bds[i] == 0) {
 248             term_printf("Invalid boot device for PC: '%c'\n",
 249                     boot_device[i]);
 250             return(1);
 251         }
 252     }
 253     rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]);
 254     rtc_set_memory(s, 0x38, (bds[2] << 4));
 255     return(0);
 256 }
 257
 258 /* hd_table must contain 4 block drivers */
 259 static void cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
 260                       const char *boot_device, BlockDriverState **hd_table)
 261 {
 262     RTCState *s = rtc_state;
 263     int nbds, bds[3] = { 0, };
 264     int val;
 265     int fd0, fd1, nb;
 266     int i;
 267
 268     /* various important CMOS locations needed by PC/Bochs bios */
 269
 270     /* memory size */
 271     val = 640; /* base memory in K */
 272     rtc_set_memory(s, 0x15, val);
 273     rtc_set_memory(s, 0x16, val >> 8);
 274
 275     val = (ram_size / 1024) - 1024;
 276     if (val > 65535)
 277         val = 65535;
 278     rtc_set_memory(s, 0x17, val);
 279     rtc_set_memory(s, 0x18, val >> 8);
 280     rtc_set_memory(s, 0x30, val);
 281     rtc_set_memory(s, 0x31, val >> 8);
 282
 283     if (above_4g_mem_size) {
 284         rtc_set_memory(s, 0x5b, (unsigned int)above_4g_mem_size >> 16);
 285         rtc_set_memory(s, 0x5c, (unsigned int)above_4g_mem_size >> 24);
 286         rtc_set_memory(s, 0x5d, (uint64_t)above_4g_mem_size >> 32);
 287     }
 288
 289     if (ram_size > (16 * 1024 * 1024))
 290         val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536);
 291     else
 292         val = 0;
 293     if (val > 65535)
 294         val = 65535;
 295     rtc_set_memory(s, 0x34, val);
 296     rtc_set_memory(s, 0x35, val >> 8);
 297
 298     /* set the number of CPU */
 299     rtc_set_memory(s, 0x5f, smp_cpus - 1);
 300
 301     /* set boot devices, and disable floppy signature check if requested */
 302 #define PC_MAX_BOOT_DEVICES 3
 303     nbds = strlen(boot_device);
 304     if (nbds > PC_MAX_BOOT_DEVICES) {
 305         fprintf(stderr, "Too many boot devices for PC\n");
 306         exit(1);
 307     }
 308     for (i = 0; i < nbds; i++) {
 309         bds[i] = boot_device2nibble(boot_device[i]);
 310         if (bds[i] == 0) {
 311             fprintf(stderr, "Invalid boot device for PC: '%c'\n",
 312                     boot_device[i]);
 313             exit(1);
 314         }
 315     }
 316     rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]);
 317     rtc_set_memory(s, 0x38, (bds[2] << 4) | (fd_bootchk ?  0x0 : 0x1));
 318
 319     /* floppy type */
 320
 321     fd0 = fdctrl_get_drive_type(floppy_controller, 0);
 322     fd1 = fdctrl_get_drive_type(floppy_controller, 1);
 323
 324     val = (cmos_get_fd_drive_type(fd0) << 4) | cmos_get_fd_drive_type(fd1);
 325     rtc_set_memory(s, 0x10, val);
 326
 327     val = 0;
 328     nb = 0;
 329     if (fd0 < 3)
 330         nb++;
 331     if (fd1 < 3)
 332         nb++;
 333     switch (nb) {
 334     case 0:
 335         break;
 336     case 1:
 337         val |= 0x01; /* 1 drive, ready for boot */
 338         break;
 339     case 2:
 340         val |= 0x41; /* 2 drives, ready for boot */
 341         break;
 342     }
 343     val |= 0x02; /* FPU is there */
 344     val |= 0x04; /* PS/2 mouse installed */
 345     rtc_set_memory(s, REG_EQUIPMENT_BYTE, val);
 346
 347     /* hard drives */
 348
 349     rtc_set_memory(s, 0x12, (hd_table[0] ? 0xf0 : 0) | (hd_table[1] ? 0x0f : 0));
 350     if (hd_table[0])
 351         cmos_init_hd(0x19, 0x1b, hd_table[0]);
 352     if (hd_table[1])
 353         cmos_init_hd(0x1a, 0x24, hd_table[1]);
 354
 355     val = 0;
 356     for (i = 0; i < 4; i++) {
 357         if (hd_table[i]) {
 358             int cylinders, heads, sectors, translation;
 359             /* NOTE: bdrv_get_geometry_hint() returns the physical
 360                 geometry.  It is always such that: 1 <= sects <= 63, 1
 361                 <= heads <= 16, 1 <= cylinders <= 16383. The BIOS
 362                 geometry can be different if a translation is done. */
 363             translation = bdrv_get_translation_hint(hd_table[i]);
 364             if (translation == BIOS_ATA_TRANSLATION_AUTO) {
 365                 bdrv_get_geometry_hint(hd_table[i], &cylinders, &heads, &sectors);
 366                 if (cylinders <= 1024 && heads <= 16 && sectors <= 63) {
 367                     /* No translation. */
 368                     translation = 0;
 369                 } else {
 370                     /* LBA translation. */
 371                     translation = 1;
 372                 }
 373             } else {
 374                 translation--;
 375             }
 376             val |= translation << (i * 2);
 377         }
 378     }
 379     rtc_set_memory(s, 0x39, val);
 380 }
 381
 382 void ioport_set_a20(int enable)
 383 {
 384     /* XXX: send to all CPUs ? */
 385     cpu_x86_set_a20(first_cpu, enable);
 386 }
 387
 388 int ioport_get_a20(void)
 389 {
 390     return ((first_cpu->a20_mask >> 20) & 1);
 391 }
 392
 393 static void ioport92_write(void *opaque, uint32_t addr, uint32_t val)
 394 {
 395     ioport_set_a20((val >> 1) & 1);
 396     /* XXX: bit 0 is fast reset */
 397 }
 398
 399 static uint32_t ioport92_read(void *opaque, uint32_t addr)
 400 {
 401     return ioport_get_a20() << 1;
 402 }
 403
 404 /***********************************************************/
 405 /* Bochs BIOS debug ports */
 406
 407 static void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val)
 408 {
 409     static const char shutdown_str[8] = "Shutdown";
 410     static int shutdown_index = 0;
 411
 412     switch(addr) {
 413         /* Bochs BIOS messages */
 414     case 0x400:
 415     case 0x401:
 416         fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val);
 417         exit(1);
 418     case 0x402:
 419     case 0x403:
 420 #ifdef DEBUG_BIOS
 421         fprintf(stderr, "%c", val);
 422 #endif
 423         break;
 424     case 0x8900:
 425         /* same as Bochs power off */
 426         if (val == shutdown_str[shutdown_index]) {
 427             shutdown_index++;
 428             if (shutdown_index == 8) {
 429                 shutdown_index = 0;
 430                 qemu_system_shutdown_request();
 431             }
 432         } else {
 433             shutdown_index = 0;
 434         }
 435         break;
 436
 437         /* LGPL'ed VGA BIOS messages */
 438     case 0x501:
 439     case 0x502:
 440         fprintf(stderr, "VGA BIOS panic, line %d\n", val);
 441         exit(1);
 442     case 0x500:
 443     case 0x503:
 444 #ifdef DEBUG_BIOS
 445         fprintf(stderr, "%c", val);
 446 #endif
 447         break;
 448     }
 449 }
 450
 451 static void bochs_bios_init(void)
 452 {
 453     void *fw_cfg;
 454
 455     register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL);
 456     register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL);
 457     register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL);
 458     register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL);
 459     register_ioport_write(0x8900, 1, 1, bochs_bios_write, NULL);
 460
 461     register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL);
 462     register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL);
 463     register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL);
 464     register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL);
 465
 466     fw_cfg = fw_cfg_init(BIOS_CFG_IOPORT, BIOS_CFG_IOPORT + 1, 0, 0);
 467     fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
 468     fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
 469     fw_cfg_add_bytes(fw_cfg, FW_CFG_ACPI_TABLES, acpi_tables, acpi_tables_len);
 470 }
 471
 472 /* Generate an initial boot sector which sets state and jump to
 473    a specified vector */
 474 static void generate_bootsect(uint8_t *option_rom,
 475                               uint32_t gpr[8], uint16_t segs[6], uint16_t ip)
 476 {
 477     uint8_t rom[512], *p, *reloc;
 478     uint8_t sum;
 479     int i;
 480
 481     memset(rom, 0, sizeof(rom));
 482
 483     p = rom;
 484     /* Make sure we have an option rom signature */
 485     *p++ = 0x55;
 486     *p++ = 0xaa;
 487
 488     /* ROM size in sectors*/
 489     *p++ = 1;
 490
 491     /* Hook int19 */
 492
 493     *p++ = 0x50;                /* push ax */
 494     *p++ = 0x1e;                /* push ds */
 495     *p++ = 0x31; *p++ = 0xc0;   /* xor ax, ax */
 496     *p++ = 0x8e; *p++ = 0xd8;   /* mov ax, ds */
 497
 498     *p++ = 0xc7; *p++ = 0x06;   /* movvw _start,0x64 */
 499     *p++ = 0x64; *p++ = 0x00;
 500     reloc = p;
 501     *p++ = 0x00; *p++ = 0x00;
 502
 503     *p++ = 0x8c; *p++ = 0x0e;   /* mov cs,0x66 */
 504     *p++ = 0x66; *p++ = 0x00;
 505
 506     *p++ = 0x1f;                /* pop ds */
 507     *p++ = 0x58;                /* pop ax */
 508     *p++ = 0xcb;                /* lret */
 509
 510     /* Actual code */
 511     *reloc = (p - rom);
 512
 513     *p++ = 0xfa;                /* CLI */
 514     *p++ = 0xfc;                /* CLD */
 515
 516     for (i = 0; i < 6; i++) {
 517         if (i == 1)             /* Skip CS */
 518             continue;
 519
 520         *p++ = 0xb8;            /* MOV AX,imm16 */
 521         *p++ = segs[i];
 522         *p++ = segs[i] >> 8;
 523         *p++ = 0x8e;            /* MOV <seg>,AX */
 524         *p++ = 0xc0 + (i << 3);
 525     }
 526
 527     for (i = 0; i < 8; i++) {
 528         *p++ = 0x66;            /* 32-bit operand size */
 529         *p++ = 0xb8 + i;        /* MOV <reg>,imm32 */
 530         *p++ = gpr[i];
 531         *p++ = gpr[i] >> 8;
 532         *p++ = gpr[i] >> 16;
 533         *p++ = gpr[i] >> 24;
 534     }
 535
 536     *p++ = 0xea;                /* JMP FAR */
 537     *p++ = ip;                  /* IP */
 538     *p++ = ip >> 8;
 539     *p++ = segs[1];             /* CS */
 540     *p++ = segs[1] >> 8;
 541
 542     /* sign rom */
 543     sum = 0;
 544     for (i = 0; i < (sizeof(rom) - 1); i++)
 545         sum += rom[i];
 546     rom[sizeof(rom) - 1] = -sum;
 547
 548     memcpy(option_rom, rom, sizeof(rom));
 549 }
 550
 551 static long get_file_size(FILE *f)
 552 {
 553     long where, size;
 554
 555     /* XXX: on Unix systems, using fstat() probably makes more sense */
 556
 557     where = ftell(f);
 558     fseek(f, 0, SEEK_END);
 559     size = ftell(f);
 560     fseek(f, where, SEEK_SET);
 561
 562     return size;
 563 }
 564
 565 static void load_linux(uint8_t *option_rom,
 566                        const char *kernel_filename,
 567                        const char *initrd_filename,
 568                        const char *kernel_cmdline)
 569 {
 570     uint16_t protocol;
 571     uint32_t gpr[8];
 572     uint16_t seg[6];
 573     uint16_t real_seg;
 574     int setup_size, kernel_size, initrd_size, cmdline_size;
 575     uint32_t initrd_max;
 576     uint8_t header[1024];
 577     target_phys_addr_t real_addr, prot_addr, cmdline_addr, initrd_addr;
 578     FILE *f, *fi;
 579
 580     /* Align to 16 bytes as a paranoia measure */
 581     cmdline_size = (strlen(kernel_cmdline)+16) & ~15;
 582
 583     /* load the kernel header */
 584     f = fopen(kernel_filename, "rb");
 585     if (!f || !(kernel_size = get_file_size(f)) ||
 586         fread(header, 1, 1024, f) != 1024) {
 587         fprintf(stderr, "qemu: could not load kernel '%s'\n",
 588                 kernel_filename);
 589         exit(1);
 590     }
 591
 592     /* kernel protocol version */
 593 #if 0
 594     fprintf(stderr, "header magic: %#x\n", ldl_p(header+0x202));
 595 #endif
 596     if (ldl_p(header+0x202) == 0x53726448)
 597         protocol = lduw_p(header+0x206);
 598     else
 599         protocol = 0;
 600
 601     if (protocol < 0x200 || !(header[0x211] & 0x01)) {
 602         /* Low kernel */
 603         real_addr    = 0x90000;
 604         cmdline_addr = 0x9a000 - cmdline_size;
 605         prot_addr    = 0x10000;
 606     } else if (protocol < 0x202) {
 607         /* High but ancient kernel */
 608         real_addr    = 0x90000;
 609         cmdline_addr = 0x9a000 - cmdline_size;
 610         prot_addr    = 0x100000;
 611     } else {
 612         /* High and recent kernel */
 613         real_addr    = 0x10000;
 614         cmdline_addr = 0x20000;
 615         prot_addr    = 0x100000;
 616     }
 617
 618 #if 0
 619     fprintf(stderr,
 620             "qemu: real_addr     = 0x" TARGET_FMT_plx "\n"
 621             "qemu: cmdline_addr  = 0x" TARGET_FMT_plx "\n"
 622             "qemu: prot_addr     = 0x" TARGET_FMT_plx "\n",
 623             real_addr,
 624             cmdline_addr,
 625             prot_addr);
 626 #endif
 627
 628     /* highest address for loading the initrd */
 629     if (protocol >= 0x203)
 630         initrd_max = ldl_p(header+0x22c);
 631     else
 632         initrd_max = 0x37ffffff;
 633
 634     if (initrd_max >= ram_size-ACPI_DATA_SIZE)
 635         initrd_max = ram_size-ACPI_DATA_SIZE-1;
 636
 637     /* kernel command line */
 638     pstrcpy_targphys(cmdline_addr, 4096, kernel_cmdline);
 639
 640     if (protocol >= 0x202) {
 641         stl_p(header+0x228, cmdline_addr);
 642     } else {
 643         stw_p(header+0x20, 0xA33F);
 644         stw_p(header+0x22, cmdline_addr-real_addr);
 645     }
 646
 647     /* loader type */
 648     /* High nybble = B reserved for Qemu; low nybble is revision number.
 649        If this code is substantially changed, you may want to consider
 650        incrementing the revision. */
 651     if (protocol >= 0x200)
 652         header[0x210] = 0xB0;
 653
 654     /* heap */
 655     if (protocol >= 0x201) {
 656         header[0x211] |= 0x80;  /* CAN_USE_HEAP */
 657         stw_p(header+0x224, cmdline_addr-real_addr-0x200);
 658     }
 659
 660     /* load initrd */
 661     if (initrd_filename) {
 662         if (protocol < 0x200) {
 663             fprintf(stderr, "qemu: linux kernel too old to load a ram disk\n");
 664             exit(1);
 665         }
 666
 667         fi = fopen(initrd_filename, "rb");
 668         if (!fi) {
 669             fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
 670                     initrd_filename);
 671             exit(1);
 672         }
 673
 674         initrd_size = get_file_size(fi);
 675         initrd_addr = (initrd_max-initrd_size) & ~4095;
 676
 677         fprintf(stderr, "qemu: loading initrd (%#x bytes) at 0x" TARGET_FMT_plx
 678                 "\n", initrd_size, initrd_addr);
 679
 680         if (!fread_targphys_ok(initrd_addr, initrd_size, fi)) {
 681             fprintf(stderr, "qemu: read error on initial ram disk '%s'\n",
 682                     initrd_filename);
 683             exit(1);
 684         }
 685         fclose(fi);
 686
 687         stl_p(header+0x218, initrd_addr);
 688         stl_p(header+0x21c, initrd_size);
 689     }
 690
 691     /* store the finalized header and load the rest of the kernel */
 692     cpu_physical_memory_write(real_addr, header, 1024);
 693
 694     setup_size = header[0x1f1];
 695     if (setup_size == 0)
 696         setup_size = 4;
 697
 698     setup_size = (setup_size+1)*512;
 699     kernel_size -= setup_size;  /* Size of protected-mode code */
 700
 701     if (!fread_targphys_ok(real_addr+1024, setup_size-1024, f) ||
 702         !fread_targphys_ok(prot_addr, kernel_size, f)) {
 703         fprintf(stderr, "qemu: read error on kernel '%s'\n",
 704                 kernel_filename);
 705         exit(1);
 706     }
 707     fclose(f);
 708
 709     /* generate bootsector to set up the initial register state */
 710     real_seg = real_addr >> 4;
 711     seg[0] = seg[2] = seg[3] = seg[4] = seg[4] = real_seg;
 712     seg[1] = real_seg+0x20;     /* CS */
 713     memset(gpr, 0, sizeof gpr);
 714     gpr[4] = cmdline_addr-real_addr-16; /* SP (-16 is paranoia) */
 715
 716     generate_bootsect(option_rom, gpr, seg, 0);
 717 }
 718
 719 static void main_cpu_reset(void *opaque)
 720 {
 721     CPUState *env = opaque;
 722     cpu_reset(env);
 723 }
 724
 725 static const int ide_iobase[2] = { 0x1f0, 0x170 };
 726 static const int ide_iobase2[2] = { 0x3f6, 0x376 };
 727 static const int ide_irq[2] = { 14, 15 };
 728
 729 #define NE2000_NB_MAX 6
 730
 731 static int ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360, 0x280, 0x380 };
 732 static int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 };
 733
 734 static int serial_io[MAX_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
 735 static int serial_irq[MAX_SERIAL_PORTS] = { 4, 3, 4, 3 };
 736
 737 static int parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc };
 738 static int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 };
 739
 740 #ifdef HAS_AUDIO
 741 static void audio_init (PCIBus *pci_bus, qemu_irq *pic)
 742 {
 743     struct soundhw *c;
 744     int audio_enabled = 0;
 745
 746     for (c = soundhw; !audio_enabled && c->name; ++c) {
 747         audio_enabled = c->enabled;
 748     }
 749
 750     if (audio_enabled) {
 751         AudioState *s;
 752
 753         s = AUD_init ();
 754         if (s) {
 755             for (c = soundhw; c->name; ++c) {
 756                 if (c->enabled) {
 757                     if (c->isa) {
 758                         c->init.init_isa (s, pic);
 759                     }
 760                     else {
 761                         if (pci_bus) {
 762                             c->init.init_pci (pci_bus, s);
 763                         }
 764                     }
 765                 }
 766             }
 767         }
 768     }
 769 }
 770 #endif
 771
 772 static void pc_init_ne2k_isa(NICInfo *nd, qemu_irq *pic)
 773 {
 774     static int nb_ne2k = 0;
 775
 776     if (nb_ne2k == NE2000_NB_MAX)
 777         return;
 778     isa_ne2000_init(ne2000_io[nb_ne2k], pic[ne2000_irq[nb_ne2k]], nd);
 779     nb_ne2k++;
 780 }
 781
 782 /* PC hardware initialisation */
 783 static void pc_init1(ram_addr_t ram_size, int vga_ram_size,
 784                      const char *boot_device,
 785                      const char *kernel_filename, const char *kernel_cmdline,
 786                      const char *initrd_filename,
 787                      int pci_enabled, const char *cpu_model)
 788 {
 789     char buf[1024];
 790     int ret, linux_boot, i;
 791     ram_addr_t ram_addr, vga_ram_addr, bios_offset, vga_bios_offset;
 792     ram_addr_t below_4g_mem_size, above_4g_mem_size = 0;
 793     int bios_size, isa_bios_size, vga_bios_size;
 794     PCIBus *pci_bus;
 795     int piix3_devfn = -1;
 796     CPUState *env;
 797     qemu_irq *cpu_irq;
 798     qemu_irq *i8259;
 799     int index;
 800     BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
 801     BlockDriverState *fd[MAX_FD];
 802
 803     if (ram_size >= 0xe0000000 ) {
 804         above_4g_mem_size = ram_size - 0xe0000000;
 805         below_4g_mem_size = 0xe0000000;
 806     } else {
 807         below_4g_mem_size = ram_size;
 808     }
 809
 810     linux_boot = (kernel_filename != NULL);
 811
 812     /* init CPUs */
 813     if (cpu_model == NULL) {
 814 #ifdef TARGET_X86_64
 815         cpu_model = "qemu64";
 816 #else
 817         cpu_model = "qemu32";
 818 #endif
 819     }
 820
 821     for(i = 0; i < smp_cpus; i++) {
 822         env = cpu_init(cpu_model);
 823         if (!env) {
 824             fprintf(stderr, "Unable to find x86 CPU definition\n");
 825             exit(1);
 826         }
 827         if (i != 0)
 828             env->halted = 1;
 829         if (smp_cpus > 1) {
 830             /* XXX: enable it in all cases */
 831             env->cpuid_features |= CPUID_APIC;
 832         }
 833         qemu_register_reset(main_cpu_reset, env);
 834         if (pci_enabled) {
 835             apic_init(env);
 836         }
 837     }
 838
 839     vmport_init();
 840
 841     /* allocate RAM */
 842     ram_addr = qemu_ram_alloc(0xa0000);
 843     cpu_register_physical_memory(0, 0xa0000, ram_addr);
 844
 845     /* Allocate, even though we won't register, so we don't break the
 846      * phys_ram_base + PA assumption. This range includes vga (0xa0000 - 0xc0000),
 847      * and some bios areas, which will be registered later
 848      */
 849     ram_addr = qemu_ram_alloc(0x100000 - 0xa0000);
 850     ram_addr = qemu_ram_alloc(below_4g_mem_size - 0x100000);
 851     cpu_register_physical_memory(0x100000,
 852                  below_4g_mem_size - 0x100000,
 853                  ram_addr);
 854
 855     /* above 4giga memory allocation */
 856     if (above_4g_mem_size > 0) {
 857         ram_addr = qemu_ram_alloc(above_4g_mem_size);
 858         cpu_register_physical_memory(0x100000000ULL,
 859                                      above_4g_mem_size,
 860                                      ram_addr);
 861     }
 862
 863
 864     /* allocate VGA RAM */
 865     vga_ram_addr = qemu_ram_alloc(vga_ram_size);
 866
 867     /* BIOS load */
 868     if (bios_name == NULL)
 869         bios_name = BIOS_FILENAME;
 870     snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name);
 871     bios_size = get_image_size(buf);
 872     if (bios_size <= 0 ||
 873         (bios_size % 65536) != 0) {
 874         goto bios_error;
 875     }
 876     bios_offset = qemu_ram_alloc(bios_size);
 877     ret = load_image(buf, phys_ram_base + bios_offset);
 878     if (ret != bios_size) {
 879     bios_error:
 880         fprintf(stderr, "qemu: could not load PC BIOS '%s'\n", buf);
 881         exit(1);
 882     }
 883
 884     if (cirrus_vga_enabled || std_vga_enabled || vmsvga_enabled) {
 885         /* VGA BIOS load */
 886         if (cirrus_vga_enabled) {
 887             snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_CIRRUS_FILENAME);
 888         } else {
 889             snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME);
 890         }
 891         vga_bios_size = get_image_size(buf);
 892         if (vga_bios_size <= 0 || vga_bios_size > 65536)
 893             goto vga_bios_error;
 894         vga_bios_offset = qemu_ram_alloc(65536);
 895
 896         ret = load_image(buf, phys_ram_base + vga_bios_offset);
 897         if (ret != vga_bios_size) {
 898 vga_bios_error:
 899             fprintf(stderr, "qemu: could not load VGA BIOS '%s'\n", buf);
 900             exit(1);
 901         }
 902
 903         /* setup basic memory access */
 904         cpu_register_physical_memory(0xc0000, 0x10000,
 905                                      vga_bios_offset | IO_MEM_ROM);
 906     }
 907
 908     /* map the last 128KB of the BIOS in ISA space */
 909     isa_bios_size = bios_size;
 910     if (isa_bios_size > (128 * 1024))
 911         isa_bios_size = 128 * 1024;
 912     cpu_register_physical_memory(0x100000 - isa_bios_size,
 913                                  isa_bios_size,
 914                                  (bios_offset + bios_size - isa_bios_size) | IO_MEM_ROM);
 915
 916     {
 917         ram_addr_t option_rom_offset;
 918         int size, offset;
 919
 920         offset = 0;
 921         if (linux_boot) {
 922             option_rom_offset = qemu_ram_alloc(TARGET_PAGE_SIZE);
 923             load_linux(phys_ram_base + option_rom_offset,
 924                        kernel_filename, initrd_filename, kernel_cmdline);
 925             cpu_register_physical_memory(0xd0000, TARGET_PAGE_SIZE,
 926                                          option_rom_offset);
 927             offset = TARGET_PAGE_SIZE;
 928         }
 929
 930         for (i = 0; i < nb_option_roms; i++) {
 931             size = get_image_size(option_rom[i]);
 932             if (size < 0) {
 933                 fprintf(stderr, "Could not load option rom '%s'\n",
 934                         option_rom[i]);
 935                 exit(1);
 936             }
 937             if (size > (0x10000 - offset))
 938                 goto option_rom_error;
 939             option_rom_offset = qemu_ram_alloc(size);
 940             ret = load_image(option_rom[i], phys_ram_base + option_rom_offset);
 941             if (ret != size) {
 942             option_rom_error:
 943                 fprintf(stderr, "Too many option ROMS\n");
 944                 exit(1);
 945             }
 946             size = (size + 4095) & ~4095;
 947             cpu_register_physical_memory(0xd0000 + offset,
 948                                          size, option_rom_offset | IO_MEM_ROM);
 949             offset += size;
 950         }
 951     }
 952
 953     /* map all the bios at the top of memory */
 954     cpu_register_physical_memory((uint32_t)(-bios_size),
 955                                  bios_size, bios_offset | IO_MEM_ROM);
 956
 957     bochs_bios_init();
 958
 959     cpu_irq = qemu_allocate_irqs(pic_irq_request, NULL, 1);
 960     i8259 = i8259_init(cpu_irq[0]);
 961     ferr_irq = i8259[13];
 962
 963     if (pci_enabled) {
 964         pci_bus = i440fx_init(&i440fx_state, i8259);
 965         piix3_devfn = piix3_init(pci_bus, -1);
 966     } else {
 967         pci_bus = NULL;
 968     }
 969
 970     /* init basic PC hardware */
 971     register_ioport_write(0x80, 1, 1, ioport80_write, NULL);
 972
 973     register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL);
 974
 975     if (cirrus_vga_enabled) {
 976         if (pci_enabled) {
 977             pci_cirrus_vga_init(pci_bus,
 978                                 phys_ram_base + vga_ram_addr,
 979                                 vga_ram_addr, vga_ram_size);
 980         } else {
 981             isa_cirrus_vga_init(phys_ram_base + vga_ram_addr,
 982                                 vga_ram_addr, vga_ram_size);
 983         }
 984     } else if (vmsvga_enabled) {
 985         if (pci_enabled)
 986             pci_vmsvga_init(pci_bus, phys_ram_base + vga_ram_addr,
 987                             vga_ram_addr, vga_ram_size);
 988         else
 989             fprintf(stderr, "%s: vmware_vga: no PCI bus\n", __FUNCTION__);
 990     } else if (std_vga_enabled) {
 991         if (pci_enabled) {
 992             pci_vga_init(pci_bus, phys_ram_base + vga_ram_addr,
 993                          vga_ram_addr, vga_ram_size, 0, 0);
 994         } else {
 995             isa_vga_init(phys_ram_base + vga_ram_addr,
 996                          vga_ram_addr, vga_ram_size);
 997         }
 998     }
 999
1000     rtc_state = rtc_init(0x70, i8259[8], 2000);
1001
1002     qemu_register_boot_set(pc_boot_set, rtc_state);
1003
1004     register_ioport_read(0x92, 1, 1, ioport92_read, NULL);
1005     register_ioport_write(0x92, 1, 1, ioport92_write, NULL);
1006
1007     if (pci_enabled) {
1008         ioapic = ioapic_init();
1009     }
1010     pit = pit_init(0x40, i8259[0]);
1011     pcspk_init(pit);
1012     if (!no_hpet) {
1013         hpet_init(i8259);
1014     }
1015     if (pci_enabled) {
1016         pic_set_alt_irq_func(isa_pic, ioapic_set_irq, ioapic);
1017     }
1018
1019     for(i = 0; i < MAX_SERIAL_PORTS; i++) {
1020         if (serial_hds[i]) {
1021             serial_init(serial_io[i], i8259[serial_irq[i]], 115200,
1022                         serial_hds[i]);
1023         }
1024     }
1025
1026     for(i = 0; i < MAX_PARALLEL_PORTS; i++) {
1027         if (parallel_hds[i]) {
1028             parallel_init(parallel_io[i], i8259[parallel_irq[i]],
1029                           parallel_hds[i]);
1030         }
1031     }
1032
1033     for(i = 0; i < nb_nics; i++) {
1034         NICInfo *nd = &nd_table[i];
1035
1036         if (!pci_enabled || (nd->model && strcmp(nd->model, "ne2k_isa") == 0))
1037             pc_init_ne2k_isa(nd, i8259);
1038         else
1039             pci_nic_init(pci_bus, nd, -1, "ne2k_pci");
1040     }
1041
1042     qemu_system_hot_add_init();
1043
1044     if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
1045         fprintf(stderr, "qemu: too many IDE bus\n");
1046         exit(1);
1047     }
1048
1049     for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
1050         index = drive_get_index(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
1051         if (index != -1)
1052             hd[i] = drives_table[index].bdrv;
1053         else
1054             hd[i] = NULL;
1055     }
1056
1057     if (pci_enabled) {
1058         pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1, i8259);
1059     } else {
1060         for(i = 0; i < MAX_IDE_BUS; i++) {
1061             isa_ide_init(ide_iobase[i], ide_iobase2[i], i8259[ide_irq[i]],
1062                          hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]);
1063         }
1064     }
1065
1066     i8042_init(i8259[1], i8259[12], 0x60);
1067     DMA_init(0);
1068 #ifdef HAS_AUDIO
1069     audio_init(pci_enabled ? pci_bus : NULL, i8259);
1070 #endif
1071
1072     for(i = 0; i < MAX_FD; i++) {
1073         index = drive_get_index(IF_FLOPPY, 0, i);
1074         if (index != -1)
1075             fd[i] = drives_table[index].bdrv;
1076         else
1077             fd[i] = NULL;
1078     }
1079     floppy_controller = fdctrl_init(i8259[6], 2, 0, 0x3f0, fd);
1080
1081     cmos_init(below_4g_mem_size, above_4g_mem_size, boot_device, hd);
1082
1083     if (pci_enabled && usb_enabled) {
1084         usb_uhci_piix3_init(pci_bus, piix3_devfn + 2);
1085     }
1086
1087     if (pci_enabled && acpi_enabled) {
1088         uint8_t *eeprom_buf = qemu_mallocz(8 * 256); /* XXX: make this persistent */
1089         i2c_bus *smbus;
1090
1091         /* TODO: Populate SPD eeprom data.  */
1092         smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100, i8259[9]);
1093         for (i = 0; i < 8; i++) {
1094             smbus_eeprom_device_init(smbus, 0x50 + i, eeprom_buf + (i * 256));
1095         }
1096     }
1097
1098     if (i440fx_state) {
1099         i440fx_init_memory_mappings(i440fx_state);
1100     }
1101
1102     if (pci_enabled) {
1103         int max_bus;
1104         int bus, unit;
1105         void *scsi;
1106
1107         max_bus = drive_get_max_bus(IF_SCSI);
1108
1109         for (bus = 0; bus <= max_bus; bus++) {
1110             scsi = lsi_scsi_init(pci_bus, -1);
1111             for (unit = 0; unit < LSI_MAX_DEVS; unit++) {
1112                 index = drive_get_index(IF_SCSI, bus, unit);
1113                 if (index == -1)
1114                     continue;
1115                 lsi_scsi_attach(scsi, drives_table[index].bdrv, unit);
1116             }
1117         }
1118     }
1119
1120     /* Add virtio block devices */
1121     if (pci_enabled) {
1122         int index;
1123         int unit_id = 0;
1124
1125         while ((index = drive_get_index(IF_VIRTIO, 0, unit_id)) != -1) {
1126             virtio_blk_init(pci_bus, drives_table[index].bdrv);
1127             unit_id++;
1128         }
1129     }
1130
1131     /* Add virtio balloon device */
1132     if (pci_enabled)
1133         virtio_balloon_init(pci_bus);
1134
1135     /* Add virtio console devices */
1136     if (pci_enabled) {
1137         for(i = 0; i < MAX_VIRTIO_CONSOLES; i++) {
1138             if (virtcon_hds[i])
1139                 virtio_console_init(pci_bus, virtcon_hds[i]);
1140         }
1141     }
1142 }
1143
1144 static void pc_init_pci(ram_addr_t ram_size, int vga_ram_size,
1145                         const char *boot_device,
1146                         const char *kernel_filename,
1147                         const char *kernel_cmdline,
1148                         const char *initrd_filename,
1149                         const char *cpu_model)
1150 {
1151     pc_init1(ram_size, vga_ram_size, boot_device,
1152              kernel_filename, kernel_cmdline,
1153              initrd_filename, 1, cpu_model);
1154 }
1155
1156 static void pc_init_isa(ram_addr_t ram_size, int vga_ram_size,
1157                         const char *boot_device,
1158                         const char *kernel_filename,
1159                         const char *kernel_cmdline,
1160                         const char *initrd_filename,
1161                         const char *cpu_model)
1162 {
1163     pc_init1(ram_size, vga_ram_size, boot_device,
1164              kernel_filename, kernel_cmdline,
1165              initrd_filename, 0, cpu_model);
1166 }
1167
1168 /* set CMOS shutdown status register (index 0xF) as S3_resume(0xFE)
1169    BIOS will read it and start S3 resume at POST Entry */
1170 void cmos_set_s3_resume(void)
1171 {
1172     if (rtc_state)
1173         rtc_set_memory(rtc_state, 0xF, 0xFE);
1174 }
1175
1176 QEMUMachine pc_machine = {
1177     .name = "pc",
1178     .desc = "Standard PC",
1179     .init = pc_init_pci,
1180     .ram_require = VGA_RAM_SIZE + PC_MAX_BIOS_SIZE,
1181     .max_cpus = 255,
1182 };
1183
1184 QEMUMachine isapc_machine = {
1185     .name = "isapc",
1186     .desc = "ISA-only PC",
1187     .init = pc_init_isa,
1188     .ram_require = VGA_RAM_SIZE + PC_MAX_BIOS_SIZE,
1189     .max_cpus = 1,
1190 };