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Fix 32-bit overflow in parallels image support
[qemu-kvm/fedora.git] / hw / pc.c
blob7a184cd1c7cc388fbe36966c1634279ba6c89c57
1 /*
2 * QEMU PC System Emulator
3 *
4 * Copyright (c) 2003-2004 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24 #include "hw.h"
25 #include "pc.h"
26 #include "fdc.h"
27 #include "pci.h"
28 #include "block.h"
29 #include "sysemu.h"
30 #include "audio/audio.h"
31 #include "net.h"
32 #include "smbus.h"
33 #include "boards.h"
34 #include "monitor.h"
35 #include "fw_cfg.h"
36 #include "hpet_emul.h"
37 #include "watchdog.h"
38 #include "smbios.h"
39 #include "device-assignment.h"
40
41 #include "qemu-kvm.h"
42
43 /* output Bochs bios info messages */
44 //#define DEBUG_BIOS
45
46 /* Show multiboot debug output */
47 //#define DEBUG_MULTIBOOT
48
49 #define BIOS_FILENAME "bios.bin"
50 #define VGABIOS_FILENAME "vgabios.bin"
51 #define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin"
52 #define EXTBOOT_FILENAME "extboot.bin"
53
54 #define PC_MAX_BIOS_SIZE (4 * 1024 * 1024)
55
56 /* Leave a chunk of memory at the top of RAM for the BIOS ACPI tables. */
57 #define ACPI_DATA_SIZE 0x10000
58 #define BIOS_CFG_IOPORT 0x510
59 #define FW_CFG_ACPI_TABLES (FW_CFG_ARCH_LOCAL + 0)
60 #define FW_CFG_SMBIOS_ENTRIES (FW_CFG_ARCH_LOCAL + 1)
61 #define FW_CFG_IRQ0_OVERRIDE (FW_CFG_ARCH_LOCAL + 2)
62
63 #define MAX_IDE_BUS 2
64
65 static fdctrl_t *floppy_controller;
66 static RTCState *rtc_state;
67 static PITState *pit;
68 static IOAPICState *ioapic;
69 static PCIDevice *i440fx_state;
70
71 typedef struct rom_reset_data {
72 uint8_t *data;
73 target_phys_addr_t addr;
74 unsigned size;
75 } RomResetData;
76
77 static void option_rom_reset(void *_rrd)
78 {
79 RomResetData *rrd = _rrd;
80
81 cpu_physical_memory_write_rom(rrd->addr, rrd->data, rrd->size);
82 }
83
84 static void option_rom_setup_reset(target_phys_addr_t addr, unsigned size)
85 {
86 RomResetData *rrd = qemu_malloc(sizeof *rrd);
87
88 rrd->data = qemu_malloc(size);
89 cpu_physical_memory_read(addr, rrd->data, size);
90 rrd->addr = addr;
91 rrd->size = size;
92 qemu_register_reset(option_rom_reset, rrd);
93 }
94
95 static void ioport80_write(void *opaque, uint32_t addr, uint32_t data)
96 {
97 }
98
99 /* MSDOS compatibility mode FPU exception support */
100 static qemu_irq ferr_irq;
101 /* XXX: add IGNNE support */
102 void cpu_set_ferr(CPUX86State *s)
103 {
104 qemu_irq_raise(ferr_irq);
105 }
106
107 static void ioportF0_write(void *opaque, uint32_t addr, uint32_t data)
108 {
109 qemu_irq_lower(ferr_irq);
110 }
111
112 /* TSC handling */
113 uint64_t cpu_get_tsc(CPUX86State *env)
114 {
115 /* Note: when using kqemu, it is more logical to return the host TSC
116 because kqemu does not trap the RDTSC instruction for
117 performance reasons */
118 #ifdef CONFIG_KQEMU
119 if (env->kqemu_enabled) {
120 return cpu_get_real_ticks();
121 } else
122 #endif
123 {
124 return cpu_get_ticks();
125 }
126 }
127
128 /* SMM support */
129 void cpu_smm_update(CPUState *env)
130 {
131 if (i440fx_state && env == first_cpu)
132 i440fx_set_smm(i440fx_state, (env->hflags >> HF_SMM_SHIFT) & 1);
133 }
134
135
136 /* IRQ handling */
137 int cpu_get_pic_interrupt(CPUState *env)
138 {
139 int intno;
140
141 intno = apic_get_interrupt(env);
142 if (intno >= 0) {
143 /* set irq request if a PIC irq is still pending */
144 /* XXX: improve that */
145 pic_update_irq(isa_pic);
146 return intno;
147 }
148 /* read the irq from the PIC */
149 if (!apic_accept_pic_intr(env))
150 return -1;
151
152 intno = pic_read_irq(isa_pic);
153 return intno;
154 }
155
156 static void pic_irq_request(void *opaque, int irq, int level)
157 {
158 CPUState *env = first_cpu;
159
160 if (env->apic_state) {
161 while (env) {
162 if (apic_accept_pic_intr(env))
163 apic_deliver_pic_intr(env, level);
164 env = env->next_cpu;
165 }
166 } else {
167 if (level)
168 cpu_interrupt(env, CPU_INTERRUPT_HARD);
169 else
170 cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
171 }
172 }
173
174 /* PC cmos mappings */
175
176 #define REG_EQUIPMENT_BYTE 0x14
177
178 static int cmos_get_fd_drive_type(int fd0)
179 {
180 int val;
181
182 switch (fd0) {
183 case 0:
184 /* 1.44 Mb 3"5 drive */
185 val = 4;
186 break;
187 case 1:
188 /* 2.88 Mb 3"5 drive */
189 val = 5;
190 break;
191 case 2:
192 /* 1.2 Mb 5"5 drive */
193 val = 2;
194 break;
195 default:
196 val = 0;
197 break;
198 }
199 return val;
200 }
201
202 static void cmos_init_hd(int type_ofs, int info_ofs, BlockDriverState *hd)
203 {
204 RTCState *s = rtc_state;
205 int cylinders, heads, sectors;
206 bdrv_get_geometry_hint(hd, &cylinders, &heads, &sectors);
207 rtc_set_memory(s, type_ofs, 47);
208 rtc_set_memory(s, info_ofs, cylinders);
209 rtc_set_memory(s, info_ofs + 1, cylinders >> 8);
210 rtc_set_memory(s, info_ofs + 2, heads);
211 rtc_set_memory(s, info_ofs + 3, 0xff);
212 rtc_set_memory(s, info_ofs + 4, 0xff);
213 rtc_set_memory(s, info_ofs + 5, 0xc0 | ((heads > 8) << 3));
214 rtc_set_memory(s, info_ofs + 6, cylinders);
215 rtc_set_memory(s, info_ofs + 7, cylinders >> 8);
216 rtc_set_memory(s, info_ofs + 8, sectors);
217 }
218
219 /* convert boot_device letter to something recognizable by the bios */
220 static int boot_device2nibble(char boot_device)
221 {
222 switch(boot_device) {
223 case 'a':
224 case 'b':
225 return 0x01; /* floppy boot */
226 case 'c':
227 return 0x02; /* hard drive boot */
228 case 'd':
229 return 0x03; /* CD-ROM boot */
230 case 'n':
231 return 0x04; /* Network boot */
232 }
233 return 0;
234 }
235
236 /* copy/pasted from cmos_init, should be made a general function
237 and used there as well */
238 static int pc_boot_set(void *opaque, const char *boot_device)
239 {
240 Monitor *mon = cur_mon;
241 #define PC_MAX_BOOT_DEVICES 3
242 RTCState *s = (RTCState *)opaque;
243 int nbds, bds[3] = { 0, };
244 int i;
245
246 nbds = strlen(boot_device);
247 if (nbds > PC_MAX_BOOT_DEVICES) {
248 monitor_printf(mon, "Too many boot devices for PC\n");
249 return(1);
250 }
251 for (i = 0; i < nbds; i++) {
252 bds[i] = boot_device2nibble(boot_device[i]);
253 if (bds[i] == 0) {
254 monitor_printf(mon, "Invalid boot device for PC: '%c'\n",
255 boot_device[i]);
256 return(1);
257 }
258 }
259 rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]);
260 rtc_set_memory(s, 0x38, (bds[2] << 4));
261 return(0);
262 }
263
264 /* hd_table must contain 4 block drivers */
265 static void cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
266 const char *boot_device, BlockDriverState **hd_table)
267 {
268 RTCState *s = rtc_state;
269 int nbds, bds[3] = { 0, };
270 int val;
271 int fd0, fd1, nb;
272 int i;
273
274 /* various important CMOS locations needed by PC/Bochs bios */
275
276 /* memory size */
277 val = 640; /* base memory in K */
278 rtc_set_memory(s, 0x15, val);
279 rtc_set_memory(s, 0x16, val >> 8);
280
281 val = (ram_size / 1024) - 1024;
282 if (val > 65535)
283 val = 65535;
284 rtc_set_memory(s, 0x17, val);
285 rtc_set_memory(s, 0x18, val >> 8);
286 rtc_set_memory(s, 0x30, val);
287 rtc_set_memory(s, 0x31, val >> 8);
288
289 if (above_4g_mem_size) {
290 rtc_set_memory(s, 0x5b, (unsigned int)above_4g_mem_size >> 16);
291 rtc_set_memory(s, 0x5c, (unsigned int)above_4g_mem_size >> 24);
292 rtc_set_memory(s, 0x5d, (uint64_t)above_4g_mem_size >> 32);
293 }
294
295 if (ram_size > (16 * 1024 * 1024))
296 val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536);
297 else
298 val = 0;
299 if (val > 65535)
300 val = 65535;
301 rtc_set_memory(s, 0x34, val);
302 rtc_set_memory(s, 0x35, val >> 8);
303
304 /* set the number of CPU */
305 rtc_set_memory(s, 0x5f, smp_cpus - 1);
306
307 /* set boot devices, and disable floppy signature check if requested */
308 #define PC_MAX_BOOT_DEVICES 3
309 nbds = strlen(boot_device);
310 if (nbds > PC_MAX_BOOT_DEVICES) {
311 fprintf(stderr, "Too many boot devices for PC\n");
312 exit(1);
313 }
314 for (i = 0; i < nbds; i++) {
315 bds[i] = boot_device2nibble(boot_device[i]);
316 if (bds[i] == 0) {
317 fprintf(stderr, "Invalid boot device for PC: '%c'\n",
318 boot_device[i]);
319 exit(1);
320 }
321 }
322 rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]);
323 rtc_set_memory(s, 0x38, (bds[2] << 4) | (fd_bootchk ? 0x0 : 0x1));
324
325 /* floppy type */
326
327 fd0 = fdctrl_get_drive_type(floppy_controller, 0);
328 fd1 = fdctrl_get_drive_type(floppy_controller, 1);
329
330 val = (cmos_get_fd_drive_type(fd0) << 4) | cmos_get_fd_drive_type(fd1);
331 rtc_set_memory(s, 0x10, val);
332
333 val = 0;
334 nb = 0;
335 if (fd0 < 3)
336 nb++;
337 if (fd1 < 3)
338 nb++;
339 switch (nb) {
340 case 0:
341 break;
342 case 1:
343 val |= 0x01; /* 1 drive, ready for boot */
344 break;
345 case 2:
346 val |= 0x41; /* 2 drives, ready for boot */
347 break;
348 }
349 val |= 0x02; /* FPU is there */
350 val |= 0x04; /* PS/2 mouse installed */
351 rtc_set_memory(s, REG_EQUIPMENT_BYTE, val);
352
353 /* hard drives */
354
355 rtc_set_memory(s, 0x12, (hd_table[0] ? 0xf0 : 0) | (hd_table[1] ? 0x0f : 0));
356 if (hd_table[0])
357 cmos_init_hd(0x19, 0x1b, hd_table[0]);
358 if (hd_table[1])
359 cmos_init_hd(0x1a, 0x24, hd_table[1]);
360
361 val = 0;
362 for (i = 0; i < 4; i++) {
363 if (hd_table[i]) {
364 int cylinders, heads, sectors, translation;
365 /* NOTE: bdrv_get_geometry_hint() returns the physical
366 geometry. It is always such that: 1 <= sects <= 63, 1
367 <= heads <= 16, 1 <= cylinders <= 16383. The BIOS
368 geometry can be different if a translation is done. */
369 translation = bdrv_get_translation_hint(hd_table[i]);
370 if (translation == BIOS_ATA_TRANSLATION_AUTO) {
371 bdrv_get_geometry_hint(hd_table[i], &cylinders, &heads, &sectors);
372 if (cylinders <= 1024 && heads <= 16 && sectors <= 63) {
373 /* No translation. */
374 translation = 0;
375 } else {
376 /* LBA translation. */
377 translation = 1;
378 }
379 } else {
380 translation--;
381 }
382 val |= translation << (i * 2);
383 }
384 }
385 rtc_set_memory(s, 0x39, val);
386 }
387
388 void ioport_set_a20(int enable)
389 {
390 /* XXX: send to all CPUs ? */
391 cpu_x86_set_a20(first_cpu, enable);
392 }
393
394 int ioport_get_a20(void)
395 {
396 return ((first_cpu->a20_mask >> 20) & 1);
397 }
398
399 static void ioport92_write(void *opaque, uint32_t addr, uint32_t val)
400 {
401 ioport_set_a20((val >> 1) & 1);
402 /* XXX: bit 0 is fast reset */
403 }
404
405 static uint32_t ioport92_read(void *opaque, uint32_t addr)
406 {
407 return ioport_get_a20() << 1;
408 }
409
410 /***********************************************************/
411 /* Bochs BIOS debug ports */
412
413 static void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val)
414 {
415 static const char shutdown_str[8] = "Shutdown";
416 static int shutdown_index = 0;
417
418 switch(addr) {
419 /* Bochs BIOS messages */
420 case 0x400:
421 case 0x401:
422 fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val);
423 exit(1);
424 case 0x402:
425 case 0x403:
426 #ifdef DEBUG_BIOS
427 fprintf(stderr, "%c", val);
428 #endif
429 break;
430 case 0x8900:
431 /* same as Bochs power off */
432 if (val == shutdown_str[shutdown_index]) {
433 shutdown_index++;
434 if (shutdown_index == 8) {
435 shutdown_index = 0;
436 qemu_system_shutdown_request();
437 }
438 } else {
439 shutdown_index = 0;
440 }
441 break;
442
443 /* LGPL'ed VGA BIOS messages */
444 case 0x501:
445 case 0x502:
446 fprintf(stderr, "VGA BIOS panic, line %d\n", val);
447 exit(1);
448 case 0x500:
449 case 0x503:
450 #ifdef DEBUG_BIOS
451 fprintf(stderr, "%c", val);
452 #endif
453 break;
454 }
455 }
456
457 extern uint64_t node_cpumask[MAX_NODES];
458
459 static void *bochs_bios_init(void)
460 {
461 void *fw_cfg;
462 uint8_t *smbios_table;
463 size_t smbios_len;
464 uint64_t *numa_fw_cfg;
465 int i, j;
466
467 register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL);
468 register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL);
469 register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL);
470 register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL);
471 register_ioport_write(0x8900, 1, 1, bochs_bios_write, NULL);
472
473 register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL);
474 register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL);
475 register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL);
476 register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL);
477
478 fw_cfg = fw_cfg_init(BIOS_CFG_IOPORT, BIOS_CFG_IOPORT + 1, 0, 0);
479
480 fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
481 fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
482 fw_cfg_add_bytes(fw_cfg, FW_CFG_ACPI_TABLES, (uint8_t *)acpi_tables,
483 acpi_tables_len);
484 fw_cfg_add_bytes(fw_cfg, FW_CFG_IRQ0_OVERRIDE, &irq0override, 1);
485
486 smbios_table = smbios_get_table(&smbios_len);
487 if (smbios_table)
488 fw_cfg_add_bytes(fw_cfg, FW_CFG_SMBIOS_ENTRIES,
489 smbios_table, smbios_len);
490
491 /* allocate memory for the NUMA channel: one (64bit) word for the number
492 * of nodes, one word for each VCPU->node and one word for each node to
493 * hold the amount of memory.
494 */
495 numa_fw_cfg = qemu_mallocz((1 + smp_cpus + nb_numa_nodes) * 8);
496 numa_fw_cfg[0] = cpu_to_le64(nb_numa_nodes);
497 for (i = 0; i < smp_cpus; i++) {
498 for (j = 0; j < nb_numa_nodes; j++) {
499 if (node_cpumask[j] & (1 << i)) {
500 numa_fw_cfg[i + 1] = cpu_to_le64(j);
501 break;
502 }
503 }
504 }
505 for (i = 0; i < nb_numa_nodes; i++) {
506 numa_fw_cfg[smp_cpus + 1 + i] = cpu_to_le64(node_mem[i]);
507 }
508 fw_cfg_add_bytes(fw_cfg, FW_CFG_NUMA, (uint8_t *)numa_fw_cfg,
509 (1 + smp_cpus + nb_numa_nodes) * 8);
510
511 return fw_cfg;
512 }
513
514 /* Generate an initial boot sector which sets state and jump to
515 a specified vector */
516 static void generate_bootsect(target_phys_addr_t option_rom,
517 uint32_t gpr[8], uint16_t segs[6], uint16_t ip)
518 {
519 uint8_t rom[512], *p, *reloc;
520 uint8_t sum;
521 int i;
522
523 memset(rom, 0, sizeof(rom));
524
525 p = rom;
526 /* Make sure we have an option rom signature */
527 *p++ = 0x55;
528 *p++ = 0xaa;
529
530 /* ROM size in sectors*/
531 *p++ = 1;
532
533 /* Hook int19 */
534
535 *p++ = 0x50; /* push ax */
536 *p++ = 0x1e; /* push ds */
537 *p++ = 0x31; *p++ = 0xc0; /* xor ax, ax */
538 *p++ = 0x8e; *p++ = 0xd8; /* mov ax, ds */
539
540 *p++ = 0xc7; *p++ = 0x06; /* movvw _start,0x64 */
541 *p++ = 0x64; *p++ = 0x00;
542 reloc = p;
543 *p++ = 0x00; *p++ = 0x00;
544
545 *p++ = 0x8c; *p++ = 0x0e; /* mov cs,0x66 */
546 *p++ = 0x66; *p++ = 0x00;
547
548 *p++ = 0x1f; /* pop ds */
549 *p++ = 0x58; /* pop ax */
550 *p++ = 0xcb; /* lret */
551
552 /* Actual code */
553 *reloc = (p - rom);
554
555 *p++ = 0xfa; /* CLI */
556 *p++ = 0xfc; /* CLD */
557
558 for (i = 0; i < 6; i++) {
559 if (i == 1) /* Skip CS */
560 continue;
561
562 *p++ = 0xb8; /* MOV AX,imm16 */
563 *p++ = segs[i];
564 *p++ = segs[i] >> 8;
565 *p++ = 0x8e; /* MOV <seg>,AX */
566 *p++ = 0xc0 + (i << 3);
567 }
568
569 for (i = 0; i < 8; i++) {
570 *p++ = 0x66; /* 32-bit operand size */
571 *p++ = 0xb8 + i; /* MOV <reg>,imm32 */
572 *p++ = gpr[i];
573 *p++ = gpr[i] >> 8;
574 *p++ = gpr[i] >> 16;
575 *p++ = gpr[i] >> 24;
576 }
577
578 *p++ = 0xea; /* JMP FAR */
579 *p++ = ip; /* IP */
580 *p++ = ip >> 8;
581 *p++ = segs[1]; /* CS */
582 *p++ = segs[1] >> 8;
583
584 /* sign rom */
585 sum = 0;
586 for (i = 0; i < (sizeof(rom) - 1); i++)
587 sum += rom[i];
588 rom[sizeof(rom) - 1] = -sum;
589
590 cpu_physical_memory_write_rom(option_rom, rom, sizeof(rom));
591 option_rom_setup_reset(option_rom, sizeof (rom));
592 }
593
594 static long get_file_size(FILE *f)
595 {
596 long where, size;
597
598 /* XXX: on Unix systems, using fstat() probably makes more sense */
599
600 where = ftell(f);
601 fseek(f, 0, SEEK_END);
602 size = ftell(f);
603 fseek(f, where, SEEK_SET);
604
605 return size;
606 }
607
608 #define MULTIBOOT_STRUCT_ADDR 0x9000
609
610 #if MULTIBOOT_STRUCT_ADDR > 0xf0000
611 #error multiboot struct needs to fit in 16 bit real mode
612 #endif
613
614 static int load_multiboot(void *fw_cfg,
615 FILE *f,
616 const char *kernel_filename,
617 const char *initrd_filename,
618 const char *kernel_cmdline,
619 uint8_t *header)
620 {
621 int i, t, is_multiboot = 0;
622 uint32_t flags = 0;
623 uint32_t mh_entry_addr;
624 uint32_t mh_load_addr;
625 uint32_t mb_kernel_size;
626 uint32_t mmap_addr = MULTIBOOT_STRUCT_ADDR;
627 uint32_t mb_bootinfo = MULTIBOOT_STRUCT_ADDR + 0x500;
628 uint32_t mb_cmdline = mb_bootinfo + 0x200;
629 uint32_t mb_mod_end;
630
631 /* Ok, let's see if it is a multiboot image.
632 The header is 12x32bit long, so the latest entry may be 8192 - 48. */
633 for (i = 0; i < (8192 - 48); i += 4) {
634 if (ldl_p(header+i) == 0x1BADB002) {
635 uint32_t checksum = ldl_p(header+i+8);
636 flags = ldl_p(header+i+4);
637 checksum += flags;
638 checksum += (uint32_t)0x1BADB002;
639 if (!checksum) {
640 is_multiboot = 1;
641 break;
642 }
643 }
644 }
645
646 if (!is_multiboot)
647 return 0; /* no multiboot */
648
649 #ifdef DEBUG_MULTIBOOT
650 fprintf(stderr, "qemu: I believe we found a multiboot image!\n");
651 #endif
652
653 if (flags & 0x00000004) { /* MULTIBOOT_HEADER_HAS_VBE */
654 fprintf(stderr, "qemu: multiboot knows VBE. we don't.\n");
655 }
656 if (!(flags & 0x00010000)) { /* MULTIBOOT_HEADER_HAS_ADDR */
657 uint64_t elf_entry;
658 int kernel_size;
659 fclose(f);
660 kernel_size = load_elf(kernel_filename, 0, &elf_entry, NULL, NULL);
661 if (kernel_size < 0) {
662 fprintf(stderr, "Error while loading elf kernel\n");
663 exit(1);
664 }
665 mh_load_addr = mh_entry_addr = elf_entry;
666 mb_kernel_size = kernel_size;
667
668 #ifdef DEBUG_MULTIBOOT
669 fprintf(stderr, "qemu: loading multiboot-elf kernel (%#x bytes) with entry %#zx\n",
670 mb_kernel_size, (size_t)mh_entry_addr);
671 #endif
672 } else {
673 /* Valid if mh_flags sets MULTIBOOT_HEADER_HAS_ADDR. */
674 uint32_t mh_header_addr = ldl_p(header+i+12);
675 mh_load_addr = ldl_p(header+i+16);
676 #ifdef DEBUG_MULTIBOOT
677 uint32_t mh_load_end_addr = ldl_p(header+i+20);
678 uint32_t mh_bss_end_addr = ldl_p(header+i+24);
679 #endif
680 uint32_t mb_kernel_text_offset = i - (mh_header_addr - mh_load_addr);
681
682 mh_entry_addr = ldl_p(header+i+28);
683 mb_kernel_size = get_file_size(f) - mb_kernel_text_offset;
684
685 /* Valid if mh_flags sets MULTIBOOT_HEADER_HAS_VBE.
686 uint32_t mh_mode_type = ldl_p(header+i+32);
687 uint32_t mh_width = ldl_p(header+i+36);
688 uint32_t mh_height = ldl_p(header+i+40);
689 uint32_t mh_depth = ldl_p(header+i+44); */
690
691 #ifdef DEBUG_MULTIBOOT
692 fprintf(stderr, "multiboot: mh_header_addr = %#x\n", mh_header_addr);
693 fprintf(stderr, "multiboot: mh_load_addr = %#x\n", mh_load_addr);
694 fprintf(stderr, "multiboot: mh_load_end_addr = %#x\n", mh_load_end_addr);
695 fprintf(stderr, "multiboot: mh_bss_end_addr = %#x\n", mh_bss_end_addr);
696 #endif
697
698 fseek(f, mb_kernel_text_offset, SEEK_SET);
699
700 #ifdef DEBUG_MULTIBOOT
701 fprintf(stderr, "qemu: loading multiboot kernel (%#x bytes) at %#x\n",
702 mb_kernel_size, mh_load_addr);
703 #endif
704
705 if (!fread_targphys_ok(mh_load_addr, mb_kernel_size, f)) {
706 fprintf(stderr, "qemu: read error on multiboot kernel '%s' (%#x)\n",
707 kernel_filename, mb_kernel_size);
708 exit(1);
709 }
710 fclose(f);
711 }
712
713 /* blob size is only the kernel for now */
714 mb_mod_end = mh_load_addr + mb_kernel_size;
715
716 /* load modules */
717 stl_phys(mb_bootinfo + 20, 0x0); /* mods_count */
718 if (initrd_filename) {
719 uint32_t mb_mod_info = mb_bootinfo + 0x100;
720 uint32_t mb_mod_cmdline = mb_bootinfo + 0x300;
721 uint32_t mb_mod_start = mh_load_addr;
722 uint32_t mb_mod_length = mb_kernel_size;
723 char *next_initrd;
724 char *next_space;
725 int mb_mod_count = 0;
726
727 do {
728 next_initrd = strchr(initrd_filename, ',');
729 if (next_initrd)
730 *next_initrd = '\0';
731 /* if a space comes after the module filename, treat everything
732 after that as parameters */
733 cpu_physical_memory_write(mb_mod_cmdline, (uint8_t*)initrd_filename,
734 strlen(initrd_filename) + 1);
735 stl_phys(mb_mod_info + 8, mb_mod_cmdline); /* string */
736 mb_mod_cmdline += strlen(initrd_filename) + 1;
737 if ((next_space = strchr(initrd_filename, ' ')))
738 *next_space = '\0';
739 #ifdef DEBUG_MULTIBOOT
740 printf("multiboot loading module: %s\n", initrd_filename);
741 #endif
742 f = fopen(initrd_filename, "rb");
743 if (f) {
744 mb_mod_start = (mb_mod_start + mb_mod_length + (TARGET_PAGE_SIZE - 1))
745 & (TARGET_PAGE_MASK);
746 mb_mod_length = get_file_size(f);
747 mb_mod_end = mb_mod_start + mb_mod_length;
748
749 if (!fread_targphys_ok(mb_mod_start, mb_mod_length, f)) {
750 fprintf(stderr, "qemu: read error on multiboot module '%s' (%#x)\n",
751 initrd_filename, mb_mod_length);
752 exit(1);
753 }
754
755 mb_mod_count++;
756 stl_phys(mb_mod_info + 0, mb_mod_start);
757 stl_phys(mb_mod_info + 4, mb_mod_start + mb_mod_length);
758 #ifdef DEBUG_MULTIBOOT
759 printf("mod_start: %#x\nmod_end: %#x\n", mb_mod_start,
760 mb_mod_start + mb_mod_length);
761 #endif
762 stl_phys(mb_mod_info + 12, 0x0); /* reserved */
763 }
764 initrd_filename = next_initrd+1;
765 mb_mod_info += 16;
766 } while (next_initrd);
767 stl_phys(mb_bootinfo + 20, mb_mod_count); /* mods_count */
768 stl_phys(mb_bootinfo + 24, mb_bootinfo + 0x100); /* mods_addr */
769 }
770
771 /* Make sure we're getting kernel + modules back after reset */
772 option_rom_setup_reset(mh_load_addr, mb_mod_end - mh_load_addr);
773
774 /* Commandline support */
775 stl_phys(mb_bootinfo + 16, mb_cmdline);
776 t = strlen(kernel_filename);
777 cpu_physical_memory_write(mb_cmdline, (uint8_t*)kernel_filename, t);
778 mb_cmdline += t;
779 stb_phys(mb_cmdline++, ' ');
780 t = strlen(kernel_cmdline) + 1;
781 cpu_physical_memory_write(mb_cmdline, (uint8_t*)kernel_cmdline, t);
782
783 /* the kernel is where we want it to be now */
784
785 #define MULTIBOOT_FLAGS_MEMORY (1 << 0)
786 #define MULTIBOOT_FLAGS_BOOT_DEVICE (1 << 1)
787 #define MULTIBOOT_FLAGS_CMDLINE (1 << 2)
788 #define MULTIBOOT_FLAGS_MODULES (1 << 3)
789 #define MULTIBOOT_FLAGS_MMAP (1 << 6)
790 stl_phys(mb_bootinfo, MULTIBOOT_FLAGS_MEMORY
791 | MULTIBOOT_FLAGS_BOOT_DEVICE
792 | MULTIBOOT_FLAGS_CMDLINE
793 | MULTIBOOT_FLAGS_MODULES
794 | MULTIBOOT_FLAGS_MMAP);
795 stl_phys(mb_bootinfo + 4, 640); /* mem_lower */
796 stl_phys(mb_bootinfo + 8, ram_size / 1024); /* mem_upper */
797 stl_phys(mb_bootinfo + 12, 0x8001ffff); /* XXX: use the -boot switch? */
798 stl_phys(mb_bootinfo + 48, mmap_addr); /* mmap_addr */
799
800 #ifdef DEBUG_MULTIBOOT
801 fprintf(stderr, "multiboot: mh_entry_addr = %#x\n", mh_entry_addr);
802 #endif
803
804 /* Pass variables to option rom */
805 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, mh_entry_addr);
806 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, mb_bootinfo);
807 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, mmap_addr);
808
809 /* Make sure we're getting the config space back after reset */
810 option_rom_setup_reset(mb_bootinfo, 0x500);
811
812 option_rom[nb_option_roms] = "multiboot.bin";
813 nb_option_roms++;
814
815 return 1; /* yes, we are multiboot */
816 }
817
818 static void load_linux(void *fw_cfg,
819 target_phys_addr_t option_rom,
820 const char *kernel_filename,
821 const char *initrd_filename,
822 const char *kernel_cmdline,
823 target_phys_addr_t max_ram_size)
824 {
825 uint16_t protocol;
826 uint32_t gpr[8];
827 uint16_t seg[6];
828 uint16_t real_seg;
829 int setup_size, kernel_size, initrd_size = 0, cmdline_size;
830 uint32_t initrd_max;
831 uint8_t header[8192];
832 target_phys_addr_t real_addr, prot_addr, cmdline_addr, initrd_addr = 0;
833 FILE *f, *fi;
834 char *vmode;
835
836 /* Align to 16 bytes as a paranoia measure */
837 cmdline_size = (strlen(kernel_cmdline)+16) & ~15;
838
839 /* load the kernel header */
840 f = fopen(kernel_filename, "rb");
841 if (!f || !(kernel_size = get_file_size(f)) ||
842 fread(header, 1, MIN(ARRAY_SIZE(header), kernel_size), f) !=
843 MIN(ARRAY_SIZE(header), kernel_size)) {
844 fprintf(stderr, "qemu: could not load kernel '%s': %s\n",
845 kernel_filename, strerror(errno));
846 exit(1);
847 }
848
849 /* kernel protocol version */
850 #if 0
851 fprintf(stderr, "header magic: %#x\n", ldl_p(header+0x202));
852 #endif
853 if (ldl_p(header+0x202) == 0x53726448)
854 protocol = lduw_p(header+0x206);
855 else {
856 /* This looks like a multiboot kernel. If it is, let's stop
857 treating it like a Linux kernel. */
858 if (load_multiboot(fw_cfg, f, kernel_filename,
859 initrd_filename, kernel_cmdline, header))
860 return;
861 protocol = 0;
862 }
863
864 if (protocol < 0x200 || !(header[0x211] & 0x01)) {
865 /* Low kernel */
866 real_addr = 0x90000;
867 cmdline_addr = 0x9a000 - cmdline_size;
868 prot_addr = 0x10000;
869 } else if (protocol < 0x202) {
870 /* High but ancient kernel */
871 real_addr = 0x90000;
872 cmdline_addr = 0x9a000 - cmdline_size;
873 prot_addr = 0x100000;
874 } else {
875 /* High and recent kernel */
876 real_addr = 0x10000;
877 cmdline_addr = 0x20000;
878 prot_addr = 0x100000;
879 }
880
881 #if 0
882 fprintf(stderr,
883 "qemu: real_addr = 0x" TARGET_FMT_plx "\n"
884 "qemu: cmdline_addr = 0x" TARGET_FMT_plx "\n"
885 "qemu: prot_addr = 0x" TARGET_FMT_plx "\n",
886 real_addr,
887 cmdline_addr,
888 prot_addr);
889 #endif
890
891 /* highest address for loading the initrd */
892 if (protocol >= 0x203)
893 initrd_max = ldl_p(header+0x22c);
894 else
895 initrd_max = 0x37ffffff;
896
897 if (initrd_max >= max_ram_size-ACPI_DATA_SIZE)
898 initrd_max = max_ram_size-ACPI_DATA_SIZE-1;
899
900 /* kernel command line */
901 pstrcpy_targphys(cmdline_addr, 4096, kernel_cmdline);
902
903 if (protocol >= 0x202) {
904 stl_p(header+0x228, cmdline_addr);
905 } else {
906 stw_p(header+0x20, 0xA33F);
907 stw_p(header+0x22, cmdline_addr-real_addr);
908 }
909
910 /* handle vga= parameter */
911 vmode = strstr(kernel_cmdline, "vga=");
912 if (vmode) {
913 unsigned int video_mode;
914 /* skip "vga=" */
915 vmode += 4;
916 if (!strncmp(vmode, "normal", 6)) {
917 video_mode = 0xffff;
918 } else if (!strncmp(vmode, "ext", 3)) {
919 video_mode = 0xfffe;
920 } else if (!strncmp(vmode, "ask", 3)) {
921 video_mode = 0xfffd;
922 } else {
923 video_mode = strtol(vmode, NULL, 0);
924 }
925 stw_p(header+0x1fa, video_mode);
926 }
927
928 /* loader type */
929 /* High nybble = B reserved for Qemu; low nybble is revision number.
930 If this code is substantially changed, you may want to consider
931 incrementing the revision. */
932 if (protocol >= 0x200)
933 header[0x210] = 0xB0;
934
935 /* heap */
936 if (protocol >= 0x201) {
937 header[0x211] |= 0x80; /* CAN_USE_HEAP */
938 stw_p(header+0x224, cmdline_addr-real_addr-0x200);
939 }
940
941 /* load initrd */
942 if (initrd_filename) {
943 if (protocol < 0x200) {
944 fprintf(stderr, "qemu: linux kernel too old to load a ram disk\n");
945 exit(1);
946 }
947
948 fi = fopen(initrd_filename, "rb");
949 if (!fi) {
950 fprintf(stderr, "qemu: could not load initial ram disk '%s': %s\n",
951 initrd_filename, strerror(errno));
952 exit(1);
953 }
954
955 initrd_size = get_file_size(fi);
956 initrd_addr = (initrd_max-initrd_size) & ~4095;
957
958 if (!fread_targphys_ok(initrd_addr, initrd_size, fi)) {
959 fprintf(stderr, "qemu: read error on initial ram disk '%s': %s\n",
960 initrd_filename, strerror(errno));
961 exit(1);
962 }
963 fclose(fi);
964
965 stl_p(header+0x218, initrd_addr);
966 stl_p(header+0x21c, initrd_size);
967 }
968
969 /* store the finalized header and load the rest of the kernel */
970 cpu_physical_memory_write(real_addr, header, ARRAY_SIZE(header));
971
972 setup_size = header[0x1f1];
973 if (setup_size == 0)
974 setup_size = 4;
975
976 setup_size = (setup_size+1)*512;
977 /* Size of protected-mode code */
978 kernel_size -= (setup_size > ARRAY_SIZE(header)) ? setup_size : ARRAY_SIZE(header);
979
980 /* In case we have read too much already, copy that over */
981 if (setup_size < ARRAY_SIZE(header)) {
982 cpu_physical_memory_write(prot_addr, header + setup_size, ARRAY_SIZE(header) - setup_size);
983 prot_addr += (ARRAY_SIZE(header) - setup_size);
984 setup_size = ARRAY_SIZE(header);
985 }
986
987 if (!fread_targphys_ok(real_addr + ARRAY_SIZE(header),
988 setup_size - ARRAY_SIZE(header), f) ||
989 !fread_targphys_ok(prot_addr, kernel_size, f)) {
990 fprintf(stderr, "qemu: read error on kernel '%s'\n",
991 kernel_filename);
992 exit(1);
993 }
994 fclose(f);
995
996 /* generate bootsector to set up the initial register state */
997 real_seg = real_addr >> 4;
998 seg[0] = seg[2] = seg[3] = seg[4] = seg[4] = real_seg;
999 seg[1] = real_seg+0x20; /* CS */
1000 memset(gpr, 0, sizeof gpr);
1001 gpr[4] = cmdline_addr-real_addr-16; /* SP (-16 is paranoia) */
1002
1003 option_rom_setup_reset(real_addr, setup_size);
1004 option_rom_setup_reset(prot_addr, kernel_size);
1005 option_rom_setup_reset(cmdline_addr, cmdline_size);
1006 if (initrd_filename)
1007 option_rom_setup_reset(initrd_addr, initrd_size);
1008
1009 generate_bootsect(option_rom, gpr, seg, 0);
1010 }
1011
1012 static const int ide_iobase[2] = { 0x1f0, 0x170 };
1013 static const int ide_iobase2[2] = { 0x3f6, 0x376 };
1014 static const int ide_irq[2] = { 14, 15 };
1015
1016 #define NE2000_NB_MAX 6
1017
1018 static int ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360, 0x280, 0x380 };
1019 static int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 };
1020
1021 static int serial_io[MAX_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
1022 static int serial_irq[MAX_SERIAL_PORTS] = { 4, 3, 4, 3 };
1023
1024 static int parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc };
1025 static int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 };
1026
1027 #ifdef HAS_AUDIO
1028 static void audio_init (PCIBus *pci_bus, qemu_irq *pic)
1029 {
1030 struct soundhw *c;
1031
1032 for (c = soundhw; c->name; ++c) {
1033 if (c->enabled) {
1034 if (c->isa) {
1035 c->init.init_isa(pic);
1036 } else {
1037 if (pci_bus) {
1038 c->init.init_pci(pci_bus);
1039 }
1040 }
1041 }
1042 }
1043 }
1044 #endif
1045
1046 static void pc_init_ne2k_isa(NICInfo *nd, qemu_irq *pic)
1047 {
1048 static int nb_ne2k = 0;
1049
1050 if (nb_ne2k == NE2000_NB_MAX)
1051 return;
1052 isa_ne2000_init(ne2000_io[nb_ne2k], pic[ne2000_irq[nb_ne2k]], nd);
1053 nb_ne2k++;
1054 }
1055
1056 static int load_option_rom(const char *oprom, target_phys_addr_t start,
1057 target_phys_addr_t end)
1058 {
1059 int size;
1060 char *filename;
1061
1062 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, oprom);
1063 if (filename) {
1064 size = get_image_size(filename);
1065 if (size > 0 && start + size > end) {
1066 fprintf(stderr, "Not enough space to load option rom '%s'\n",
1067 oprom);
1068 exit(1);
1069 }
1070 size = load_image_targphys(filename, start, end - start);
1071 qemu_free(filename);
1072 } else {
1073 size = -1;
1074 }
1075 if (size < 0) {
1076 fprintf(stderr, "Could not load option rom '%s'\n", oprom);
1077 exit(1);
1078 }
1079 /* Round up optiom rom size to the next 2k boundary */
1080 size = (size + 2047) & ~2047;
1081 option_rom_setup_reset(start, size);
1082 return size;
1083 }
1084
1085 int cpu_is_bsp(CPUState *env)
1086 {
1087 return env->cpuid_apic_id == 0;
1088 }
1089
1090 CPUState *pc_new_cpu(const char *cpu_model)
1091 {
1092 CPUState *env = cpu_init(cpu_model);
1093 if (!env) {
1094 fprintf(stderr, "Unable to find x86 CPU definition\n");
1095 exit(1);
1096 }
1097 if ((env->cpuid_features & CPUID_APIC) || smp_cpus > 1) {
1098 env->cpuid_apic_id = env->cpu_index;
1099 /* APIC reset callback resets cpu */
1100 apic_init(env);
1101 } else {
1102 qemu_register_reset((QEMUResetHandler*)cpu_reset, env);
1103 }
1104
1105 /* kvm needs this to run after the apic is initialized. Otherwise,
1106 * it can access invalid state and crash.
1107 */
1108 qemu_init_vcpu(env);
1109 return env;
1110 }
1111
1112 /* PC hardware initialisation */
1113 static void pc_init1(ram_addr_t ram_size,
1114 const char *boot_device,
1115 const char *kernel_filename,
1116 const char *kernel_cmdline,
1117 const char *initrd_filename,
1118 const char *cpu_model,
1119 int pci_enabled)
1120 {
1121 char *filename;
1122 int ret, linux_boot, i;
1123 ram_addr_t ram_addr, bios_offset, option_rom_offset;
1124 ram_addr_t below_4g_mem_size, above_4g_mem_size = 0;
1125 int bios_size, isa_bios_size, oprom_area_size;
1126 int pci_option_rom_offset = 0;
1127 PCIBus *pci_bus;
1128 PCIDevice *pci_dev;
1129 int piix3_devfn = -1;
1130 CPUState *env;
1131 qemu_irq *cpu_irq;
1132 qemu_irq *i8259;
1133 int index;
1134 BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
1135 BlockDriverState *fd[MAX_FD];
1136 int using_vga = cirrus_vga_enabled || std_vga_enabled || vmsvga_enabled;
1137 void *fw_cfg;
1138
1139 if (ram_size >= 0xe0000000 ) {
1140 above_4g_mem_size = ram_size - 0xe0000000;
1141 below_4g_mem_size = 0xe0000000;
1142 } else {
1143 below_4g_mem_size = ram_size;
1144 }
1145
1146 linux_boot = (kernel_filename != NULL);
1147
1148 /* init CPUs */
1149 if (cpu_model == NULL) {
1150 #ifdef TARGET_X86_64
1151 cpu_model = "qemu64";
1152 #else
1153 cpu_model = "qemu32";
1154 #endif
1155 }
1156
1157 if (kvm_enabled()) {
1158 kvm_set_boot_cpu_id(0);
1159 }
1160 for (i = 0; i < smp_cpus; i++) {
1161 env = pc_new_cpu(cpu_model);
1162 }
1163
1164 vmport_init();
1165
1166 /* allocate RAM */
1167 ram_addr = qemu_ram_alloc(below_4g_mem_size);
1168 cpu_register_physical_memory(0, 0xa0000, ram_addr);
1169 cpu_register_physical_memory(0x100000,
1170 below_4g_mem_size - 0x100000,
1171 ram_addr + 0x100000);
1172
1173 /* above 4giga memory allocation */
1174 if (above_4g_mem_size > 0) {
1175 #if TARGET_PHYS_ADDR_BITS == 32
1176 hw_error("To much RAM for 32-bit physical address");
1177 #else
1178 ram_addr = qemu_ram_alloc(above_4g_mem_size);
1179 cpu_register_physical_memory(0x100000000ULL,
1180 above_4g_mem_size,
1181 ram_addr);
1182 #endif
1183 }
1184
1185
1186 /* BIOS load */
1187 if (bios_name == NULL)
1188 bios_name = BIOS_FILENAME;
1189 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
1190 if (filename) {
1191 bios_size = get_image_size(filename);
1192 } else {
1193 bios_size = -1;
1194 }
1195 if (bios_size <= 0 ||
1196 (bios_size % 65536) != 0) {
1197 goto bios_error;
1198 }
1199 bios_offset = qemu_ram_alloc(bios_size);
1200 ret = load_image(filename, qemu_get_ram_ptr(bios_offset));
1201 if (ret != bios_size) {
1202 bios_error:
1203 fprintf(stderr, "qemu: could not load PC BIOS '%s'\n", bios_name);
1204 exit(1);
1205 }
1206 if (filename) {
1207 qemu_free(filename);
1208 }
1209 /* map the last 128KB of the BIOS in ISA space */
1210 isa_bios_size = bios_size;
1211 if (isa_bios_size > (128 * 1024))
1212 isa_bios_size = 128 * 1024;
1213 cpu_register_physical_memory(0xd0000, (192 * 1024) - isa_bios_size,
1214 IO_MEM_UNASSIGNED);
1215 /* kvm tpr optimization needs the bios accessible for write, at least to qemu itself */
1216 cpu_register_physical_memory(0x100000 - isa_bios_size,
1217 isa_bios_size,
1218 (bios_offset + bios_size - isa_bios_size) /* | IO_MEM_ROM */);
1219
1220 if (extboot_drive != -1) {
1221 option_rom[nb_option_roms++] = qemu_strdup(EXTBOOT_FILENAME);
1222 }
1223
1224 option_rom_offset = qemu_ram_alloc(0x20000);
1225 oprom_area_size = 0;
1226 cpu_register_physical_memory(0xc0000, 0x20000, option_rom_offset);
1227
1228 if (using_vga) {
1229 const char *vgabios_filename;
1230 /* VGA BIOS load */
1231 if (cirrus_vga_enabled) {
1232 vgabios_filename = VGABIOS_CIRRUS_FILENAME;
1233 } else {
1234 vgabios_filename = VGABIOS_FILENAME;
1235 }
1236 oprom_area_size = load_option_rom(vgabios_filename, 0xc0000, 0xe0000);
1237 pci_option_rom_offset = oprom_area_size;
1238 }
1239 /* Although video roms can grow larger than 0x8000, the area between
1240 * 0xc0000 - 0xc8000 is reserved for them. It means we won't be looking
1241 * for any other kind of option rom inside this area */
1242 if (oprom_area_size < 0x8000)
1243 oprom_area_size = 0x8000;
1244
1245 /* map all the bios at the top of memory */
1246 cpu_register_physical_memory((uint32_t)(-bios_size),
1247 bios_size, bios_offset | IO_MEM_ROM);
1248
1249 fw_cfg = bochs_bios_init();
1250
1251 if (linux_boot) {
1252 load_linux(fw_cfg, 0xc0000 + oprom_area_size,
1253 kernel_filename, initrd_filename, kernel_cmdline, below_4g_mem_size);
1254 oprom_area_size += 2048;
1255 }
1256
1257 for (i = 0; i < nb_option_roms; i++) {
1258 oprom_area_size += load_option_rom(option_rom[i], 0xc0000 + oprom_area_size,
1259 0xe0000);
1260 }
1261
1262 for (i = 0; i < nb_nics; i++) {
1263 char nic_oprom[1024];
1264 const char *model = nd_table[i].model;
1265
1266 if (!nd_table[i].bootable)
1267 continue;
1268
1269 if (model == NULL)
1270 model = "rtl8139";
1271 snprintf(nic_oprom, sizeof(nic_oprom), "pxe-%s.bin", model);
1272
1273 oprom_area_size += load_option_rom(nic_oprom, 0xc0000 + oprom_area_size,
1274 0xe0000);
1275 }
1276
1277 cpu_irq = qemu_allocate_irqs(pic_irq_request, NULL, 1);
1278 #ifdef KVM_CAP_IRQCHIP
1279 if (kvm_enabled() && qemu_kvm_irqchip_in_kernel()) {
1280 i8259 = kvm_i8259_init(cpu_irq[0]);
1281 } else
1282 #endif
1283 i8259 = i8259_init(cpu_irq[0]);
1284 ferr_irq = i8259[13];
1285
1286 if (pci_enabled) {
1287 pci_bus = i440fx_init(&i440fx_state, i8259);
1288 piix3_devfn = piix3_init(pci_bus, -1);
1289 } else {
1290 pci_bus = NULL;
1291 }
1292
1293 /* init basic PC hardware */
1294 register_ioport_write(0x80, 1, 1, ioport80_write, NULL);
1295
1296 register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL);
1297
1298 if (cirrus_vga_enabled) {
1299 if (pci_enabled) {
1300 pci_cirrus_vga_init(pci_bus);
1301 } else {
1302 isa_cirrus_vga_init();
1303 }
1304 } else if (vmsvga_enabled) {
1305 if (pci_enabled)
1306 pci_vmsvga_init(pci_bus);
1307 else
1308 fprintf(stderr, "%s: vmware_vga: no PCI bus\n", __FUNCTION__);
1309 } else if (std_vga_enabled) {
1310 if (pci_enabled) {
1311 pci_vga_init(pci_bus, 0, 0);
1312 } else {
1313 isa_vga_init();
1314 }
1315 }
1316
1317 rtc_state = rtc_init(0x70, i8259[8], 2000);
1318
1319 qemu_register_boot_set(pc_boot_set, rtc_state);
1320
1321 register_ioport_read(0x92, 1, 1, ioport92_read, NULL);
1322 register_ioport_write(0x92, 1, 1, ioport92_write, NULL);
1323
1324 if (pci_enabled) {
1325 ioapic = ioapic_init();
1326 }
1327 #ifdef USE_KVM_PIT
1328 if (kvm_enabled() && qemu_kvm_pit_in_kernel())
1329 pit = kvm_pit_init(0x40, i8259[0]);
1330 else
1331 #endif
1332 pit = pit_init(0x40, i8259[0]);
1333 pcspk_init(pit);
1334 if (!no_hpet) {
1335 hpet_init(i8259);
1336 }
1337 if (pci_enabled) {
1338 pic_set_alt_irq_func(isa_pic, ioapic_set_irq, ioapic);
1339 }
1340
1341 for(i = 0; i < MAX_SERIAL_PORTS; i++) {
1342 if (serial_hds[i]) {
1343 serial_init(serial_io[i], i8259[serial_irq[i]], 115200,
1344 serial_hds[i]);
1345 }
1346 }
1347
1348 for(i = 0; i < MAX_PARALLEL_PORTS; i++) {
1349 if (parallel_hds[i]) {
1350 parallel_init(parallel_io[i], i8259[parallel_irq[i]],
1351 parallel_hds[i]);
1352 }
1353 }
1354
1355 watchdog_pc_init(pci_bus);
1356
1357 for(i = 0; i < nb_nics; i++) {
1358 NICInfo *nd = &nd_table[i];
1359
1360 if (!pci_enabled || (nd->model && strcmp(nd->model, "ne2k_isa") == 0))
1361 pc_init_ne2k_isa(nd, i8259);
1362 else
1363 pci_nic_init_nofail(nd, "rtl8139", NULL);
1364 }
1365
1366 piix4_acpi_system_hot_add_init(cpu_model);
1367
1368 if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
1369 fprintf(stderr, "qemu: too many IDE bus\n");
1370 exit(1);
1371 }
1372
1373 for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
1374 index = drive_get_index(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
1375 if (index != -1)
1376 hd[i] = drives_table[index].bdrv;
1377 else
1378 hd[i] = NULL;
1379 }
1380
1381 if (pci_enabled) {
1382 pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1, i8259);
1383 } else {
1384 for(i = 0; i < MAX_IDE_BUS; i++) {
1385 isa_ide_init(ide_iobase[i], ide_iobase2[i], i8259[ide_irq[i]],
1386 hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]);
1387 }
1388 }
1389
1390 i8042_init(i8259[1], i8259[12], 0x60);
1391 DMA_init(0);
1392 #ifdef HAS_AUDIO
1393 audio_init(pci_enabled ? pci_bus : NULL, i8259);
1394 #endif
1395
1396 for(i = 0; i < MAX_FD; i++) {
1397 index = drive_get_index(IF_FLOPPY, 0, i);
1398 if (index != -1)
1399 fd[i] = drives_table[index].bdrv;
1400 else
1401 fd[i] = NULL;
1402 }
1403 floppy_controller = fdctrl_init(i8259[6], 2, 0, 0x3f0, fd);
1404
1405 cmos_init(below_4g_mem_size, above_4g_mem_size, boot_device, hd);
1406
1407 if (pci_enabled && usb_enabled) {
1408 usb_uhci_piix3_init(pci_bus, piix3_devfn + 2);
1409 }
1410
1411 if (pci_enabled && acpi_enabled) {
1412 uint8_t *eeprom_buf = qemu_mallocz(8 * 256); /* XXX: make this persistent */
1413 i2c_bus *smbus;
1414
1415 /* TODO: Populate SPD eeprom data. */
1416 smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100, i8259[9]);
1417 for (i = 0; i < 8; i++) {
1418 DeviceState *eeprom;
1419 eeprom = qdev_create((BusState *)smbus, "smbus-eeprom");
1420 qdev_prop_set_uint32(eeprom, "address", 0x50 + i);
1421 qdev_prop_set_ptr(eeprom, "data", eeprom_buf + (i * 256));
1422 qdev_init(eeprom);
1423 }
1424 }
1425
1426 if (i440fx_state) {
1427 i440fx_init_memory_mappings(i440fx_state);
1428 }
1429
1430 if (pci_enabled) {
1431 int max_bus;
1432 int bus;
1433
1434 max_bus = drive_get_max_bus(IF_SCSI);
1435 for (bus = 0; bus <= max_bus; bus++) {
1436 pci_create_simple(pci_bus, -1, "lsi53c895a");
1437 }
1438 }
1439
1440 /* Add virtio block devices */
1441 if (pci_enabled) {
1442 int index;
1443 int unit_id = 0;
1444
1445 while ((index = drive_get_index(IF_VIRTIO, 0, unit_id)) != -1) {
1446 pci_dev = pci_create("virtio-blk-pci",
1447 drives_table[index].devaddr);
1448 qdev_init(&pci_dev->qdev);
1449 unit_id++;
1450 }
1451 }
1452
1453 if (extboot_drive != -1) {
1454 DriveInfo *info = &drives_table[extboot_drive];
1455 int cyls, heads, secs;
1456
1457 if (info->type != IF_IDE && info->type != IF_VIRTIO) {
1458 bdrv_guess_geometry(info->bdrv, &cyls, &heads, &secs);
1459 bdrv_set_geometry_hint(info->bdrv, cyls, heads, secs);
1460 }
1461
1462 extboot_init(info->bdrv, 1);
1463 }
1464
1465 /* Add virtio balloon device */
1466 if (pci_enabled && virtio_balloon) {
1467 pci_dev = pci_create("virtio-balloon-pci", virtio_balloon_devaddr);
1468 qdev_init(&pci_dev->qdev);
1469 }
1470
1471 /* Add virtio console devices */
1472 if (pci_enabled) {
1473 for(i = 0; i < MAX_VIRTIO_CONSOLES; i++) {
1474 if (virtcon_hds[i]) {
1475 pci_create_simple(pci_bus, -1, "virtio-console-pci");
1476 }
1477 }
1478 }
1479
1480 #ifdef USE_KVM_DEVICE_ASSIGNMENT
1481 if (kvm_enabled()) {
1482 add_assigned_devices(pci_bus, assigned_devices, assigned_devices_index);
1483 assigned_dev_load_option_roms(pci_option_rom_offset);
1484 }
1485 #endif /* USE_KVM_DEVICE_ASSIGNMENT */
1486 }
1487
1488 static void pc_init_pci(ram_addr_t ram_size,
1489 const char *boot_device,
1490 const char *kernel_filename,
1491 const char *kernel_cmdline,
1492 const char *initrd_filename,
1493 const char *cpu_model)
1494 {
1495 pc_init1(ram_size, boot_device,
1496 kernel_filename, kernel_cmdline,
1497 initrd_filename, cpu_model, 1);
1498 }
1499
1500 static void pc_init_isa(ram_addr_t ram_size,
1501 const char *boot_device,
1502 const char *kernel_filename,
1503 const char *kernel_cmdline,
1504 const char *initrd_filename,
1505 const char *cpu_model)
1506 {
1507 pc_init1(ram_size, boot_device,
1508 kernel_filename, kernel_cmdline,
1509 initrd_filename, cpu_model, 0);
1510 }
1511
1512 /* set CMOS shutdown status register (index 0xF) as S3_resume(0xFE)
1513 BIOS will read it and start S3 resume at POST Entry */
1514 void cmos_set_s3_resume(void)
1515 {
1516 if (rtc_state)
1517 rtc_set_memory(rtc_state, 0xF, 0xFE);
1518 }
1519
1520 static QEMUMachine pc_machine = {
1521 .name = "pc-0.11",
1522 .alias = "pc",
1523 .desc = "Standard PC",
1524 .init = pc_init_pci,
1525 .max_cpus = 255,
1526 .is_default = 1,
1527 };
1528
1529 static QEMUMachine pc_machine_v0_10 = {
1530 .name = "pc-0.10",
1531 .desc = "Standard PC, qemu 0.10",
1532 .init = pc_init_pci,
1533 .max_cpus = 255,
1534 .compat_props = (CompatProperty[]) {
1535 {
1536 .driver = "virtio-blk-pci",
1537 .property = "class",
1538 .value = stringify(PCI_CLASS_STORAGE_OTHER),
1539 },{
1540 .driver = "virtio-console-pci",
1541 .property = "class",
1542 .value = stringify(PCI_CLASS_DISPLAY_OTHER),
1543 },{
1544 .driver = "virtio-net-pci",
1545 .property = "vectors",
1546 .value = stringify(0),
1547 },
1548 { /* end of list */ }
1549 },
1550 };
1551
1552 static QEMUMachine isapc_machine = {
1553 .name = "isapc",
1554 .desc = "ISA-only PC",
1555 .init = pc_init_isa,
1556 .max_cpus = 1,
1557 };
1558
1559 static void pc_machine_init(void)
1560 {
1561 qemu_register_machine(&pc_machine);
1562 qemu_register_machine(&pc_machine_v0_10);
1563 qemu_register_machine(&isapc_machine);
1564 }
1565
1566 machine_init(pc_machine_init);
Patches shipped by Fedora