Flush icache after dma operations for ia64
[qemu-kvm/fedora.git] / hw / pc.c
blob66f46358a398eff41587f98e973e4644cc8a16b9
1 /*
2 * QEMU PC System Emulator
4 * Copyright (c) 2003-2004 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
24 #include "hw.h"
25 #include "pc.h"
26 #include "fdc.h"
27 #include "pci.h"
28 #include "block.h"
29 #include "sysemu.h"
30 #include "audio/audio.h"
31 #include "net.h"
32 #include "smbus.h"
33 #include "boards.h"
34 #include "monitor.h"
35 #include "fw_cfg.h"
36 #include "hpet_emul.h"
37 #include "watchdog.h"
38 #include "smbios.h"
39 #include "device-assignment.h"
41 #include "qemu-kvm.h"
43 /* output Bochs bios info messages */
44 //#define DEBUG_BIOS
46 #define BIOS_FILENAME "bios.bin"
47 #define VGABIOS_FILENAME "vgabios.bin"
48 #define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin"
49 #define EXTBOOT_FILENAME "extboot.bin"
51 #define PC_MAX_BIOS_SIZE (4 * 1024 * 1024)
53 /* Leave a chunk of memory at the top of RAM for the BIOS ACPI tables. */
54 #define ACPI_DATA_SIZE 0x10000
55 #define BIOS_CFG_IOPORT 0x510
56 #define FW_CFG_ACPI_TABLES (FW_CFG_ARCH_LOCAL + 0)
57 #define FW_CFG_SMBIOS_ENTRIES (FW_CFG_ARCH_LOCAL + 1)
59 #define MAX_IDE_BUS 2
61 static fdctrl_t *floppy_controller;
62 static RTCState *rtc_state;
63 static PITState *pit;
64 static IOAPICState *ioapic;
65 static PCIDevice *i440fx_state;
67 typedef struct rom_reset_data {
68 uint8_t *data;
69 target_phys_addr_t addr;
70 unsigned size;
71 } RomResetData;
73 static void option_rom_reset(void *_rrd)
75 RomResetData *rrd = _rrd;
77 cpu_physical_memory_write_rom(rrd->addr, rrd->data, rrd->size);
80 static void option_rom_setup_reset(target_phys_addr_t addr, unsigned size)
82 RomResetData *rrd = qemu_malloc(sizeof *rrd);
84 rrd->data = qemu_malloc(size);
85 cpu_physical_memory_read(addr, rrd->data, size);
86 rrd->addr = addr;
87 rrd->size = size;
88 qemu_register_reset(option_rom_reset, 0, rrd);
91 static void ioport80_write(void *opaque, uint32_t addr, uint32_t data)
95 /* MSDOS compatibility mode FPU exception support */
96 static qemu_irq ferr_irq;
97 /* XXX: add IGNNE support */
98 void cpu_set_ferr(CPUX86State *s)
100 qemu_irq_raise(ferr_irq);
103 static void ioportF0_write(void *opaque, uint32_t addr, uint32_t data)
105 qemu_irq_lower(ferr_irq);
108 /* TSC handling */
109 uint64_t cpu_get_tsc(CPUX86State *env)
111 /* Note: when using kqemu, it is more logical to return the host TSC
112 because kqemu does not trap the RDTSC instruction for
113 performance reasons */
114 #ifdef CONFIG_KQEMU
115 if (env->kqemu_enabled) {
116 return cpu_get_real_ticks();
117 } else
118 #endif
120 return cpu_get_ticks();
124 /* SMM support */
125 void cpu_smm_update(CPUState *env)
127 if (i440fx_state && env == first_cpu)
128 i440fx_set_smm(i440fx_state, (env->hflags >> HF_SMM_SHIFT) & 1);
132 /* IRQ handling */
133 int cpu_get_pic_interrupt(CPUState *env)
135 int intno;
137 intno = apic_get_interrupt(env);
138 if (intno >= 0) {
139 /* set irq request if a PIC irq is still pending */
140 /* XXX: improve that */
141 pic_update_irq(isa_pic);
142 return intno;
144 /* read the irq from the PIC */
145 if (!apic_accept_pic_intr(env))
146 return -1;
148 intno = pic_read_irq(isa_pic);
149 return intno;
152 static void pic_irq_request(void *opaque, int irq, int level)
154 CPUState *env = first_cpu;
156 if (env->apic_state) {
157 while (env) {
158 if (apic_accept_pic_intr(env))
159 apic_deliver_pic_intr(env, level);
160 env = env->next_cpu;
162 } else {
163 if (level)
164 cpu_interrupt(env, CPU_INTERRUPT_HARD);
165 else
166 cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
170 /* PC cmos mappings */
172 #define REG_EQUIPMENT_BYTE 0x14
174 static int cmos_get_fd_drive_type(int fd0)
176 int val;
178 switch (fd0) {
179 case 0:
180 /* 1.44 Mb 3"5 drive */
181 val = 4;
182 break;
183 case 1:
184 /* 2.88 Mb 3"5 drive */
185 val = 5;
186 break;
187 case 2:
188 /* 1.2 Mb 5"5 drive */
189 val = 2;
190 break;
191 default:
192 val = 0;
193 break;
195 return val;
198 static void cmos_init_hd(int type_ofs, int info_ofs, BlockDriverState *hd)
200 RTCState *s = rtc_state;
201 int cylinders, heads, sectors;
202 bdrv_get_geometry_hint(hd, &cylinders, &heads, &sectors);
203 rtc_set_memory(s, type_ofs, 47);
204 rtc_set_memory(s, info_ofs, cylinders);
205 rtc_set_memory(s, info_ofs + 1, cylinders >> 8);
206 rtc_set_memory(s, info_ofs + 2, heads);
207 rtc_set_memory(s, info_ofs + 3, 0xff);
208 rtc_set_memory(s, info_ofs + 4, 0xff);
209 rtc_set_memory(s, info_ofs + 5, 0xc0 | ((heads > 8) << 3));
210 rtc_set_memory(s, info_ofs + 6, cylinders);
211 rtc_set_memory(s, info_ofs + 7, cylinders >> 8);
212 rtc_set_memory(s, info_ofs + 8, sectors);
215 /* convert boot_device letter to something recognizable by the bios */
216 static int boot_device2nibble(char boot_device)
218 switch(boot_device) {
219 case 'a':
220 case 'b':
221 return 0x01; /* floppy boot */
222 case 'c':
223 return 0x02; /* hard drive boot */
224 case 'd':
225 return 0x03; /* CD-ROM boot */
226 case 'n':
227 return 0x04; /* Network boot */
229 return 0;
232 /* copy/pasted from cmos_init, should be made a general function
233 and used there as well */
234 static int pc_boot_set(void *opaque, const char *boot_device)
236 Monitor *mon = cur_mon;
237 #define PC_MAX_BOOT_DEVICES 3
238 RTCState *s = (RTCState *)opaque;
239 int nbds, bds[3] = { 0, };
240 int i;
242 nbds = strlen(boot_device);
243 if (nbds > PC_MAX_BOOT_DEVICES) {
244 monitor_printf(mon, "Too many boot devices for PC\n");
245 return(1);
247 for (i = 0; i < nbds; i++) {
248 bds[i] = boot_device2nibble(boot_device[i]);
249 if (bds[i] == 0) {
250 monitor_printf(mon, "Invalid boot device for PC: '%c'\n",
251 boot_device[i]);
252 return(1);
255 rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]);
256 rtc_set_memory(s, 0x38, (bds[2] << 4));
257 return(0);
260 /* hd_table must contain 4 block drivers */
261 static void cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
262 const char *boot_device, BlockDriverState **hd_table)
264 RTCState *s = rtc_state;
265 int nbds, bds[3] = { 0, };
266 int val;
267 int fd0, fd1, nb;
268 int i;
270 /* various important CMOS locations needed by PC/Bochs bios */
272 /* memory size */
273 val = 640; /* base memory in K */
274 rtc_set_memory(s, 0x15, val);
275 rtc_set_memory(s, 0x16, val >> 8);
277 val = (ram_size / 1024) - 1024;
278 if (val > 65535)
279 val = 65535;
280 rtc_set_memory(s, 0x17, val);
281 rtc_set_memory(s, 0x18, val >> 8);
282 rtc_set_memory(s, 0x30, val);
283 rtc_set_memory(s, 0x31, val >> 8);
285 if (above_4g_mem_size) {
286 rtc_set_memory(s, 0x5b, (unsigned int)above_4g_mem_size >> 16);
287 rtc_set_memory(s, 0x5c, (unsigned int)above_4g_mem_size >> 24);
288 rtc_set_memory(s, 0x5d, (uint64_t)above_4g_mem_size >> 32);
291 if (ram_size > (16 * 1024 * 1024))
292 val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536);
293 else
294 val = 0;
295 if (val > 65535)
296 val = 65535;
297 rtc_set_memory(s, 0x34, val);
298 rtc_set_memory(s, 0x35, val >> 8);
300 /* set the number of CPU */
301 rtc_set_memory(s, 0x5f, smp_cpus - 1);
303 /* set boot devices, and disable floppy signature check if requested */
304 #define PC_MAX_BOOT_DEVICES 3
305 nbds = strlen(boot_device);
306 if (nbds > PC_MAX_BOOT_DEVICES) {
307 fprintf(stderr, "Too many boot devices for PC\n");
308 exit(1);
310 for (i = 0; i < nbds; i++) {
311 bds[i] = boot_device2nibble(boot_device[i]);
312 if (bds[i] == 0) {
313 fprintf(stderr, "Invalid boot device for PC: '%c'\n",
314 boot_device[i]);
315 exit(1);
318 rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]);
319 rtc_set_memory(s, 0x38, (bds[2] << 4) | (fd_bootchk ? 0x0 : 0x1));
321 /* floppy type */
323 fd0 = fdctrl_get_drive_type(floppy_controller, 0);
324 fd1 = fdctrl_get_drive_type(floppy_controller, 1);
326 val = (cmos_get_fd_drive_type(fd0) << 4) | cmos_get_fd_drive_type(fd1);
327 rtc_set_memory(s, 0x10, val);
329 val = 0;
330 nb = 0;
331 if (fd0 < 3)
332 nb++;
333 if (fd1 < 3)
334 nb++;
335 switch (nb) {
336 case 0:
337 break;
338 case 1:
339 val |= 0x01; /* 1 drive, ready for boot */
340 break;
341 case 2:
342 val |= 0x41; /* 2 drives, ready for boot */
343 break;
345 val |= 0x02; /* FPU is there */
346 val |= 0x04; /* PS/2 mouse installed */
347 rtc_set_memory(s, REG_EQUIPMENT_BYTE, val);
349 /* hard drives */
351 rtc_set_memory(s, 0x12, (hd_table[0] ? 0xf0 : 0) | (hd_table[1] ? 0x0f : 0));
352 if (hd_table[0])
353 cmos_init_hd(0x19, 0x1b, hd_table[0]);
354 if (hd_table[1])
355 cmos_init_hd(0x1a, 0x24, hd_table[1]);
357 val = 0;
358 for (i = 0; i < 4; i++) {
359 if (hd_table[i]) {
360 int cylinders, heads, sectors, translation;
361 /* NOTE: bdrv_get_geometry_hint() returns the physical
362 geometry. It is always such that: 1 <= sects <= 63, 1
363 <= heads <= 16, 1 <= cylinders <= 16383. The BIOS
364 geometry can be different if a translation is done. */
365 translation = bdrv_get_translation_hint(hd_table[i]);
366 if (translation == BIOS_ATA_TRANSLATION_AUTO) {
367 bdrv_get_geometry_hint(hd_table[i], &cylinders, &heads, &sectors);
368 if (cylinders <= 1024 && heads <= 16 && sectors <= 63) {
369 /* No translation. */
370 translation = 0;
371 } else {
372 /* LBA translation. */
373 translation = 1;
375 } else {
376 translation--;
378 val |= translation << (i * 2);
381 rtc_set_memory(s, 0x39, val);
384 void ioport_set_a20(int enable)
386 /* XXX: send to all CPUs ? */
387 cpu_x86_set_a20(first_cpu, enable);
390 int ioport_get_a20(void)
392 return ((first_cpu->a20_mask >> 20) & 1);
395 static void ioport92_write(void *opaque, uint32_t addr, uint32_t val)
397 ioport_set_a20((val >> 1) & 1);
398 /* XXX: bit 0 is fast reset */
401 static uint32_t ioport92_read(void *opaque, uint32_t addr)
403 return ioport_get_a20() << 1;
406 /***********************************************************/
407 /* Bochs BIOS debug ports */
409 static void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val)
411 static const char shutdown_str[8] = "Shutdown";
412 static int shutdown_index = 0;
414 switch(addr) {
415 /* Bochs BIOS messages */
416 case 0x400:
417 case 0x401:
418 fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val);
419 exit(1);
420 case 0x402:
421 case 0x403:
422 #ifdef DEBUG_BIOS
423 fprintf(stderr, "%c", val);
424 #endif
425 break;
426 case 0x8900:
427 /* same as Bochs power off */
428 if (val == shutdown_str[shutdown_index]) {
429 shutdown_index++;
430 if (shutdown_index == 8) {
431 shutdown_index = 0;
432 qemu_system_shutdown_request();
434 } else {
435 shutdown_index = 0;
437 break;
439 /* LGPL'ed VGA BIOS messages */
440 case 0x501:
441 case 0x502:
442 fprintf(stderr, "VGA BIOS panic, line %d\n", val);
443 exit(1);
444 case 0x500:
445 case 0x503:
446 #ifdef DEBUG_BIOS
447 fprintf(stderr, "%c", val);
448 #endif
449 break;
453 extern uint64_t node_cpumask[MAX_NODES];
455 static void bochs_bios_init(void)
457 void *fw_cfg;
458 uint8_t *smbios_table;
459 size_t smbios_len;
460 uint64_t *numa_fw_cfg;
461 int i, j;
463 register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL);
464 register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL);
465 register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL);
466 register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL);
467 register_ioport_write(0x8900, 1, 1, bochs_bios_write, NULL);
469 register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL);
470 register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL);
471 register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL);
472 register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL);
474 fw_cfg = fw_cfg_init(BIOS_CFG_IOPORT, BIOS_CFG_IOPORT + 1, 0, 0);
475 fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
476 fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
477 fw_cfg_add_bytes(fw_cfg, FW_CFG_ACPI_TABLES, (uint8_t *)acpi_tables,
478 acpi_tables_len);
480 smbios_table = smbios_get_table(&smbios_len);
481 if (smbios_table)
482 fw_cfg_add_bytes(fw_cfg, FW_CFG_SMBIOS_ENTRIES,
483 smbios_table, smbios_len);
485 /* allocate memory for the NUMA channel: one (64bit) word for the number
486 * of nodes, one word for each VCPU->node and one word for each node to
487 * hold the amount of memory.
489 numa_fw_cfg = qemu_mallocz((1 + smp_cpus + nb_numa_nodes) * 8);
490 numa_fw_cfg[0] = cpu_to_le64(nb_numa_nodes);
491 for (i = 0; i < smp_cpus; i++) {
492 for (j = 0; j < nb_numa_nodes; j++) {
493 if (node_cpumask[j] & (1 << i)) {
494 numa_fw_cfg[i + 1] = cpu_to_le64(j);
495 break;
499 for (i = 0; i < nb_numa_nodes; i++) {
500 numa_fw_cfg[smp_cpus + 1 + i] = cpu_to_le64(node_mem[i]);
502 fw_cfg_add_bytes(fw_cfg, FW_CFG_NUMA, (uint8_t *)numa_fw_cfg,
503 (1 + smp_cpus + nb_numa_nodes) * 8);
506 /* Generate an initial boot sector which sets state and jump to
507 a specified vector */
508 static void generate_bootsect(target_phys_addr_t option_rom,
509 uint32_t gpr[8], uint16_t segs[6], uint16_t ip)
511 uint8_t rom[512], *p, *reloc;
512 uint8_t sum;
513 int i;
515 memset(rom, 0, sizeof(rom));
517 p = rom;
518 /* Make sure we have an option rom signature */
519 *p++ = 0x55;
520 *p++ = 0xaa;
522 /* ROM size in sectors*/
523 *p++ = 1;
525 /* Hook int19 */
527 *p++ = 0x50; /* push ax */
528 *p++ = 0x1e; /* push ds */
529 *p++ = 0x31; *p++ = 0xc0; /* xor ax, ax */
530 *p++ = 0x8e; *p++ = 0xd8; /* mov ax, ds */
532 *p++ = 0xc7; *p++ = 0x06; /* movvw _start,0x64 */
533 *p++ = 0x64; *p++ = 0x00;
534 reloc = p;
535 *p++ = 0x00; *p++ = 0x00;
537 *p++ = 0x8c; *p++ = 0x0e; /* mov cs,0x66 */
538 *p++ = 0x66; *p++ = 0x00;
540 *p++ = 0x1f; /* pop ds */
541 *p++ = 0x58; /* pop ax */
542 *p++ = 0xcb; /* lret */
544 /* Actual code */
545 *reloc = (p - rom);
547 *p++ = 0xfa; /* CLI */
548 *p++ = 0xfc; /* CLD */
550 for (i = 0; i < 6; i++) {
551 if (i == 1) /* Skip CS */
552 continue;
554 *p++ = 0xb8; /* MOV AX,imm16 */
555 *p++ = segs[i];
556 *p++ = segs[i] >> 8;
557 *p++ = 0x8e; /* MOV <seg>,AX */
558 *p++ = 0xc0 + (i << 3);
561 for (i = 0; i < 8; i++) {
562 *p++ = 0x66; /* 32-bit operand size */
563 *p++ = 0xb8 + i; /* MOV <reg>,imm32 */
564 *p++ = gpr[i];
565 *p++ = gpr[i] >> 8;
566 *p++ = gpr[i] >> 16;
567 *p++ = gpr[i] >> 24;
570 *p++ = 0xea; /* JMP FAR */
571 *p++ = ip; /* IP */
572 *p++ = ip >> 8;
573 *p++ = segs[1]; /* CS */
574 *p++ = segs[1] >> 8;
576 /* sign rom */
577 sum = 0;
578 for (i = 0; i < (sizeof(rom) - 1); i++)
579 sum += rom[i];
580 rom[sizeof(rom) - 1] = -sum;
582 cpu_physical_memory_write_rom(option_rom, rom, sizeof(rom));
583 option_rom_setup_reset(option_rom, sizeof (rom));
586 static long get_file_size(FILE *f)
588 long where, size;
590 /* XXX: on Unix systems, using fstat() probably makes more sense */
592 where = ftell(f);
593 fseek(f, 0, SEEK_END);
594 size = ftell(f);
595 fseek(f, where, SEEK_SET);
597 return size;
600 static void load_linux(target_phys_addr_t option_rom,
601 const char *kernel_filename,
602 const char *initrd_filename,
603 const char *kernel_cmdline,
604 target_phys_addr_t max_ram_size)
606 uint16_t protocol;
607 uint32_t gpr[8];
608 uint16_t seg[6];
609 uint16_t real_seg;
610 int setup_size, kernel_size, initrd_size, cmdline_size;
611 uint32_t initrd_max;
612 uint8_t header[1024];
613 target_phys_addr_t real_addr, prot_addr, cmdline_addr, initrd_addr;
614 FILE *f, *fi;
616 /* Align to 16 bytes as a paranoia measure */
617 cmdline_size = (strlen(kernel_cmdline)+16) & ~15;
619 /* load the kernel header */
620 f = fopen(kernel_filename, "rb");
621 if (!f || !(kernel_size = get_file_size(f)) ||
622 fread(header, 1, 1024, f) != 1024) {
623 fprintf(stderr, "qemu: could not load kernel '%s'\n",
624 kernel_filename);
625 exit(1);
628 /* kernel protocol version */
629 #if 0
630 fprintf(stderr, "header magic: %#x\n", ldl_p(header+0x202));
631 #endif
632 if (ldl_p(header+0x202) == 0x53726448)
633 protocol = lduw_p(header+0x206);
634 else
635 protocol = 0;
637 if (protocol < 0x200 || !(header[0x211] & 0x01)) {
638 /* Low kernel */
639 real_addr = 0x90000;
640 cmdline_addr = 0x9a000 - cmdline_size;
641 prot_addr = 0x10000;
642 } else if (protocol < 0x202) {
643 /* High but ancient kernel */
644 real_addr = 0x90000;
645 cmdline_addr = 0x9a000 - cmdline_size;
646 prot_addr = 0x100000;
647 } else {
648 /* High and recent kernel */
649 real_addr = 0x10000;
650 cmdline_addr = 0x20000;
651 prot_addr = 0x100000;
654 #if 0
655 fprintf(stderr,
656 "qemu: real_addr = 0x" TARGET_FMT_plx "\n"
657 "qemu: cmdline_addr = 0x" TARGET_FMT_plx "\n"
658 "qemu: prot_addr = 0x" TARGET_FMT_plx "\n",
659 real_addr,
660 cmdline_addr,
661 prot_addr);
662 #endif
664 /* highest address for loading the initrd */
665 if (protocol >= 0x203)
666 initrd_max = ldl_p(header+0x22c);
667 else
668 initrd_max = 0x37ffffff;
670 if (initrd_max >= max_ram_size-ACPI_DATA_SIZE)
671 initrd_max = max_ram_size-ACPI_DATA_SIZE-1;
673 /* kernel command line */
674 pstrcpy_targphys(cmdline_addr, 4096, kernel_cmdline);
676 if (protocol >= 0x202) {
677 stl_p(header+0x228, cmdline_addr);
678 } else {
679 stw_p(header+0x20, 0xA33F);
680 stw_p(header+0x22, cmdline_addr-real_addr);
683 /* loader type */
684 /* High nybble = B reserved for Qemu; low nybble is revision number.
685 If this code is substantially changed, you may want to consider
686 incrementing the revision. */
687 if (protocol >= 0x200)
688 header[0x210] = 0xB0;
690 /* heap */
691 if (protocol >= 0x201) {
692 header[0x211] |= 0x80; /* CAN_USE_HEAP */
693 stw_p(header+0x224, cmdline_addr-real_addr-0x200);
696 /* load initrd */
697 if (initrd_filename) {
698 if (protocol < 0x200) {
699 fprintf(stderr, "qemu: linux kernel too old to load a ram disk\n");
700 exit(1);
703 fi = fopen(initrd_filename, "rb");
704 if (!fi) {
705 fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
706 initrd_filename);
707 exit(1);
710 initrd_size = get_file_size(fi);
711 initrd_addr = (initrd_max-initrd_size) & ~4095;
713 if (!fread_targphys_ok(initrd_addr, initrd_size, fi)) {
714 fprintf(stderr, "qemu: read error on initial ram disk '%s'\n",
715 initrd_filename);
716 exit(1);
718 fclose(fi);
720 stl_p(header+0x218, initrd_addr);
721 stl_p(header+0x21c, initrd_size);
724 /* store the finalized header and load the rest of the kernel */
725 cpu_physical_memory_write(real_addr, header, 1024);
727 setup_size = header[0x1f1];
728 if (setup_size == 0)
729 setup_size = 4;
731 setup_size = (setup_size+1)*512;
732 kernel_size -= setup_size; /* Size of protected-mode code */
734 if (!fread_targphys_ok(real_addr+1024, setup_size-1024, f) ||
735 !fread_targphys_ok(prot_addr, kernel_size, f)) {
736 fprintf(stderr, "qemu: read error on kernel '%s'\n",
737 kernel_filename);
738 exit(1);
740 fclose(f);
742 /* generate bootsector to set up the initial register state */
743 real_seg = real_addr >> 4;
744 seg[0] = seg[2] = seg[3] = seg[4] = seg[4] = real_seg;
745 seg[1] = real_seg+0x20; /* CS */
746 memset(gpr, 0, sizeof gpr);
747 gpr[4] = cmdline_addr-real_addr-16; /* SP (-16 is paranoia) */
749 option_rom_setup_reset(real_addr, setup_size);
750 option_rom_setup_reset(prot_addr, kernel_size);
751 option_rom_setup_reset(cmdline_addr, cmdline_size);
752 if (initrd_filename)
753 option_rom_setup_reset(initrd_addr, initrd_size);
755 generate_bootsect(option_rom, gpr, seg, 0);
758 static void main_cpu_reset(void *opaque)
760 CPUState *env = opaque;
761 cpu_reset(env);
764 static const int ide_iobase[2] = { 0x1f0, 0x170 };
765 static const int ide_iobase2[2] = { 0x3f6, 0x376 };
766 static const int ide_irq[2] = { 14, 15 };
768 #define NE2000_NB_MAX 6
770 static int ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360, 0x280, 0x380 };
771 static int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 };
773 static int serial_io[MAX_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
774 static int serial_irq[MAX_SERIAL_PORTS] = { 4, 3, 4, 3 };
776 static int parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc };
777 static int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 };
779 #ifdef HAS_AUDIO
780 static void audio_init (PCIBus *pci_bus, qemu_irq *pic)
782 struct soundhw *c;
784 for (c = soundhw; c->name; ++c) {
785 if (c->enabled) {
786 if (c->isa) {
787 c->init.init_isa(pic);
788 } else {
789 if (pci_bus) {
790 c->init.init_pci(pci_bus);
796 #endif
798 static void pc_init_ne2k_isa(NICInfo *nd, qemu_irq *pic)
800 static int nb_ne2k = 0;
802 if (nb_ne2k == NE2000_NB_MAX)
803 return;
804 isa_ne2000_init(ne2000_io[nb_ne2k], pic[ne2000_irq[nb_ne2k]], nd);
805 nb_ne2k++;
808 static int load_option_rom(const char *oprom, target_phys_addr_t start,
809 target_phys_addr_t end)
811 int size;
813 size = get_image_size(oprom);
814 if (size > 0 && start + size > end) {
815 fprintf(stderr, "Not enough space to load option rom '%s'\n",
816 oprom);
817 exit(1);
819 size = load_image_targphys(oprom, start, end - start);
820 if (size < 0) {
821 fprintf(stderr, "Could not load option rom '%s'\n", oprom);
822 exit(1);
824 /* Round up optiom rom size to the next 2k boundary */
825 size = (size + 2047) & ~2047;
826 option_rom_setup_reset(start, size);
827 return size;
830 CPUState *pc_new_cpu(int cpu, const char *cpu_model, int pci_enabled)
832 CPUState *env = cpu_init(cpu_model);
833 if (!env) {
834 fprintf(stderr, "Unable to find x86 CPU definition\n");
835 exit(1);
837 if (cpu != 0)
838 env->halted = 1;
839 if (smp_cpus > 1) {
840 /* XXX: enable it in all cases */
841 env->cpuid_features |= CPUID_APIC;
843 qemu_register_reset(main_cpu_reset, 0, env);
844 if (pci_enabled) {
845 apic_init(env);
848 /* kvm needs this to run after the apic is initialized. Otherwise,
849 * it can access invalid state and crash.
851 qemu_init_vcpu(env);
852 return env;
855 /* PC hardware initialisation */
856 static void pc_init1(ram_addr_t ram_size,
857 const char *boot_device,
858 const char *kernel_filename, const char *kernel_cmdline,
859 const char *initrd_filename,
860 int pci_enabled, const char *cpu_model)
862 char buf[1024];
863 int ret, linux_boot, i;
864 ram_addr_t ram_addr, bios_offset, option_rom_offset;
865 ram_addr_t below_4g_mem_size, above_4g_mem_size = 0;
866 int bios_size, isa_bios_size, oprom_area_size;
867 int pci_option_rom_offset = 0;
868 PCIBus *pci_bus;
869 int piix3_devfn = -1;
870 CPUState *env;
871 qemu_irq *cpu_irq;
872 qemu_irq *i8259;
873 int index;
874 BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
875 BlockDriverState *fd[MAX_FD];
876 int using_vga = cirrus_vga_enabled || std_vga_enabled || vmsvga_enabled;
878 if (ram_size >= 0xe0000000 ) {
879 above_4g_mem_size = ram_size - 0xe0000000;
880 below_4g_mem_size = 0xe0000000;
881 } else {
882 below_4g_mem_size = ram_size;
885 linux_boot = (kernel_filename != NULL);
887 /* init CPUs */
888 if (cpu_model == NULL) {
889 #ifdef TARGET_X86_64
890 cpu_model = "qemu64";
891 #else
892 cpu_model = "qemu32";
893 #endif
896 for(i = 0; i < smp_cpus; i++) {
897 env = pc_new_cpu(i, cpu_model, pci_enabled);
900 vmport_init();
902 /* allocate RAM */
903 ram_addr = qemu_ram_alloc(below_4g_mem_size);
904 cpu_register_physical_memory(0, 0xa0000, ram_addr);
905 cpu_register_physical_memory(0x100000,
906 below_4g_mem_size - 0x100000,
907 ram_addr + 0x100000);
909 /* above 4giga memory allocation */
910 if (above_4g_mem_size > 0) {
911 #if TARGET_PHYS_ADDR_BITS == 32
912 hw_error("To much RAM for 32-bit physical address");
913 #else
914 ram_addr = qemu_ram_alloc(above_4g_mem_size);
915 cpu_register_physical_memory(0x100000000ULL,
916 above_4g_mem_size,
917 ram_addr);
918 #endif
922 /* BIOS load */
923 if (bios_name == NULL)
924 bios_name = BIOS_FILENAME;
925 snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name);
926 bios_size = get_image_size(buf);
927 if (bios_size <= 0 ||
928 (bios_size % 65536) != 0) {
929 goto bios_error;
931 bios_offset = qemu_ram_alloc(bios_size);
932 ret = load_image(buf, qemu_get_ram_ptr(bios_offset));
933 if (ret != bios_size) {
934 bios_error:
935 fprintf(stderr, "qemu: could not load PC BIOS '%s'\n", buf);
936 exit(1);
938 /* map the last 128KB of the BIOS in ISA space */
939 isa_bios_size = bios_size;
940 if (isa_bios_size > (128 * 1024))
941 isa_bios_size = 128 * 1024;
942 cpu_register_physical_memory(0xd0000, (192 * 1024) - isa_bios_size,
943 IO_MEM_UNASSIGNED);
944 /* kvm tpr optimization needs the bios accessible for write, at least to qemu itself */
945 cpu_register_physical_memory(0x100000 - isa_bios_size,
946 isa_bios_size,
947 (bios_offset + bios_size - isa_bios_size) /* | IO_MEM_ROM */);
949 if (extboot_drive != -1) {
950 snprintf(buf, sizeof(buf), "%s/%s", bios_dir, EXTBOOT_FILENAME);
951 option_rom[nb_option_roms++] = strdup(buf);
954 option_rom_offset = qemu_ram_alloc(0x20000);
955 oprom_area_size = 0;
956 cpu_register_physical_memory(0xc0000, 0x20000, option_rom_offset);
958 if (using_vga) {
959 /* VGA BIOS load */
960 if (cirrus_vga_enabled) {
961 snprintf(buf, sizeof(buf), "%s/%s", bios_dir,
962 VGABIOS_CIRRUS_FILENAME);
963 } else {
964 snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME);
966 oprom_area_size = load_option_rom(buf, 0xc0000, 0xe0000);
967 pci_option_rom_offset = oprom_area_size;
969 /* Although video roms can grow larger than 0x8000, the area between
970 * 0xc0000 - 0xc8000 is reserved for them. It means we won't be looking
971 * for any other kind of option rom inside this area */
972 if (oprom_area_size < 0x8000)
973 oprom_area_size = 0x8000;
975 if (linux_boot) {
976 load_linux(0xc0000 + oprom_area_size,
977 kernel_filename, initrd_filename, kernel_cmdline, below_4g_mem_size);
978 oprom_area_size += 2048;
981 for (i = 0; i < nb_option_roms; i++) {
982 oprom_area_size += load_option_rom(option_rom[i],
983 0xc0000 + oprom_area_size, 0xe0000);
986 /* map all the bios at the top of memory */
987 cpu_register_physical_memory((uint32_t)(-bios_size),
988 bios_size, bios_offset | IO_MEM_ROM);
990 bochs_bios_init();
992 cpu_irq = qemu_allocate_irqs(pic_irq_request, NULL, 1);
993 #ifdef KVM_CAP_IRQCHIP
994 if (kvm_enabled() && qemu_kvm_irqchip_in_kernel()) {
995 i8259 = kvm_i8259_init(cpu_irq[0]);
996 } else
997 #endif
998 i8259 = i8259_init(cpu_irq[0]);
999 ferr_irq = i8259[13];
1001 if (pci_enabled) {
1002 pci_bus = i440fx_init(&i440fx_state, i8259);
1003 piix3_devfn = piix3_init(pci_bus, -1);
1004 } else {
1005 pci_bus = NULL;
1008 /* init basic PC hardware */
1009 register_ioport_write(0x80, 1, 1, ioport80_write, NULL);
1011 register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL);
1013 if (cirrus_vga_enabled) {
1014 if (pci_enabled) {
1015 pci_cirrus_vga_init(pci_bus);
1016 } else {
1017 isa_cirrus_vga_init();
1019 } else if (vmsvga_enabled) {
1020 if (pci_enabled)
1021 pci_vmsvga_init(pci_bus);
1022 else
1023 fprintf(stderr, "%s: vmware_vga: no PCI bus\n", __FUNCTION__);
1024 } else if (std_vga_enabled) {
1025 if (pci_enabled) {
1026 pci_vga_init(pci_bus, 0, 0);
1027 } else {
1028 isa_vga_init();
1032 rtc_state = rtc_init(0x70, i8259[8], 2000);
1034 qemu_register_boot_set(pc_boot_set, rtc_state);
1036 register_ioport_read(0x92, 1, 1, ioport92_read, NULL);
1037 register_ioport_write(0x92, 1, 1, ioport92_write, NULL);
1039 if (pci_enabled) {
1040 ioapic = ioapic_init();
1042 #ifdef USE_KVM_PIT
1043 if (kvm_enabled() && qemu_kvm_pit_in_kernel())
1044 pit = kvm_pit_init(0x40, i8259[0]);
1045 else
1046 #endif
1047 pit = pit_init(0x40, i8259[0]);
1048 pcspk_init(pit);
1049 if (!no_hpet) {
1050 hpet_init(i8259);
1052 if (pci_enabled) {
1053 pic_set_alt_irq_func(isa_pic, ioapic_set_irq, ioapic);
1056 for(i = 0; i < MAX_SERIAL_PORTS; i++) {
1057 if (serial_hds[i]) {
1058 serial_init(serial_io[i], i8259[serial_irq[i]], 115200,
1059 serial_hds[i]);
1063 for(i = 0; i < MAX_PARALLEL_PORTS; i++) {
1064 if (parallel_hds[i]) {
1065 parallel_init(parallel_io[i], i8259[parallel_irq[i]],
1066 parallel_hds[i]);
1070 watchdog_pc_init(pci_bus);
1072 for(i = 0; i < nb_nics; i++) {
1073 NICInfo *nd = &nd_table[i];
1075 if (!pci_enabled || (nd->model && strcmp(nd->model, "ne2k_isa") == 0))
1076 pc_init_ne2k_isa(nd, i8259);
1077 else
1078 pci_nic_init(pci_bus, nd, -1, "rtl8139");
1081 qemu_system_hot_add_init(cpu_model);
1083 if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
1084 fprintf(stderr, "qemu: too many IDE bus\n");
1085 exit(1);
1088 for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
1089 index = drive_get_index(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
1090 if (index != -1)
1091 hd[i] = drives_table[index].bdrv;
1092 else
1093 hd[i] = NULL;
1096 if (pci_enabled) {
1097 pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1, i8259);
1098 } else {
1099 for(i = 0; i < MAX_IDE_BUS; i++) {
1100 isa_ide_init(ide_iobase[i], ide_iobase2[i], i8259[ide_irq[i]],
1101 hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]);
1105 i8042_init(i8259[1], i8259[12], 0x60);
1106 DMA_init(0);
1107 #ifdef HAS_AUDIO
1108 audio_init(pci_enabled ? pci_bus : NULL, i8259);
1109 #endif
1111 for(i = 0; i < MAX_FD; i++) {
1112 index = drive_get_index(IF_FLOPPY, 0, i);
1113 if (index != -1)
1114 fd[i] = drives_table[index].bdrv;
1115 else
1116 fd[i] = NULL;
1118 floppy_controller = fdctrl_init(i8259[6], 2, 0, 0x3f0, fd);
1120 cmos_init(below_4g_mem_size, above_4g_mem_size, boot_device, hd);
1122 if (pci_enabled && usb_enabled) {
1123 usb_uhci_piix3_init(pci_bus, piix3_devfn + 2);
1126 if (pci_enabled && acpi_enabled) {
1127 uint8_t *eeprom_buf = qemu_mallocz(8 * 256); /* XXX: make this persistent */
1128 i2c_bus *smbus;
1130 /* TODO: Populate SPD eeprom data. */
1131 smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100, i8259[9]);
1132 for (i = 0; i < 8; i++) {
1133 DeviceState *eeprom;
1134 eeprom = qdev_create((BusState *)smbus, "smbus-eeprom");
1135 qdev_set_prop_int(eeprom, "address", 0x50 + i);
1136 qdev_set_prop_ptr(eeprom, "data", eeprom_buf + (i * 256));
1137 qdev_init(eeprom);
1141 if (i440fx_state) {
1142 i440fx_init_memory_mappings(i440fx_state);
1145 if (pci_enabled) {
1146 int max_bus;
1147 int bus;
1149 max_bus = drive_get_max_bus(IF_SCSI);
1150 for (bus = 0; bus <= max_bus; bus++) {
1151 pci_create_simple(pci_bus, -1, "lsi53c895a");
1155 /* Add virtio block devices */
1156 if (pci_enabled) {
1157 int index;
1158 int unit_id = 0;
1160 while ((index = drive_get_index(IF_VIRTIO, 0, unit_id)) != -1) {
1161 pci_create_simple(pci_bus, -1, "virtio-blk-pci");
1162 unit_id++;
1166 if (extboot_drive != -1) {
1167 DriveInfo *info = &drives_table[extboot_drive];
1168 int cyls, heads, secs;
1170 if (info->type != IF_IDE && info->type != IF_VIRTIO) {
1171 bdrv_guess_geometry(info->bdrv, &cyls, &heads, &secs);
1172 bdrv_set_geometry_hint(info->bdrv, cyls, heads, secs);
1175 extboot_init(info->bdrv, 1);
1178 /* Add virtio balloon device */
1179 if (pci_enabled) {
1180 pci_create_simple(pci_bus, -1, "virtio-balloon-pci");
1183 /* Add virtio console devices */
1184 if (pci_enabled) {
1185 for(i = 0; i < MAX_VIRTIO_CONSOLES; i++) {
1186 if (virtcon_hds[i]) {
1187 pci_create_simple(pci_bus, -1, "virtio-console-pci");
1192 #ifdef USE_KVM_DEVICE_ASSIGNMENT
1193 if (kvm_enabled()) {
1194 add_assigned_devices(pci_bus, assigned_devices, assigned_devices_index);
1195 assigned_dev_load_option_roms(pci_option_rom_offset);
1197 #endif /* USE_KVM_DEVICE_ASSIGNMENT */
1200 static void pc_init_pci(ram_addr_t ram_size,
1201 const char *boot_device,
1202 const char *kernel_filename,
1203 const char *kernel_cmdline,
1204 const char *initrd_filename,
1205 const char *cpu_model)
1207 pc_init1(ram_size, boot_device,
1208 kernel_filename, kernel_cmdline,
1209 initrd_filename, 1, cpu_model);
1212 static void pc_init_isa(ram_addr_t ram_size,
1213 const char *boot_device,
1214 const char *kernel_filename,
1215 const char *kernel_cmdline,
1216 const char *initrd_filename,
1217 const char *cpu_model)
1219 pc_init1(ram_size, boot_device,
1220 kernel_filename, kernel_cmdline,
1221 initrd_filename, 0, cpu_model);
1224 /* set CMOS shutdown status register (index 0xF) as S3_resume(0xFE)
1225 BIOS will read it and start S3 resume at POST Entry */
1226 void cmos_set_s3_resume(void)
1228 if (rtc_state)
1229 rtc_set_memory(rtc_state, 0xF, 0xFE);
1232 static QEMUMachine pc_machine = {
1233 .name = "pc",
1234 .desc = "Standard PC",
1235 .init = pc_init_pci,
1236 .max_cpus = 255,
1237 .is_default = 1,
1240 static QEMUMachine isapc_machine = {
1241 .name = "isapc",
1242 .desc = "ISA-only PC",
1243 .init = pc_init_isa,
1244 .max_cpus = 1,
1247 static void pc_machine_init(void)
1249 qemu_register_machine(&pc_machine);
1250 qemu_register_machine(&isapc_machine);
1253 machine_init(pc_machine_init);