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Define cpu_has_work() for ia64
[qemu-kvm/fedora.git] / hw / pc.c
blob34a4d25b6c9bb17a710d2d813e17073df018d41f
1 /*
2 * QEMU PC System Emulator
3 *
4 * Copyright (c) 2003-2004 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24 #include "hw.h"
25 #include "pc.h"
26 #include "fdc.h"
27 #include "pci.h"
28 #include "block.h"
29 #include "sysemu.h"
30 #include "audio/audio.h"
31 #include "net.h"
32 #include "smbus.h"
33 #include "boards.h"
34 #include "monitor.h"
35 #include "fw_cfg.h"
36 #include "virtio-blk.h"
37 #include "virtio-balloon.h"
38 #include "virtio-console.h"
39 #include "hpet_emul.h"
40 #include "watchdog.h"
41 #include "smbios.h"
42 #include "device-assignment.h"
43
44 #include "qemu-kvm.h"
45
46 /* output Bochs bios info messages */
47 //#define DEBUG_BIOS
48
49 #define BIOS_FILENAME "bios.bin"
50 #define VGABIOS_FILENAME "vgabios.bin"
51 #define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin"
52 #define EXTBOOT_FILENAME "extboot.bin"
53
54 #define PC_MAX_BIOS_SIZE (4 * 1024 * 1024)
55
56 /* Leave a chunk of memory at the top of RAM for the BIOS ACPI tables. */
57 #define ACPI_DATA_SIZE 0x10000
58 #define BIOS_CFG_IOPORT 0x510
59 #define FW_CFG_ACPI_TABLES (FW_CFG_ARCH_LOCAL + 0)
60 #define FW_CFG_SMBIOS_ENTRIES (FW_CFG_ARCH_LOCAL + 1)
61
62 #define MAX_IDE_BUS 2
63
64 static fdctrl_t *floppy_controller;
65 static RTCState *rtc_state;
66 static PITState *pit;
67 static IOAPICState *ioapic;
68 static PCIDevice *i440fx_state;
69
70 static void ioport80_write(void *opaque, uint32_t addr, uint32_t data)
71 {
72 }
73
74 /* MSDOS compatibility mode FPU exception support */
75 static qemu_irq ferr_irq;
76 /* XXX: add IGNNE support */
77 void cpu_set_ferr(CPUX86State *s)
78 {
79 qemu_irq_raise(ferr_irq);
80 }
81
82 static void ioportF0_write(void *opaque, uint32_t addr, uint32_t data)
83 {
84 qemu_irq_lower(ferr_irq);
85 }
86
87 /* TSC handling */
88 uint64_t cpu_get_tsc(CPUX86State *env)
89 {
90 /* Note: when using kqemu, it is more logical to return the host TSC
91 because kqemu does not trap the RDTSC instruction for
92 performance reasons */
93 #ifdef CONFIG_KQEMU
94 if (env->kqemu_enabled) {
95 return cpu_get_real_ticks();
96 } else
97 #endif
98 {
99 return cpu_get_ticks();
100 }
101 }
102
103 /* SMM support */
104 void cpu_smm_update(CPUState *env)
105 {
106 if (i440fx_state && env == first_cpu)
107 i440fx_set_smm(i440fx_state, (env->hflags >> HF_SMM_SHIFT) & 1);
108 }
109
110
111 /* IRQ handling */
112 int cpu_get_pic_interrupt(CPUState *env)
113 {
114 int intno;
115
116 intno = apic_get_interrupt(env);
117 if (intno >= 0) {
118 /* set irq request if a PIC irq is still pending */
119 /* XXX: improve that */
120 pic_update_irq(isa_pic);
121 return intno;
122 }
123 /* read the irq from the PIC */
124 if (!apic_accept_pic_intr(env))
125 return -1;
126
127 intno = pic_read_irq(isa_pic);
128 return intno;
129 }
130
131 static void pic_irq_request(void *opaque, int irq, int level)
132 {
133 CPUState *env = first_cpu;
134
135 if (env->apic_state) {
136 while (env) {
137 if (apic_accept_pic_intr(env))
138 apic_deliver_pic_intr(env, level);
139 env = env->next_cpu;
140 }
141 } else {
142 if (level)
143 cpu_interrupt(env, CPU_INTERRUPT_HARD);
144 else
145 cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
146 }
147 }
148
149 /* PC cmos mappings */
150
151 #define REG_EQUIPMENT_BYTE 0x14
152
153 static int cmos_get_fd_drive_type(int fd0)
154 {
155 int val;
156
157 switch (fd0) {
158 case 0:
159 /* 1.44 Mb 3"5 drive */
160 val = 4;
161 break;
162 case 1:
163 /* 2.88 Mb 3"5 drive */
164 val = 5;
165 break;
166 case 2:
167 /* 1.2 Mb 5"5 drive */
168 val = 2;
169 break;
170 default:
171 val = 0;
172 break;
173 }
174 return val;
175 }
176
177 static void cmos_init_hd(int type_ofs, int info_ofs, BlockDriverState *hd)
178 {
179 RTCState *s = rtc_state;
180 int cylinders, heads, sectors;
181 bdrv_get_geometry_hint(hd, &cylinders, &heads, &sectors);
182 rtc_set_memory(s, type_ofs, 47);
183 rtc_set_memory(s, info_ofs, cylinders);
184 rtc_set_memory(s, info_ofs + 1, cylinders >> 8);
185 rtc_set_memory(s, info_ofs + 2, heads);
186 rtc_set_memory(s, info_ofs + 3, 0xff);
187 rtc_set_memory(s, info_ofs + 4, 0xff);
188 rtc_set_memory(s, info_ofs + 5, 0xc0 | ((heads > 8) << 3));
189 rtc_set_memory(s, info_ofs + 6, cylinders);
190 rtc_set_memory(s, info_ofs + 7, cylinders >> 8);
191 rtc_set_memory(s, info_ofs + 8, sectors);
192 }
193
194 /* convert boot_device letter to something recognizable by the bios */
195 static int boot_device2nibble(char boot_device)
196 {
197 switch(boot_device) {
198 case 'a':
199 case 'b':
200 return 0x01; /* floppy boot */
201 case 'c':
202 return 0x02; /* hard drive boot */
203 case 'd':
204 return 0x03; /* CD-ROM boot */
205 case 'n':
206 return 0x04; /* Network boot */
207 }
208 return 0;
209 }
210
211 /* copy/pasted from cmos_init, should be made a general function
212 and used there as well */
213 static int pc_boot_set(void *opaque, const char *boot_device)
214 {
215 Monitor *mon = cur_mon;
216 #define PC_MAX_BOOT_DEVICES 3
217 RTCState *s = (RTCState *)opaque;
218 int nbds, bds[3] = { 0, };
219 int i;
220
221 nbds = strlen(boot_device);
222 if (nbds > PC_MAX_BOOT_DEVICES) {
223 monitor_printf(mon, "Too many boot devices for PC\n");
224 return(1);
225 }
226 for (i = 0; i < nbds; i++) {
227 bds[i] = boot_device2nibble(boot_device[i]);
228 if (bds[i] == 0) {
229 monitor_printf(mon, "Invalid boot device for PC: '%c'\n",
230 boot_device[i]);
231 return(1);
232 }
233 }
234 rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]);
235 rtc_set_memory(s, 0x38, (bds[2] << 4));
236 return(0);
237 }
238
239 /* hd_table must contain 4 block drivers */
240 static void cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
241 const char *boot_device, BlockDriverState **hd_table)
242 {
243 RTCState *s = rtc_state;
244 int nbds, bds[3] = { 0, };
245 int val;
246 int fd0, fd1, nb;
247 int i;
248
249 /* various important CMOS locations needed by PC/Bochs bios */
250
251 /* memory size */
252 val = 640; /* base memory in K */
253 rtc_set_memory(s, 0x15, val);
254 rtc_set_memory(s, 0x16, val >> 8);
255
256 val = (ram_size / 1024) - 1024;
257 if (val > 65535)
258 val = 65535;
259 rtc_set_memory(s, 0x17, val);
260 rtc_set_memory(s, 0x18, val >> 8);
261 rtc_set_memory(s, 0x30, val);
262 rtc_set_memory(s, 0x31, val >> 8);
263
264 if (above_4g_mem_size) {
265 rtc_set_memory(s, 0x5b, (unsigned int)above_4g_mem_size >> 16);
266 rtc_set_memory(s, 0x5c, (unsigned int)above_4g_mem_size >> 24);
267 rtc_set_memory(s, 0x5d, (uint64_t)above_4g_mem_size >> 32);
268 }
269
270 if (ram_size > (16 * 1024 * 1024))
271 val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536);
272 else
273 val = 0;
274 if (val > 65535)
275 val = 65535;
276 rtc_set_memory(s, 0x34, val);
277 rtc_set_memory(s, 0x35, val >> 8);
278
279 /* set the number of CPU */
280 rtc_set_memory(s, 0x5f, smp_cpus - 1);
281
282 /* set boot devices, and disable floppy signature check if requested */
283 #define PC_MAX_BOOT_DEVICES 3
284 nbds = strlen(boot_device);
285 if (nbds > PC_MAX_BOOT_DEVICES) {
286 fprintf(stderr, "Too many boot devices for PC\n");
287 exit(1);
288 }
289 for (i = 0; i < nbds; i++) {
290 bds[i] = boot_device2nibble(boot_device[i]);
291 if (bds[i] == 0) {
292 fprintf(stderr, "Invalid boot device for PC: '%c'\n",
293 boot_device[i]);
294 exit(1);
295 }
296 }
297 rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]);
298 rtc_set_memory(s, 0x38, (bds[2] << 4) | (fd_bootchk ? 0x0 : 0x1));
299
300 /* floppy type */
301
302 fd0 = fdctrl_get_drive_type(floppy_controller, 0);
303 fd1 = fdctrl_get_drive_type(floppy_controller, 1);
304
305 val = (cmos_get_fd_drive_type(fd0) << 4) | cmos_get_fd_drive_type(fd1);
306 rtc_set_memory(s, 0x10, val);
307
308 val = 0;
309 nb = 0;
310 if (fd0 < 3)
311 nb++;
312 if (fd1 < 3)
313 nb++;
314 switch (nb) {
315 case 0:
316 break;
317 case 1:
318 val |= 0x01; /* 1 drive, ready for boot */
319 break;
320 case 2:
321 val |= 0x41; /* 2 drives, ready for boot */
322 break;
323 }
324 val |= 0x02; /* FPU is there */
325 val |= 0x04; /* PS/2 mouse installed */
326 rtc_set_memory(s, REG_EQUIPMENT_BYTE, val);
327
328 /* hard drives */
329
330 rtc_set_memory(s, 0x12, (hd_table[0] ? 0xf0 : 0) | (hd_table[1] ? 0x0f : 0));
331 if (hd_table[0])
332 cmos_init_hd(0x19, 0x1b, hd_table[0]);
333 if (hd_table[1])
334 cmos_init_hd(0x1a, 0x24, hd_table[1]);
335
336 val = 0;
337 for (i = 0; i < 4; i++) {
338 if (hd_table[i]) {
339 int cylinders, heads, sectors, translation;
340 /* NOTE: bdrv_get_geometry_hint() returns the physical
341 geometry. It is always such that: 1 <= sects <= 63, 1
342 <= heads <= 16, 1 <= cylinders <= 16383. The BIOS
343 geometry can be different if a translation is done. */
344 translation = bdrv_get_translation_hint(hd_table[i]);
345 if (translation == BIOS_ATA_TRANSLATION_AUTO) {
346 bdrv_get_geometry_hint(hd_table[i], &cylinders, &heads, &sectors);
347 if (cylinders <= 1024 && heads <= 16 && sectors <= 63) {
348 /* No translation. */
349 translation = 0;
350 } else {
351 /* LBA translation. */
352 translation = 1;
353 }
354 } else {
355 translation--;
356 }
357 val |= translation << (i * 2);
358 }
359 }
360 rtc_set_memory(s, 0x39, val);
361 }
362
363 void ioport_set_a20(int enable)
364 {
365 /* XXX: send to all CPUs ? */
366 cpu_x86_set_a20(first_cpu, enable);
367 }
368
369 int ioport_get_a20(void)
370 {
371 return ((first_cpu->a20_mask >> 20) & 1);
372 }
373
374 static void ioport92_write(void *opaque, uint32_t addr, uint32_t val)
375 {
376 ioport_set_a20((val >> 1) & 1);
377 /* XXX: bit 0 is fast reset */
378 }
379
380 static uint32_t ioport92_read(void *opaque, uint32_t addr)
381 {
382 return ioport_get_a20() << 1;
383 }
384
385 /***********************************************************/
386 /* Bochs BIOS debug ports */
387
388 static void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val)
389 {
390 static const char shutdown_str[8] = "Shutdown";
391 static int shutdown_index = 0;
392
393 switch(addr) {
394 /* Bochs BIOS messages */
395 case 0x400:
396 case 0x401:
397 fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val);
398 exit(1);
399 case 0x402:
400 case 0x403:
401 #ifdef DEBUG_BIOS
402 fprintf(stderr, "%c", val);
403 #endif
404 break;
405 case 0x8900:
406 /* same as Bochs power off */
407 if (val == shutdown_str[shutdown_index]) {
408 shutdown_index++;
409 if (shutdown_index == 8) {
410 shutdown_index = 0;
411 qemu_system_shutdown_request();
412 }
413 } else {
414 shutdown_index = 0;
415 }
416 break;
417
418 /* LGPL'ed VGA BIOS messages */
419 case 0x501:
420 case 0x502:
421 fprintf(stderr, "VGA BIOS panic, line %d\n", val);
422 exit(1);
423 case 0x500:
424 case 0x503:
425 #ifdef DEBUG_BIOS
426 fprintf(stderr, "%c", val);
427 #endif
428 break;
429 }
430 }
431
432 extern uint64_t node_cpumask[MAX_NODES];
433
434 static void bochs_bios_init(void)
435 {
436 void *fw_cfg;
437 uint8_t *smbios_table;
438 size_t smbios_len;
439 uint64_t *numa_fw_cfg;
440 int i, j;
441
442 register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL);
443 register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL);
444 register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL);
445 register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL);
446 register_ioport_write(0x8900, 1, 1, bochs_bios_write, NULL);
447
448 register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL);
449 register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL);
450 register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL);
451 register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL);
452
453 fw_cfg = fw_cfg_init(BIOS_CFG_IOPORT, BIOS_CFG_IOPORT + 1, 0, 0);
454 fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
455 fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
456 fw_cfg_add_bytes(fw_cfg, FW_CFG_ACPI_TABLES, (uint8_t *)acpi_tables,
457 acpi_tables_len);
458
459 smbios_table = smbios_get_table(&smbios_len);
460 if (smbios_table)
461 fw_cfg_add_bytes(fw_cfg, FW_CFG_SMBIOS_ENTRIES,
462 smbios_table, smbios_len);
463
464 /* allocate memory for the NUMA channel: one (64bit) word for the number
465 * of nodes, one word for each VCPU->node and one word for each node to
466 * hold the amount of memory.
467 */
468 numa_fw_cfg = qemu_mallocz((1 + smp_cpus + nb_numa_nodes) * 8);
469 numa_fw_cfg[0] = cpu_to_le64(nb_numa_nodes);
470 for (i = 0; i < smp_cpus; i++) {
471 for (j = 0; j < nb_numa_nodes; j++) {
472 if (node_cpumask[j] & (1 << i)) {
473 numa_fw_cfg[i + 1] = cpu_to_le64(j);
474 break;
475 }
476 }
477 }
478 for (i = 0; i < nb_numa_nodes; i++) {
479 numa_fw_cfg[smp_cpus + 1 + i] = cpu_to_le64(node_mem[i]);
480 }
481 fw_cfg_add_bytes(fw_cfg, FW_CFG_NUMA, (uint8_t *)numa_fw_cfg,
482 (1 + smp_cpus + nb_numa_nodes) * 8);
483 }
484
485 /* Generate an initial boot sector which sets state and jump to
486 a specified vector */
487 static void generate_bootsect(target_phys_addr_t option_rom,
488 uint32_t gpr[8], uint16_t segs[6], uint16_t ip)
489 {
490 uint8_t rom[512], *p, *reloc;
491 uint8_t sum;
492 int i;
493
494 memset(rom, 0, sizeof(rom));
495
496 p = rom;
497 /* Make sure we have an option rom signature */
498 *p++ = 0x55;
499 *p++ = 0xaa;
500
501 /* ROM size in sectors*/
502 *p++ = 1;
503
504 /* Hook int19 */
505
506 *p++ = 0x50; /* push ax */
507 *p++ = 0x1e; /* push ds */
508 *p++ = 0x31; *p++ = 0xc0; /* xor ax, ax */
509 *p++ = 0x8e; *p++ = 0xd8; /* mov ax, ds */
510
511 *p++ = 0xc7; *p++ = 0x06; /* movvw _start,0x64 */
512 *p++ = 0x64; *p++ = 0x00;
513 reloc = p;
514 *p++ = 0x00; *p++ = 0x00;
515
516 *p++ = 0x8c; *p++ = 0x0e; /* mov cs,0x66 */
517 *p++ = 0x66; *p++ = 0x00;
518
519 *p++ = 0x1f; /* pop ds */
520 *p++ = 0x58; /* pop ax */
521 *p++ = 0xcb; /* lret */
522
523 /* Actual code */
524 *reloc = (p - rom);
525
526 *p++ = 0xfa; /* CLI */
527 *p++ = 0xfc; /* CLD */
528
529 for (i = 0; i < 6; i++) {
530 if (i == 1) /* Skip CS */
531 continue;
532
533 *p++ = 0xb8; /* MOV AX,imm16 */
534 *p++ = segs[i];
535 *p++ = segs[i] >> 8;
536 *p++ = 0x8e; /* MOV <seg>,AX */
537 *p++ = 0xc0 + (i << 3);
538 }
539
540 for (i = 0; i < 8; i++) {
541 *p++ = 0x66; /* 32-bit operand size */
542 *p++ = 0xb8 + i; /* MOV <reg>,imm32 */
543 *p++ = gpr[i];
544 *p++ = gpr[i] >> 8;
545 *p++ = gpr[i] >> 16;
546 *p++ = gpr[i] >> 24;
547 }
548
549 *p++ = 0xea; /* JMP FAR */
550 *p++ = ip; /* IP */
551 *p++ = ip >> 8;
552 *p++ = segs[1]; /* CS */
553 *p++ = segs[1] >> 8;
554
555 /* sign rom */
556 sum = 0;
557 for (i = 0; i < (sizeof(rom) - 1); i++)
558 sum += rom[i];
559 rom[sizeof(rom) - 1] = -sum;
560
561 cpu_physical_memory_write_rom(option_rom, rom, sizeof(rom));
562 }
563
564 static long get_file_size(FILE *f)
565 {
566 long where, size;
567
568 /* XXX: on Unix systems, using fstat() probably makes more sense */
569
570 where = ftell(f);
571 fseek(f, 0, SEEK_END);
572 size = ftell(f);
573 fseek(f, where, SEEK_SET);
574
575 return size;
576 }
577
578 static void load_linux(target_phys_addr_t option_rom,
579 const char *kernel_filename,
580 const char *initrd_filename,
581 const char *kernel_cmdline)
582 {
583 uint16_t protocol;
584 uint32_t gpr[8];
585 uint16_t seg[6];
586 uint16_t real_seg;
587 int setup_size, kernel_size, initrd_size, cmdline_size;
588 uint32_t initrd_max;
589 uint8_t header[1024];
590 target_phys_addr_t real_addr, prot_addr, cmdline_addr, initrd_addr;
591 FILE *f, *fi;
592
593 /* Align to 16 bytes as a paranoia measure */
594 cmdline_size = (strlen(kernel_cmdline)+16) & ~15;
595
596 /* load the kernel header */
597 f = fopen(kernel_filename, "rb");
598 if (!f || !(kernel_size = get_file_size(f)) ||
599 fread(header, 1, 1024, f) != 1024) {
600 fprintf(stderr, "qemu: could not load kernel '%s'\n",
601 kernel_filename);
602 exit(1);
603 }
604
605 /* kernel protocol version */
606 #if 0
607 fprintf(stderr, "header magic: %#x\n", ldl_p(header+0x202));
608 #endif
609 if (ldl_p(header+0x202) == 0x53726448)
610 protocol = lduw_p(header+0x206);
611 else
612 protocol = 0;
613
614 if (protocol < 0x200 || !(header[0x211] & 0x01)) {
615 /* Low kernel */
616 real_addr = 0x90000;
617 cmdline_addr = 0x9a000 - cmdline_size;
618 prot_addr = 0x10000;
619 } else if (protocol < 0x202) {
620 /* High but ancient kernel */
621 real_addr = 0x90000;
622 cmdline_addr = 0x9a000 - cmdline_size;
623 prot_addr = 0x100000;
624 } else {
625 /* High and recent kernel */
626 real_addr = 0x10000;
627 cmdline_addr = 0x20000;
628 prot_addr = 0x100000;
629 }
630
631 #if 0
632 fprintf(stderr,
633 "qemu: real_addr = 0x" TARGET_FMT_plx "\n"
634 "qemu: cmdline_addr = 0x" TARGET_FMT_plx "\n"
635 "qemu: prot_addr = 0x" TARGET_FMT_plx "\n",
636 real_addr,
637 cmdline_addr,
638 prot_addr);
639 #endif
640
641 /* highest address for loading the initrd */
642 if (protocol >= 0x203)
643 initrd_max = ldl_p(header+0x22c);
644 else
645 initrd_max = 0x37ffffff;
646
647 if (initrd_max >= ram_size-ACPI_DATA_SIZE)
648 initrd_max = ram_size-ACPI_DATA_SIZE-1;
649
650 /* kernel command line */
651 pstrcpy_targphys(cmdline_addr, 4096, kernel_cmdline);
652
653 if (protocol >= 0x202) {
654 stl_p(header+0x228, cmdline_addr);
655 } else {
656 stw_p(header+0x20, 0xA33F);
657 stw_p(header+0x22, cmdline_addr-real_addr);
658 }
659
660 /* loader type */
661 /* High nybble = B reserved for Qemu; low nybble is revision number.
662 If this code is substantially changed, you may want to consider
663 incrementing the revision. */
664 if (protocol >= 0x200)
665 header[0x210] = 0xB0;
666
667 /* heap */
668 if (protocol >= 0x201) {
669 header[0x211] |= 0x80; /* CAN_USE_HEAP */
670 stw_p(header+0x224, cmdline_addr-real_addr-0x200);
671 }
672
673 /* load initrd */
674 if (initrd_filename) {
675 if (protocol < 0x200) {
676 fprintf(stderr, "qemu: linux kernel too old to load a ram disk\n");
677 exit(1);
678 }
679
680 fi = fopen(initrd_filename, "rb");
681 if (!fi) {
682 fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
683 initrd_filename);
684 exit(1);
685 }
686
687 initrd_size = get_file_size(fi);
688 initrd_addr = (initrd_max-initrd_size) & ~4095;
689
690 fprintf(stderr, "qemu: loading initrd (%#x bytes) at 0x" TARGET_FMT_plx
691 "\n", initrd_size, initrd_addr);
692
693 if (!fread_targphys_ok(initrd_addr, initrd_size, fi)) {
694 fprintf(stderr, "qemu: read error on initial ram disk '%s'\n",
695 initrd_filename);
696 exit(1);
697 }
698 fclose(fi);
699
700 stl_p(header+0x218, initrd_addr);
701 stl_p(header+0x21c, initrd_size);
702 }
703
704 /* store the finalized header and load the rest of the kernel */
705 cpu_physical_memory_write(real_addr, header, 1024);
706
707 setup_size = header[0x1f1];
708 if (setup_size == 0)
709 setup_size = 4;
710
711 setup_size = (setup_size+1)*512;
712 kernel_size -= setup_size; /* Size of protected-mode code */
713
714 if (!fread_targphys_ok(real_addr+1024, setup_size-1024, f) ||
715 !fread_targphys_ok(prot_addr, kernel_size, f)) {
716 fprintf(stderr, "qemu: read error on kernel '%s'\n",
717 kernel_filename);
718 exit(1);
719 }
720 fclose(f);
721
722 /* generate bootsector to set up the initial register state */
723 real_seg = real_addr >> 4;
724 seg[0] = seg[2] = seg[3] = seg[4] = seg[4] = real_seg;
725 seg[1] = real_seg+0x20; /* CS */
726 memset(gpr, 0, sizeof gpr);
727 gpr[4] = cmdline_addr-real_addr-16; /* SP (-16 is paranoia) */
728
729 generate_bootsect(option_rom, gpr, seg, 0);
730 }
731
732 static void main_cpu_reset(void *opaque)
733 {
734 CPUState *env = opaque;
735 cpu_reset(env);
736 }
737
738 static const int ide_iobase[2] = { 0x1f0, 0x170 };
739 static const int ide_iobase2[2] = { 0x3f6, 0x376 };
740 static const int ide_irq[2] = { 14, 15 };
741
742 #define NE2000_NB_MAX 6
743
744 static int ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360, 0x280, 0x380 };
745 static int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 };
746
747 static int serial_io[MAX_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
748 static int serial_irq[MAX_SERIAL_PORTS] = { 4, 3, 4, 3 };
749
750 static int parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc };
751 static int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 };
752
753 #ifdef HAS_AUDIO
754 static void audio_init (PCIBus *pci_bus, qemu_irq *pic)
755 {
756 struct soundhw *c;
757 int audio_enabled = 0;
758
759 for (c = soundhw; !audio_enabled && c->name; ++c) {
760 audio_enabled = c->enabled;
761 }
762
763 if (audio_enabled) {
764 AudioState *s;
765
766 s = AUD_init ();
767 if (s) {
768 for (c = soundhw; c->name; ++c) {
769 if (c->enabled) {
770 if (c->isa) {
771 c->init.init_isa (s, pic);
772 }
773 else {
774 if (pci_bus) {
775 c->init.init_pci (pci_bus, s);
776 }
777 }
778 }
779 }
780 }
781 }
782 }
783 #endif
784
785 static void pc_init_ne2k_isa(NICInfo *nd, qemu_irq *pic)
786 {
787 static int nb_ne2k = 0;
788
789 if (nb_ne2k == NE2000_NB_MAX)
790 return;
791 isa_ne2000_init(ne2000_io[nb_ne2k], pic[ne2000_irq[nb_ne2k]], nd);
792 nb_ne2k++;
793 }
794
795 static int load_option_rom(const char *oprom, target_phys_addr_t start,
796 target_phys_addr_t end)
797 {
798 int size;
799
800 size = get_image_size(oprom);
801 if (size > 0 && start + size > end) {
802 fprintf(stderr, "Not enough space to load option rom '%s'\n",
803 oprom);
804 exit(1);
805 }
806 size = load_image_targphys(oprom, start, end - start);
807 if (size < 0) {
808 fprintf(stderr, "Could not load option rom '%s'\n", oprom);
809 exit(1);
810 }
811 /* Round up optiom rom size to the next 2k boundary */
812 size = (size + 2047) & ~2047;
813 return size;
814 }
815
816 typedef struct rom_reset_data {
817 uint8_t *data;
818 target_phys_addr_t addr;
819 unsigned size;
820 } RomResetData;
821
822 static void option_rom_reset(void *_rrd)
823 {
824 RomResetData *rrd = _rrd;
825
826 cpu_physical_memory_write_rom(rrd->addr, rrd->data, rrd->size);
827 }
828
829 static void option_rom_setup_reset(target_phys_addr_t addr, unsigned size)
830 {
831 RomResetData *rrd = qemu_malloc(sizeof *rrd);
832
833 rrd->data = qemu_malloc(size);
834 cpu_physical_memory_read(addr, rrd->data, size);
835 rrd->addr = addr;
836 rrd->size = size;
837 qemu_register_reset(option_rom_reset, rrd);
838 }
839
840 CPUState *pc_new_cpu(int cpu, const char *cpu_model, int pci_enabled)
841 {
842 CPUState *env = cpu_init(cpu_model);
843 if (!env) {
844 fprintf(stderr, "Unable to find x86 CPU definition\n");
845 exit(1);
846 }
847 if (cpu != 0)
848 env->halted = 1;
849 if (smp_cpus > 1) {
850 /* XXX: enable it in all cases */
851 env->cpuid_features |= CPUID_APIC;
852 }
853 qemu_register_reset(main_cpu_reset, env);
854 if (pci_enabled) {
855 apic_init(env);
856 }
857 return env;
858 }
859
860 /* PC hardware initialisation */
861 static void pc_init1(ram_addr_t ram_size, int vga_ram_size,
862 const char *boot_device,
863 const char *kernel_filename, const char *kernel_cmdline,
864 const char *initrd_filename,
865 int pci_enabled, const char *cpu_model)
866 {
867 char buf[1024];
868 int ret, linux_boot, i;
869 ram_addr_t ram_addr, bios_offset, option_rom_offset;
870 ram_addr_t below_4g_mem_size, above_4g_mem_size = 0;
871 int bios_size, isa_bios_size, oprom_area_size;
872 int pci_option_rom_offset;
873 PCIBus *pci_bus;
874 int piix3_devfn = -1;
875 CPUState *env;
876 qemu_irq *cpu_irq;
877 qemu_irq *i8259;
878 int index;
879 BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
880 BlockDriverState *fd[MAX_FD];
881 int using_vga = cirrus_vga_enabled || std_vga_enabled || vmsvga_enabled;
882
883 if (ram_size >= 0xe0000000 ) {
884 above_4g_mem_size = ram_size - 0xe0000000;
885 below_4g_mem_size = 0xe0000000;
886 } else {
887 below_4g_mem_size = ram_size;
888 }
889
890 linux_boot = (kernel_filename != NULL);
891
892 /* init CPUs */
893 if (cpu_model == NULL) {
894 #ifdef TARGET_X86_64
895 cpu_model = "qemu64";
896 #else
897 cpu_model = "qemu32";
898 #endif
899 }
900
901 for(i = 0; i < smp_cpus; i++) {
902 env = pc_new_cpu(i, cpu_model, pci_enabled);
903 }
904
905 vmport_init();
906
907 /* allocate RAM */
908 ram_addr = qemu_ram_alloc(0xa0000);
909 cpu_register_physical_memory(0, 0xa0000, ram_addr);
910
911 /* Allocate, even though we won't register, so we don't break the
912 * phys_ram_base + PA assumption. This range includes vga (0xa0000 - 0xc0000),
913 * and some bios areas, which will be registered later
914 */
915 ram_addr = qemu_ram_alloc(0x100000 - 0xa0000);
916 ram_addr = qemu_ram_alloc(below_4g_mem_size - 0x100000);
917 cpu_register_physical_memory(0x100000,
918 below_4g_mem_size - 0x100000,
919 ram_addr);
920
921 /* above 4giga memory allocation */
922 if (above_4g_mem_size > 0) {
923 ram_addr = qemu_ram_alloc(above_4g_mem_size);
924 if (hpagesize) {
925 if (ram_addr & (hpagesize-1)) {
926 unsigned long aligned_addr;
927 aligned_addr = (ram_addr + hpagesize - 1) & ~(hpagesize-1);
928 qemu_ram_alloc(aligned_addr - ram_addr);
929 ram_addr = aligned_addr;
930 }
931 }
932 cpu_register_physical_memory(0x100000000ULL,
933 above_4g_mem_size,
934 ram_addr);
935 }
936
937
938 /* BIOS load */
939 if (bios_name == NULL)
940 bios_name = BIOS_FILENAME;
941 snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name);
942 bios_size = get_image_size(buf);
943 if (bios_size <= 0 ||
944 (bios_size % 65536) != 0) {
945 goto bios_error;
946 }
947 bios_offset = qemu_ram_alloc(bios_size);
948 ret = load_image(buf, qemu_get_ram_ptr(bios_offset));
949 if (ret != bios_size) {
950 bios_error:
951 fprintf(stderr, "qemu: could not load PC BIOS '%s'\n", buf);
952 exit(1);
953 }
954 /* map the last 128KB of the BIOS in ISA space */
955 isa_bios_size = bios_size;
956 if (isa_bios_size > (128 * 1024))
957 isa_bios_size = 128 * 1024;
958 cpu_register_physical_memory(0xd0000, (192 * 1024) - isa_bios_size,
959 IO_MEM_UNASSIGNED);
960 /* kvm tpr optimization needs the bios accessible for write, at least to qemu itself */
961 cpu_register_physical_memory(0x100000 - isa_bios_size,
962 isa_bios_size,
963 (bios_offset + bios_size - isa_bios_size) /* | IO_MEM_ROM */);
964
965 if (extboot_drive != -1) {
966 snprintf(buf, sizeof(buf), "%s/%s", bios_dir, EXTBOOT_FILENAME);
967 option_rom[nb_option_roms++] = strdup(buf);
968 }
969
970 option_rom_offset = qemu_ram_alloc(0x20000);
971 oprom_area_size = 0;
972 cpu_register_physical_memory(0xc0000, 0x20000, option_rom_offset);
973
974 if (using_vga) {
975 /* VGA BIOS load */
976 if (cirrus_vga_enabled) {
977 snprintf(buf, sizeof(buf), "%s/%s", bios_dir,
978 VGABIOS_CIRRUS_FILENAME);
979 } else {
980 snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME);
981 }
982 oprom_area_size = load_option_rom(buf, 0xc0000, 0xe0000);
983 pci_option_rom_offset = oprom_area_size;
984 }
985 /* Although video roms can grow larger than 0x8000, the area between
986 * 0xc0000 - 0xc8000 is reserved for them. It means we won't be looking
987 * for any other kind of option rom inside this area */
988 if (oprom_area_size < 0x8000)
989 oprom_area_size = 0x8000;
990
991 if (linux_boot) {
992 load_linux(0xc0000 + oprom_area_size,
993 kernel_filename, initrd_filename, kernel_cmdline);
994 oprom_area_size += 2048;
995 }
996
997 for (i = 0; i < nb_option_roms; i++) {
998 oprom_area_size += load_option_rom(option_rom[i],
999 0xc0000 + oprom_area_size, 0xe0000);
1000 }
1001
1002 /* map all the bios at the top of memory */
1003 cpu_register_physical_memory((uint32_t)(-bios_size),
1004 bios_size, bios_offset | IO_MEM_ROM);
1005
1006 bochs_bios_init();
1007
1008 cpu_irq = qemu_allocate_irqs(pic_irq_request, NULL, 1);
1009 i8259 = i8259_init(cpu_irq[0]);
1010 ferr_irq = i8259[13];
1011
1012 if (pci_enabled) {
1013 pci_bus = i440fx_init(&i440fx_state, i8259);
1014 piix3_devfn = piix3_init(pci_bus, -1);
1015 } else {
1016 pci_bus = NULL;
1017 }
1018
1019 /* init basic PC hardware */
1020 register_ioport_write(0x80, 1, 1, ioport80_write, NULL);
1021
1022 register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL);
1023
1024 if (cirrus_vga_enabled) {
1025 if (pci_enabled) {
1026 pci_cirrus_vga_init(pci_bus, vga_ram_size);
1027 } else {
1028 isa_cirrus_vga_init(vga_ram_size);
1029 }
1030 } else if (vmsvga_enabled) {
1031 if (pci_enabled)
1032 pci_vmsvga_init(pci_bus, vga_ram_size);
1033 else
1034 fprintf(stderr, "%s: vmware_vga: no PCI bus\n", __FUNCTION__);
1035 } else if (std_vga_enabled) {
1036 if (pci_enabled) {
1037 pci_vga_init(pci_bus, vga_ram_size, 0, 0);
1038 } else {
1039 isa_vga_init(vga_ram_size);
1040 }
1041 }
1042
1043 rtc_state = rtc_init(0x70, i8259[8], 2000);
1044
1045 qemu_register_boot_set(pc_boot_set, rtc_state);
1046
1047 register_ioport_read(0x92, 1, 1, ioport92_read, NULL);
1048 register_ioport_write(0x92, 1, 1, ioport92_write, NULL);
1049
1050 if (pci_enabled) {
1051 ioapic = ioapic_init();
1052 }
1053 #ifdef USE_KVM_PIT
1054 if (kvm_enabled() && qemu_kvm_pit_in_kernel())
1055 pit = kvm_pit_init(0x40, i8259[0]);
1056 else
1057 #endif
1058 pit = pit_init(0x40, i8259[0]);
1059 pcspk_init(pit);
1060 if (!no_hpet) {
1061 hpet_init(i8259);
1062 }
1063 if (pci_enabled) {
1064 pic_set_alt_irq_func(isa_pic, ioapic_set_irq, ioapic);
1065 }
1066
1067 for(i = 0; i < MAX_SERIAL_PORTS; i++) {
1068 if (serial_hds[i]) {
1069 serial_init(serial_io[i], i8259[serial_irq[i]], 115200,
1070 serial_hds[i]);
1071 }
1072 }
1073
1074 for(i = 0; i < MAX_PARALLEL_PORTS; i++) {
1075 if (parallel_hds[i]) {
1076 parallel_init(parallel_io[i], i8259[parallel_irq[i]],
1077 parallel_hds[i]);
1078 }
1079 }
1080
1081 watchdog_pc_init(pci_bus);
1082
1083 for(i = 0; i < nb_nics; i++) {
1084 NICInfo *nd = &nd_table[i];
1085
1086 if (!pci_enabled || (nd->model && strcmp(nd->model, "ne2k_isa") == 0))
1087 pc_init_ne2k_isa(nd, i8259);
1088 else
1089 pci_nic_init(pci_bus, nd, -1, "rtl8139");
1090 }
1091
1092 qemu_system_hot_add_init(cpu_model);
1093
1094 if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
1095 fprintf(stderr, "qemu: too many IDE bus\n");
1096 exit(1);
1097 }
1098
1099 for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
1100 index = drive_get_index(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
1101 if (index != -1)
1102 hd[i] = drives_table[index].bdrv;
1103 else
1104 hd[i] = NULL;
1105 }
1106
1107 if (pci_enabled) {
1108 pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1, i8259);
1109 } else {
1110 for(i = 0; i < MAX_IDE_BUS; i++) {
1111 isa_ide_init(ide_iobase[i], ide_iobase2[i], i8259[ide_irq[i]],
1112 hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]);
1113 }
1114 }
1115
1116 i8042_init(i8259[1], i8259[12], 0x60);
1117 DMA_init(0);
1118 #ifdef HAS_AUDIO
1119 audio_init(pci_enabled ? pci_bus : NULL, i8259);
1120 #endif
1121
1122 for(i = 0; i < MAX_FD; i++) {
1123 index = drive_get_index(IF_FLOPPY, 0, i);
1124 if (index != -1)
1125 fd[i] = drives_table[index].bdrv;
1126 else
1127 fd[i] = NULL;
1128 }
1129 floppy_controller = fdctrl_init(i8259[6], 2, 0, 0x3f0, fd);
1130
1131 cmos_init(below_4g_mem_size, above_4g_mem_size, boot_device, hd);
1132
1133 if (pci_enabled && usb_enabled) {
1134 usb_uhci_piix3_init(pci_bus, piix3_devfn + 2);
1135 }
1136
1137 if (pci_enabled && acpi_enabled) {
1138 uint8_t *eeprom_buf = qemu_mallocz(8 * 256); /* XXX: make this persistent */
1139 i2c_bus *smbus;
1140
1141 /* TODO: Populate SPD eeprom data. */
1142 smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100, i8259[9]);
1143 for (i = 0; i < 8; i++) {
1144 smbus_eeprom_device_init(smbus, 0x50 + i, eeprom_buf + (i * 256));
1145 }
1146 }
1147
1148 if (i440fx_state) {
1149 i440fx_init_memory_mappings(i440fx_state);
1150 }
1151
1152 if (pci_enabled) {
1153 int max_bus;
1154 int bus, unit;
1155 void *scsi;
1156
1157 max_bus = drive_get_max_bus(IF_SCSI);
1158
1159 for (bus = 0; bus <= max_bus; bus++) {
1160 scsi = lsi_scsi_init(pci_bus, -1);
1161 for (unit = 0; unit < LSI_MAX_DEVS; unit++) {
1162 index = drive_get_index(IF_SCSI, bus, unit);
1163 if (index == -1)
1164 continue;
1165 lsi_scsi_attach(scsi, drives_table[index].bdrv, unit);
1166 }
1167 }
1168 }
1169
1170 /* Add virtio block devices */
1171 if (pci_enabled) {
1172 int index;
1173 int unit_id = 0;
1174
1175 while ((index = drive_get_index(IF_VIRTIO, 0, unit_id)) != -1) {
1176 virtio_blk_init(pci_bus, drives_table[index].bdrv);
1177 unit_id++;
1178 }
1179 }
1180
1181 if (extboot_drive != -1) {
1182 DriveInfo *info = &drives_table[extboot_drive];
1183 int cyls, heads, secs;
1184
1185 if (info->type != IF_IDE && info->type != IF_VIRTIO) {
1186 bdrv_guess_geometry(info->bdrv, &cyls, &heads, &secs);
1187 bdrv_set_geometry_hint(info->bdrv, cyls, heads, secs);
1188 }
1189
1190 extboot_init(info->bdrv, 1);
1191 }
1192
1193 /* Add virtio balloon device */
1194 if (pci_enabled)
1195 virtio_balloon_init(pci_bus);
1196
1197 /* Add virtio console devices */
1198 if (pci_enabled) {
1199 for(i = 0; i < MAX_VIRTIO_CONSOLES; i++) {
1200 if (virtcon_hds[i])
1201 virtio_console_init(pci_bus, virtcon_hds[i]);
1202 }
1203 }
1204
1205 #ifdef USE_KVM_DEVICE_ASSIGNMENT
1206 if (kvm_enabled()) {
1207 add_assigned_devices(pci_bus, assigned_devices, assigned_devices_index);
1208 assigned_dev_load_option_roms(pci_option_rom_offset);
1209 }
1210 #endif /* USE_KVM_DEVICE_ASSIGNMENT */
1211 }
1212
1213 static void pc_init_pci(ram_addr_t ram_size, int vga_ram_size,
1214 const char *boot_device,
1215 const char *kernel_filename,
1216 const char *kernel_cmdline,
1217 const char *initrd_filename,
1218 const char *cpu_model)
1219 {
1220 pc_init1(ram_size, vga_ram_size, boot_device,
1221 kernel_filename, kernel_cmdline,
1222 initrd_filename, 1, cpu_model);
1223 }
1224
1225 static void pc_init_isa(ram_addr_t ram_size, int vga_ram_size,
1226 const char *boot_device,
1227 const char *kernel_filename,
1228 const char *kernel_cmdline,
1229 const char *initrd_filename,
1230 const char *cpu_model)
1231 {
1232 pc_init1(ram_size, vga_ram_size, boot_device,
1233 kernel_filename, kernel_cmdline,
1234 initrd_filename, 0, cpu_model);
1235 }
1236
1237 /* set CMOS shutdown status register (index 0xF) as S3_resume(0xFE)
1238 BIOS will read it and start S3 resume at POST Entry */
1239 void cmos_set_s3_resume(void)
1240 {
1241 if (rtc_state)
1242 rtc_set_memory(rtc_state, 0xF, 0xFE);
1243 }
1244
1245 QEMUMachine pc_machine = {
1246 .name = "pc",
1247 .desc = "Standard PC",
1248 .init = pc_init_pci,
1249 .max_cpus = 255,
1250 };
1251
1252 QEMUMachine isapc_machine = {
1253 .name = "isapc",
1254 .desc = "ISA-only PC",
1255 .init = pc_init_isa,
1256 .max_cpus = 1,
1257 };
Patches shipped by Fedora