2 * QEMU PC System Emulator
4 * Copyright (c) 2003-2004 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
30 #include "audio/audio.h"
36 #include "hpet_emul.h"
40 /* output Bochs bios info messages */
43 #define BIOS_FILENAME "bios.bin"
44 #define VGABIOS_FILENAME "vgabios.bin"
45 #define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin"
47 #define PC_MAX_BIOS_SIZE (4 * 1024 * 1024)
49 /* Leave a chunk of memory at the top of RAM for the BIOS ACPI tables. */
50 #define ACPI_DATA_SIZE 0x10000
51 #define BIOS_CFG_IOPORT 0x510
52 #define FW_CFG_ACPI_TABLES (FW_CFG_ARCH_LOCAL + 0)
53 #define FW_CFG_SMBIOS_ENTRIES (FW_CFG_ARCH_LOCAL + 1)
57 static fdctrl_t
*floppy_controller
;
58 static RTCState
*rtc_state
;
60 static IOAPICState
*ioapic
;
61 static PCIDevice
*i440fx_state
;
63 typedef struct rom_reset_data
{
65 target_phys_addr_t addr
;
69 static void option_rom_reset(void *_rrd
)
71 RomResetData
*rrd
= _rrd
;
73 cpu_physical_memory_write_rom(rrd
->addr
, rrd
->data
, rrd
->size
);
76 static void option_rom_setup_reset(target_phys_addr_t addr
, unsigned size
)
78 RomResetData
*rrd
= qemu_malloc(sizeof *rrd
);
80 rrd
->data
= qemu_malloc(size
);
81 cpu_physical_memory_read(addr
, rrd
->data
, size
);
84 qemu_register_reset(option_rom_reset
, 0, rrd
);
87 static void ioport80_write(void *opaque
, uint32_t addr
, uint32_t data
)
91 /* MSDOS compatibility mode FPU exception support */
92 static qemu_irq ferr_irq
;
93 /* XXX: add IGNNE support */
94 void cpu_set_ferr(CPUX86State
*s
)
96 qemu_irq_raise(ferr_irq
);
99 static void ioportF0_write(void *opaque
, uint32_t addr
, uint32_t data
)
101 qemu_irq_lower(ferr_irq
);
105 uint64_t cpu_get_tsc(CPUX86State
*env
)
107 /* Note: when using kqemu, it is more logical to return the host TSC
108 because kqemu does not trap the RDTSC instruction for
109 performance reasons */
111 if (env
->kqemu_enabled
) {
112 return cpu_get_real_ticks();
116 return cpu_get_ticks();
121 void cpu_smm_update(CPUState
*env
)
123 if (i440fx_state
&& env
== first_cpu
)
124 i440fx_set_smm(i440fx_state
, (env
->hflags
>> HF_SMM_SHIFT
) & 1);
129 int cpu_get_pic_interrupt(CPUState
*env
)
133 intno
= apic_get_interrupt(env
);
135 /* set irq request if a PIC irq is still pending */
136 /* XXX: improve that */
137 pic_update_irq(isa_pic
);
140 /* read the irq from the PIC */
141 if (!apic_accept_pic_intr(env
))
144 intno
= pic_read_irq(isa_pic
);
148 static void pic_irq_request(void *opaque
, int irq
, int level
)
150 CPUState
*env
= first_cpu
;
152 if (env
->apic_state
) {
154 if (apic_accept_pic_intr(env
))
155 apic_deliver_pic_intr(env
, level
);
160 cpu_interrupt(env
, CPU_INTERRUPT_HARD
);
162 cpu_reset_interrupt(env
, CPU_INTERRUPT_HARD
);
166 /* PC cmos mappings */
168 #define REG_EQUIPMENT_BYTE 0x14
170 static int cmos_get_fd_drive_type(int fd0
)
176 /* 1.44 Mb 3"5 drive */
180 /* 2.88 Mb 3"5 drive */
184 /* 1.2 Mb 5"5 drive */
194 static void cmos_init_hd(int type_ofs
, int info_ofs
, BlockDriverState
*hd
)
196 RTCState
*s
= rtc_state
;
197 int cylinders
, heads
, sectors
;
198 bdrv_get_geometry_hint(hd
, &cylinders
, &heads
, §ors
);
199 rtc_set_memory(s
, type_ofs
, 47);
200 rtc_set_memory(s
, info_ofs
, cylinders
);
201 rtc_set_memory(s
, info_ofs
+ 1, cylinders
>> 8);
202 rtc_set_memory(s
, info_ofs
+ 2, heads
);
203 rtc_set_memory(s
, info_ofs
+ 3, 0xff);
204 rtc_set_memory(s
, info_ofs
+ 4, 0xff);
205 rtc_set_memory(s
, info_ofs
+ 5, 0xc0 | ((heads
> 8) << 3));
206 rtc_set_memory(s
, info_ofs
+ 6, cylinders
);
207 rtc_set_memory(s
, info_ofs
+ 7, cylinders
>> 8);
208 rtc_set_memory(s
, info_ofs
+ 8, sectors
);
211 /* convert boot_device letter to something recognizable by the bios */
212 static int boot_device2nibble(char boot_device
)
214 switch(boot_device
) {
217 return 0x01; /* floppy boot */
219 return 0x02; /* hard drive boot */
221 return 0x03; /* CD-ROM boot */
223 return 0x04; /* Network boot */
228 /* copy/pasted from cmos_init, should be made a general function
229 and used there as well */
230 static int pc_boot_set(void *opaque
, const char *boot_device
)
232 Monitor
*mon
= cur_mon
;
233 #define PC_MAX_BOOT_DEVICES 3
234 RTCState
*s
= (RTCState
*)opaque
;
235 int nbds
, bds
[3] = { 0, };
238 nbds
= strlen(boot_device
);
239 if (nbds
> PC_MAX_BOOT_DEVICES
) {
240 monitor_printf(mon
, "Too many boot devices for PC\n");
243 for (i
= 0; i
< nbds
; i
++) {
244 bds
[i
] = boot_device2nibble(boot_device
[i
]);
246 monitor_printf(mon
, "Invalid boot device for PC: '%c'\n",
251 rtc_set_memory(s
, 0x3d, (bds
[1] << 4) | bds
[0]);
252 rtc_set_memory(s
, 0x38, (bds
[2] << 4));
256 /* hd_table must contain 4 block drivers */
257 static void cmos_init(ram_addr_t ram_size
, ram_addr_t above_4g_mem_size
,
258 const char *boot_device
, BlockDriverState
**hd_table
)
260 RTCState
*s
= rtc_state
;
261 int nbds
, bds
[3] = { 0, };
266 /* various important CMOS locations needed by PC/Bochs bios */
269 val
= 640; /* base memory in K */
270 rtc_set_memory(s
, 0x15, val
);
271 rtc_set_memory(s
, 0x16, val
>> 8);
273 val
= (ram_size
/ 1024) - 1024;
276 rtc_set_memory(s
, 0x17, val
);
277 rtc_set_memory(s
, 0x18, val
>> 8);
278 rtc_set_memory(s
, 0x30, val
);
279 rtc_set_memory(s
, 0x31, val
>> 8);
281 if (above_4g_mem_size
) {
282 rtc_set_memory(s
, 0x5b, (unsigned int)above_4g_mem_size
>> 16);
283 rtc_set_memory(s
, 0x5c, (unsigned int)above_4g_mem_size
>> 24);
284 rtc_set_memory(s
, 0x5d, (uint64_t)above_4g_mem_size
>> 32);
287 if (ram_size
> (16 * 1024 * 1024))
288 val
= (ram_size
/ 65536) - ((16 * 1024 * 1024) / 65536);
293 rtc_set_memory(s
, 0x34, val
);
294 rtc_set_memory(s
, 0x35, val
>> 8);
296 /* set the number of CPU */
297 rtc_set_memory(s
, 0x5f, smp_cpus
- 1);
299 /* set boot devices, and disable floppy signature check if requested */
300 #define PC_MAX_BOOT_DEVICES 3
301 nbds
= strlen(boot_device
);
302 if (nbds
> PC_MAX_BOOT_DEVICES
) {
303 fprintf(stderr
, "Too many boot devices for PC\n");
306 for (i
= 0; i
< nbds
; i
++) {
307 bds
[i
] = boot_device2nibble(boot_device
[i
]);
309 fprintf(stderr
, "Invalid boot device for PC: '%c'\n",
314 rtc_set_memory(s
, 0x3d, (bds
[1] << 4) | bds
[0]);
315 rtc_set_memory(s
, 0x38, (bds
[2] << 4) | (fd_bootchk
? 0x0 : 0x1));
319 fd0
= fdctrl_get_drive_type(floppy_controller
, 0);
320 fd1
= fdctrl_get_drive_type(floppy_controller
, 1);
322 val
= (cmos_get_fd_drive_type(fd0
) << 4) | cmos_get_fd_drive_type(fd1
);
323 rtc_set_memory(s
, 0x10, val
);
335 val
|= 0x01; /* 1 drive, ready for boot */
338 val
|= 0x41; /* 2 drives, ready for boot */
341 val
|= 0x02; /* FPU is there */
342 val
|= 0x04; /* PS/2 mouse installed */
343 rtc_set_memory(s
, REG_EQUIPMENT_BYTE
, val
);
347 rtc_set_memory(s
, 0x12, (hd_table
[0] ? 0xf0 : 0) | (hd_table
[1] ? 0x0f : 0));
349 cmos_init_hd(0x19, 0x1b, hd_table
[0]);
351 cmos_init_hd(0x1a, 0x24, hd_table
[1]);
354 for (i
= 0; i
< 4; i
++) {
356 int cylinders
, heads
, sectors
, translation
;
357 /* NOTE: bdrv_get_geometry_hint() returns the physical
358 geometry. It is always such that: 1 <= sects <= 63, 1
359 <= heads <= 16, 1 <= cylinders <= 16383. The BIOS
360 geometry can be different if a translation is done. */
361 translation
= bdrv_get_translation_hint(hd_table
[i
]);
362 if (translation
== BIOS_ATA_TRANSLATION_AUTO
) {
363 bdrv_get_geometry_hint(hd_table
[i
], &cylinders
, &heads
, §ors
);
364 if (cylinders
<= 1024 && heads
<= 16 && sectors
<= 63) {
365 /* No translation. */
368 /* LBA translation. */
374 val
|= translation
<< (i
* 2);
377 rtc_set_memory(s
, 0x39, val
);
380 void ioport_set_a20(int enable
)
382 /* XXX: send to all CPUs ? */
383 cpu_x86_set_a20(first_cpu
, enable
);
386 int ioport_get_a20(void)
388 return ((first_cpu
->a20_mask
>> 20) & 1);
391 static void ioport92_write(void *opaque
, uint32_t addr
, uint32_t val
)
393 ioport_set_a20((val
>> 1) & 1);
394 /* XXX: bit 0 is fast reset */
397 static uint32_t ioport92_read(void *opaque
, uint32_t addr
)
399 return ioport_get_a20() << 1;
402 /***********************************************************/
403 /* Bochs BIOS debug ports */
405 static void bochs_bios_write(void *opaque
, uint32_t addr
, uint32_t val
)
407 static const char shutdown_str
[8] = "Shutdown";
408 static int shutdown_index
= 0;
411 /* Bochs BIOS messages */
414 fprintf(stderr
, "BIOS panic at rombios.c, line %d\n", val
);
419 fprintf(stderr
, "%c", val
);
423 /* same as Bochs power off */
424 if (val
== shutdown_str
[shutdown_index
]) {
426 if (shutdown_index
== 8) {
428 qemu_system_shutdown_request();
435 /* LGPL'ed VGA BIOS messages */
438 fprintf(stderr
, "VGA BIOS panic, line %d\n", val
);
443 fprintf(stderr
, "%c", val
);
449 extern uint64_t node_cpumask
[MAX_NODES
];
451 static void bochs_bios_init(void)
454 uint8_t *smbios_table
;
456 uint64_t *numa_fw_cfg
;
459 register_ioport_write(0x400, 1, 2, bochs_bios_write
, NULL
);
460 register_ioport_write(0x401, 1, 2, bochs_bios_write
, NULL
);
461 register_ioport_write(0x402, 1, 1, bochs_bios_write
, NULL
);
462 register_ioport_write(0x403, 1, 1, bochs_bios_write
, NULL
);
463 register_ioport_write(0x8900, 1, 1, bochs_bios_write
, NULL
);
465 register_ioport_write(0x501, 1, 2, bochs_bios_write
, NULL
);
466 register_ioport_write(0x502, 1, 2, bochs_bios_write
, NULL
);
467 register_ioport_write(0x500, 1, 1, bochs_bios_write
, NULL
);
468 register_ioport_write(0x503, 1, 1, bochs_bios_write
, NULL
);
470 fw_cfg
= fw_cfg_init(BIOS_CFG_IOPORT
, BIOS_CFG_IOPORT
+ 1, 0, 0);
471 fw_cfg_add_i32(fw_cfg
, FW_CFG_ID
, 1);
472 fw_cfg_add_i64(fw_cfg
, FW_CFG_RAM_SIZE
, (uint64_t)ram_size
);
473 fw_cfg_add_bytes(fw_cfg
, FW_CFG_ACPI_TABLES
, (uint8_t *)acpi_tables
,
476 smbios_table
= smbios_get_table(&smbios_len
);
478 fw_cfg_add_bytes(fw_cfg
, FW_CFG_SMBIOS_ENTRIES
,
479 smbios_table
, smbios_len
);
481 /* allocate memory for the NUMA channel: one (64bit) word for the number
482 * of nodes, one word for each VCPU->node and one word for each node to
483 * hold the amount of memory.
485 numa_fw_cfg
= qemu_mallocz((1 + smp_cpus
+ nb_numa_nodes
) * 8);
486 numa_fw_cfg
[0] = cpu_to_le64(nb_numa_nodes
);
487 for (i
= 0; i
< smp_cpus
; i
++) {
488 for (j
= 0; j
< nb_numa_nodes
; j
++) {
489 if (node_cpumask
[j
] & (1 << i
)) {
490 numa_fw_cfg
[i
+ 1] = cpu_to_le64(j
);
495 for (i
= 0; i
< nb_numa_nodes
; i
++) {
496 numa_fw_cfg
[smp_cpus
+ 1 + i
] = cpu_to_le64(node_mem
[i
]);
498 fw_cfg_add_bytes(fw_cfg
, FW_CFG_NUMA
, (uint8_t *)numa_fw_cfg
,
499 (1 + smp_cpus
+ nb_numa_nodes
) * 8);
502 /* Generate an initial boot sector which sets state and jump to
503 a specified vector */
504 static void generate_bootsect(target_phys_addr_t option_rom
,
505 uint32_t gpr
[8], uint16_t segs
[6], uint16_t ip
)
507 uint8_t rom
[512], *p
, *reloc
;
511 memset(rom
, 0, sizeof(rom
));
514 /* Make sure we have an option rom signature */
518 /* ROM size in sectors*/
523 *p
++ = 0x50; /* push ax */
524 *p
++ = 0x1e; /* push ds */
525 *p
++ = 0x31; *p
++ = 0xc0; /* xor ax, ax */
526 *p
++ = 0x8e; *p
++ = 0xd8; /* mov ax, ds */
528 *p
++ = 0xc7; *p
++ = 0x06; /* movvw _start,0x64 */
529 *p
++ = 0x64; *p
++ = 0x00;
531 *p
++ = 0x00; *p
++ = 0x00;
533 *p
++ = 0x8c; *p
++ = 0x0e; /* mov cs,0x66 */
534 *p
++ = 0x66; *p
++ = 0x00;
536 *p
++ = 0x1f; /* pop ds */
537 *p
++ = 0x58; /* pop ax */
538 *p
++ = 0xcb; /* lret */
543 *p
++ = 0xfa; /* CLI */
544 *p
++ = 0xfc; /* CLD */
546 for (i
= 0; i
< 6; i
++) {
547 if (i
== 1) /* Skip CS */
550 *p
++ = 0xb8; /* MOV AX,imm16 */
553 *p
++ = 0x8e; /* MOV <seg>,AX */
554 *p
++ = 0xc0 + (i
<< 3);
557 for (i
= 0; i
< 8; i
++) {
558 *p
++ = 0x66; /* 32-bit operand size */
559 *p
++ = 0xb8 + i
; /* MOV <reg>,imm32 */
566 *p
++ = 0xea; /* JMP FAR */
569 *p
++ = segs
[1]; /* CS */
574 for (i
= 0; i
< (sizeof(rom
) - 1); i
++)
576 rom
[sizeof(rom
) - 1] = -sum
;
578 cpu_physical_memory_write_rom(option_rom
, rom
, sizeof(rom
));
579 option_rom_setup_reset(option_rom
, sizeof (rom
));
582 static long get_file_size(FILE *f
)
586 /* XXX: on Unix systems, using fstat() probably makes more sense */
589 fseek(f
, 0, SEEK_END
);
591 fseek(f
, where
, SEEK_SET
);
596 static void load_linux(target_phys_addr_t option_rom
,
597 const char *kernel_filename
,
598 const char *initrd_filename
,
599 const char *kernel_cmdline
,
600 target_phys_addr_t max_ram_size
)
606 int setup_size
, kernel_size
, initrd_size
= 0, cmdline_size
;
608 uint8_t header
[1024];
609 target_phys_addr_t real_addr
, prot_addr
, cmdline_addr
, initrd_addr
= 0;
612 /* Align to 16 bytes as a paranoia measure */
613 cmdline_size
= (strlen(kernel_cmdline
)+16) & ~15;
615 /* load the kernel header */
616 f
= fopen(kernel_filename
, "rb");
617 if (!f
|| !(kernel_size
= get_file_size(f
)) ||
618 fread(header
, 1, 1024, f
) != 1024) {
619 fprintf(stderr
, "qemu: could not load kernel '%s'\n",
624 /* kernel protocol version */
626 fprintf(stderr
, "header magic: %#x\n", ldl_p(header
+0x202));
628 if (ldl_p(header
+0x202) == 0x53726448)
629 protocol
= lduw_p(header
+0x206);
633 if (protocol
< 0x200 || !(header
[0x211] & 0x01)) {
636 cmdline_addr
= 0x9a000 - cmdline_size
;
638 } else if (protocol
< 0x202) {
639 /* High but ancient kernel */
641 cmdline_addr
= 0x9a000 - cmdline_size
;
642 prot_addr
= 0x100000;
644 /* High and recent kernel */
646 cmdline_addr
= 0x20000;
647 prot_addr
= 0x100000;
652 "qemu: real_addr = 0x" TARGET_FMT_plx
"\n"
653 "qemu: cmdline_addr = 0x" TARGET_FMT_plx
"\n"
654 "qemu: prot_addr = 0x" TARGET_FMT_plx
"\n",
660 /* highest address for loading the initrd */
661 if (protocol
>= 0x203)
662 initrd_max
= ldl_p(header
+0x22c);
664 initrd_max
= 0x37ffffff;
666 if (initrd_max
>= max_ram_size
-ACPI_DATA_SIZE
)
667 initrd_max
= max_ram_size
-ACPI_DATA_SIZE
-1;
669 /* kernel command line */
670 pstrcpy_targphys(cmdline_addr
, 4096, kernel_cmdline
);
672 if (protocol
>= 0x202) {
673 stl_p(header
+0x228, cmdline_addr
);
675 stw_p(header
+0x20, 0xA33F);
676 stw_p(header
+0x22, cmdline_addr
-real_addr
);
680 /* High nybble = B reserved for Qemu; low nybble is revision number.
681 If this code is substantially changed, you may want to consider
682 incrementing the revision. */
683 if (protocol
>= 0x200)
684 header
[0x210] = 0xB0;
687 if (protocol
>= 0x201) {
688 header
[0x211] |= 0x80; /* CAN_USE_HEAP */
689 stw_p(header
+0x224, cmdline_addr
-real_addr
-0x200);
693 if (initrd_filename
) {
694 if (protocol
< 0x200) {
695 fprintf(stderr
, "qemu: linux kernel too old to load a ram disk\n");
699 fi
= fopen(initrd_filename
, "rb");
701 fprintf(stderr
, "qemu: could not load initial ram disk '%s'\n",
706 initrd_size
= get_file_size(fi
);
707 initrd_addr
= (initrd_max
-initrd_size
) & ~4095;
709 if (!fread_targphys_ok(initrd_addr
, initrd_size
, fi
)) {
710 fprintf(stderr
, "qemu: read error on initial ram disk '%s'\n",
716 stl_p(header
+0x218, initrd_addr
);
717 stl_p(header
+0x21c, initrd_size
);
720 /* store the finalized header and load the rest of the kernel */
721 cpu_physical_memory_write(real_addr
, header
, 1024);
723 setup_size
= header
[0x1f1];
727 setup_size
= (setup_size
+1)*512;
728 kernel_size
-= setup_size
; /* Size of protected-mode code */
730 if (!fread_targphys_ok(real_addr
+1024, setup_size
-1024, f
) ||
731 !fread_targphys_ok(prot_addr
, kernel_size
, f
)) {
732 fprintf(stderr
, "qemu: read error on kernel '%s'\n",
738 /* generate bootsector to set up the initial register state */
739 real_seg
= real_addr
>> 4;
740 seg
[0] = seg
[2] = seg
[3] = seg
[4] = seg
[4] = real_seg
;
741 seg
[1] = real_seg
+0x20; /* CS */
742 memset(gpr
, 0, sizeof gpr
);
743 gpr
[4] = cmdline_addr
-real_addr
-16; /* SP (-16 is paranoia) */
745 option_rom_setup_reset(real_addr
, setup_size
);
746 option_rom_setup_reset(prot_addr
, kernel_size
);
747 option_rom_setup_reset(cmdline_addr
, cmdline_size
);
749 option_rom_setup_reset(initrd_addr
, initrd_size
);
751 generate_bootsect(option_rom
, gpr
, seg
, 0);
754 static const int ide_iobase
[2] = { 0x1f0, 0x170 };
755 static const int ide_iobase2
[2] = { 0x3f6, 0x376 };
756 static const int ide_irq
[2] = { 14, 15 };
758 #define NE2000_NB_MAX 6
760 static int ne2000_io
[NE2000_NB_MAX
] = { 0x300, 0x320, 0x340, 0x360, 0x280, 0x380 };
761 static int ne2000_irq
[NE2000_NB_MAX
] = { 9, 10, 11, 3, 4, 5 };
763 static int serial_io
[MAX_SERIAL_PORTS
] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
764 static int serial_irq
[MAX_SERIAL_PORTS
] = { 4, 3, 4, 3 };
766 static int parallel_io
[MAX_PARALLEL_PORTS
] = { 0x378, 0x278, 0x3bc };
767 static int parallel_irq
[MAX_PARALLEL_PORTS
] = { 7, 7, 7 };
770 static void audio_init (PCIBus
*pci_bus
, qemu_irq
*pic
)
774 for (c
= soundhw
; c
->name
; ++c
) {
777 c
->init
.init_isa(pic
);
780 c
->init
.init_pci(pci_bus
);
788 static void pc_init_ne2k_isa(NICInfo
*nd
, qemu_irq
*pic
)
790 static int nb_ne2k
= 0;
792 if (nb_ne2k
== NE2000_NB_MAX
)
794 isa_ne2000_init(ne2000_io
[nb_ne2k
], pic
[ne2000_irq
[nb_ne2k
]], nd
);
798 static int load_option_rom(const char *oprom
, target_phys_addr_t start
,
799 target_phys_addr_t end
)
804 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, oprom
);
806 size
= get_image_size(filename
);
807 if (size
> 0 && start
+ size
> end
) {
808 fprintf(stderr
, "Not enough space to load option rom '%s'\n",
812 size
= load_image_targphys(filename
, start
, end
- start
);
818 fprintf(stderr
, "Could not load option rom '%s'\n", oprom
);
821 /* Round up optiom rom size to the next 2k boundary */
822 size
= (size
+ 2047) & ~2047;
823 option_rom_setup_reset(start
, size
);
827 int cpu_is_bsp(CPUState
*env
)
829 return env
->cpuid_apic_id
== 0;
832 /* PC hardware initialisation */
833 static void pc_init1(ram_addr_t ram_size
,
834 const char *boot_device
,
835 const char *kernel_filename
, const char *kernel_cmdline
,
836 const char *initrd_filename
,
837 int pci_enabled
, const char *cpu_model
)
840 int ret
, linux_boot
, i
;
841 ram_addr_t ram_addr
, bios_offset
, option_rom_offset
;
842 ram_addr_t below_4g_mem_size
, above_4g_mem_size
= 0;
843 int bios_size
, isa_bios_size
, oprom_area_size
;
846 int piix3_devfn
= -1;
851 BlockDriverState
*hd
[MAX_IDE_BUS
* MAX_IDE_DEVS
];
852 BlockDriverState
*fd
[MAX_FD
];
853 int using_vga
= cirrus_vga_enabled
|| std_vga_enabled
|| vmsvga_enabled
;
855 if (ram_size
>= 0xe0000000 ) {
856 above_4g_mem_size
= ram_size
- 0xe0000000;
857 below_4g_mem_size
= 0xe0000000;
859 below_4g_mem_size
= ram_size
;
862 linux_boot
= (kernel_filename
!= NULL
);
865 if (cpu_model
== NULL
) {
867 cpu_model
= "qemu64";
869 cpu_model
= "qemu32";
873 for(i
= 0; i
< smp_cpus
; i
++) {
874 env
= cpu_init(cpu_model
);
876 fprintf(stderr
, "Unable to find x86 CPU definition\n");
879 if ((env
->cpuid_features
& CPUID_APIC
) || smp_cpus
> 1) {
880 env
->cpuid_apic_id
= env
->cpu_index
;
881 /* APIC reset callback resets cpu */
884 qemu_register_reset((QEMUResetHandler
*)cpu_reset
, 0, env
);
891 ram_addr
= qemu_ram_alloc(0xa0000);
892 cpu_register_physical_memory(0, 0xa0000, ram_addr
);
894 /* Allocate, even though we won't register, so we don't break the
895 * phys_ram_base + PA assumption. This range includes vga (0xa0000 - 0xc0000),
896 * and some bios areas, which will be registered later
898 ram_addr
= qemu_ram_alloc(0x100000 - 0xa0000);
899 ram_addr
= qemu_ram_alloc(below_4g_mem_size
- 0x100000);
900 cpu_register_physical_memory(0x100000,
901 below_4g_mem_size
- 0x100000,
904 /* above 4giga memory allocation */
905 if (above_4g_mem_size
> 0) {
906 #if TARGET_PHYS_ADDR_BITS == 32
907 hw_error("To much RAM for 32-bit physical address");
909 ram_addr
= qemu_ram_alloc(above_4g_mem_size
);
910 cpu_register_physical_memory(0x100000000ULL
,
918 if (bios_name
== NULL
)
919 bios_name
= BIOS_FILENAME
;
920 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, bios_name
);
922 bios_size
= get_image_size(filename
);
926 if (bios_size
<= 0 ||
927 (bios_size
% 65536) != 0) {
930 bios_offset
= qemu_ram_alloc(bios_size
);
931 ret
= load_image(filename
, qemu_get_ram_ptr(bios_offset
));
932 if (ret
!= bios_size
) {
934 fprintf(stderr
, "qemu: could not load PC BIOS '%s'\n", bios_name
);
940 /* map the last 128KB of the BIOS in ISA space */
941 isa_bios_size
= bios_size
;
942 if (isa_bios_size
> (128 * 1024))
943 isa_bios_size
= 128 * 1024;
944 cpu_register_physical_memory(0x100000 - isa_bios_size
,
946 (bios_offset
+ bios_size
- isa_bios_size
) | IO_MEM_ROM
);
950 option_rom_offset
= qemu_ram_alloc(0x20000);
952 cpu_register_physical_memory(0xc0000, 0x20000, option_rom_offset
);
955 const char *vgabios_filename
;
957 if (cirrus_vga_enabled
) {
958 vgabios_filename
= VGABIOS_CIRRUS_FILENAME
;
960 vgabios_filename
= VGABIOS_FILENAME
;
962 oprom_area_size
= load_option_rom(vgabios_filename
, 0xc0000, 0xe0000);
964 /* Although video roms can grow larger than 0x8000, the area between
965 * 0xc0000 - 0xc8000 is reserved for them. It means we won't be looking
966 * for any other kind of option rom inside this area */
967 if (oprom_area_size
< 0x8000)
968 oprom_area_size
= 0x8000;
971 load_linux(0xc0000 + oprom_area_size
,
972 kernel_filename
, initrd_filename
, kernel_cmdline
, below_4g_mem_size
);
973 oprom_area_size
+= 2048;
976 for (i
= 0; i
< nb_option_roms
; i
++) {
977 oprom_area_size
+= load_option_rom(option_rom
[i
], 0xc0000 + oprom_area_size
,
981 for (i
= 0; i
< nb_nics
; i
++) {
982 char nic_oprom
[1024];
983 const char *model
= nd_table
[i
].model
;
985 if (!nd_table
[i
].bootable
)
990 snprintf(nic_oprom
, sizeof(nic_oprom
), "pxe-%s.bin", model
);
992 oprom_area_size
+= load_option_rom(nic_oprom
, 0xc0000 + oprom_area_size
,
996 /* map all the bios at the top of memory */
997 cpu_register_physical_memory((uint32_t)(-bios_size
),
998 bios_size
, bios_offset
| IO_MEM_ROM
);
1002 cpu_irq
= qemu_allocate_irqs(pic_irq_request
, NULL
, 1);
1003 i8259
= i8259_init(cpu_irq
[0]);
1004 ferr_irq
= i8259
[13];
1007 pci_bus
= i440fx_init(&i440fx_state
, i8259
);
1008 piix3_devfn
= piix3_init(pci_bus
, -1);
1013 /* init basic PC hardware */
1014 register_ioport_write(0x80, 1, 1, ioport80_write
, NULL
);
1016 register_ioport_write(0xf0, 1, 1, ioportF0_write
, NULL
);
1018 if (cirrus_vga_enabled
) {
1020 pci_cirrus_vga_init(pci_bus
);
1022 isa_cirrus_vga_init();
1024 } else if (vmsvga_enabled
) {
1026 pci_vmsvga_init(pci_bus
);
1028 fprintf(stderr
, "%s: vmware_vga: no PCI bus\n", __FUNCTION__
);
1029 } else if (std_vga_enabled
) {
1031 pci_vga_init(pci_bus
, 0, 0);
1037 rtc_state
= rtc_init(0x70, i8259
[8], 2000);
1039 qemu_register_boot_set(pc_boot_set
, rtc_state
);
1041 register_ioport_read(0x92, 1, 1, ioport92_read
, NULL
);
1042 register_ioport_write(0x92, 1, 1, ioport92_write
, NULL
);
1045 ioapic
= ioapic_init();
1047 pit
= pit_init(0x40, i8259
[0]);
1053 pic_set_alt_irq_func(isa_pic
, ioapic_set_irq
, ioapic
);
1056 for(i
= 0; i
< MAX_SERIAL_PORTS
; i
++) {
1057 if (serial_hds
[i
]) {
1058 serial_init(serial_io
[i
], i8259
[serial_irq
[i
]], 115200,
1063 for(i
= 0; i
< MAX_PARALLEL_PORTS
; i
++) {
1064 if (parallel_hds
[i
]) {
1065 parallel_init(parallel_io
[i
], i8259
[parallel_irq
[i
]],
1070 watchdog_pc_init(pci_bus
);
1072 for(i
= 0; i
< nb_nics
; i
++) {
1073 NICInfo
*nd
= &nd_table
[i
];
1075 if (!pci_enabled
|| (nd
->model
&& strcmp(nd
->model
, "ne2k_isa") == 0))
1076 pc_init_ne2k_isa(nd
, i8259
);
1078 pci_nic_init(nd
, "ne2k_pci", NULL
);
1081 piix4_acpi_system_hot_add_init();
1083 if (drive_get_max_bus(IF_IDE
) >= MAX_IDE_BUS
) {
1084 fprintf(stderr
, "qemu: too many IDE bus\n");
1088 for(i
= 0; i
< MAX_IDE_BUS
* MAX_IDE_DEVS
; i
++) {
1089 index
= drive_get_index(IF_IDE
, i
/ MAX_IDE_DEVS
, i
% MAX_IDE_DEVS
);
1091 hd
[i
] = drives_table
[index
].bdrv
;
1097 pci_piix3_ide_init(pci_bus
, hd
, piix3_devfn
+ 1, i8259
);
1099 for(i
= 0; i
< MAX_IDE_BUS
; i
++) {
1100 isa_ide_init(ide_iobase
[i
], ide_iobase2
[i
], i8259
[ide_irq
[i
]],
1101 hd
[MAX_IDE_DEVS
* i
], hd
[MAX_IDE_DEVS
* i
+ 1]);
1105 i8042_init(i8259
[1], i8259
[12], 0x60);
1108 audio_init(pci_enabled
? pci_bus
: NULL
, i8259
);
1111 for(i
= 0; i
< MAX_FD
; i
++) {
1112 index
= drive_get_index(IF_FLOPPY
, 0, i
);
1114 fd
[i
] = drives_table
[index
].bdrv
;
1118 floppy_controller
= fdctrl_init(i8259
[6], 2, 0, 0x3f0, fd
);
1120 cmos_init(below_4g_mem_size
, above_4g_mem_size
, boot_device
, hd
);
1122 if (pci_enabled
&& usb_enabled
) {
1123 usb_uhci_piix3_init(pci_bus
, piix3_devfn
+ 2);
1126 if (pci_enabled
&& acpi_enabled
) {
1127 uint8_t *eeprom_buf
= qemu_mallocz(8 * 256); /* XXX: make this persistent */
1130 /* TODO: Populate SPD eeprom data. */
1131 smbus
= piix4_pm_init(pci_bus
, piix3_devfn
+ 3, 0xb100, i8259
[9]);
1132 for (i
= 0; i
< 8; i
++) {
1133 DeviceState
*eeprom
;
1134 eeprom
= qdev_create((BusState
*)smbus
, "smbus-eeprom");
1135 qdev_set_prop_int(eeprom
, "address", 0x50 + i
);
1136 qdev_set_prop_ptr(eeprom
, "data", eeprom_buf
+ (i
* 256));
1142 i440fx_init_memory_mappings(i440fx_state
);
1149 max_bus
= drive_get_max_bus(IF_SCSI
);
1150 for (bus
= 0; bus
<= max_bus
; bus
++) {
1151 pci_create_simple(pci_bus
, -1, "lsi53c895a");
1155 /* Add virtio block devices */
1160 while ((index
= drive_get_index(IF_VIRTIO
, 0, unit_id
)) != -1) {
1161 pci_dev
= pci_create("virtio-blk-pci",
1162 drives_table
[index
].devaddr
);
1163 qdev_init(&pci_dev
->qdev
);
1168 /* Add virtio balloon device */
1169 if (pci_enabled
&& !no_virtio_balloon
) {
1170 pci_create_simple(pci_bus
, -1, "virtio-balloon-pci");
1173 /* Add virtio console devices */
1175 for(i
= 0; i
< MAX_VIRTIO_CONSOLES
; i
++) {
1176 if (virtcon_hds
[i
]) {
1177 pci_create_simple(pci_bus
, -1, "virtio-console-pci");
1183 static void pc_init_pci(ram_addr_t ram_size
,
1184 const char *boot_device
,
1185 const char *kernel_filename
,
1186 const char *kernel_cmdline
,
1187 const char *initrd_filename
,
1188 const char *cpu_model
)
1190 pc_init1(ram_size
, boot_device
,
1191 kernel_filename
, kernel_cmdline
,
1192 initrd_filename
, 1, cpu_model
);
1195 static void pc_init_isa(ram_addr_t ram_size
,
1196 const char *boot_device
,
1197 const char *kernel_filename
,
1198 const char *kernel_cmdline
,
1199 const char *initrd_filename
,
1200 const char *cpu_model
)
1202 pc_init1(ram_size
, boot_device
,
1203 kernel_filename
, kernel_cmdline
,
1204 initrd_filename
, 0, cpu_model
);
1207 /* set CMOS shutdown status register (index 0xF) as S3_resume(0xFE)
1208 BIOS will read it and start S3 resume at POST Entry */
1209 void cmos_set_s3_resume(void)
1212 rtc_set_memory(rtc_state
, 0xF, 0xFE);
1215 static QEMUMachine pc_machine
= {
1217 .desc
= "Standard PC",
1218 .init
= pc_init_pci
,
1223 static QEMUMachine isapc_machine
= {
1225 .desc
= "ISA-only PC",
1226 .init
= pc_init_isa
,
1230 static void pc_machine_init(void)
1232 qemu_register_machine(&pc_machine
);
1233 qemu_register_machine(&isapc_machine
);
1236 machine_init(pc_machine_init
);