hw/pc.c

   1 /*
   2  * QEMU PC System Emulator
   3  *
   4  * Copyright (c) 2003-2004 Fabrice Bellard
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24 #include "hw.h"
  25 #include "pc.h"
  26 #include "fdc.h"
  27 #include "pci.h"
  28 #include "block.h"
  29 #include "sysemu.h"
  30 #include "audio/audio.h"
  31 #include "net.h"
  32 #include "smbus.h"
  33 #include "boards.h"
  34 #include "console.h"
  35 #include "fw_cfg.h"
  36 #include "virtio-blk.h"
  37 #include "virtio-balloon.h"
  38 #include "device-assignment.h"
  39
  40 #include "qemu-kvm.h"
  41
  42 /* output Bochs bios info messages */
  43 //#define DEBUG_BIOS
  44
  45 #define BIOS_FILENAME "bios.bin"
  46 #define VGABIOS_FILENAME "vgabios.bin"
  47 #define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin"
  48 #define EXTBOOT_FILENAME "extboot.bin"
  49
  50 #define PC_MAX_BIOS_SIZE (4 * 1024 * 1024)
  51
  52 /* Leave a chunk of memory at the top of RAM for the BIOS ACPI tables.  */
  53 #define ACPI_DATA_SIZE       0x10000
  54 #define BIOS_CFG_IOPORT 0x510
  55
  56 #define MAX_IDE_BUS 2
  57
  58 static fdctrl_t *floppy_controller;
  59 static RTCState *rtc_state;
  60 static PITState *pit;
  61 static IOAPICState *ioapic;
  62 static PCIDevice *i440fx_state;
  63
  64 static void ioport80_write(void *opaque, uint32_t addr, uint32_t data)
  65 {
  66 }
  67
  68 /* MSDOS compatibility mode FPU exception support */
  69 static qemu_irq ferr_irq;
  70 /* XXX: add IGNNE support */
  71 void cpu_set_ferr(CPUX86State *s)
  72 {
  73     qemu_irq_raise(ferr_irq);
  74 }
  75
  76 static void ioportF0_write(void *opaque, uint32_t addr, uint32_t data)
  77 {
  78     qemu_irq_lower(ferr_irq);
  79 }
  80
  81 /* TSC handling */
  82 uint64_t cpu_get_tsc(CPUX86State *env)
  83 {
  84     /* Note: when using kqemu, it is more logical to return the host TSC
  85        because kqemu does not trap the RDTSC instruction for
  86        performance reasons */
  87 #ifdef USE_KQEMU
  88     if (env->kqemu_enabled) {
  89         return cpu_get_real_ticks();
  90     } else
  91 #endif
  92     {
  93         return cpu_get_ticks();
  94     }
  95 }
  96
  97 /* SMM support */
  98 void cpu_smm_update(CPUState *env)
  99 {
 100     if (i440fx_state && env == first_cpu)
 101         i440fx_set_smm(i440fx_state, (env->hflags >> HF_SMM_SHIFT) & 1);
 102 }
 103
 104
 105 /* IRQ handling */
 106 int cpu_get_pic_interrupt(CPUState *env)
 107 {
 108     int intno;
 109
 110     intno = apic_get_interrupt(env);
 111     if (intno >= 0) {
 112         /* set irq request if a PIC irq is still pending */
 113         /* XXX: improve that */
 114         pic_update_irq(isa_pic);
 115         return intno;
 116     }
 117     /* read the irq from the PIC */
 118     if (!apic_accept_pic_intr(env))
 119         return -1;
 120
 121     intno = pic_read_irq(isa_pic);
 122     return intno;
 123 }
 124
 125 static void pic_irq_request(void *opaque, int irq, int level)
 126 {
 127     CPUState *env = first_cpu;
 128
 129     if (env->apic_state) {
 130         while (env) {
 131             if (apic_accept_pic_intr(env))
 132                 apic_deliver_pic_intr(env, level);
 133             env = env->next_cpu;
 134         }
 135     } else {
 136         if (level)
 137             cpu_interrupt(env, CPU_INTERRUPT_HARD);
 138         else
 139             cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
 140     }
 141 }
 142
 143 /* PC cmos mappings */
 144
 145 #define REG_EQUIPMENT_BYTE          0x14
 146
 147 static int cmos_get_fd_drive_type(int fd0)
 148 {
 149     int val;
 150
 151     switch (fd0) {
 152     case 0:
 153         /* 1.44 Mb 3"5 drive */
 154         val = 4;
 155         break;
 156     case 1:
 157         /* 2.88 Mb 3"5 drive */
 158         val = 5;
 159         break;
 160     case 2:
 161         /* 1.2 Mb 5"5 drive */
 162         val = 2;
 163         break;
 164     default:
 165         val = 0;
 166         break;
 167     }
 168     return val;
 169 }
 170
 171 static void cmos_init_hd(int type_ofs, int info_ofs, BlockDriverState *hd)
 172 {
 173     RTCState *s = rtc_state;
 174     int cylinders, heads, sectors;
 175     bdrv_get_geometry_hint(hd, &cylinders, &heads, &sectors);
 176     rtc_set_memory(s, type_ofs, 47);
 177     rtc_set_memory(s, info_ofs, cylinders);
 178     rtc_set_memory(s, info_ofs + 1, cylinders >> 8);
 179     rtc_set_memory(s, info_ofs + 2, heads);
 180     rtc_set_memory(s, info_ofs + 3, 0xff);
 181     rtc_set_memory(s, info_ofs + 4, 0xff);
 182     rtc_set_memory(s, info_ofs + 5, 0xc0 | ((heads > 8) << 3));
 183     rtc_set_memory(s, info_ofs + 6, cylinders);
 184     rtc_set_memory(s, info_ofs + 7, cylinders >> 8);
 185     rtc_set_memory(s, info_ofs + 8, sectors);
 186 }
 187
 188 /* convert boot_device letter to something recognizable by the bios */
 189 static int boot_device2nibble(char boot_device)
 190 {
 191     switch(boot_device) {
 192     case 'a':
 193     case 'b':
 194         return 0x01; /* floppy boot */
 195     case 'c':
 196         return 0x02; /* hard drive boot */
 197     case 'd':
 198         return 0x03; /* CD-ROM boot */
 199     case 'n':
 200         return 0x04; /* Network boot */
 201     }
 202     return 0;
 203 }
 204
 205 /* copy/pasted from cmos_init, should be made a general function
 206  and used there as well */
 207 static int pc_boot_set(void *opaque, const char *boot_device)
 208 {
 209 #define PC_MAX_BOOT_DEVICES 3
 210     RTCState *s = (RTCState *)opaque;
 211     int nbds, bds[3] = { 0, };
 212     int i;
 213
 214     nbds = strlen(boot_device);
 215     if (nbds > PC_MAX_BOOT_DEVICES) {
 216         term_printf("Too many boot devices for PC\n");
 217         return(1);
 218     }
 219     for (i = 0; i < nbds; i++) {
 220         bds[i] = boot_device2nibble(boot_device[i]);
 221         if (bds[i] == 0) {
 222             term_printf("Invalid boot device for PC: '%c'\n",
 223                     boot_device[i]);
 224             return(1);
 225         }
 226     }
 227     rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]);
 228     rtc_set_memory(s, 0x38, (bds[2] << 4));
 229     return(0);
 230 }
 231
 232 /* hd_table must contain 4 block drivers */
 233 static void cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
 234                       const char *boot_device, BlockDriverState **hd_table)
 235 {
 236     RTCState *s = rtc_state;
 237     int nbds, bds[3] = { 0, };
 238     int val;
 239     int fd0, fd1, nb;
 240     int i;
 241
 242     /* various important CMOS locations needed by PC/Bochs bios */
 243
 244     /* memory size */
 245     val = 640; /* base memory in K */
 246     rtc_set_memory(s, 0x15, val);
 247     rtc_set_memory(s, 0x16, val >> 8);
 248
 249     val = (ram_size / 1024) - 1024;
 250     if (val > 65535)
 251         val = 65535;
 252     rtc_set_memory(s, 0x17, val);
 253     rtc_set_memory(s, 0x18, val >> 8);
 254     rtc_set_memory(s, 0x30, val);
 255     rtc_set_memory(s, 0x31, val >> 8);
 256
 257     if (above_4g_mem_size) {
 258         rtc_set_memory(s, 0x5b, (unsigned int)above_4g_mem_size >> 16);
 259         rtc_set_memory(s, 0x5c, (unsigned int)above_4g_mem_size >> 24);
 260         rtc_set_memory(s, 0x5d, (uint64_t)above_4g_mem_size >> 32);
 261     }
 262     rtc_set_memory(s, 0x5f, smp_cpus - 1);
 263
 264     if (ram_size > (16 * 1024 * 1024))
 265         val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536);
 266     else
 267         val = 0;
 268     if (val > 65535)
 269         val = 65535;
 270     rtc_set_memory(s, 0x34, val);
 271     rtc_set_memory(s, 0x35, val >> 8);
 272
 273     /* set the number of CPU */
 274     rtc_set_memory(s, 0x5f, smp_cpus - 1);
 275
 276     /* set boot devices, and disable floppy signature check if requested */
 277 #define PC_MAX_BOOT_DEVICES 3
 278     nbds = strlen(boot_device);
 279     if (nbds > PC_MAX_BOOT_DEVICES) {
 280         fprintf(stderr, "Too many boot devices for PC\n");
 281         exit(1);
 282     }
 283     for (i = 0; i < nbds; i++) {
 284         bds[i] = boot_device2nibble(boot_device[i]);
 285         if (bds[i] == 0) {
 286             fprintf(stderr, "Invalid boot device for PC: '%c'\n",
 287                     boot_device[i]);
 288             exit(1);
 289         }
 290     }
 291     rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]);
 292     rtc_set_memory(s, 0x38, (bds[2] << 4) | (fd_bootchk ?  0x0 : 0x1));
 293
 294     /* floppy type */
 295
 296     fd0 = fdctrl_get_drive_type(floppy_controller, 0);
 297     fd1 = fdctrl_get_drive_type(floppy_controller, 1);
 298
 299     val = (cmos_get_fd_drive_type(fd0) << 4) | cmos_get_fd_drive_type(fd1);
 300     rtc_set_memory(s, 0x10, val);
 301
 302     val = 0;
 303     nb = 0;
 304     if (fd0 < 3)
 305         nb++;
 306     if (fd1 < 3)
 307         nb++;
 308     switch (nb) {
 309     case 0:
 310         break;
 311     case 1:
 312         val |= 0x01; /* 1 drive, ready for boot */
 313         break;
 314     case 2:
 315         val |= 0x41; /* 2 drives, ready for boot */
 316         break;
 317     }
 318     val |= 0x02; /* FPU is there */
 319     val |= 0x04; /* PS/2 mouse installed */
 320     rtc_set_memory(s, REG_EQUIPMENT_BYTE, val);
 321
 322     /* hard drives */
 323
 324     rtc_set_memory(s, 0x12, (hd_table[0] ? 0xf0 : 0) | (hd_table[1] ? 0x0f : 0));
 325     if (hd_table[0])
 326         cmos_init_hd(0x19, 0x1b, hd_table[0]);
 327     if (hd_table[1])
 328         cmos_init_hd(0x1a, 0x24, hd_table[1]);
 329
 330     val = 0;
 331     for (i = 0; i < 4; i++) {
 332         if (hd_table[i]) {
 333             int cylinders, heads, sectors, translation;
 334             /* NOTE: bdrv_get_geometry_hint() returns the physical
 335                 geometry.  It is always such that: 1 <= sects <= 63, 1
 336                 <= heads <= 16, 1 <= cylinders <= 16383. The BIOS
 337                 geometry can be different if a translation is done. */
 338             translation = bdrv_get_translation_hint(hd_table[i]);
 339             if (translation == BIOS_ATA_TRANSLATION_AUTO) {
 340                 bdrv_get_geometry_hint(hd_table[i], &cylinders, &heads, &sectors);
 341                 if (cylinders <= 1024 && heads <= 16 && sectors <= 63) {
 342                     /* No translation. */
 343                     translation = 0;
 344                 } else {
 345                     /* LBA translation. */
 346                     translation = 1;
 347                 }
 348             } else {
 349                 translation--;
 350             }
 351             val |= translation << (i * 2);
 352         }
 353     }
 354     rtc_set_memory(s, 0x39, val);
 355 }
 356
 357 void ioport_set_a20(int enable)
 358 {
 359     /* XXX: send to all CPUs ? */
 360     cpu_x86_set_a20(first_cpu, enable);
 361 }
 362
 363 int ioport_get_a20(void)
 364 {
 365     return ((first_cpu->a20_mask >> 20) & 1);
 366 }
 367
 368 static void ioport92_write(void *opaque, uint32_t addr, uint32_t val)
 369 {
 370     ioport_set_a20((val >> 1) & 1);
 371     /* XXX: bit 0 is fast reset */
 372 }
 373
 374 static uint32_t ioport92_read(void *opaque, uint32_t addr)
 375 {
 376     return ioport_get_a20() << 1;
 377 }
 378
 379 /***********************************************************/
 380 /* Bochs BIOS debug ports */
 381
 382 static void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val)
 383 {
 384     static const char shutdown_str[8] = "Shutdown";
 385     static int shutdown_index = 0;
 386
 387     switch(addr) {
 388         /* Bochs BIOS messages */
 389     case 0x400:
 390     case 0x401:
 391         fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val);
 392         exit(1);
 393     case 0x402:
 394     case 0x403:
 395 #ifdef DEBUG_BIOS
 396         fprintf(stderr, "%c", val);
 397 #endif
 398         break;
 399     case 0x8900:
 400         /* same as Bochs power off */
 401         if (val == shutdown_str[shutdown_index]) {
 402             shutdown_index++;
 403             if (shutdown_index == 8) {
 404                 shutdown_index = 0;
 405                 qemu_system_shutdown_request();
 406             }
 407         } else {
 408             shutdown_index = 0;
 409         }
 410         break;
 411
 412         /* LGPL'ed VGA BIOS messages */
 413     case 0x501:
 414     case 0x502:
 415         fprintf(stderr, "VGA BIOS panic, line %d\n", val);
 416         exit(1);
 417     case 0x500:
 418     case 0x503:
 419 #ifdef DEBUG_BIOS
 420         fprintf(stderr, "%c", val);
 421 #endif
 422         break;
 423     }
 424 }
 425
 426 static void bochs_bios_init(void)
 427 {
 428     void *fw_cfg;
 429
 430     register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL);
 431     register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL);
 432     register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL);
 433     register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL);
 434     register_ioport_write(0x8900, 1, 1, bochs_bios_write, NULL);
 435
 436     register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL);
 437     register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL);
 438     register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL);
 439     register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL);
 440
 441     fw_cfg = fw_cfg_init(BIOS_CFG_IOPORT, BIOS_CFG_IOPORT + 1, 0, 0);
 442     fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
 443     fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
 444 }
 445
 446 /* Generate an initial boot sector which sets state and jump to
 447    a specified vector */
 448 static void generate_bootsect(uint8_t *option_rom,
 449                               uint32_t gpr[8], uint16_t segs[6], uint16_t ip)
 450 {
 451     uint8_t rom[512], *p, *reloc;
 452     uint8_t sum;
 453     int i;
 454
 455     memset(rom, 0, sizeof(rom));
 456
 457     p = rom;
 458     /* Make sure we have an option rom signature */
 459     *p++ = 0x55;
 460     *p++ = 0xaa;
 461
 462     /* ROM size in sectors*/
 463     *p++ = 1;
 464
 465     /* Hook int19 */
 466
 467     *p++ = 0x50;                /* push ax */
 468     *p++ = 0x1e;                /* push ds */
 469     *p++ = 0x31; *p++ = 0xc0;   /* xor ax, ax */
 470     *p++ = 0x8e; *p++ = 0xd8;   /* mov ax, ds */
 471
 472     *p++ = 0xc7; *p++ = 0x06;   /* movvw _start,0x64 */
 473     *p++ = 0x64; *p++ = 0x00;
 474     reloc = p;
 475     *p++ = 0x00; *p++ = 0x00;
 476
 477     *p++ = 0x8c; *p++ = 0x0e;   /* mov cs,0x66 */
 478     *p++ = 0x66; *p++ = 0x00;
 479
 480     *p++ = 0x1f;                /* pop ds */
 481     *p++ = 0x58;                /* pop ax */
 482     *p++ = 0xcb;                /* lret */
 483
 484     /* Actual code */
 485     *reloc = (p - rom);
 486
 487     *p++ = 0xfa;                /* CLI */
 488     *p++ = 0xfc;                /* CLD */
 489
 490     for (i = 0; i < 6; i++) {
 491         if (i == 1)             /* Skip CS */
 492             continue;
 493
 494         *p++ = 0xb8;            /* MOV AX,imm16 */
 495         *p++ = segs[i];
 496         *p++ = segs[i] >> 8;
 497         *p++ = 0x8e;            /* MOV <seg>,AX */
 498         *p++ = 0xc0 + (i << 3);
 499     }
 500
 501     for (i = 0; i < 8; i++) {
 502         *p++ = 0x66;            /* 32-bit operand size */
 503         *p++ = 0xb8 + i;        /* MOV <reg>,imm32 */
 504         *p++ = gpr[i];
 505         *p++ = gpr[i] >> 8;
 506         *p++ = gpr[i] >> 16;
 507         *p++ = gpr[i] >> 24;
 508     }
 509
 510     *p++ = 0xea;                /* JMP FAR */
 511     *p++ = ip;                  /* IP */
 512     *p++ = ip >> 8;
 513     *p++ = segs[1];             /* CS */
 514     *p++ = segs[1] >> 8;
 515
 516     /* sign rom */
 517     sum = 0;
 518     for (i = 0; i < (sizeof(rom) - 1); i++)
 519         sum += rom[i];
 520     rom[sizeof(rom) - 1] = -sum;
 521
 522     memcpy(option_rom, rom, sizeof(rom));
 523 }
 524
 525 static long get_file_size(FILE *f)
 526 {
 527     long where, size;
 528
 529     /* XXX: on Unix systems, using fstat() probably makes more sense */
 530
 531     where = ftell(f);
 532     fseek(f, 0, SEEK_END);
 533     size = ftell(f);
 534     fseek(f, where, SEEK_SET);
 535
 536     return size;
 537 }
 538
 539 static void load_linux(uint8_t *option_rom,
 540                        const char *kernel_filename,
 541                        const char *initrd_filename,
 542                        const char *kernel_cmdline)
 543 {
 544     uint16_t protocol;
 545     uint32_t gpr[8];
 546     uint16_t seg[6];
 547     uint16_t real_seg;
 548     int setup_size, kernel_size, initrd_size, cmdline_size;
 549     uint32_t initrd_max;
 550     uint8_t header[1024];
 551     target_phys_addr_t real_addr, prot_addr, cmdline_addr, initrd_addr;
 552     FILE *f, *fi;
 553
 554     /* Align to 16 bytes as a paranoia measure */
 555     cmdline_size = (strlen(kernel_cmdline)+16) & ~15;
 556
 557     /* load the kernel header */
 558     f = fopen(kernel_filename, "rb");
 559     if (!f || !(kernel_size = get_file_size(f)) ||
 560         fread(header, 1, 1024, f) != 1024) {
 561         fprintf(stderr, "qemu: could not load kernel '%s'\n",
 562                 kernel_filename);
 563         exit(1);
 564     }
 565
 566     /* kernel protocol version */
 567 #if 0
 568     fprintf(stderr, "header magic: %#x\n", ldl_p(header+0x202));
 569 #endif
 570     if (ldl_p(header+0x202) == 0x53726448)
 571         protocol = lduw_p(header+0x206);
 572     else
 573         protocol = 0;
 574
 575     if (protocol < 0x200 || !(header[0x211] & 0x01)) {
 576         /* Low kernel */
 577         real_addr    = 0x90000;
 578         cmdline_addr = 0x9a000 - cmdline_size;
 579         prot_addr    = 0x10000;
 580     } else if (protocol < 0x202) {
 581         /* High but ancient kernel */
 582         real_addr    = 0x90000;
 583         cmdline_addr = 0x9a000 - cmdline_size;
 584         prot_addr    = 0x100000;
 585     } else {
 586         /* High and recent kernel */
 587         real_addr    = 0x10000;
 588         cmdline_addr = 0x20000;
 589         prot_addr    = 0x100000;
 590     }
 591
 592 #if 0
 593     fprintf(stderr,
 594             "qemu: real_addr     = 0x" TARGET_FMT_plx "\n"
 595             "qemu: cmdline_addr  = 0x" TARGET_FMT_plx "\n"
 596             "qemu: prot_addr     = 0x" TARGET_FMT_plx "\n",
 597             real_addr,
 598             cmdline_addr,
 599             prot_addr);
 600 #endif
 601
 602     /* highest address for loading the initrd */
 603     if (protocol >= 0x203)
 604         initrd_max = ldl_p(header+0x22c);
 605     else
 606         initrd_max = 0x37ffffff;
 607
 608     if (initrd_max >= ram_size-ACPI_DATA_SIZE)
 609         initrd_max = ram_size-ACPI_DATA_SIZE-1;
 610
 611     /* kernel command line */
 612     pstrcpy_targphys(cmdline_addr, 4096, kernel_cmdline);
 613
 614     if (protocol >= 0x202) {
 615         stl_p(header+0x228, cmdline_addr);
 616     } else {
 617         stw_p(header+0x20, 0xA33F);
 618         stw_p(header+0x22, cmdline_addr-real_addr);
 619     }
 620
 621     /* loader type */
 622     /* High nybble = B reserved for Qemu; low nybble is revision number.
 623        If this code is substantially changed, you may want to consider
 624        incrementing the revision. */
 625     if (protocol >= 0x200)
 626         header[0x210] = 0xB0;
 627
 628     /* heap */
 629     if (protocol >= 0x201) {
 630         header[0x211] |= 0x80;  /* CAN_USE_HEAP */
 631         stw_p(header+0x224, cmdline_addr-real_addr-0x200);
 632     }
 633
 634     /* load initrd */
 635     if (initrd_filename) {
 636         if (protocol < 0x200) {
 637             fprintf(stderr, "qemu: linux kernel too old to load a ram disk\n");
 638             exit(1);
 639         }
 640
 641         fi = fopen(initrd_filename, "rb");
 642         if (!fi) {
 643             fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
 644                     initrd_filename);
 645             exit(1);
 646         }
 647
 648         initrd_size = get_file_size(fi);
 649         initrd_addr = (initrd_max-initrd_size) & ~4095;
 650
 651         fprintf(stderr, "qemu: loading initrd (%#x bytes) at 0x" TARGET_FMT_plx
 652                 "\n", initrd_size, initrd_addr);
 653
 654         if (!fread_targphys_ok(initrd_addr, initrd_size, fi)) {
 655             fprintf(stderr, "qemu: read error on initial ram disk '%s'\n",
 656                     initrd_filename);
 657             exit(1);
 658         }
 659         fclose(fi);
 660
 661         stl_p(header+0x218, initrd_addr);
 662         stl_p(header+0x21c, initrd_size);
 663     }
 664
 665     /* store the finalized header and load the rest of the kernel */
 666     cpu_physical_memory_write(real_addr, header, 1024);
 667
 668     setup_size = header[0x1f1];
 669     if (setup_size == 0)
 670         setup_size = 4;
 671
 672     setup_size = (setup_size+1)*512;
 673     kernel_size -= setup_size;  /* Size of protected-mode code */
 674
 675     if (!fread_targphys_ok(real_addr+1024, setup_size-1024, f) ||
 676         !fread_targphys_ok(prot_addr, kernel_size, f)) {
 677         fprintf(stderr, "qemu: read error on kernel '%s'\n",
 678                 kernel_filename);
 679         exit(1);
 680     }
 681     fclose(f);
 682
 683     /* generate bootsector to set up the initial register state */
 684     real_seg = real_addr >> 4;
 685     seg[0] = seg[2] = seg[3] = seg[4] = seg[4] = real_seg;
 686     seg[1] = real_seg+0x20;     /* CS */
 687     memset(gpr, 0, sizeof gpr);
 688     gpr[4] = cmdline_addr-real_addr-16; /* SP (-16 is paranoia) */
 689
 690     generate_bootsect(option_rom, gpr, seg, 0);
 691 }
 692
 693 static void main_cpu_reset(void *opaque)
 694 {
 695     CPUState *env = opaque;
 696     cpu_reset(env);
 697 }
 698
 699 static const int ide_iobase[2] = { 0x1f0, 0x170 };
 700 static const int ide_iobase2[2] = { 0x3f6, 0x376 };
 701 static const int ide_irq[2] = { 14, 15 };
 702
 703 #define NE2000_NB_MAX 6
 704
 705 static int ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360, 0x280, 0x380 };
 706 static int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 };
 707
 708 static int serial_io[MAX_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
 709 static int serial_irq[MAX_SERIAL_PORTS] = { 4, 3, 4, 3 };
 710
 711 static int parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc };
 712 static int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 };
 713
 714 #ifdef HAS_AUDIO
 715 static void audio_init (PCIBus *pci_bus, qemu_irq *pic)
 716 {
 717     struct soundhw *c;
 718     int audio_enabled = 0;
 719
 720     for (c = soundhw; !audio_enabled && c->name; ++c) {
 721         audio_enabled = c->enabled;
 722     }
 723
 724     if (audio_enabled) {
 725         AudioState *s;
 726
 727         s = AUD_init ();
 728         if (s) {
 729             for (c = soundhw; c->name; ++c) {
 730                 if (c->enabled) {
 731                     if (c->isa) {
 732                         c->init.init_isa (s, pic);
 733                     }
 734                     else {
 735                         if (pci_bus) {
 736                             c->init.init_pci (pci_bus, s);
 737                         }
 738                     }
 739                 }
 740             }
 741         }
 742     }
 743 }
 744 #endif
 745
 746 static void pc_init_ne2k_isa(NICInfo *nd, qemu_irq *pic)
 747 {
 748     static int nb_ne2k = 0;
 749
 750     if (nb_ne2k == NE2000_NB_MAX)
 751         return;
 752     isa_ne2000_init(ne2000_io[nb_ne2k], pic[ne2000_irq[nb_ne2k]], nd);
 753     nb_ne2k++;
 754 }
 755
 756 typedef struct rom_reset_data {
 757     uint8_t *data;
 758     target_phys_addr_t addr;
 759     unsigned size;
 760 } RomResetData;
 761
 762 static void option_rom_reset(void *_rrd)
 763 {
 764     RomResetData *rrd = _rrd;
 765
 766     cpu_physical_memory_write_rom(rrd->addr, rrd->data, rrd->size);
 767 }
 768
 769 static void option_rom_setup_reset(target_phys_addr_t addr, unsigned size)
 770 {
 771     RomResetData *rrd = qemu_malloc(sizeof *rrd);
 772
 773     rrd->data = qemu_malloc(size);
 774     cpu_physical_memory_read(addr, rrd->data, size);
 775     rrd->addr = addr;
 776     rrd->size = size;
 777     qemu_register_reset(option_rom_reset, rrd);
 778 }
 779
 780 CPUState *pc_new_cpu(int cpu, const char *cpu_model, int pci_enabled)
 781 {
 782         CPUState *env = cpu_init(cpu_model);
 783         if (!env) {
 784             fprintf(stderr, "Unable to find x86 CPU definition\n");
 785             exit(1);
 786         }
 787         if (cpu != 0)
 788             env->halted = 1;
 789         if (smp_cpus > 1) {
 790             /* XXX: enable it in all cases */
 791             env->cpuid_features |= CPUID_APIC;
 792         }
 793         qemu_register_reset(main_cpu_reset, env);
 794         if (pci_enabled) {
 795             apic_init(env);
 796         }
 797         return env;
 798 }
 799
 800 /* PC hardware initialisation */
 801 static void pc_init1(ram_addr_t ram_size, int vga_ram_size,
 802                      const char *boot_device, DisplayState *ds,
 803                      const char *kernel_filename, const char *kernel_cmdline,
 804                      const char *initrd_filename,
 805                      int pci_enabled, const char *cpu_model)
 806 {
 807     char buf[1024];
 808     int ret, linux_boot, i;
 809     ram_addr_t ram_addr, vga_ram_addr, bios_offset, vga_bios_offset;
 810     ram_addr_t below_4g_mem_size, above_4g_mem_size = 0;
 811     int bios_size, isa_bios_size, vga_bios_size, opt_rom_offset;
 812     PCIBus *pci_bus;
 813     int piix3_devfn = -1;
 814     CPUState *env;
 815     NICInfo *nd;
 816     qemu_irq *cpu_irq;
 817     qemu_irq *i8259;
 818     int index;
 819     BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
 820     BlockDriverState *fd[MAX_FD];
 821
 822     if (ram_size >= 0xe0000000 ) {
 823         above_4g_mem_size = ram_size - 0xe0000000;
 824         below_4g_mem_size = 0xe0000000;
 825     } else {
 826         below_4g_mem_size = ram_size;
 827     }
 828
 829     linux_boot = (kernel_filename != NULL);
 830
 831     /* init CPUs */
 832     if (cpu_model == NULL) {
 833 #ifdef TARGET_X86_64
 834         cpu_model = "qemu64";
 835 #else
 836         cpu_model = "qemu32";
 837 #endif
 838     }
 839
 840     for(i = 0; i < smp_cpus; i++) {
 841         env = pc_new_cpu(i, cpu_model, pci_enabled);
 842     }
 843
 844     vmport_init();
 845
 846     /* allocate RAM */
 847     ram_addr = qemu_ram_alloc(0xa0000);
 848     cpu_register_physical_memory(0, 0xa0000, ram_addr);
 849
 850     /* Allocate, even though we won't register, so we don't break the
 851      * phys_ram_base + PA assumption. This range includes vga (0xa0000 - 0xc0000),
 852      * and some bios areas, which will be registered later
 853      */
 854     ram_addr = qemu_ram_alloc(0x100000 - 0xa0000);
 855     ram_addr = qemu_ram_alloc(below_4g_mem_size - 0x100000);
 856     cpu_register_physical_memory(0x100000,
 857                  below_4g_mem_size - 0x100000,
 858                  ram_addr);
 859
 860     /* above 4giga memory allocation */
 861     if (above_4g_mem_size > 0) {
 862         if (hpagesize) {
 863             if (ram_addr & (hpagesize-1)) {
 864                 unsigned long aligned_addr;
 865                 aligned_addr = (ram_addr + hpagesize - 1) & ~(hpagesize-1);
 866                 qemu_ram_alloc(aligned_addr - ram_addr);
 867                 ram_addr = aligned_addr;
 868             }
 869         }
 870         ram_addr = qemu_ram_alloc(above_4g_mem_size);
 871         cpu_register_physical_memory(0x100000000ULL,
 872                                      above_4g_mem_size,
 873                                      ram_addr);
 874     }
 875
 876     /* allocate VGA RAM */
 877     vga_ram_addr = qemu_ram_alloc(vga_ram_size);
 878
 879     /* BIOS load */
 880     if (bios_name == NULL)
 881         bios_name = BIOS_FILENAME;
 882     snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name);
 883     bios_size = get_image_size(buf);
 884     if (bios_size <= 0 ||
 885         (bios_size % 65536) != 0) {
 886         goto bios_error;
 887     }
 888     bios_offset = qemu_ram_alloc(bios_size);
 889     ret = load_image(buf, phys_ram_base + bios_offset);
 890     if (ret != bios_size) {
 891     bios_error:
 892         fprintf(stderr, "qemu: could not load PC BIOS '%s'\n", buf);
 893         exit(1);
 894     }
 895
 896     /* VGA BIOS load */
 897     if (cirrus_vga_enabled) {
 898         snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_CIRRUS_FILENAME);
 899     } else {
 900         snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME);
 901     }
 902     vga_bios_size = get_image_size(buf);
 903     if (vga_bios_size <= 0 || vga_bios_size > 65536)
 904         goto vga_bios_error;
 905     vga_bios_offset = qemu_ram_alloc(65536);
 906
 907     ret = load_image(buf, phys_ram_base + vga_bios_offset);
 908     if (ret != vga_bios_size) {
 909     vga_bios_error:
 910         fprintf(stderr, "qemu: could not load VGA BIOS '%s'\n", buf);
 911         exit(1);
 912     }
 913
 914     /* setup basic memory access */
 915     cpu_register_physical_memory(0xc0000, 0x10000,
 916                                  vga_bios_offset | IO_MEM_ROM);
 917
 918     /* map the last 128KB of the BIOS in ISA space */
 919     isa_bios_size = bios_size;
 920     if (isa_bios_size > (128 * 1024))
 921         isa_bios_size = 128 * 1024;
 922     cpu_register_physical_memory(0xd0000, (192 * 1024) - isa_bios_size,
 923                                  IO_MEM_UNASSIGNED);
 924     /* kvm tpr optimization needs the bios accessible for write, at least to qemu itself */
 925     cpu_register_physical_memory(0x100000 - isa_bios_size,
 926                                  isa_bios_size,
 927                                  (bios_offset + bios_size - isa_bios_size) /* | IO_MEM_ROM */);
 928
 929     if (extboot_drive != -1) {
 930         snprintf(buf, sizeof(buf), "%s/%s", bios_dir, EXTBOOT_FILENAME);
 931         option_rom[nb_option_roms++] = buf;
 932     }
 933
 934     {
 935         ram_addr_t option_rom_offset;
 936         int size, offset;
 937
 938         offset = 0;
 939         if (linux_boot) {
 940             option_rom_offset = qemu_ram_alloc(TARGET_PAGE_SIZE);
 941             load_linux(phys_ram_base + option_rom_offset,
 942                        kernel_filename, initrd_filename, kernel_cmdline);
 943             cpu_register_physical_memory(0xd0000, TARGET_PAGE_SIZE,
 944                                          option_rom_offset | IO_MEM_ROM);
 945             offset = TARGET_PAGE_SIZE;
 946         }
 947
 948         for (i = 0; i < nb_option_roms; i++) {
 949             size = get_image_size(option_rom[i]);
 950             if (size < 0) {
 951                 fprintf(stderr, "Could not load option rom '%s'\n",
 952                         option_rom[i]);
 953                 exit(1);
 954             }
 955             if (size > (0x10000 - offset))
 956                 goto option_rom_error;
 957             option_rom_offset = qemu_ram_alloc(size);
 958             ret = load_image(option_rom[i], phys_ram_base + option_rom_offset);
 959             if (ret != size) {
 960             option_rom_error:
 961                 fprintf(stderr, "Too many option ROMS\n");
 962                 exit(1);
 963             }
 964             size = (size + 4095) & ~4095;
 965     /* XXX: for DDIM support, "ROM space" should be writable during
 966        initialization, and (optionally) marked readonly by the BIOS
 967        before INT 19h.  See the PNPBIOS specification, appendix B.
 968        DDIM support is mandatory for proper PCI expansion ROM support. */
 969             cpu_register_physical_memory(0xd0000 + offset,
 970                                          size, option_rom_offset /* | IO_MEM_ROM */);
 971             option_rom_setup_reset(0xd0000 + offset, size);
 972             offset += size;
 973         }
 974     }
 975
 976     /* map all the bios at the top of memory */
 977     cpu_register_physical_memory((uint32_t)(-bios_size),
 978                                  bios_size, bios_offset | IO_MEM_ROM);
 979
 980     bochs_bios_init();
 981
 982     cpu_irq = qemu_allocate_irqs(pic_irq_request, NULL, 1);
 983     i8259 = i8259_init(cpu_irq[0]);
 984     ferr_irq = i8259[13];
 985
 986     if (pci_enabled) {
 987         pci_bus = i440fx_init(&i440fx_state, i8259);
 988         piix3_devfn = piix3_init(pci_bus, -1);
 989     } else {
 990         pci_bus = NULL;
 991     }
 992
 993     /* init basic PC hardware */
 994     register_ioport_write(0x80, 1, 1, ioport80_write, NULL);
 995
 996     register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL);
 997
 998     if (cirrus_vga_enabled) {
 999         if (pci_enabled) {
1000             pci_cirrus_vga_init(pci_bus,
1001                                 ds, phys_ram_base + vga_ram_addr,
1002                                 vga_ram_addr, vga_ram_size);
1003         } else {
1004             isa_cirrus_vga_init(ds, phys_ram_base + vga_ram_addr,
1005                                 vga_ram_addr, vga_ram_size);
1006         }
1007     } else if (vmsvga_enabled) {
1008         if (pci_enabled)
1009             pci_vmsvga_init(pci_bus, ds, phys_ram_base + vga_ram_addr,
1010                             vga_ram_addr, vga_ram_size);
1011         else
1012             fprintf(stderr, "%s: vmware_vga: no PCI bus\n", __FUNCTION__);
1013     } else {
1014         if (pci_enabled) {
1015             pci_vga_init(pci_bus, ds, phys_ram_base + vga_ram_addr,
1016                          vga_ram_addr, vga_ram_size, 0, 0);
1017         } else {
1018             isa_vga_init(ds, phys_ram_base + vga_ram_addr,
1019                          vga_ram_addr, vga_ram_size);
1020         }
1021     }
1022
1023     rtc_state = rtc_init(0x70, i8259[8]);
1024
1025     qemu_register_boot_set(pc_boot_set, rtc_state);
1026
1027     register_ioport_read(0x92, 1, 1, ioport92_read, NULL);
1028     register_ioport_write(0x92, 1, 1, ioport92_write, NULL);
1029
1030     if (pci_enabled) {
1031         ioapic = ioapic_init();
1032     }
1033 #ifdef USE_KVM_PIT
1034     if (kvm_enabled() && qemu_kvm_pit_in_kernel())
1035         pit = kvm_pit_init(0x40, i8259[0]);
1036     else
1037 #endif
1038         pit = pit_init(0x40, i8259[0]);
1039     pcspk_init(pit);
1040     if (pci_enabled) {
1041         pic_set_alt_irq_func(isa_pic, ioapic_set_irq, ioapic);
1042     }
1043
1044     for(i = 0; i < MAX_SERIAL_PORTS; i++) {
1045         if (serial_hds[i]) {
1046             serial_init(serial_io[i], i8259[serial_irq[i]], 115200,
1047                         serial_hds[i]);
1048         }
1049     }
1050
1051     for(i = 0; i < MAX_PARALLEL_PORTS; i++) {
1052         if (parallel_hds[i]) {
1053             parallel_init(parallel_io[i], i8259[parallel_irq[i]],
1054                           parallel_hds[i]);
1055         }
1056     }
1057
1058     for(i = 0; i < nb_nics; i++) {
1059         nd = &nd_table[i];
1060         if (!nd->model) {
1061             if (pci_enabled) {
1062                 nd->model = "rtl8139";
1063             } else {
1064                 nd->model = "ne2k_isa";
1065             }
1066         }
1067         if (strcmp(nd->model, "ne2k_isa") == 0) {
1068             pc_init_ne2k_isa(nd, i8259);
1069         } else if (pci_enabled) {
1070             if (strcmp(nd->model, "?") == 0)
1071                 fprintf(stderr, "qemu: Supported ISA NICs: ne2k_isa\n");
1072             if (!pci_nic_init(pci_bus, nd, -1))
1073                 exit(1);
1074         } else if (strcmp(nd->model, "?") == 0) {
1075             fprintf(stderr, "qemu: Supported ISA NICs: ne2k_isa\n");
1076             exit(1);
1077         } else {
1078             fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd->model);
1079             exit(1);
1080         }
1081     }
1082
1083     qemu_system_hot_add_init(cpu_model);
1084
1085     if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
1086         fprintf(stderr, "qemu: too many IDE bus\n");
1087         exit(1);
1088     }
1089
1090     for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
1091         index = drive_get_index(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
1092         if (index != -1)
1093             hd[i] = drives_table[index].bdrv;
1094         else
1095             hd[i] = NULL;
1096     }
1097
1098     if (pci_enabled) {
1099         pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1, i8259);
1100     } else {
1101         for(i = 0; i < MAX_IDE_BUS; i++) {
1102             isa_ide_init(ide_iobase[i], ide_iobase2[i], i8259[ide_irq[i]],
1103                          hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]);
1104         }
1105     }
1106
1107     i8042_init(i8259[1], i8259[12], 0x60);
1108     DMA_init(0);
1109 #ifdef HAS_AUDIO
1110     audio_init(pci_enabled ? pci_bus : NULL, i8259);
1111 #endif
1112
1113     for(i = 0; i < MAX_FD; i++) {
1114         index = drive_get_index(IF_FLOPPY, 0, i);
1115         if (index != -1)
1116             fd[i] = drives_table[index].bdrv;
1117         else
1118             fd[i] = NULL;
1119     }
1120     floppy_controller = fdctrl_init(i8259[6], 2, 0, 0x3f0, fd);
1121
1122     cmos_init(below_4g_mem_size, above_4g_mem_size, boot_device, hd);
1123
1124     if (pci_enabled && usb_enabled) {
1125         usb_uhci_piix3_init(pci_bus, piix3_devfn + 2);
1126     }
1127
1128     if (pci_enabled && acpi_enabled) {
1129         uint8_t *eeprom_buf = qemu_mallocz(8 * 256); /* XXX: make this persistent */
1130         i2c_bus *smbus;
1131
1132         /* TODO: Populate SPD eeprom data.  */
1133         smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100, i8259[9]);
1134         for (i = 0; i < 8; i++) {
1135             smbus_eeprom_device_init(smbus, 0x50 + i, eeprom_buf + (i * 256));
1136         }
1137     }
1138
1139     if (i440fx_state) {
1140         i440fx_init_memory_mappings(i440fx_state);
1141     }
1142
1143     if (pci_enabled) {
1144         int max_bus;
1145         int bus, unit;
1146         void *scsi;
1147
1148         max_bus = drive_get_max_bus(IF_SCSI);
1149
1150         for (bus = 0; bus <= max_bus; bus++) {
1151             scsi = lsi_scsi_init(pci_bus, -1);
1152             for (unit = 0; unit < LSI_MAX_DEVS; unit++) {
1153                 index = drive_get_index(IF_SCSI, bus, unit);
1154                 if (index == -1)
1155                     continue;
1156                 lsi_scsi_attach(scsi, drives_table[index].bdrv, unit);
1157             }
1158         }
1159     }
1160
1161     /* Add virtio block devices */
1162     if (pci_enabled) {
1163         int index;
1164         int unit_id = 0;
1165
1166         while ((index = drive_get_index(IF_VIRTIO, 0, unit_id)) != -1) {
1167             virtio_blk_init(pci_bus, 0x1AF4, 0x1001,
1168                             drives_table[index].bdrv);
1169             unit_id++;
1170         }
1171     }
1172
1173     if (extboot_drive != -1) {
1174         DriveInfo *info = &drives_table[extboot_drive];
1175         int cyls, heads, secs;
1176
1177         if (info->type != IF_IDE && info->type != IF_VIRTIO) {
1178             bdrv_guess_geometry(info->bdrv, &cyls, &heads, &secs);
1179             bdrv_set_geometry_hint(info->bdrv, cyls, heads, secs);
1180         }
1181
1182         extboot_init(info->bdrv, 1);
1183     }
1184
1185     /* Add virtio balloon device */
1186     if (pci_enabled)
1187         virtio_balloon_init(pci_bus);
1188
1189 #ifdef USE_KVM_DEVICE_ASSIGNMENT
1190     if (kvm_enabled())
1191         add_assigned_devices(pci_bus, assigned_devices, assigned_devices_index);
1192 #endif /* USE_KVM_DEVICE_ASSIGNMENT */
1193 }
1194
1195 static void pc_init_pci(ram_addr_t ram_size, int vga_ram_size,
1196                         const char *boot_device, DisplayState *ds,
1197                         const char *kernel_filename,
1198                         const char *kernel_cmdline,
1199                         const char *initrd_filename,
1200                         const char *cpu_model)
1201 {
1202     pc_init1(ram_size, vga_ram_size, boot_device, ds,
1203              kernel_filename, kernel_cmdline,
1204              initrd_filename, 1, cpu_model);
1205 }
1206
1207 static void pc_init_isa(ram_addr_t ram_size, int vga_ram_size,
1208                         const char *boot_device, DisplayState *ds,
1209                         const char *kernel_filename,
1210                         const char *kernel_cmdline,
1211                         const char *initrd_filename,
1212                         const char *cpu_model)
1213 {
1214     pc_init1(ram_size, vga_ram_size, boot_device, ds,
1215              kernel_filename, kernel_cmdline,
1216              initrd_filename, 0, cpu_model);
1217 }
1218
1219 QEMUMachine pc_machine = {
1220     .name = "pc",
1221     .desc = "Standard PC",
1222     .init = pc_init_pci,
1223     .ram_require = VGA_RAM_SIZE + PC_MAX_BIOS_SIZE,
1224     .max_cpus = 255,
1225 };
1226
1227 QEMUMachine isapc_machine = {
1228     .name = "isapc",
1229     .desc = "ISA-only PC",
1230     .init = pc_init_isa,
1231     .ram_require = VGA_RAM_SIZE + PC_MAX_BIOS_SIZE,
1232     .max_cpus = 1,
1233 };