Sansa AMS: handle properly SD transfer errors
[kugel-rb.git] / firmware / target / arm / as3525 / ata_sd_as3525.c
blobae3d466abff59f40d05019a6a7c50bf24d66d5c0
1 /***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
10 * Copyright (C) 2006 Daniel Ankers
11 * Copyright © 2008-2009 Rafaël Carré
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License
15 * as published by the Free Software Foundation; either version 2
16 * of the License, or (at your option) any later version.
18 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
19 * KIND, either express or implied.
21 ****************************************************************************/
23 /* Driver for the ARM PL180 SD/MMC controller inside AS3525 SoC */
25 /* TODO: Find the real capacity of >2GB models (will be useful for USB) */
27 #include "config.h" /* for HAVE_MULTIVOLUME & AMS_OF_SIZE */
28 #include "fat.h"
29 #include "thread.h"
30 #include "led.h"
31 #include "hotswap.h"
32 #include "system.h"
33 #include "cpu.h"
34 #include <stdio.h>
35 #include <stdlib.h>
36 #include <string.h>
37 #include "as3525.h"
38 #include "pl180.h" /* SD controller */
39 #include "pl081.h" /* DMA controller */
40 #include "dma-target.h" /* DMA request lines */
41 #include "clock-target.h"
42 #ifdef HAVE_BUTTON_LIGHT
43 #include "backlight-target.h"
44 #endif
45 #include "stdbool.h"
46 #include "ata_idle_notify.h"
47 #include "sd.h"
48 #include "usb.h"
50 #ifdef HAVE_HOTSWAP
51 #include "disk.h"
52 #include "panic.h"
53 #endif
55 /* command flags */
56 #define MCI_NO_FLAGS (0<<0)
57 #define MCI_RESP (1<<0)
58 #define MCI_LONG_RESP (1<<1)
59 #define MCI_ARG (1<<2)
61 /* ARM PL180 registers */
62 #define MCI_POWER(i) (*(volatile unsigned char *) (pl180_base[i]+0x00))
63 #define MCI_CLOCK(i) (*(volatile unsigned long *) (pl180_base[i]+0x04))
64 #define MCI_ARGUMENT(i) (*(volatile unsigned long *) (pl180_base[i]+0x08))
65 #define MCI_COMMAND(i) (*(volatile unsigned long *) (pl180_base[i]+0x0C))
66 #define MCI_RESPCMD(i) (*(volatile unsigned long *) (pl180_base[i]+0x10))
67 #define MCI_RESP0(i) (*(volatile unsigned long *) (pl180_base[i]+0x14))
68 #define MCI_RESP1(i) (*(volatile unsigned long *) (pl180_base[i]+0x18))
69 #define MCI_RESP2(i) (*(volatile unsigned long *) (pl180_base[i]+0x1C))
70 #define MCI_RESP3(i) (*(volatile unsigned long *) (pl180_base[i]+0x20))
71 #define MCI_DATA_TIMER(i) (*(volatile unsigned long *) (pl180_base[i]+0x24))
72 #define MCI_DATA_LENGTH(i) (*(volatile unsigned short*) (pl180_base[i]+0x28))
73 #define MCI_DATA_CTRL(i) (*(volatile unsigned char *) (pl180_base[i]+0x2C))
74 #define MCI_DATA_CNT(i) (*(volatile unsigned short*) (pl180_base[i]+0x30))
75 #define MCI_STATUS(i) (*(volatile unsigned long *) (pl180_base[i]+0x34))
76 #define MCI_CLEAR(i) (*(volatile unsigned long *) (pl180_base[i]+0x38))
77 #define MCI_MASK0(i) (*(volatile unsigned long *) (pl180_base[i]+0x3C))
78 #define MCI_MASK1(i) (*(volatile unsigned long *) (pl180_base[i]+0x40))
79 #define MCI_SELECT(i) (*(volatile unsigned long *) (pl180_base[i]+0x44))
80 #define MCI_FIFO_CNT(i) (*(volatile unsigned long *) (pl180_base[i]+0x48))
82 #define MCI_ERROR \
83 (MCI_DATA_CRC_FAIL | MCI_DATA_TIMEOUT | MCI_RX_OVERRUN | MCI_TX_UNDERRUN)
85 #define MCI_FIFO(i) ((unsigned long *) (pl180_base[i]+0x80))
86 /* volumes */
87 #define INTERNAL_AS3525 0 /* embedded SD card */
88 #define SD_SLOT_AS3525 1 /* SD slot if present */
90 static const int pl180_base[NUM_VOLUMES] = {
91 NAND_FLASH_BASE
92 #ifdef HAVE_MULTIVOLUME
93 , SD_MCI_BASE
94 #endif
97 static int sd_select_bank(signed char bank);
98 static int sd_init_card(const int drive);
99 static void init_pl180_controller(const int drive);
100 #define SECTOR_SIZE 512 /* XXX: different sector sizes ? */
101 #define BLOCKS_PER_BANK 0x7a7800
103 static tCardInfo card_info[NUM_VOLUMES];
105 /* maximum timeouts recommanded in the SD Specification v2.00 */
106 #define SD_MAX_READ_TIMEOUT ((AS3525_PCLK_FREQ) / 1000 * 100) /* 100 ms */
107 #define SD_MAX_WRITE_TIMEOUT ((AS3525_PCLK_FREQ) / 1000 * 250) /* 250 ms */
109 /* for compatibility */
110 static long last_disk_activity = -1;
112 #define MIN_YIELD_PERIOD 5 /* ticks */
113 static long next_yield = 0;
115 static long sd_stack [(DEFAULT_STACK_SIZE*2 + 0x200)/sizeof(long)];
116 static const char sd_thread_name[] = "ata/sd";
117 static struct mutex sd_mtx;
118 static struct event_queue sd_queue;
119 #ifndef BOOTLOADER
120 static bool sd_enabled = false;
121 #endif
123 static struct wakeup transfer_completion_signal;
124 static volatile bool retry;
126 #define UNALIGNED_NUM_SECTORS 10
127 static unsigned char aligned_buffer[UNALIGNED_NUM_SECTORS* SECTOR_SIZE] __attribute__((aligned(32))); /* align on cache line size */
128 static unsigned char *uncached_buffer = UNCACHED_ADDR(&aligned_buffer[0]);
130 static inline void mci_delay(void) { int i = 0xffff; while(i--) ; }
132 #ifdef HAVE_HOTSWAP
133 #if defined(SANSA_E200V2) || defined(SANSA_FUZE) || defined(SANSA_C200V2)
134 static int sd1_oneshot_callback(struct timeout *tmo)
136 (void)tmo;
138 /* This is called only if the state was stable for 300ms - check state
139 * and post appropriate event. */
140 if (card_detect_target())
142 queue_broadcast(SYS_HOTSWAP_INSERTED, 0);
144 else
145 queue_broadcast(SYS_HOTSWAP_EXTRACTED, 0);
147 return 0;
150 void INT_GPIOA(void)
152 static struct timeout sd1_oneshot;
153 /* reset irq */
154 GPIOA_IC = (1<<2);
155 timeout_register(&sd1_oneshot, sd1_oneshot_callback, (3*HZ/10), 0);
157 #endif /* defined(SANSA_E200V2) || defined(SANSA_FUZE) || defined(SANSA_C200V2) */
158 #endif /* HAVE_HOTSWAP */
160 void INT_NAND(void)
162 const int status = MCI_STATUS(INTERNAL_AS3525);
164 if(status & MCI_ERROR)
165 retry = true;
167 wakeup_signal(&transfer_completion_signal);
168 MCI_CLEAR(INTERNAL_AS3525) = status;
171 #ifdef HAVE_MULTIVOLUME
172 void INT_MCI0(void)
174 const int status = MCI_STATUS(SD_SLOT_AS3525);
176 if(status & MCI_ERROR)
177 retry = true;
179 wakeup_signal(&transfer_completion_signal);
180 MCI_CLEAR(SD_SLOT_AS3525) = status;
182 #endif
184 static bool send_cmd(const int drive, const int cmd, const int arg,
185 const int flags, long *response)
187 int val, status;
189 while(MCI_STATUS(drive) & MCI_CMD_ACTIVE);
191 if(MCI_COMMAND(drive) & MCI_COMMAND_ENABLE) /* clears existing command */
193 MCI_COMMAND(drive) = 0;
194 mci_delay();
197 val = cmd | MCI_COMMAND_ENABLE;
198 if(flags & MCI_RESP)
200 val |= MCI_COMMAND_RESPONSE;
201 if(flags & MCI_LONG_RESP)
202 val |= MCI_COMMAND_LONG_RESPONSE;
205 MCI_CLEAR(drive) = 0x7ff;
207 MCI_ARGUMENT(drive) = (flags & MCI_ARG) ? arg : 0;
208 MCI_COMMAND(drive) = val;
210 while(MCI_STATUS(drive) & MCI_CMD_ACTIVE); /* wait for cmd completion */
212 MCI_COMMAND(drive) = 0;
213 MCI_ARGUMENT(drive) = ~0;
215 status = MCI_STATUS(drive);
216 MCI_CLEAR(drive) = 0x7ff;
218 if(flags & MCI_RESP)
220 if(status & MCI_CMD_TIMEOUT)
221 return false;
222 else if(status & (MCI_CMD_CRC_FAIL /* FIXME? */ | MCI_CMD_RESP_END))
223 { /* resp received */
224 if(flags & MCI_LONG_RESP)
226 /* store the response in reverse words order */
227 response[0] = MCI_RESP3(drive);
228 response[1] = MCI_RESP2(drive);
229 response[2] = MCI_RESP1(drive);
230 response[3] = MCI_RESP0(drive);
232 else
233 response[0] = MCI_RESP0(drive);
234 return true;
237 else if(status & MCI_CMD_SENT)
238 return true;
240 return false;
243 static int sd_init_card(const int drive)
245 unsigned long response;
246 long init_timeout;
247 bool sdhc;
248 unsigned long temp_reg[4];
249 int i;
251 if(!send_cmd(drive, SD_GO_IDLE_STATE, 0, MCI_NO_FLAGS, NULL))
252 return -1;
254 mci_delay();
256 sdhc = false;
257 if(send_cmd(drive, SD_SEND_IF_COND, 0x1AA, MCI_RESP|MCI_ARG, &response))
258 if((response & 0xFFF) == 0x1AA)
259 sdhc = true;
261 /* timeout for initialization is 1sec, from SD Specification 2.00 */
262 init_timeout = current_tick + HZ;
264 do {
265 /* timeout */
266 if(current_tick > init_timeout)
267 return -2;
269 /* app_cmd */
270 if( !send_cmd(drive, SD_APP_CMD, 0, MCI_RESP|MCI_ARG, &response) ||
271 !(response & (1<<5)) )
273 return -3;
276 /* acmd41 */
277 if(!send_cmd(drive, SD_APP_OP_COND, (sdhc ? 0x40FF8000 : (1<<23)),
278 MCI_RESP|MCI_ARG, &card_info[drive].ocr))
280 return -4;
283 } while(!(card_info[drive].ocr & (1<<31)));
285 /* send CID */
286 if(!send_cmd(drive, SD_ALL_SEND_CID, 0, MCI_RESP|MCI_LONG_RESP|MCI_ARG,
287 temp_reg))
288 return -5;
290 for(i=0; i<4; i++)
291 card_info[drive].cid[3-i] = temp_reg[i];
293 /* send RCA */
294 if(!send_cmd(drive, SD_SEND_RELATIVE_ADDR, 0, MCI_RESP|MCI_ARG,
295 &card_info[drive].rca))
296 return -6;
298 /* send CSD */
299 if(!send_cmd(drive, SD_SEND_CSD, card_info[drive].rca,
300 MCI_RESP|MCI_LONG_RESP|MCI_ARG, temp_reg))
301 return -7;
303 for(i=0; i<4; i++)
304 card_info[drive].csd[3-i] = temp_reg[i];
306 sd_parse_csd(&card_info[drive]);
308 if(!send_cmd(drive, SD_SELECT_CARD, card_info[drive].rca, MCI_ARG, NULL))
309 return -9;
311 if(!send_cmd(drive, SD_APP_CMD, card_info[drive].rca, MCI_ARG, NULL))
312 return -10;
314 if(!send_cmd(drive, SD_SET_BUS_WIDTH, card_info[drive].rca | 2, MCI_ARG, NULL))
315 return -11;
317 if(!send_cmd(drive, SD_SET_BLOCKLEN, card_info[drive].blocksize, MCI_ARG,
318 NULL))
319 return -12;
321 card_info[drive].initialized = 1;
323 MCI_CLOCK(drive) |= MCI_CLOCK_BYPASS; /* full speed for controller clock */
324 mci_delay();
327 * enable bank switching
328 * without issuing this command, we only have access to 1/4 of the blocks
329 * of the first bank (0x1E9E00 blocks, which is the size reported in the
330 * CSD register)
332 if(drive == INTERNAL_AS3525)
334 const int ret = sd_select_bank(-1);
335 if(ret < 0)
336 return ret - 13;
339 return 0;
342 static void sd_thread(void) __attribute__((noreturn));
343 static void sd_thread(void)
345 struct queue_event ev;
346 bool idle_notified = false;
348 while (1)
350 queue_wait_w_tmo(&sd_queue, &ev, HZ);
352 switch ( ev.id )
354 #ifdef HAVE_HOTSWAP
355 case SYS_HOTSWAP_INSERTED:
356 case SYS_HOTSWAP_EXTRACTED:
358 int microsd_init = 1;
359 fat_lock(); /* lock-out FAT activity first -
360 prevent deadlocking via disk_mount that
361 would cause a reverse-order attempt with
362 another thread */
363 mutex_lock(&sd_mtx); /* lock-out card activity - direct calls
364 into driver that bypass the fat cache */
366 /* We now have exclusive control of fat cache and ata */
368 disk_unmount(SD_SLOT_AS3525); /* release "by force", ensure file
369 descriptors aren't leaked and any busy
370 ones are invalid if mounting */
372 /* Force card init for new card, re-init for re-inserted one or
373 * clear if the last attempt to init failed with an error. */
374 card_info[SD_SLOT_AS3525].initialized = 0;
376 if (ev.id == SYS_HOTSWAP_INSERTED)
378 sd_enable(true);
379 init_pl180_controller(SD_SLOT_AS3525);
380 microsd_init = sd_init_card(SD_SLOT_AS3525);
381 if (microsd_init < 0) /* initialisation failed */
382 panicf("microSD init failed : %d", microsd_init);
384 microsd_init = disk_mount(SD_SLOT_AS3525); /* 0 if fail */
388 * Mount succeeded, or this was an EXTRACTED event,
389 * in both cases notify the system about the changed filesystems
391 if (microsd_init)
392 queue_broadcast(SYS_FS_CHANGED, 0);
394 /* Access is now safe */
395 mutex_unlock(&sd_mtx);
396 fat_unlock();
397 sd_enable(false);
399 break;
400 #endif
401 case SYS_TIMEOUT:
402 if (TIME_BEFORE(current_tick, last_disk_activity+(3*HZ)))
404 idle_notified = false;
406 else
408 /* never let a timer wrap confuse us */
409 next_yield = current_tick;
411 if (!idle_notified)
413 call_storage_idle_notifys(false);
414 idle_notified = true;
417 break;
419 case SYS_USB_CONNECTED:
420 usb_acknowledge(SYS_USB_CONNECTED_ACK);
421 /* Wait until the USB cable is extracted again */
422 usb_wait_for_disconnect(&sd_queue);
424 break;
425 case SYS_USB_DISCONNECTED:
426 usb_acknowledge(SYS_USB_DISCONNECTED_ACK);
427 break;
432 static void init_pl180_controller(const int drive)
434 MCI_COMMAND(drive) = MCI_DATA_CTRL(drive) = 0;
435 MCI_CLEAR(drive) = 0x7ff;
437 MCI_MASK0(drive) = MCI_MASK1(drive) = MCI_ERROR | MCI_DATA_END;
439 #ifdef HAVE_MULTIVOLUME
440 VIC_INT_ENABLE |=
441 (drive == INTERNAL_AS3525) ? INTERRUPT_NAND : INTERRUPT_MCI0;
443 #if defined(SANSA_E200V2) || defined(SANSA_FUZE) || defined(SANSA_C200V2)
444 /* setup isr for microsd monitoring */
445 VIC_INT_ENABLE |= (INTERRUPT_GPIOA);
446 /* clear previous irq */
447 GPIOA_IC = (1<<2);
448 /* enable edge detecting */
449 GPIOA_IS &= ~(1<<2);
450 /* detect both raising and falling edges */
451 GPIOA_IBE |= (1<<2);
453 #endif
455 #else
456 VIC_INT_ENABLE |= INTERRUPT_NAND;
457 #endif
459 MCI_POWER(drive) = MCI_POWER_UP|(10 /*voltage*/ << 2); /* use OF voltage */
460 mci_delay();
462 MCI_POWER(drive) |= MCI_POWER_ON;
463 mci_delay();
465 MCI_SELECT(drive) = 0;
467 MCI_CLOCK(drive) = MCI_CLOCK_ENABLE | AS3525_SD_IDENT_DIV;
468 mci_delay();
471 int sd_init(void)
473 int ret;
474 CGU_IDE = (1<<7) /* AHB interface enable */ |
475 (1<<6) /* interface enable */ |
476 (AS3525_IDE_DIV << 2) |
477 AS3525_CLK_PLLA; /* clock source = PLLA */
480 CGU_PERI |= CGU_NAF_CLOCK_ENABLE;
481 #ifdef HAVE_MULTIVOLUME
482 CGU_PERI |= CGU_MCI_CLOCK_ENABLE;
483 CCU_IO &= ~(1<<3); /* bits 3:2 = 01, xpd is SD interface */
484 CCU_IO |= (1<<2);
485 #endif
487 wakeup_init(&transfer_completion_signal);
489 init_pl180_controller(INTERNAL_AS3525);
490 ret = sd_init_card(INTERNAL_AS3525);
491 if(ret < 0)
492 return ret;
493 #ifdef HAVE_MULTIVOLUME
494 init_pl180_controller(SD_SLOT_AS3525);
495 #endif
497 /* init mutex */
498 mutex_init(&sd_mtx);
500 queue_init(&sd_queue, true);
501 create_thread(sd_thread, sd_stack, sizeof(sd_stack), 0,
502 sd_thread_name IF_PRIO(, PRIORITY_USER_INTERFACE) IF_COP(, CPU));
504 #ifndef BOOTLOADER
505 sd_enabled = true;
506 sd_enable(false);
507 #endif
508 return 0;
511 #ifdef HAVE_HOTSWAP
512 bool sd_removable(IF_MV_NONVOID(int drive))
514 #ifndef HAVE_MULTIVOLUME
515 const int drive=0;
516 #endif
517 return (drive==1);
520 bool sd_present(IF_MV_NONVOID(int drive))
522 #ifndef HAVE_MULTIVOLUME
523 const int drive=0;
524 #endif
525 return (card_info[drive].initialized && card_info[drive].numblocks > 0);
527 #endif
529 static int sd_wait_for_state(const int drive, unsigned int state)
531 unsigned long response = 0;
532 unsigned int timeout = 100; /* ticks */
533 long t = current_tick;
535 while (1)
537 long tick;
539 if(!send_cmd(drive, SD_SEND_STATUS, card_info[drive].rca,
540 MCI_RESP|MCI_ARG, &response))
541 return -1;
543 if (((response >> 9) & 0xf) == state)
544 return 0;
546 if(TIME_AFTER(current_tick, t + timeout))
547 return -2;
549 if (TIME_AFTER((tick = current_tick), next_yield))
551 yield();
552 timeout += current_tick - tick;
553 next_yield = tick + MIN_YIELD_PERIOD;
558 static int sd_select_bank(signed char bank)
560 int ret;
562 do {
563 /* The ISR will set this to true if an error occurred */
564 retry = false;
566 ret = sd_wait_for_state(INTERNAL_AS3525, SD_TRAN);
567 if (ret < 0)
568 return ret - 2;
570 if(!send_cmd(INTERNAL_AS3525, SD_SWITCH_FUNC, 0x80ffffef, MCI_ARG, NULL))
571 return -1;
573 mci_delay();
575 if(!send_cmd(INTERNAL_AS3525, 35, 0, MCI_NO_FLAGS, NULL))
576 return -2;
578 mci_delay();
580 memset(uncached_buffer, 0, 512);
581 if(bank == -1)
582 { /* enable bank switching */
583 uncached_buffer[0] = 16;
584 uncached_buffer[1] = 1;
585 uncached_buffer[2] = 10;
587 else
588 uncached_buffer[0] = bank;
590 dma_retain();
591 /* we don't use the uncached buffer here, because we need the
592 * physical memory address for DMA transfers */
593 dma_enable_channel(0, aligned_buffer, MCI_FIFO(INTERNAL_AS3525),
594 DMA_PERI_SD, DMAC_FLOWCTRL_PERI_MEM_TO_PERI, true, false, 0, DMA_S8,
595 NULL);
597 MCI_DATA_TIMER(INTERNAL_AS3525) = SD_MAX_WRITE_TIMEOUT;
598 MCI_DATA_LENGTH(INTERNAL_AS3525) = 512;
599 MCI_DATA_CTRL(INTERNAL_AS3525) = (1<<0) /* enable */ |
600 (0<<1) /* transfer direction */ |
601 (1<<3) /* DMA */ |
602 (9<<4) /* 2^9 = 512 */ ;
604 wakeup_wait(&transfer_completion_signal, TIMEOUT_BLOCK);
606 dma_release();
608 mci_delay();
610 ret = sd_wait_for_state(INTERNAL_AS3525, SD_TRAN);
611 if (ret < 0)
612 return ret - 4;
613 } while(retry);
615 card_info[INTERNAL_AS3525].current_bank = (bank == -1) ? 0 : bank;
617 return 0;
620 static int sd_transfer_sectors(IF_MV2(int drive,) unsigned long start,
621 int count, void* buf, const bool write)
623 #ifndef HAVE_MULTIVOLUME
624 const int drive = 0;
625 #endif
626 int ret = 0;
628 /* skip SanDisk OF */
629 if (drive == INTERNAL_AS3525)
630 start += AMS_OF_SIZE;
632 mutex_lock(&sd_mtx);
633 #ifndef BOOTLOADER
634 sd_enable(true);
635 led(true);
636 #endif
638 if (card_info[drive].initialized <= 0)
640 ret = sd_init_card(drive);
641 if (!(card_info[drive].initialized))
642 goto sd_transfer_error;
645 last_disk_activity = current_tick;
647 ret = sd_wait_for_state(drive, SD_TRAN);
648 if (ret < 0)
650 ret -= 20;
651 goto sd_transfer_error;
654 dma_retain();
656 while(count)
658 /* 128 * 512 = 2^16, and doesn't fit in the 16 bits of DATA_LENGTH
659 * register, so we have to transfer maximum 127 sectors at a time. */
660 unsigned int transfer = (count >= 128) ? 127 : count; /* sectors */
661 void *dma_buf;
662 const int cmd =
663 write ? SD_WRITE_MULTIPLE_BLOCK : SD_READ_MULTIPLE_BLOCK;
664 unsigned long bank_start = start;
666 /* The ISR will set this to true if an error occurred */
667 retry = false;
669 /* Only switch banks for internal storage */
670 if(drive == INTERNAL_AS3525)
672 unsigned int bank = start / BLOCKS_PER_BANK; /* Current bank */
674 /* Switch bank if needed */
675 if(card_info[INTERNAL_AS3525].current_bank != bank)
677 ret = sd_select_bank(bank);
678 if (ret < 0)
680 ret -= 2*20;
681 goto sd_transfer_error;
685 /* Adjust start block in current bank */
686 bank_start -= bank * BLOCKS_PER_BANK;
688 /* Do not cross a bank boundary in a single transfer loop */
689 if((transfer + bank_start) >= BLOCKS_PER_BANK)
690 transfer = BLOCKS_PER_BANK - bank_start;
693 dma_buf = aligned_buffer;
694 if(transfer > UNALIGNED_NUM_SECTORS)
695 transfer = UNALIGNED_NUM_SECTORS;
696 if(write)
697 memcpy(uncached_buffer, buf, transfer * SECTOR_SIZE);
699 /* Set bank_start to the correct unit (blocks or bytes) */
700 if(!(card_info[drive].ocr & (1<<30))) /* not SDHC */
701 bank_start *= SD_BLOCK_SIZE;
703 if(!send_cmd(drive, cmd, bank_start, MCI_ARG, NULL))
705 ret -= 3*20;
706 goto sd_transfer_error;
709 if(write)
710 dma_enable_channel(0, dma_buf, MCI_FIFO(drive),
711 (drive == INTERNAL_AS3525) ? DMA_PERI_SD : DMA_PERI_SD_SLOT,
712 DMAC_FLOWCTRL_PERI_MEM_TO_PERI, true, false, 0, DMA_S8, NULL);
713 else
714 dma_enable_channel(0, MCI_FIFO(drive), dma_buf,
715 (drive == INTERNAL_AS3525) ? DMA_PERI_SD : DMA_PERI_SD_SLOT,
716 DMAC_FLOWCTRL_PERI_PERI_TO_MEM, false, true, 0, DMA_S8, NULL);
718 /* FIXME : we should check if the timeouts calculated from the card's
719 * CSD are lower, and use them if it is the case
720 * Note : the OF doesn't seem to use them anyway */
721 MCI_DATA_TIMER(drive) = write ?
722 SD_MAX_WRITE_TIMEOUT : SD_MAX_READ_TIMEOUT;
723 MCI_DATA_LENGTH(drive) = transfer * card_info[drive].blocksize;
724 MCI_DATA_CTRL(drive) = (1<<0) /* enable */ |
725 (!write<<1) /* transfer direction */ |
726 (1<<3) /* DMA */ |
727 (9<<4) /* 2^9 = 512 */ ;
730 wakeup_wait(&transfer_completion_signal, TIMEOUT_BLOCK);
731 if(!retry)
733 if(!write)
734 memcpy(buf, uncached_buffer, transfer * SECTOR_SIZE);
735 buf += transfer * SECTOR_SIZE;
736 start += transfer;
737 count -= transfer;
740 last_disk_activity = current_tick;
742 if(!send_cmd(drive, SD_STOP_TRANSMISSION, 0, MCI_NO_FLAGS, NULL))
744 ret = -4*20;
745 goto sd_transfer_error;
748 ret = sd_wait_for_state(drive, SD_TRAN);
749 if (ret < 0)
751 ret -= 5*20;
752 goto sd_transfer_error;
756 ret = 0; /* success */
758 sd_transfer_error:
760 dma_release();
762 #ifndef BOOTLOADER
763 led(false);
764 sd_enable(false);
765 #endif
767 if (ret) /* error */
768 card_info[drive].initialized = 0;
770 mutex_unlock(&sd_mtx);
771 return ret;
774 int sd_read_sectors(IF_MV2(int drive,) unsigned long start, int count,
775 void* buf)
777 return sd_transfer_sectors(IF_MV2(drive,) start, count, buf, false);
780 int sd_write_sectors(IF_MV2(int drive,) unsigned long start, int count,
781 const void* buf)
784 #ifdef BOOTLOADER /* we don't need write support in bootloader */
785 #ifdef HAVE_MULTIVOLUME
786 (void) drive;
787 #endif
788 (void) start;
789 (void) count;
790 (void) buf;
791 return -1;
792 #else
793 return sd_transfer_sectors(IF_MV2(drive,) start, count, (void*)buf, true);
794 #endif
797 #ifndef BOOTLOADER
798 long sd_last_disk_activity(void)
800 return last_disk_activity;
803 void sd_enable(bool on)
805 /* buttonlight AMSes need a bit of special handling for the buttonlight here,
806 * due to the dual mapping of GPIOD and XPD */
807 #if defined(HAVE_BUTTON_LIGHT) && defined(HAVE_MULTIVOLUME)
808 extern int buttonlight_is_on;
809 #endif
810 if (sd_enabled == on)
811 return; /* nothing to do */
812 if(on)
814 CGU_PERI |= CGU_NAF_CLOCK_ENABLE;
815 #ifdef HAVE_MULTIVOLUME
816 CGU_PERI |= CGU_MCI_CLOCK_ENABLE;
817 #ifdef HAVE_BUTTON_LIGHT
818 CCU_IO |= (1<<2);
819 if (buttonlight_is_on)
820 GPIOD_DIR &= ~(1<<7);
821 else
822 _buttonlight_off();
823 #endif
824 #endif
825 CGU_IDE |= (1<<7) /* AHB interface enable */ |
826 (1<<6) /* interface enable */;
827 sd_enabled = true;
829 else
831 CGU_PERI &= ~CGU_NAF_CLOCK_ENABLE;
832 #ifdef HAVE_MULTIVOLUME
833 #ifdef HAVE_BUTTON_LIGHT
834 CCU_IO &= ~(1<<2);
835 if (buttonlight_is_on)
836 _buttonlight_on();
837 #endif
838 CGU_PERI &= ~CGU_MCI_CLOCK_ENABLE;
839 #endif
840 CGU_IDE &= ~((1<<7)|(1<<6));
841 sd_enabled = false;
845 tCardInfo *card_get_info_target(int card_no)
847 return &card_info[card_no];
850 bool card_detect_target(void)
852 #if defined(HAVE_HOTSWAP) && \
853 (defined(SANSA_E200V2) || defined(SANSA_FUZE) || defined(SANSA_C200V2))
854 return !(GPIOA_PIN(2));
855 #else
856 return false;
857 #endif
860 #ifdef HAVE_HOTSWAP
861 void card_enable_monitoring_target(bool on)
863 if (on)
865 /* add e200v2/c200v2 here */
866 #if defined(SANSA_E200V2) || defined(SANSA_FUZE) || defined(SANSA_C200V2)
867 /* enable isr*/
868 GPIOA_IE |= (1<<2);
869 #endif
871 else
873 #if defined(SANSA_E200V2) || defined(SANSA_FUZE) || defined(SANSA_C200V2)
874 /* edisable isr*/
875 GPIOA_IE &= ~(1<<2);
876 #endif
879 #endif
881 #endif /* BOOTLOADER */