firmware/target/arm/as3525/ata_sd_as3525.c

   1 /***************************************************************************
   2  *             __________               __   ___.
   3  *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
   4  *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
   5  *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
   6  *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
   7  *                     \/            \/     \/    \/            \/
   8  * $Id$
   9  *
  10  * Copyright (C) 2006 Daniel Ankers
  11  * Copyright © 2008-2009 Rafaël Carré
  12  *
  13  * This program is free software; you can redistribute it and/or
  14  * modify it under the terms of the GNU General Public License
  15  * as published by the Free Software Foundation; either version 2
  16  * of the License, or (at your option) any later version.
  17  *
  18  * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
  19  * KIND, either express or implied.
  20  *
  21  ****************************************************************************/
  22
  23 /* Driver for the ARM PL180 SD/MMC controller inside AS3525 SoC */
  24
  25 /* TODO: Find the real capacity of >2GB models (will be useful for USB) */
  26
  27 #include "config.h" /* for HAVE_MULTIDRIVE & AMS_OF_SIZE */
  28 #include "fat.h"
  29 #include "thread.h"
  30 #include "led.h"
  31 #include "hotswap.h"
  32 #include "system.h"
  33 #include "cpu.h"
  34 #include <stdio.h>
  35 #include <stdlib.h>
  36 #include <string.h>
  37 #include "as3525.h"
  38 #include "pl180.h"  /* SD controller */
  39 #include "pl081.h"  /* DMA controller */
  40 #include "dma-target.h" /* DMA request lines */
  41 #include "clock-target.h"
  42 #include "panic.h"
  43 #ifdef HAVE_BUTTON_LIGHT
  44 #include "backlight-target.h"
  45 #endif
  46 #include "stdbool.h"
  47 #include "ata_idle_notify.h"
  48 #include "sd.h"
  49 #include "usb.h"
  50
  51 #ifdef HAVE_HOTSWAP
  52 #include "disk.h"
  53 #endif
  54
  55 /* command flags */
  56 #define MCI_NO_FLAGS    (0<<0)
  57 #define MCI_RESP        (1<<0)
  58 #define MCI_LONG_RESP   (1<<1)
  59 #define MCI_ARG         (1<<2)
  60
  61 /* ARM PL180 registers */
  62 #define MCI_POWER(i)       (*(volatile unsigned char *) (pl180_base[i]+0x00))
  63 #define MCI_CLOCK(i)       (*(volatile unsigned long *) (pl180_base[i]+0x04))
  64 #define MCI_ARGUMENT(i)    (*(volatile unsigned long *) (pl180_base[i]+0x08))
  65 #define MCI_COMMAND(i)     (*(volatile unsigned long *) (pl180_base[i]+0x0C))
  66 #define MCI_RESPCMD(i)     (*(volatile unsigned long *) (pl180_base[i]+0x10))
  67 #define MCI_RESP0(i)       (*(volatile unsigned long *) (pl180_base[i]+0x14))
  68 #define MCI_RESP1(i)       (*(volatile unsigned long *) (pl180_base[i]+0x18))
  69 #define MCI_RESP2(i)       (*(volatile unsigned long *) (pl180_base[i]+0x1C))
  70 #define MCI_RESP3(i)       (*(volatile unsigned long *) (pl180_base[i]+0x20))
  71 #define MCI_DATA_TIMER(i)  (*(volatile unsigned long *) (pl180_base[i]+0x24))
  72 #define MCI_DATA_LENGTH(i) (*(volatile unsigned short*) (pl180_base[i]+0x28))
  73 #define MCI_DATA_CTRL(i)   (*(volatile unsigned char *) (pl180_base[i]+0x2C))
  74 #define MCI_DATA_CNT(i)    (*(volatile unsigned short*) (pl180_base[i]+0x30))
  75 #define MCI_STATUS(i)      (*(volatile unsigned long *) (pl180_base[i]+0x34))
  76 #define MCI_CLEAR(i)       (*(volatile unsigned long *) (pl180_base[i]+0x38))
  77 #define MCI_MASK0(i)       (*(volatile unsigned long *) (pl180_base[i]+0x3C))
  78 #define MCI_MASK1(i)       (*(volatile unsigned long *) (pl180_base[i]+0x40))
  79 #define MCI_SELECT(i)      (*(volatile unsigned long *) (pl180_base[i]+0x44))
  80 #define MCI_FIFO_CNT(i)    (*(volatile unsigned long *) (pl180_base[i]+0x48))
  81
  82 #define MCI_ERROR \
  83     (MCI_DATA_CRC_FAIL | MCI_DATA_TIMEOUT | MCI_RX_OVERRUN | MCI_TX_UNDERRUN)
  84
  85 #define MCI_FIFO(i)        ((unsigned long *) (pl180_base[i]+0x80))
  86 /* volumes */
  87 #define     INTERNAL_AS3525 0   /* embedded SD card */
  88 #define     SD_SLOT_AS3525   1   /* SD slot if present */
  89
  90 static const int pl180_base[NUM_DRIVES] = {
  91             NAND_FLASH_BASE
  92 #ifdef HAVE_MULTIDRIVE
  93             , SD_MCI_BASE
  94 #endif
  95 };
  96
  97 static int sd_wait_for_state(const int drive, unsigned int state);
  98 static int sd_select_bank(signed char bank);
  99 static int sd_init_card(const int drive);
 100 static void init_pl180_controller(const int drive);
 101
 102 #define BLOCKS_PER_BANK 0x7a7800
 103
 104 static tCardInfo card_info[NUM_DRIVES];
 105
 106 /* maximum timeouts recommanded in the SD Specification v2.00 */
 107 #define SD_MAX_READ_TIMEOUT     ((AS3525_PCLK_FREQ) / 1000 * 100) /* 100 ms */
 108 #define SD_MAX_WRITE_TIMEOUT    ((AS3525_PCLK_FREQ) / 1000 * 250) /* 250 ms */
 109
 110 /* for compatibility */
 111 static long last_disk_activity = -1;
 112
 113 #define MIN_YIELD_PERIOD 5  /* ticks */
 114 static long next_yield = 0;
 115
 116 static long sd_stack [(DEFAULT_STACK_SIZE*2 + 0x200)/sizeof(long)];
 117 static const char         sd_thread_name[] = "ata/sd";
 118 static struct mutex       sd_mtx;
 119 static struct event_queue sd_queue;
 120 #ifndef BOOTLOADER
 121 static bool sd_enabled = false;
 122 #endif
 123
 124 static struct wakeup transfer_completion_signal;
 125 static volatile unsigned int transfer_error[NUM_VOLUMES];
 126 #define PL180_MAX_TRANSFER_ERRORS 10
 127
 128 #define UNALIGNED_NUM_SECTORS 10
 129 static unsigned char aligned_buffer[UNALIGNED_NUM_SECTORS* SD_BLOCK_SIZE] __attribute__((aligned(32)));   /* align on cache line size */
 130 static unsigned char *uncached_buffer = UNCACHED_ADDR(&aligned_buffer[0]);
 131
 132 static inline void mci_delay(void)
 133 {
 134     int i = 0xffff;
 135     do {
 136         asm volatile("nop\n");
 137     } while (--i);
 138 }
 139
 140
 141 static inline bool card_detect_target(void)
 142 {
 143 #if defined(HAVE_MULTIDRIVE)
 144     return !(GPIOA_PIN(2));
 145 #else
 146     return false;
 147 #endif
 148 }
 149
 150 #ifdef HAVE_HOTSWAP
 151 static int sd1_oneshot_callback(struct timeout *tmo)
 152 {
 153     (void)tmo;
 154
 155     /* This is called only if the state was stable for 300ms - check state
 156      * and post appropriate event. */
 157     if (card_detect_target())
 158     {
 159         queue_broadcast(SYS_HOTSWAP_INSERTED, 0);
 160     }
 161     else
 162         queue_broadcast(SYS_HOTSWAP_EXTRACTED, 0);
 163
 164     return 0;
 165 }
 166
 167 void INT_GPIOA(void)
 168 {
 169     static struct timeout sd1_oneshot;
 170     /* acknowledge interrupt */
 171     GPIOA_IC = (1<<2);
 172     timeout_register(&sd1_oneshot, sd1_oneshot_callback, (3*HZ/10), 0);
 173 }
 174 #endif  /* HAVE_HOTSWAP */
 175
 176 void INT_NAND(void)
 177 {
 178     const int status = MCI_STATUS(INTERNAL_AS3525);
 179
 180     transfer_error[INTERNAL_AS3525] = status & MCI_ERROR;
 181
 182     wakeup_signal(&transfer_completion_signal);
 183     MCI_CLEAR(INTERNAL_AS3525) = status;
 184 }
 185
 186 #ifdef HAVE_MULTIDRIVE
 187 void INT_MCI0(void)
 188 {
 189     const int status = MCI_STATUS(SD_SLOT_AS3525);
 190
 191     transfer_error[SD_SLOT_AS3525] = status & MCI_ERROR;
 192
 193     wakeup_signal(&transfer_completion_signal);
 194     MCI_CLEAR(SD_SLOT_AS3525) = status;
 195 }
 196 #endif
 197
 198 static bool send_cmd(const int drive, const int cmd, const int arg,
 199                      const int flags, long *response)
 200 {
 201     int status;
 202
 203     /* Clear old status flags */
 204     MCI_CLEAR(drive) = 0x7ff;
 205
 206     /* Load command argument or clear if none */
 207     MCI_ARGUMENT(drive) = (flags & MCI_ARG) ? arg : 0;
 208
 209     /* Construct MCI_COMMAND & enable CPSM */
 210     MCI_COMMAND(drive) =
 211        /*b0:5*/  cmd
 212        /* b6 */| ((flags & (MCI_RESP|MCI_LONG_RESP)) ? MCI_COMMAND_RESPONSE : 0)
 213        /* b7 */| ((flags & MCI_LONG_RESP) ? MCI_COMMAND_LONG_RESPONSE : 0)
 214        /* b8   | MCI_COMMAND_INTERRUPT */
 215        /* b9   | MCI_COMMAND_PENDING */  /*Only used with stream data transfer*/
 216        /* b10*/| MCI_COMMAND_ENABLE;     /* Enables CPSM */
 217
 218     /* Wait while cmd completes then disable CPSM */
 219     while(MCI_STATUS(drive) & MCI_CMD_ACTIVE);
 220     MCI_COMMAND(drive) = 0;
 221
 222     status = MCI_STATUS(drive);
 223
 224     /*  Handle command responses */
 225     if(flags & MCI_RESP)                   /*  CMD expects response  */
 226     {
 227         response[0] = MCI_RESP0(drive);    /*  Always prepare short response  */
 228
 229         if(status & (MCI_CMD_TIMEOUT | MCI_CMD_CRC_FAIL))  /* failed response */
 230             return false;
 231
 232         if(status &  MCI_CMD_RESP_END)            /*Response passed CRC check */
 233         {
 234             if(flags & MCI_LONG_RESP)
 235             {   /* replace short response with long response */
 236                 /* store the response in reverse words order */
 237                 response[0] = MCI_RESP3(drive);
 238                 response[1] = MCI_RESP2(drive);
 239                 response[2] = MCI_RESP1(drive);
 240                 response[3] = MCI_RESP0(drive);
 241             }
 242             return true;
 243         }
 244     }
 245     else if(status & MCI_CMD_SENT)          /* CMD sent, no response required */
 246         return true;
 247
 248     return false;
 249 }
 250
 251 static int sd_init_card(const int drive)
 252 {
 253     unsigned long response;
 254     long init_timeout;
 255     bool sd_v2 = false;
 256     unsigned long temp_reg[4];
 257     int i;
 258
 259
 260     /* 100 - 400kHz clock required for Identification Mode  */
 261     MCI_CLOCK(drive) = (MCI_CLOCK(drive) & 0xf00) | AS3525_SD_IDENT_DIV;
 262
 263
 264     /*  Start of Card Identification Mode ************************************/
 265
 266
 267     /* CMD0 Go Idle  */
 268     if(!send_cmd(drive, SD_GO_IDLE_STATE, 0, MCI_NO_FLAGS, NULL))
 269         return -1;
 270
 271     mci_delay();
 272
 273     /* CMD8 Check for v2 sd card.  Must be sent before using ACMD41
 274       Non v2 cards will not respond to this command*/
 275     if(send_cmd(drive, SD_SEND_IF_COND, 0x1AA, MCI_RESP|MCI_ARG, &response))
 276         if((response & 0xFFF) == 0x1AA)
 277             sd_v2 = true;
 278
 279     /* timeout for initialization is 1sec, from SD Specification 2.00 */
 280     init_timeout = current_tick + HZ;
 281
 282     do {
 283         /* this timeout is the only valid error for this loop*/
 284         if(TIME_AFTER(current_tick, init_timeout))
 285             return -2;
 286
 287         /* app_cmd */
 288         send_cmd(drive, SD_APP_CMD, 0, MCI_RESP|MCI_ARG, &response);
 289
 290         /* ACMD41 For v2 cards set HCS bit[30] & send host voltage range to all */
 291         send_cmd(drive, SD_APP_OP_COND, (0x00FF8000 | (sd_v2 ? 1<<30 : 0)),
 292                         MCI_RESP|MCI_ARG, &card_info[drive].ocr);
 293
 294     } while(!(card_info[drive].ocr & (1<<31)));
 295
 296     /* CMD2 send CID */
 297     if(!send_cmd(drive, SD_ALL_SEND_CID, 0, MCI_RESP|MCI_LONG_RESP|MCI_ARG,
 298                             temp_reg))
 299         return -3;
 300
 301     for(i=0; i<4; i++)
 302         card_info[drive].cid[3-i] = temp_reg[i];
 303
 304     /* CMD3 send RCA */
 305     if(!send_cmd(drive, SD_SEND_RELATIVE_ADDR, 0, MCI_RESP|MCI_ARG,
 306                 &card_info[drive].rca))
 307         return -4;
 308
 309
 310     /*  End of Card Identification Mode   ************************************/
 311
 312
 313     /* full speed for controller clock  MCICLK = MCLK = PCLK = 62 MHz */
 314     MCI_CLOCK(drive) |= MCI_CLOCK_BYPASS;   /*  FIXME: 50 MHz is spec limit  */
 315     mci_delay();
 316
 317 #ifdef HAVE_MULTIDRIVE
 318     /* Try to switch V2 cards to HS timings, non HS seem to ignore this */
 319     if(sd_v2)
 320     {
 321         /*  CMD7 w/rca: Select card to put it in TRAN state */
 322         if(!send_cmd(drive, SD_SELECT_CARD, card_info[drive].rca, MCI_ARG, NULL))
 323             return -5;
 324
 325         if(sd_wait_for_state(drive, SD_TRAN))
 326             return -6;
 327         /* CMD6 */
 328         if(!send_cmd(drive, SD_SWITCH_FUNC, 0x80fffff1, MCI_ARG, NULL))
 329             return -7;
 330         mci_delay();
 331
 332         /*  go back to STBY state so we can read csd */
 333         /*  CMD7 w/rca=0:  Deselect card to put it in STBY state */
 334         if(!send_cmd(drive, SD_DESELECT_CARD, 0, MCI_ARG, NULL))
 335             return -8;
 336     }
 337 #endif /*  HAVE_MULTIDRIVE  */
 338
 339     /* CMD9 send CSD */
 340     if(!send_cmd(drive, SD_SEND_CSD, card_info[drive].rca,
 341                  MCI_RESP|MCI_LONG_RESP|MCI_ARG, temp_reg))
 342         return -9;
 343
 344     for(i=0; i<4; i++)
 345         card_info[drive].csd[3-i] = temp_reg[i];
 346
 347     sd_parse_csd(&card_info[drive]);
 348
 349     /*  CMD7 w/rca: Select card to put it in TRAN state */
 350     if(!send_cmd(drive, SD_SELECT_CARD, card_info[drive].rca, MCI_ARG, NULL))
 351         return -10;
 352
 353     /*
 354      * enable bank switching
 355      * without issuing this command, we only have access to 1/4 of the blocks
 356      * of the first bank (0x1E9E00 blocks, which is the size reported in the
 357      * CSD register)
 358      */
 359     if(drive == INTERNAL_AS3525)
 360     {
 361         const int ret = sd_select_bank(-1);
 362         if(ret < 0)
 363             return ret - 11;
 364     }
 365
 366     card_info[drive].initialized = 1;
 367
 368     return 0;
 369 }
 370
 371 static void sd_thread(void) __attribute__((noreturn));
 372 static void sd_thread(void)
 373 {
 374     struct queue_event ev;
 375     bool idle_notified = false;
 376
 377     while (1)
 378     {
 379         queue_wait_w_tmo(&sd_queue, &ev, HZ);
 380
 381         switch ( ev.id )
 382         {
 383 #ifdef HAVE_HOTSWAP
 384         case SYS_HOTSWAP_INSERTED:
 385         case SYS_HOTSWAP_EXTRACTED:
 386         {
 387             int microsd_init = 1;
 388             fat_lock();          /* lock-out FAT activity first -
 389                                     prevent deadlocking via disk_mount that
 390                                     would cause a reverse-order attempt with
 391                                     another thread */
 392             mutex_lock(&sd_mtx); /* lock-out card activity - direct calls
 393                                     into driver that bypass the fat cache */
 394
 395             /* We now have exclusive control of fat cache and ata */
 396
 397             disk_unmount(SD_SLOT_AS3525);     /* release "by force", ensure file
 398                                     descriptors aren't leaked and any busy
 399                                     ones are invalid if mounting */
 400
 401             /* Force card init for new card, re-init for re-inserted one or
 402              * clear if the last attempt to init failed with an error. */
 403             card_info[SD_SLOT_AS3525].initialized = 0;
 404
 405             if (ev.id == SYS_HOTSWAP_INSERTED)
 406             {
 407                 sd_enable(true);
 408                 init_pl180_controller(SD_SLOT_AS3525);
 409                 microsd_init = sd_init_card(SD_SLOT_AS3525);
 410                 if (microsd_init < 0) /* initialisation failed */
 411                     panicf("microSD init failed : %d", microsd_init);
 412
 413                 microsd_init = disk_mount(SD_SLOT_AS3525); /* 0 if fail */
 414             }
 415
 416             /*
 417              * Mount succeeded, or this was an EXTRACTED event,
 418              * in both cases notify the system about the changed filesystems
 419              */
 420             if (microsd_init)
 421                 queue_broadcast(SYS_FS_CHANGED, 0);
 422
 423             /* Access is now safe */
 424             mutex_unlock(&sd_mtx);
 425             fat_unlock();
 426             sd_enable(false);
 427         }
 428             break;
 429 #endif
 430         case SYS_TIMEOUT:
 431             if (TIME_BEFORE(current_tick, last_disk_activity+(3*HZ)))
 432             {
 433                 idle_notified = false;
 434             }
 435             else
 436             {
 437                 /* never let a timer wrap confuse us */
 438                 next_yield = current_tick;
 439
 440                 if (!idle_notified)
 441                 {
 442                     call_storage_idle_notifys(false);
 443                     idle_notified = true;
 444                 }
 445             }
 446             break;
 447
 448         case SYS_USB_CONNECTED:
 449             usb_acknowledge(SYS_USB_CONNECTED_ACK);
 450             /* Wait until the USB cable is extracted again */
 451             usb_wait_for_disconnect(&sd_queue);
 452
 453             break;
 454         case SYS_USB_DISCONNECTED:
 455             usb_acknowledge(SYS_USB_DISCONNECTED_ACK);
 456             break;
 457         }
 458     }
 459 }
 460
 461 static void init_pl180_controller(const int drive)
 462 {
 463     MCI_COMMAND(drive) = MCI_DATA_CTRL(drive) = 0;
 464     MCI_CLEAR(drive) = 0x7ff;
 465
 466     MCI_MASK0(drive) = MCI_ERROR | MCI_DATA_END;
 467     MCI_MASK1(drive) = 0;
 468 #ifdef HAVE_MULTIDRIVE
 469     VIC_INT_ENABLE =
 470         (drive == INTERNAL_AS3525) ? INTERRUPT_NAND : INTERRUPT_MCI0;
 471
 472     /* setup isr for microsd monitoring */
 473     VIC_INT_ENABLE = (INTERRUPT_GPIOA);
 474     /* clear previous irq */
 475     GPIOA_IC = (1<<2);
 476     /* enable edge detecting */
 477     GPIOA_IS &= ~(1<<2);
 478     /* detect both raising and falling edges */
 479     GPIOA_IBE |= (1<<2);
 480
 481 #else
 482     VIC_INT_ENABLE = INTERRUPT_NAND;
 483 #endif
 484
 485     MCI_POWER(drive) = MCI_POWER_UP | (MCI_VDD_3_0);  /*  OF Setting  */
 486     mci_delay();
 487
 488     MCI_POWER(drive) |= MCI_POWER_ON;
 489     mci_delay();
 490
 491     MCI_SELECT(drive) = 0;
 492
 493     MCI_CLOCK(drive) = MCI_CLOCK_ENABLE;
 494     mci_delay();
 495 }
 496
 497 int sd_init(void)
 498 {
 499     int ret;
 500     CGU_IDE =   (1<<7)  /* AHB interface enable */  |
 501                 (1<<6)  /* interface enable */      |
 502                 (AS3525_IDE_DIV << 2)               |
 503                 AS3525_CLK_PLLA;  /* clock source = PLLA */
 504
 505
 506     CGU_PERI |= CGU_NAF_CLOCK_ENABLE;
 507 #ifdef HAVE_MULTIDRIVE
 508     CGU_PERI |= CGU_MCI_CLOCK_ENABLE;
 509     CCU_IO &= ~(1<<3);           /* bits 3:2 = 01, xpd is SD interface */
 510     CCU_IO |= (1<<2);
 511 #endif
 512
 513     wakeup_init(&transfer_completion_signal);
 514
 515     init_pl180_controller(INTERNAL_AS3525);
 516     ret = sd_init_card(INTERNAL_AS3525);
 517     if(ret < 0)
 518         return ret;
 519 #ifdef HAVE_MULTIDRIVE
 520     init_pl180_controller(SD_SLOT_AS3525);
 521 #endif
 522
 523     /* init mutex */
 524     mutex_init(&sd_mtx);
 525
 526     queue_init(&sd_queue, true);
 527     create_thread(sd_thread, sd_stack, sizeof(sd_stack), 0,
 528             sd_thread_name IF_PRIO(, PRIORITY_USER_INTERFACE) IF_COP(, CPU));
 529
 530 #ifndef BOOTLOADER
 531     sd_enabled = true;
 532     sd_enable(false);
 533 #endif
 534     return 0;
 535 }
 536
 537 #ifdef HAVE_HOTSWAP
 538 bool sd_removable(IF_MD_NONVOID(int drive))
 539 {
 540     return (drive==1);
 541 }
 542
 543 bool sd_present(IF_MD_NONVOID(int drive))
 544 {
 545     return (drive == 0) ? true : card_detect_target();
 546 }
 547 #endif /* HAVE_HOTSWAP */
 548
 549 static int sd_wait_for_state(const int drive, unsigned int state)
 550 {
 551     unsigned long response = 0;
 552     unsigned int timeout = current_tick + 100; /* 100 ticks timeout */
 553
 554     while (1)
 555     {
 556         if(!send_cmd(drive, SD_SEND_STATUS, card_info[drive].rca,
 557                     MCI_RESP|MCI_ARG, &response))
 558             return -1;
 559
 560         if (((response >> 9) & 0xf) == state)
 561             return 0;
 562
 563         if(TIME_AFTER(current_tick, timeout))
 564             return -2;
 565
 566         if (TIME_AFTER(current_tick, next_yield))
 567         {
 568             yield();
 569             next_yield = current_tick + MIN_YIELD_PERIOD;
 570         }
 571     }
 572 }
 573
 574 static int sd_select_bank(signed char bank)
 575 {
 576     int ret;
 577     unsigned loops = 0;
 578
 579     do {
 580         if(loops++ > PL180_MAX_TRANSFER_ERRORS)
 581             panicf("SD bank %d error : 0x%x", bank,
 582                     transfer_error[INTERNAL_AS3525]);
 583
 584         ret = sd_wait_for_state(INTERNAL_AS3525, SD_TRAN);
 585         if (ret < 0)
 586             return ret - 2;
 587
 588         if(!send_cmd(INTERNAL_AS3525, SD_SWITCH_FUNC, 0x80ffffef, MCI_ARG, NULL))
 589             return -1;
 590
 591         mci_delay();
 592
 593         if(!send_cmd(INTERNAL_AS3525, 35, 0, MCI_NO_FLAGS, NULL))
 594             return -2;
 595
 596         mci_delay();
 597
 598         memset(uncached_buffer, 0, 512);
 599         if(bank == -1)
 600         {   /* enable bank switching */
 601             uncached_buffer[0] = 16;
 602             uncached_buffer[1] = 1;
 603             uncached_buffer[2] = 10;
 604         }
 605         else
 606             uncached_buffer[0] = bank;
 607
 608         dma_retain();
 609         /* we don't use the uncached buffer here, because we need the
 610          * physical memory address for DMA transfers */
 611         dma_enable_channel(0, aligned_buffer, MCI_FIFO(INTERNAL_AS3525),
 612             DMA_PERI_SD, DMAC_FLOWCTRL_PERI_MEM_TO_PERI, true, false, 0, DMA_S8,
 613             NULL);
 614
 615         MCI_DATA_TIMER(INTERNAL_AS3525) = SD_MAX_WRITE_TIMEOUT;
 616         MCI_DATA_LENGTH(INTERNAL_AS3525) = 512;
 617         MCI_DATA_CTRL(INTERNAL_AS3525) =  (1<<0) /* enable */   |
 618                                 (0<<1) /* transfer direction */ |
 619                                 (1<<3) /* DMA */                |
 620                                 (9<<4) /* 2^9 = 512 */ ;
 621
 622         wakeup_wait(&transfer_completion_signal, TIMEOUT_BLOCK);
 623
 624         /*  Wait for FIFO to empty, card may still be in PRG state  */
 625         while(MCI_STATUS(INTERNAL_AS3525) & MCI_TX_ACTIVE );
 626
 627         dma_release();
 628
 629     } while(transfer_error[INTERNAL_AS3525]);
 630
 631     card_info[INTERNAL_AS3525].current_bank = (bank == -1) ? 0 : bank;
 632
 633     return 0;
 634 }
 635
 636 static int sd_transfer_sectors(IF_MD2(int drive,) unsigned long start,
 637                                int count, void* buf, const bool write)
 638 {
 639 #ifndef HAVE_MULTIDRIVE
 640     const int drive = 0;
 641 #endif
 642     int ret = 0;
 643     unsigned loops = 0;
 644
 645     /* skip SanDisk OF */
 646     if (drive == INTERNAL_AS3525)
 647         start += AMS_OF_SIZE;
 648
 649     mutex_lock(&sd_mtx);
 650 #ifndef BOOTLOADER
 651     sd_enable(true);
 652     led(true);
 653 #endif
 654
 655     if (card_info[drive].initialized <= 0)
 656     {
 657         ret = sd_init_card(drive);
 658         if (!(card_info[drive].initialized))
 659             goto sd_transfer_error;
 660     }
 661
 662     last_disk_activity = current_tick;
 663
 664     dma_retain();
 665
 666     while(count)
 667     {
 668         /* 128 * 512 = 2^16, and doesn't fit in the 16 bits of DATA_LENGTH
 669          * register, so we have to transfer maximum 127 sectors at a time. */
 670         unsigned int transfer = (count >= 128) ? 127 : count; /* sectors */
 671         void *dma_buf;
 672         const int cmd =
 673             write ? SD_WRITE_MULTIPLE_BLOCK : SD_READ_MULTIPLE_BLOCK;
 674         unsigned long bank_start = start;
 675
 676         /* Only switch banks for internal storage */
 677         if(drive == INTERNAL_AS3525)
 678         {
 679             unsigned int bank = start / BLOCKS_PER_BANK; /* Current bank */
 680
 681             /* Switch bank if needed */
 682             if(card_info[INTERNAL_AS3525].current_bank != bank)
 683             {
 684                 ret = sd_select_bank(bank);
 685                 if (ret < 0)
 686                 {
 687                     ret -= 20;
 688                     goto sd_transfer_error;
 689                 }
 690             }
 691
 692             /* Adjust start block in current bank */
 693             bank_start -= bank * BLOCKS_PER_BANK;
 694
 695             /* Do not cross a bank boundary in a single transfer loop */
 696             if((transfer + bank_start) > BLOCKS_PER_BANK)
 697                 transfer = BLOCKS_PER_BANK - bank_start;
 698         }
 699
 700         dma_buf = aligned_buffer;
 701         if(transfer > UNALIGNED_NUM_SECTORS)
 702             transfer = UNALIGNED_NUM_SECTORS;
 703         if(write)
 704             memcpy(uncached_buffer, buf, transfer * SD_BLOCK_SIZE);
 705
 706         /* Set bank_start to the correct unit (blocks or bytes) */
 707         if(!(card_info[drive].ocr & (1<<30)))   /* not SDHC */
 708             bank_start *= SD_BLOCK_SIZE;
 709
 710         ret = sd_wait_for_state(drive, SD_TRAN);
 711         if (ret < 0)
 712         {
 713             ret -= 2*20;
 714             goto sd_transfer_error;
 715         }
 716
 717         if(!send_cmd(drive, cmd, bank_start, MCI_ARG, NULL))
 718         {
 719             ret -= 3*20;
 720             goto sd_transfer_error;
 721         }
 722
 723         if(write)
 724             dma_enable_channel(0, dma_buf, MCI_FIFO(drive),
 725                 (drive == INTERNAL_AS3525) ? DMA_PERI_SD : DMA_PERI_SD_SLOT,
 726                 DMAC_FLOWCTRL_PERI_MEM_TO_PERI, true, false, 0, DMA_S8, NULL);
 727         else
 728             dma_enable_channel(0, MCI_FIFO(drive), dma_buf,
 729                 (drive == INTERNAL_AS3525) ? DMA_PERI_SD : DMA_PERI_SD_SLOT,
 730                 DMAC_FLOWCTRL_PERI_PERI_TO_MEM, false, true, 0, DMA_S8, NULL);
 731
 732         /* FIXME : we should check if the timeouts calculated from the card's
 733          * CSD are lower, and use them if it is the case
 734          * Note : the OF doesn't seem to use them anyway */
 735         MCI_DATA_TIMER(drive) = write ?
 736                 SD_MAX_WRITE_TIMEOUT : SD_MAX_READ_TIMEOUT;
 737         MCI_DATA_LENGTH(drive) = transfer * SD_BLOCK_SIZE;
 738         MCI_DATA_CTRL(drive) =  (1<<0) /* enable */                     |
 739                                 (!write<<1) /* transfer direction */    |
 740                                 (1<<3) /* DMA */                        |
 741                                 (9<<4) /* 2^9 = 512 */ ;
 742
 743
 744         wakeup_wait(&transfer_completion_signal, TIMEOUT_BLOCK);
 745
 746         /*  Wait for FIFO to empty, card may still be in PRG state for writes */
 747         while(MCI_STATUS(drive) & MCI_TX_ACTIVE);
 748
 749         if(!transfer_error[drive])
 750         {
 751             if(!write)
 752                 memcpy(buf, uncached_buffer, transfer * SD_BLOCK_SIZE);
 753             buf += transfer * SD_BLOCK_SIZE;
 754             start += transfer;
 755             count -= transfer;
 756             loops = 0;  /* reset errors counter */
 757         }
 758         else if(loops++ > PL180_MAX_TRANSFER_ERRORS)
 759                 panicf("SD transfer error : 0x%x", transfer_error[drive]);
 760
 761         last_disk_activity = current_tick;
 762
 763         if(!send_cmd(drive, SD_STOP_TRANSMISSION, 0, MCI_NO_FLAGS, NULL))
 764         {
 765             ret = -4*20;
 766             goto sd_transfer_error;
 767         }
 768     }
 769
 770     ret = 0;    /* success */
 771
 772 sd_transfer_error:
 773
 774     dma_release();
 775
 776 #ifndef BOOTLOADER
 777     led(false);
 778     sd_enable(false);
 779 #endif
 780
 781     if (ret)    /* error */
 782         card_info[drive].initialized = 0;
 783
 784     mutex_unlock(&sd_mtx);
 785     return ret;
 786 }
 787
 788 int sd_read_sectors(IF_MD2(int drive,) unsigned long start, int count,
 789                      void* buf)
 790 {
 791     return sd_transfer_sectors(IF_MD2(drive,) start, count, buf, false);
 792 }
 793
 794 int sd_write_sectors(IF_MD2(int drive,) unsigned long start, int count,
 795                      const void* buf)
 796 {
 797
 798 #ifdef BOOTLOADER /* we don't need write support in bootloader */
 799 #ifdef HAVE_MULTIDRIVE
 800     (void) drive;
 801 #endif
 802     (void) start;
 803     (void) count;
 804     (void) buf;
 805     return -1;
 806 #else
 807     return sd_transfer_sectors(IF_MD2(drive,) start, count, (void*)buf, true);
 808 #endif
 809 }
 810
 811 #ifndef BOOTLOADER
 812 long sd_last_disk_activity(void)
 813 {
 814     return last_disk_activity;
 815 }
 816
 817 void sd_enable(bool on)
 818 {
 819     /* buttonlight AMSes need a bit of special handling for the buttonlight here
 820      * due to the dual mapping of GPIOD and XPD */
 821 #if defined(HAVE_BUTTON_LIGHT) && defined(HAVE_MULTIDRIVE)
 822     extern int buttonlight_is_on;
 823 #endif
 824
 825 #ifdef HAVE_HOTSWAP
 826     static bool cpu_boosted = false;
 827 #endif
 828
 829     if (sd_enabled == on)
 830         return; /* nothing to do */
 831     if(on)
 832     {
 833         CGU_PERI |= CGU_NAF_CLOCK_ENABLE;
 834 #ifdef HAVE_MULTIDRIVE
 835         CGU_PERI |= CGU_MCI_CLOCK_ENABLE;
 836 #ifdef HAVE_BUTTON_LIGHT
 837         CCU_IO |= (1<<2);
 838         if (buttonlight_is_on)
 839             GPIOD_DIR &= ~(1<<7);
 840         else
 841             _buttonlight_off();
 842 #endif /* HAVE_BUTTON_LIGHT */
 843 #endif /* HAVE_MULTIDRIVE */
 844         CGU_IDE |= (1<<7)  /* AHB interface enable */  |
 845                    (1<<6)  /* interface enable */;
 846         sd_enabled = true;
 847
 848 #ifdef HAVE_HOTSWAP
 849         if(card_detect_target())  /* If SD card present Boost cpu for voltage */
 850         {
 851             cpu_boosted = true;
 852             cpu_boost(true);
 853         }
 854 #endif
 855     }
 856     else
 857     {
 858         CGU_PERI &= ~CGU_NAF_CLOCK_ENABLE;
 859 #ifdef HAVE_MULTIDRIVE
 860 #ifdef HAVE_BUTTON_LIGHT
 861         CCU_IO &= ~(1<<2);
 862         if (buttonlight_is_on)
 863             _buttonlight_on();
 864 #endif /* HAVE_BUTTON_LIGHT */
 865         CGU_PERI &= ~CGU_MCI_CLOCK_ENABLE;
 866 #endif /* HAVE_MULTIDRIVE */
 867         CGU_IDE &= ~((1<<7)|(1<<6));
 868         sd_enabled = false;
 869
 870 #ifdef HAVE_HOTSWAP
 871         if(cpu_boosted)
 872         {
 873             cpu_boost(false);
 874             cpu_boosted = false;
 875         }
 876 #endif
 877     }
 878 }
 879
 880 tCardInfo *card_get_info_target(int card_no)
 881 {
 882     return &card_info[card_no];
 883 }
 884
 885 #ifdef HAVE_HOTSWAP
 886 void card_enable_monitoring_target(bool on)
 887 {
 888     if (on) /* enable interrupt */
 889         GPIOA_IE |= (1<<2);
 890     else    /* disable interrupt */
 891         GPIOA_IE &= ~(1<<2);
 892 }
 893 #endif /* HAVE_HOTSWAP */
 894
 895 #endif /* !BOOTLOADER */
 896
 897 #ifdef CONFIG_STORAGE_MULTI
 898 int sd_num_drives(int first_drive)
 899 {
 900     /* We don't care which logical drive number(s) we have been assigned */
 901     (void)first_drive;
 902
 903     return NUM_DRIVES;
 904 }
 905 #endif /* CONFIG_STORAGE_MULTI */