1 # Copyright
(C
) 1999-2017 Free Software Foundation
, Inc.
3 # This
program is free software
; you can redistribute it and
/or modify
4 # it under the terms of the GNU General Public License as published by
5 # the Free Software Foundation
; either version
3 of the License
, or
6 #
(at your option
) any later version.
8 # This
program is distributed in the hope that it will be useful
,
9 # but WITHOUT
ANY WARRANTY
; without even the implied warranty of
10 # MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. See the
11 # GNU General Public License
for more details.
13 # You should have received a copy of the GNU General Public License
14 # along with GCC
; see the file COPYING3.
If not see
15 #
<http
://www.gnu.org
/licenses
/>.
17 # Please email
any bugs
, comments
, and
/or additions to this file to
:
18 # gcc
-patches@gcc.gnu.org
20 # This file defines procs
for determining features supported by the target.
22 # Try to
compile the code given by CONTENTS into an output file of
23 # type TYPE
, where TYPE is as
for target_compile.
Return a list
24 # whose first element contains the compiler messages and whose
25 # second element is the
name of the output file.
27 # BASENAME is a prefix to use
for source and output files.
28 #
If ARGS is not empty
, its first element is a string that
29 # should be added to the command line.
31 # Assume by default that CONTENTS is C code.
32 # Otherwise
, code should contain
:
34 #
"! Fortran" for Fortran code,
36 #
"// ObjC++" for ObjC++
38 #
If the tool is ObjC
/ObjC
++ then we overide the extension to .m
/.mm to
39 # allow
for ObjC
/ObjC
++ specific flags.
40 proc check_compile
{basename type contents
args} {
42 verbose
"check_compile tool: $tool for $basename"
44 # Save additional_sources to avoid compiling testsuite
's sources
45 # against check_compile's source.
46 global additional_sources
47 if [info exists additional_sources
] {
48 set tmp_additional_sources
"$additional_sources"
49 set additional_sources
""
52 if { [llength $
args] > 0 } {
53 set options
[list
"additional_flags=[lindex $args 0]"]
57 switch -glob
-- $contents
{
58 "*! Fortran*" { set src ${basename}[pid].f90 }
59 "*// C++*" { set src ${basename}[pid].cc }
60 "*// ObjC++*" { set src ${basename}[pid].mm }
61 "*/* ObjC*" { set src ${basename}[pid].m }
62 "*// Go*" { set src ${basename}[pid].go }
65 "objc" { set src ${basename}[pid].m }
66 "obj-c++" { set src ${basename}[pid].mm }
67 default
{ set src $
{basename
}[pid
].c
}
72 set compile_type $type
74 assembly
{ set output $
{basename
}[pid
].s
}
75 object
{ set output $
{basename
}[pid
].o
}
76 executable
{ set output $
{basename
}[pid
].exe
}
78 set output $
{basename
}[pid
].s
79 lappend options
"additional_flags=-fdump-$type"
80 set compile_type assembly
86 set lines
[$
{tool
}_target_compile $src $output $compile_type
"$options"]
89 set scan_output $output
90 # Don
't try folding this into the switch above; calling "glob" before the
91 # file is created won't work.
92 if [regexp
"rtl-(.*)" $type dummy rtl_type] {
93 set scan_output
"[glob $src.\[0-9\]\[0-9\]\[0-9\]r.$rtl_type]"
97 # Restore additional_sources.
98 if [info exists additional_sources
] {
99 set additional_sources
"$tmp_additional_sources"
102 return [list $lines $scan_output
]
105 proc current_target_name
{ } {
107 if [info exists target_info
(target
,name)] {
108 set answer $target_info
(target
,name)
115 # Implement an effective
-target check
for property PROP by invoking
116 # the Tcl command
ARGS and seeing
if it returns true.
118 proc check_cached_effective_target
{ prop
args } {
122 set target
[current_target_name
]
123 if {![info exists et_cache
($prop
,target
)]
124 || $et_cache
($prop
,target
) != $target
} {
125 verbose
"check_cached_effective_target $prop: checking $target" 2
126 set et_cache
($prop
,target
) $target
127 set et_cache
($prop
,value
) [uplevel eval $
args]
128 if {![info exists et_prop_list
]
129 ||
[lsearch $et_prop_list $prop
] < 0} {
130 lappend et_prop_list $prop
132 verbose
"check_cached_effective_target cached list is now: $et_prop_list" 2
134 set value $et_cache
($prop
,value
)
135 verbose
"check_cached_effective_target $prop: returning $value for $target" 2
139 # Clear effective
-target
cache. This is useful after testing
140 # effective
-target features and overriding TEST_ALWAYS_FLAGS and
/or
142 #
If one changes ALWAYS_CXXFLAGS or TEST_ALWAYS_FLAGS
then they should
143 #
do a clear_effective_target_cache at the end as the target
cache can
144 # make decisions based upon the flags
, and those decisions need to be
145 # redone when the flags change. An example of this is the
146 # asan_init
/asan_finish pair.
148 proc clear_effective_target_cache
{ } {
152 if {[info exists et_prop_list
]} {
153 verbose
"clear_effective_target_cache: $et_prop_list" 2
154 foreach prop $et_prop_list
{
155 unset et_cache
($prop
,value
)
156 unset et_cache
($prop
,target
)
162 # Like check_compile
, but
delete the output file and
return true
if the
163 # compiler printed no messages.
164 proc check_no_compiler_messages_nocache
{args} {
165 set result
[eval check_compile $
args]
166 set lines
[lindex $result
0]
167 set output
[lindex $result
1]
168 remote_file build
delete $output
169 return [string match
"" $lines]
172 # Like check_no_compiler_messages_nocache
, but
cache the result.
173 # PROP is the
property we
're checking, and doubles as a prefix for
174 # temporary filenames.
175 proc check_no_compiler_messages {prop args} {
176 return [check_cached_effective_target $prop {
177 eval [list check_no_compiler_messages_nocache $prop] $args
181 # Like check_compile, but return true if the compiler printed no
182 # messages and if the contents of the output file satisfy PATTERN.
183 # If PATTERN has the form "!REGEXP", the contents satisfy it if they
184 # don't match regular expression REGEXP
, otherwise they satisfy it
185 #
if they
do match regular expression PATTERN.
(PATTERN can start
186 # with something like
"[!]" if the regular expression needs to match
187 #
"!" as the first character.)
189 #
Delete the output file before returning. The other arguments are
190 # as
for check_compile.
191 proc check_no_messages_and_pattern_nocache
{basename pattern
args} {
194 set result
[eval
[list check_compile $basename
] $
args]
195 set lines
[lindex $result
0]
196 set output
[lindex $result
1]
199 if { [string match
"" $lines] } {
200 set chan
[open
"$output"]
201 set invert
[regexp
{^
!(.
*)} $pattern dummy pattern
]
202 set ok
[expr
{ [regexp $pattern
[read $chan
]] != $invert
}]
206 remote_file build
delete $output
210 # Like check_no_messages_and_pattern_nocache
, but
cache the result.
211 # PROP is the
property we
're checking, and doubles as a prefix for
212 # temporary filenames.
213 proc check_no_messages_and_pattern {prop pattern args} {
214 return [check_cached_effective_target $prop {
215 eval [list check_no_messages_and_pattern_nocache $prop $pattern] $args
219 # Try to compile and run an executable from code CONTENTS. Return true
220 # if the compiler reports no messages and if execution "passes" in the
221 # usual DejaGNU sense. The arguments are as for check_compile, with
222 # TYPE implicitly being "executable".
223 proc check_runtime_nocache {basename contents args} {
226 set result [eval [list check_compile $basename executable $contents] $args]
227 set lines [lindex $result 0]
228 set output [lindex $result 1]
231 if { [string match "" $lines] } {
232 # No error messages, everything is OK.
233 set result [remote_load target "./$output" "" ""]
234 set status [lindex $result 0]
235 verbose "check_runtime_nocache $basename: status is <$status>" 2
236 if { $status == "pass" } {
240 remote_file build delete $output
244 # Like check_runtime_nocache, but cache the result. PROP is the
245 # property we're checking
, and doubles as a prefix
for temporary
247 proc check_runtime
{prop
args} {
250 return [check_cached_effective_target $prop
{
251 eval
[list check_runtime_nocache $prop
] $
args
255 #
Return 1 if GCC was configured with $pattern.
256 proc check_configured_with
{ pattern
} {
259 set gcc_output
[$
{tool
}_target_compile
"-v" "" "none" ""]
260 if { [ regexp
"Configured with: \[^\n\]*$pattern" $gcc_output ] } {
261 verbose
"Matched: $pattern" 2
265 verbose
"Failed to match: $pattern" 2
269 ###############################
270 # proc check_weak_available
{ }
271 ###############################
273 # weak symbols are only supported in some configs
/object formats
274 # this proc returns
1 if they
're supported, 0 if they're not
, or
-1 if unsure
276 proc check_weak_available
{ } {
279 # All mips targets should support it
281 if { [ string first
"mips" $target_cpu ] >= 0 } {
285 # All AIX targets should support it
287 if { [istarget
*-*-aix
*] } {
291 # All solaris2 targets should support it
293 if { [istarget
*-*-solaris2
*] } {
297 # Windows targets Cygwin and MingW32 support it
299 if { [istarget
*-*-cygwin
*] ||
[istarget
*-*-mingw
*] } {
303 # HP
-UX
10.X doesn
't support it
305 if { [istarget hppa*-*-hpux10*] } {
309 # nvptx (nearly) supports it
311 if { [istarget nvptx-*-*] } {
315 # ELF and ECOFF support it. a.out does with gas/gld but may also with
316 # other linkers, so we should try it
318 set objformat [gcc_target_object_format]
326 unknown { return -1 }
331 ###############################
332 # proc check_weak_override_available { }
333 ###############################
335 # Like check_weak_available, but return 0 if weak symbol definitions
336 # cannot be overridden.
338 proc check_weak_override_available { } {
339 if { [istarget *-*-mingw*] } {
342 return [check_weak_available]
345 ###############################
346 # proc check_visibility_available { what_kind }
347 ###############################
349 # The visibility attribute is only support in some object formats
350 # This proc returns 1 if it is supported, 0 if not.
351 # The argument is the kind of visibility, default/protected/hidden/internal.
353 proc check_visibility_available { what_kind } {
354 if [string match "" $what_kind] { set what_kind "hidden" }
356 return [check_no_compiler_messages visibility_available_$what_kind object "
357 void f() __attribute__((visibility(\"$what_kind\")));
362 ###############################
363 # proc check_alias_available { }
364 ###############################
366 # Determine if the target toolchain supports the alias attribute.
368 # Returns 2 if the target supports aliases. Returns 1 if the target
369 # only supports weak aliased. Returns 0 if the target does not
370 # support aliases at all. Returns -1 if support for aliases could not
373 proc check_alias_available { } {
374 global alias_available_saved
377 if [info exists alias_available_saved] {
378 verbose "check_alias_available returning saved $alias_available_saved" 2
382 verbose "check_alias_available compiling testfile $src" 2
383 set f [open $src "w"]
384 # Compile a small test program. The definition of "g" is
385 # necessary to keep the Solaris assembler from complaining
387 puts $f "#ifdef __cplusplus\nextern \"C\"\n#endif\n"
388 puts $f "void g() {} void f() __attribute__((alias(\"g\")));"
390 set lines [${tool}_target_compile $src $obj object ""]
392 remote_file build delete $obj
394 if [string match "" $lines] then {
395 # No error messages, everything is OK.
396 set alias_available_saved 2
398 if [regexp "alias definitions not supported" $lines] {
399 verbose "check_alias_available target does not support aliases" 2
401 set objformat [gcc_target_object_format]
403 if { $objformat == "elf" } {
404 verbose "check_alias_available but target uses ELF format, so it ought to" 2
405 set alias_available_saved -1
407 set alias_available_saved 0
410 if [regexp "only weak aliases are supported" $lines] {
411 verbose "check_alias_available target supports only weak aliases" 2
412 set alias_available_saved 1
414 set alias_available_saved -1
419 verbose "check_alias_available returning $alias_available_saved" 2
422 return $alias_available_saved
425 # Returns 1 if the target toolchain supports strong aliases, 0 otherwise.
427 proc check_effective_target_alias { } {
428 if { [check_alias_available] < 2 } {
435 # Returns 1 if the target toolchain supports ifunc, 0 otherwise.
437 proc check_ifunc_available { } {
438 return [check_no_compiler_messages ifunc_available object {
442 typedef void F (void);
444 void f () __attribute__ ((ifunc ("g")));
451 # Returns true if --gc-sections is supported on the target.
453 proc check_gc_sections_available { } {
454 global gc_sections_available_saved
457 if {![info exists gc_sections_available_saved]} {
458 # Some targets don't support gc
-sections despite whatever
's
459 # advertised by ld's options.
460 if { [istarget alpha
*-*-*]
461 ||
[istarget ia64
-*-*] } {
462 set gc_sections_available_saved
0
466 # elf2flt uses
-q
(--emit
-relocs
), which is incompatible with
468 if { [board_info target
exists ldflags
]
469 && [regexp
" -elf2flt\[ =\]" " [board_info target ldflags] "] } {
470 set gc_sections_available_saved
0
474 # VxWorks kernel modules are relocatable objects linked with
-r
,
475 #
while RTP executables are linked with
-q
(--emit
-relocs
).
476 # Both of these options are incompatible with
--gc
-sections.
477 if { [istarget
*-*-vxworks
*] } {
478 set gc_sections_available_saved
0
482 # Check
if the
ld used by gcc supports
--gc
-sections.
483 set gcc_ld
[lindex
[$
{tool
}_target_compile
"-print-prog-name=ld" "" "none" ""] 0]
484 set ld_output
[remote_exec host
"$gcc_ld" "--help"]
485 if { [ string first
"--gc-sections" $ld_output ] >= 0 } {
486 set gc_sections_available_saved
1
488 set gc_sections_available_saved
0
491 return $gc_sections_available_saved
494 #
Return 1 if according to target_info struct and explicit target list
495 # target is supposed to support trampolines.
497 proc check_effective_target_trampolines
{ } {
498 if [target_info
exists gcc
,no_trampolines
] {
501 if { [istarget avr
-*-*]
502 ||
[istarget msp430
-*-*]
503 ||
[istarget nvptx
-*-*]
504 ||
[istarget hppa2.0w
-hp
-hpux11.23
]
505 ||
[istarget hppa64
-hp
-hpux11.23
] } {
511 #
Return 1 if target has limited stack size.
513 proc check_effective_target_stack_size
{ } {
514 if [target_info
exists gcc
,stack_size
] {
520 #
Return the value attribute of an effective target
, otherwise
return 0.
522 proc dg
-effective
-target
-value
{ effective_target
} {
523 if { "$effective_target" == "stack_size" } {
524 if [check_effective_target_stack_size
] {
525 return [target_info gcc
,stack_size
]
532 #
Return 1 if signal.h is supported.
534 proc check_effective_target_signal
{ } {
535 if [target_info
exists gcc
,signal_suppress
] {
541 #
Return 1 if according to target_info struct and explicit target list
542 # target disables
-fdelete
-null
-pointer
-checks. Targets should
return 0
543 #
if they simply default to
-fno
-delete-null
-pointer
-checks but obey
544 #
-fdelete
-null
-pointer
-checks when passed explicitly
(and tests that
545 # depend
on this option should
do that
).
547 proc check_effective_target_keeps_null_pointer_checks
{ } {
548 if [target_info
exists keeps_null_pointer_checks
] {
551 if { [istarget avr
-*-*]
552 ||
[istarget msp430
-*-*] } {
558 #
Return the autofdo profile wrapper
560 # Linux by default allows
516KB of perf event buffers
561 # in
/proc
/sys
/kernel
/perf_event_mlock_kb
562 # Each individual perf tries to grab it
563 # This causes problems with parallel test suite runs. Instead
564 #
limit us to
8 pages
(32K
), which should be good enough
565 #
for the small test programs. With the default settings
566 # this allows parallelism of
16 and higher of parallel gcc
-auto
-profile
567 proc profopt
-perf
-wrapper
{ } {
569 return "$srcdir/../config/i386/gcc-auto-profile -o perf.data -m8 "
572 #
Return true
if profiling is supported
on the target.
574 proc check_profiling_available
{ test_what
} {
575 global profiling_available_saved
577 verbose
"Profiling argument is <$test_what>" 1
579 # These conditions depend
on the
argument so examine them before
580 # looking at the
cache variable.
582 # Tree profiling requires TLS runtime support.
583 if { $test_what
== "-fprofile-generate" } {
584 if { ![check_effective_target_tls_runtime
] } {
589 if { $test_what
== "-fauto-profile" } {
590 if { !([istarget i?
86-*-linux
*] ||
[istarget x86_64
-*-linux
*]) } {
591 verbose
"autofdo only supported on linux"
594 # not cross compiling?
596 verbose
"autofdo not supported for non native builds"
599 set event
[profopt
-perf
-wrapper
]
601 verbose
"autofdo not supported"
605 set status [remote_exec host
"$srcdir/../config/i386/gcc-auto-profile" "true -v >/dev/null"]
606 if { [lindex $
status 0] != 0 } {
607 verbose
"autofdo not supported because perf does not work"
611 # no good way to check this in advance
-- check later instead.
612 #
set status [remote_exec host
"create_gcov" "2>/dev/null"]
613 #
if { [lindex $
status 0] != 255 } {
614 # verbose
"autofdo not supported due to missing create_gcov"
619 # Support
for -p
on solaris2 relies
on mcrt1.o which comes with the
620 # vendor compiler. We cannot reliably predict the directory where the
621 # vendor compiler
(and thus mcrt1.o
) is installed so we can
't
622 # necessarily find mcrt1.o even if we have it.
623 if { [istarget *-*-solaris2*] && $test_what == "-p" } {
627 # We don't yet support profiling
for MIPS16.
628 if { [istarget mips
*-*-*]
629 && ![check_effective_target_nomips16
]
630 && ($test_what
== "-p" || $test_what == "-pg") } {
634 # MinGW does not support
-p.
635 if { [istarget
*-*-mingw
*] && $test_what
== "-p" } {
639 # cygwin does not support
-p.
640 if { [istarget
*-*-cygwin
*] && $test_what
== "-p" } {
644 # uClibc does not have gcrt1.o.
645 if { [check_effective_target_uclibc
]
646 && ($test_what
== "-p" || $test_what == "-pg") } {
650 # Now examine the
cache variable.
651 if {![info exists profiling_available_saved
]} {
652 # Some targets don
't have any implementation of __bb_init_func or are
653 # missing other needed machinery.
654 if {[istarget aarch64*-*-elf]
655 || [istarget am3*-*-linux*]
656 || [istarget arm*-*-eabi*]
657 || [istarget arm*-*-elf]
658 || [istarget arm*-*-symbianelf*]
659 || [istarget avr-*-*]
660 || [istarget bfin-*-*]
661 || [istarget cris-*-*]
662 || [istarget crisv32-*-*]
663 || [istarget fido-*-elf]
664 || [istarget h8300-*-*]
665 || [istarget lm32-*-*]
666 || [istarget m32c-*-elf]
667 || [istarget m68k-*-elf]
668 || [istarget m68k-*-uclinux*]
669 || [istarget mips*-*-elf*]
670 || [istarget mmix-*-*]
671 || [istarget mn10300-*-elf*]
672 || [istarget moxie-*-elf*]
673 || [istarget msp430-*-*]
674 || [istarget nds32*-*-elf]
675 || [istarget nios2-*-elf]
676 || [istarget nvptx-*-*]
677 || [istarget powerpc-*-eabi*]
678 || [istarget powerpc-*-elf]
680 || [istarget tic6x-*-elf]
681 || [istarget visium-*-*]
682 || [istarget xstormy16-*]
683 || [istarget xtensa*-*-elf]
684 || [istarget *-*-rtems*]
685 || [istarget *-*-vxworks*] } {
686 set profiling_available_saved 0
688 set profiling_available_saved 1
692 # -pg link test result can't be cached since it may change between
694 set profiling_working $profiling_available_saved
695 if { $profiling_available_saved
== 1
696 && ![check_no_compiler_messages_nocache profiling executable
{
697 int main
() { return 0; } } "-pg"] } {
698 set profiling_working
0
701 return $profiling_working
704 # Check to see
if a target is
"freestanding". This is as per the definition
705 # in Section
4 of C99 standard. Effectively
, it is a target which supports no
706 # extra headers or libraries other than what is considered essential.
707 proc check_effective_target_freestanding
{ } {
708 if { [istarget nvptx
-*-*] } {
714 #
Return 1 if target has packed layout of structure members by
715 # default
, 0 otherwise. Note that this is slightly different than
716 # whether the target has
"natural alignment": both attributes may be
719 proc check_effective_target_default_packed
{ } {
720 return [check_no_compiler_messages default_packed assembly
{
721 struct x
{ char a
; long b
; } c
;
722 int s
[sizeof
(c
) == sizeof
(char
) + sizeof
(long
) ?
1 : -1];
726 #
Return 1 if target has PCC_BITFIELD_TYPE_MATTERS defined. See
727 # documentation
, where the test also comes from.
729 proc check_effective_target_pcc_bitfield_type_matters
{ } {
730 # PCC_BITFIELD_TYPE_MATTERS isn
't just about unnamed or empty
731 # bitfields, but let's stick to the example code from the docs.
732 return [check_no_compiler_messages pcc_bitfield_type_matters assembly
{
733 struct foo1
{ char x
; char
:0; char y
; };
734 struct foo2
{ char x
; int :0; char y
; };
735 int s
[sizeof
(struct foo1
) != sizeof
(struct foo2
) ?
1 : -1];
739 # Add to FLAGS all the target
-specific flags needed to use thread
-local storage.
741 proc add_options_for_tls
{ flags
} {
742 #
On Solaris
9, __tls_get_addr
/___tls_get_addr only lives in
743 # libthread
, so always pass
-pthread
for native TLS. Same
for AIX.
744 # Need to duplicate native TLS check from
745 # check_effective_target_tls_native to avoid recursion.
746 if { ([istarget powerpc
-ibm
-aix
*]) &&
747 [check_no_messages_and_pattern tls_native
"!emutls" assembly {
749 int f
(void
) { return i
; }
750 void g
(int j
) { i
= j
; }
752 return "-pthread [g++_link_flags [get_multilibs "-pthread"] ] $flags "
757 #
Return 1 if indirect jumps are supported
, 0 otherwise.
759 proc check_effective_target_indirect_jumps
{} {
760 if { [istarget nvptx
-*-*] } {
766 #
Return 1 if nonlocal
goto is supported
, 0 otherwise.
768 proc check_effective_target_nonlocal_goto
{} {
769 if { [istarget nvptx
-*-*] } {
775 #
Return 1 if global constructors are supported
, 0 otherwise.
777 proc check_effective_target_global_constructor
{} {
778 if { [istarget nvptx
-*-*] } {
784 #
Return 1 if taking label
values is supported
, 0 otherwise.
786 proc check_effective_target_label_values
{} {
787 if { [istarget nvptx
-*-*] ||
[target_info
exists gcc
,no_label_values
] } {
794 #
Return 1 if builtin_return_address and builtin_frame_address are
795 # supported
, 0 otherwise.
797 proc check_effective_target_return_address
{} {
798 if { [istarget nvptx
-*-*] } {
804 #
Return 1 if the assembler does not verify function types against
805 # calls
, 0 otherwise. Such verification will typically
show up problems
806 # with K
&R C function declarations.
808 proc check_effective_target_untyped_assembly
{} {
809 if { [istarget nvptx
-*-*] } {
815 #
Return 1 if alloca is supported
, 0 otherwise.
817 proc check_effective_target_alloca
{} {
818 if { [istarget nvptx
-*-*] } {
819 return [check_no_compiler_messages alloca assembly
{
821 void g
(int n
) { f
(__builtin_alloca
(n
)); }
827 #
Return 1 if thread local storage
(TLS
) is supported
, 0 otherwise.
829 proc check_effective_target_tls
{} {
830 return [check_no_compiler_messages tls assembly
{
832 int f
(void
) { return i
; }
833 void g
(int j
) { i
= j
; }
837 #
Return 1 if *native
* thread local storage
(TLS
) is supported
, 0 otherwise.
839 proc check_effective_target_tls_native
{} {
840 # VxWorks uses emulated TLS machinery
, but with non
-standard helper
841 # functions
, so we fail to automatically detect it.
842 if { [istarget
*-*-vxworks
*] } {
846 return [check_no_messages_and_pattern tls_native
"!emutls" assembly {
848 int f
(void
) { return i
; }
849 void g
(int j
) { i
= j
; }
853 #
Return 1 if *emulated
* thread local storage
(TLS
) is supported
, 0 otherwise.
855 proc check_effective_target_tls_emulated
{} {
856 # VxWorks uses emulated TLS machinery
, but with non
-standard helper
857 # functions
, so we fail to automatically detect it.
858 if { [istarget
*-*-vxworks
*] } {
862 return [check_no_messages_and_pattern tls_emulated
"emutls" assembly {
864 int f
(void
) { return i
; }
865 void g
(int j
) { i
= j
; }
869 #
Return 1 if TLS executables can run correctly
, 0 otherwise.
871 proc check_effective_target_tls_runtime
{} {
872 # The runtime does not have TLS support
, but just
873 # running the test below is insufficient to
show this.
874 if { [istarget msp430
-*-*] ||
[istarget visium
-*-*] } {
877 return [check_runtime tls_runtime
{
878 __thread
int thr
= 0;
879 int main
(void
) { return thr
; }
880 } [add_options_for_tls
""]]
883 #
Return 1 if atomic compare
-and
-swap is supported
on 'int'
885 proc check_effective_target_cas_char
{} {
886 return [check_no_compiler_messages cas_char assembly
{
887 #ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1
893 proc check_effective_target_cas_int
{} {
894 return [check_no_compiler_messages cas_int assembly
{
895 #
if __INT_MAX__
== 0x7fff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_2
897 #elif __INT_MAX__
== 0x7fffffff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
905 #
Return 1 if -ffunction
-sections is supported
, 0 otherwise.
907 proc check_effective_target_function_sections
{} {
908 # Darwin has its own scheme and silently accepts
-ffunction
-sections.
909 if { [istarget
*-*-darwin
*] } {
913 return [check_no_compiler_messages functionsections assembly
{
915 } "-ffunction-sections"]
918 #
Return 1 if instruction scheduling is available
, 0 otherwise.
920 proc check_effective_target_scheduling
{} {
921 return [check_no_compiler_messages scheduling object
{
923 } "-fschedule-insns"]
926 #
Return 1 if trapping arithmetic is available
, 0 otherwise.
928 proc check_effective_target_trapping
{} {
929 return [check_no_compiler_messages trapping object
{
930 int add
(int a
, int b
) { return a
+ b
; }
934 #
Return 1 if compilation with
-fgraphite is error
-free
for trivial
937 proc check_effective_target_fgraphite
{} {
938 return [check_no_compiler_messages fgraphite object
{
943 #
Return 1 if compilation with
-fopenacc is error
-free
for trivial
946 proc check_effective_target_fopenacc
{} {
947 # nvptx can be built with the device
-side bits of openacc
, but it
948 # does not make sense to test it as an openacc host.
949 if [istarget nvptx
-*-*] { return 0 }
951 return [check_no_compiler_messages fopenacc object
{
956 #
Return 1 if compilation with
-fopenmp is error
-free
for trivial
959 proc check_effective_target_fopenmp
{} {
960 # nvptx can be built with the device
-side bits of libgomp
, but it
961 # does not make sense to test it as an openmp host.
962 if [istarget nvptx
-*-*] { return 0 }
964 return [check_no_compiler_messages fopenmp object
{
969 #
Return 1 if compilation with
-fgnu
-tm is error
-free
for trivial
972 proc check_effective_target_fgnu_tm
{} {
973 return [check_no_compiler_messages fgnu_tm object
{
978 #
Return 1 if the target supports mmap
, 0 otherwise.
980 proc check_effective_target_mmap
{} {
981 return [check_function_available
"mmap"]
984 #
Return 1 if the target supports dlopen
, 0 otherwise.
985 proc check_effective_target_dlopen
{} {
986 return [check_no_compiler_messages dlopen executable
{
988 int main
(void
) { dlopen
("dummy.so", RTLD_NOW); }
989 } [add_options_for_dlopen
""]]
992 proc add_options_for_dlopen
{ flags
} {
996 #
Return 1 if the target supports clone
, 0 otherwise.
997 proc check_effective_target_clone
{} {
998 return [check_function_available
"clone"]
1001 #
Return 1 if the target supports setrlimit
, 0 otherwise.
1002 proc check_effective_target_setrlimit
{} {
1003 # Darwin has non
-posix compliant RLIMIT_AS
1004 if { [istarget
*-*-darwin
*] } {
1007 return [check_function_available
"setrlimit"]
1010 #
Return 1 if the target supports gettimeofday
, 0 otherwise.
1011 proc check_effective_target_gettimeofday
{} {
1012 return [check_function_available
"gettimeofday"]
1015 #
Return 1 if the target supports swapcontext
, 0 otherwise.
1016 proc check_effective_target_swapcontext
{} {
1017 return [check_no_compiler_messages swapcontext executable
{
1018 #
include <ucontext.h
>
1021 ucontext_t orig_context
,child_context
;
1022 if (swapcontext
(&child_context
, &orig_context
) < 0) { }
1027 #
Return 1 if compilation with
-pthread is error
-free
for trivial
1028 # code
, 0 otherwise.
1030 proc check_effective_target_pthread
{} {
1031 return [check_no_compiler_messages pthread object
{
1036 #
Return 1 if compilation with
-gstabs is error
-free
for trivial
1037 # code
, 0 otherwise.
1039 proc check_effective_target_stabs
{} {
1040 return [check_no_compiler_messages stabs object
{
1045 #
Return 1 if compilation with
-mpe
-aligned
-commons is error
-free
1046 #
for trivial code
, 0 otherwise.
1048 proc check_effective_target_pe_aligned_commons
{} {
1049 if { [istarget
*-*-cygwin
*] ||
[istarget
*-*-mingw
*] } {
1050 return [check_no_compiler_messages pe_aligned_commons object
{
1052 } "-mpe-aligned-commons"]
1057 #
Return 1 if the target supports
-static
1058 proc check_effective_target_static
{} {
1059 return [check_no_compiler_messages static executable
{
1060 int main
(void
) { return 0; }
1064 #
Return 1 if the target supports
-fstack
-protector
1065 proc check_effective_target_fstack_protector
{} {
1066 return [check_runtime fstack_protector
{
1068 int main
(int argc
, char
*argv
[]) {
1070 return !strcpy
(buf
, strrchr
(argv
[0], '/'));
1072 } "-fstack-protector"]
1075 #
Return 1 if the target supports
-fstack
-check or
-fstack
-check
=$stack_kind
1076 proc check_stack_check_available
{ stack_kind
} {
1077 if [string match
"" $stack_kind] then {
1078 set stack_opt
"-fstack-check"
1079 } else { set stack_opt
"-fstack-check=$stack_kind" }
1081 return [check_no_compiler_messages stack_check_$stack_kind executable
{
1082 int main
(void
) { return 0; }
1086 #
Return 1 if compilation with
-freorder
-blocks
-and
-partition is error
-free
1087 #
for trivial code
, 0 otherwise. As some targets
(ARM
for example
) only
1088 # warn when
-fprofile
-use is also supplied we test that combination too.
1090 proc check_effective_target_freorder
{} {
1091 if { [check_no_compiler_messages freorder object
{
1093 } "-freorder-blocks-and-partition"]
1094 && [check_no_compiler_messages fprofile_use_freorder object
{
1096 } "-fprofile-use -freorder-blocks-and-partition"] } {
1102 #
Return 1 if -fpic and
-fPIC are supported
, as in no warnings or errors
1103 # emitted
, 0 otherwise. Whether a shared library can actually be built is
1104 # out of scope
for this test.
1106 proc check_effective_target_fpic
{ } {
1107 # Note that M68K has a multilib that supports
-fpic but not
1108 #
-fPIC
, so we need to check both. We test with a
program that
1109 # requires GOT references.
1110 foreach
arg {fpic fPIC
} {
1111 if [check_no_compiler_messages $
arg object
{
1112 extern
int foo
(void
); extern
int bar
;
1113 int baz
(void
) { return foo
() + bar
; }
1121 #
On AArch64
, if -fpic is not supported
, then we will fall
back to
-fPIC
1122 # silently. So
, we can
't rely on above "check_effective_target_fpic" as it
1123 # assumes compiler will give warning if -fpic not supported. Here we check
1124 # whether binutils supports those new -fpic relocation modifiers, and assume
1125 # -fpic is supported if there is binutils support. GCC configuration will
1126 # enable -fpic for AArch64 in this case.
1128 # "check_effective_target_aarch64_small_fpic" is dedicated for checking small
1129 # memory model -fpic relocation types.
1131 proc check_effective_target_aarch64_small_fpic { } {
1132 if { [istarget aarch64*-*-*] } {
1133 return [check_no_compiler_messages aarch64_small_fpic object {
1134 void foo (void) { asm ("ldr x0, [x2, #:gotpage_lo15:globalsym]"); }
1141 # On AArch64, instruction sequence for TLS LE under -mtls-size=32 will utilize
1142 # the relocation modifier "tprel_g0_nc" together with MOVK, it's only supported
1143 # in binutils since
2015-03-04 as PR gas
/17843.
1145 # This test directive make sure binutils support all features needed by TLS LE
1146 # under
-mtls
-size
=32 on AArch64.
1148 proc check_effective_target_aarch64_tlsle32
{ } {
1149 if { [istarget aarch64
*-*-*] } {
1150 return [check_no_compiler_messages aarch64_tlsle32 object
{
1151 void foo
(void
) { asm
("movk x1,#:tprel_g0_nc:t1"); }
1158 #
Return 1 if -shared is supported
, as in no warnings or errors
1159 # emitted
, 0 otherwise.
1161 proc check_effective_target_shared
{ } {
1162 # Note that M68K has a multilib that supports
-fpic but not
1163 #
-fPIC
, so we need to check both. We test with a
program that
1164 # requires GOT references.
1165 return [check_no_compiler_messages shared executable
{
1166 extern
int foo
(void
); extern
int bar
;
1167 int baz
(void
) { return foo
() + bar
; }
1171 #
Return 1 if -pie
, -fpie and
-fPIE are supported
, 0 otherwise.
1173 proc check_effective_target_pie
{ } {
1174 if { [istarget
*-*-darwin\
[912\
]*]
1175 ||
[istarget
*-*-dragonfly
*]
1176 ||
[istarget
*-*-freebsd
*]
1177 ||
[istarget
*-*-linux
*]
1178 ||
[istarget
*-*-gnu
*] } {
1181 if { [istarget
*-*-solaris2.1\
[1-9\
]*] } {
1182 # Full PIE support was added in Solaris
11.3, but gcc errors out
1183 #
if missing
, so check
for that.
1184 return [check_no_compiler_messages pie executable
{
1185 int main
(void
) { return 0; }
1191 #
Return true
if the target supports
-mpaired
-single
(as used
on MIPS
).
1193 proc check_effective_target_mpaired_single
{ } {
1194 return [check_no_compiler_messages mpaired_single object
{
1196 } "-mpaired-single"]
1199 #
Return true
if the target has access to FPU instructions.
1201 proc check_effective_target_hard_float
{ } {
1202 if { [istarget mips
*-*-*] } {
1203 return [check_no_compiler_messages hard_float assembly
{
1204 #
if (defined __mips_soft_float || defined __mips16
)
1205 #error __mips_soft_float || __mips16
1210 # This proc is actually checking the availabilty of FPU
1211 # support
for doubles
, so
on the RX we must fail
if the
1212 #
64-bit double multilib has been selected.
1213 if { [istarget rx
-*-*] } {
1215 #
return [check_no_compiler_messages hard_float assembly
{
1216 #
if defined __RX_64_BIT_DOUBLES__
1217 #error __RX_64_BIT_DOUBLES__
1222 # The generic test equates hard_float with
"no call for adding doubles".
1223 return [check_no_messages_and_pattern hard_float
"!\\(call" rtl-expand {
1224 double a
(double b
, double c
) { return b
+ c
; }
1228 #
Return true
if the target is a
64-bit MIPS target.
1230 proc check_effective_target_mips64
{ } {
1231 return [check_no_compiler_messages mips64 assembly
{
1238 #
Return true
if the target is a MIPS target that does not produce
1241 proc check_effective_target_nomips16
{ } {
1242 return [check_no_compiler_messages nomips16 object
{
1246 /* A cheap way of testing
for -mflip
-mips16.
*/
1247 void foo
(void
) { asm
("addiu $20,$20,1"); }
1248 void bar
(void
) { asm
("addiu $20,$20,1"); }
1253 # Add the options needed
for MIPS16 function attributes. At the moment
,
1254 # we don
't support MIPS16 PIC.
1256 proc add_options_for_mips16_attribute { flags } {
1257 return "$flags -mno-abicalls -fno-pic -DMIPS16=__attribute__((mips16))"
1260 # Return true if we can force a mode that allows MIPS16 code generation.
1261 # We don't support MIPS16 PIC
, and only support MIPS16
-mhard
-float
1264 proc check_effective_target_mips16_attribute
{ } {
1265 return [check_no_compiler_messages mips16_attribute assembly
{
1269 #
if defined __mips_hard_float \
1270 && (!defined _ABIO32 || _MIPS_SIM
!= _ABIO32
) \
1271 && (!defined _ABIO64 || _MIPS_SIM
!= _ABIO64
)
1272 #error __mips_hard_float
&& (!_ABIO32 ||
!_ABIO64
)
1274 } [add_options_for_mips16_attribute
""]]
1277 #
Return 1 if the target supports long double larger than double when
1278 # using the new ABI
, 0 otherwise.
1280 proc check_effective_target_mips_newabi_large_long_double
{ } {
1281 return [check_no_compiler_messages mips_newabi_large_long_double object
{
1282 int dummy
[sizeof
(long double
) > sizeof
(double
) ?
1 : -1];
1286 #
Return true
if the target is a MIPS target that has access
1287 # to the LL and SC instructions.
1289 proc check_effective_target_mips_llsc
{ } {
1290 if { ![istarget mips
*-*-*] } {
1293 # Assume that these instructions are always implemented
for
1294 # non
-elf
* targets
, via emulation
if necessary.
1295 if { ![istarget
*-*-elf
*] } {
1298 # Otherwise assume LL
/SC support
for everything but MIPS I.
1299 return [check_no_compiler_messages mips_llsc assembly
{
1306 #
Return true
if the target is a MIPS target that uses in
-place relocations.
1308 proc check_effective_target_mips_rel
{ } {
1309 if { ![istarget mips
*-*-*] } {
1312 return [check_no_compiler_messages mips_rel object
{
1313 #
if (defined _ABIN32
&& _MIPS_SIM
== _ABIN32
) \
1314 ||
(defined _ABI64
&& _MIPS_SIM
== _ABI64
)
1315 #error _ABIN32
&& (_ABIN32 || _ABI64
)
1320 #
Return true
if the target is a MIPS target that uses the EABI.
1322 proc check_effective_target_mips_eabi
{ } {
1323 if { ![istarget mips
*-*-*] } {
1326 return [check_no_compiler_messages mips_eabi object
{
1333 #
Return 1 if the current multilib does not generate PIC by default.
1335 proc check_effective_target_nonpic
{ } {
1336 return [check_no_compiler_messages nonpic assembly
{
1343 #
Return 1 if the current multilib generates PIE by default.
1345 proc check_effective_target_pie_enabled
{ } {
1346 return [check_no_compiler_messages pie_enabled assembly
{
1353 #
Return 1 if the target generates
-fstack
-protector by default.
1355 proc check_effective_target_fstack_protector_enabled
{} {
1356 return [ check_no_compiler_messages fstack_protector_enabled assembly
{
1357 #
if !defined
(__SSP__
) && !defined
(__SSP_ALL__
) && \
1358 !defined
(__SSP_STRONG__
) && !defined
(__SSP_EXPICIT__
)
1364 #
Return 1 if the target does not use a
status wrapper.
1366 proc check_effective_target_unwrapped
{ } {
1367 if { [target_info needs_status_wrapper
] != "" \
1368 && [target_info needs_status_wrapper
] != "0" } {
1374 #
Return true
if iconv is supported
on the target. In particular IBM1047.
1376 proc check_iconv_available
{ test_what
} {
1379 #
If the tool configuration file has not
set libiconv
, try
"-liconv"
1380 if { ![info exists libiconv
] } {
1381 set libiconv
"-liconv"
1383 set test_what
[lindex $test_what
1]
1384 return [check_runtime_nocache $test_what
[subst
{
1390 cd
= iconv_open
("$test_what", "UTF-8");
1391 if (cd
== (iconv_t
) -1)
1398 #
Return true
if the atomic library is supported
on the target.
1399 proc check_effective_target_libatomic_available
{ } {
1400 return [check_no_compiler_messages libatomic_available executable
{
1401 int main
(void
) { return 0; }
1405 #
Return 1 if an ASCII locale is supported
on this host
, 0 otherwise.
1407 proc check_ascii_locale_available
{ } {
1411 #
Return true
if named sections are supported
on this target.
1413 proc check_named_sections_available
{ } {
1414 return [check_no_compiler_messages named_sections assembly
{
1415 int __attribute__
((section
("whatever"))) foo;
1419 #
Return true
if the
"naked" function attribute is supported on this target.
1421 proc check_effective_target_naked_functions
{ } {
1422 return [check_no_compiler_messages naked_functions assembly
{
1423 void f
() __attribute__
((naked
));
1427 #
Return 1 if the target supports Fortran real kinds larger than real
(8),
1430 # When the target
name changes
, replace the cached result.
1432 proc check_effective_target_fortran_large_real
{ } {
1433 return [check_no_compiler_messages fortran_large_real executable
{
1435 integer,parameter
:: k
= selected_real_kind
(precision
(0.0_8
) + 1)
1442 #
Return 1 if the target supports Fortran real kind real
(16),
1443 #
0 otherwise. Contrary to check_effective_target_fortran_large_real
1444 # this checks
for Real
(16) only
; the other returned real
(10) if
1445 # both real
(10) and real
(16) are available.
1447 # When the target
name changes
, replace the cached result.
1449 proc check_effective_target_fortran_real_16
{ } {
1450 return [check_no_compiler_messages fortran_real_16 executable
{
1458 #
Return 1 if the target supports Fortran real kind
10,
1459 #
0 otherwise. Contrary to check_effective_target_fortran_large_real
1460 # this checks
for real
(10) only.
1462 # When the target
name changes
, replace the cached result.
1464 proc check_effective_target_fortran_real_10
{ } {
1465 return [check_no_compiler_messages fortran_real_10 executable
{
1473 #
Return 1 if the target supports Fortran
's IEEE modules,
1476 # When the target name changes, replace the cached result.
1478 proc check_effective_target_fortran_ieee { flags } {
1479 return [check_no_compiler_messages fortran_ieee executable {
1481 use, intrinsic :: ieee_features
1487 # Return 1 if the target supports SQRT for the largest floating-point
1488 # type. (Some targets lack the libm support for this FP type.)
1489 # On most targets, this check effectively checks either whether sqrtl is
1490 # available or on __float128 systems whether libquadmath is installed,
1491 # which provides sqrtq.
1493 # When the target name changes, replace the cached result.
1495 proc check_effective_target_fortran_largest_fp_has_sqrt { } {
1496 return [check_no_compiler_messages fortran_largest_fp_has_sqrt executable {
1498 use iso_fortran_env, only: real_kinds
1499 integer,parameter:: maxFP = real_kinds(ubound(real_kinds,dim=1))
1500 real(kind=maxFP), volatile :: x
1508 # Return 1 if the target supports Fortran integer kinds larger than
1509 # integer(8), 0 otherwise.
1511 # When the target name changes, replace the cached result.
1513 proc check_effective_target_fortran_large_int { } {
1514 return [check_no_compiler_messages fortran_large_int executable {
1516 integer,parameter :: k = selected_int_kind (range (0_8) + 1)
1517 integer(kind=k) :: i
1522 # Return 1 if the target supports Fortran integer(16), 0 otherwise.
1524 # When the target name changes, replace the cached result.
1526 proc check_effective_target_fortran_integer_16 { } {
1527 return [check_no_compiler_messages fortran_integer_16 executable {
1534 # Return 1 if we can statically link libgfortran, 0 otherwise.
1536 # When the target name changes, replace the cached result.
1538 proc check_effective_target_static_libgfortran { } {
1539 return [check_no_compiler_messages static_libgfortran executable {
1546 # Return 1 if we can use the -rdynamic option, 0 otherwise.
1548 proc check_effective_target_rdynamic { } {
1549 return [check_no_compiler_messages rdynamic executable {
1550 int main() { return 0; }
1554 proc check_linker_plugin_available { } {
1555 return [check_no_compiler_messages_nocache linker_plugin executable {
1556 int main() { return 0; }
1557 } "-flto -fuse-linker-plugin"]
1560 # Return 1 if the target OS supports running SSE executables, 0
1561 # otherwise. Cache the result.
1563 proc check_sse_os_support_available { } {
1564 return [check_cached_effective_target sse_os_support_available {
1565 # If this is not the right target then we can skip the test.
1566 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1568 } elseif { [istarget i?86-*-solaris2*] } {
1569 # The Solaris 2 kernel doesn't save and restore SSE registers
1570 # before Solaris
9 4/04. Before that
, executables die with SIGILL.
1571 check_runtime_nocache sse_os_support_available
{
1574 asm volatile
("movaps %xmm0,%xmm0");
1584 #
Return 1 if the target OS supports running AVX executables
, 0
1585 # otherwise.
Cache the result.
1587 proc check_avx_os_support_available
{ } {
1588 return [check_cached_effective_target avx_os_support_available
{
1589 #
If this is not the right target
then we can skip the test.
1590 if { !([istarget i?
86-*-*] ||
[istarget x86_64
-*-*]) } {
1593 # Check that OS has AVX and SSE saving enabled.
1594 check_runtime_nocache avx_os_support_available
{
1597 unsigned
int eax
, edx
;
1599 asm
("xgetbv" : "=a" (eax), "=d" (edx) : "c" (0));
1600 return (eax
& 0x06) != 0x06;
1607 #
Return 1 if the target OS supports running AVX executables
, 0
1608 # otherwise.
Cache the result.
1610 proc check_avx512_os_support_available
{ } {
1611 return [check_cached_effective_target avx512_os_support_available
{
1612 #
If this is not the right target
then we can skip the test.
1613 if { !([istarget i?
86-*-*] ||
[istarget x86_64
-*-*]) } {
1616 # Check that OS has AVX512
, AVX and SSE saving enabled.
1617 check_runtime_nocache avx512_os_support_available
{
1620 unsigned
int eax
, edx
;
1622 asm
("xgetbv" : "=a" (eax), "=d" (edx) : "c" (0));
1623 return (eax
& 0xe6) != 0xe6;
1630 #
Return 1 if the target supports executing SSE instructions
, 0
1631 # otherwise.
Cache the result.
1633 proc check_sse_hw_available
{ } {
1634 return [check_cached_effective_target sse_hw_available
{
1635 #
If this is not the right target
then we can skip the test.
1636 if { !([istarget i?
86-*-*] ||
[istarget x86_64
-*-*]) } {
1639 check_runtime_nocache sse_hw_available
{
1643 unsigned
int eax
, ebx
, ecx
, edx
;
1644 if (!__get_cpuid
(1, &eax
, &ebx
, &ecx
, &edx
))
1647 return !(edx
& bit_SSE
);
1654 #
Return 1 if the target supports executing SSE2 instructions
, 0
1655 # otherwise.
Cache the result.
1657 proc check_sse2_hw_available
{ } {
1658 return [check_cached_effective_target sse2_hw_available
{
1659 #
If this is not the right target
then we can skip the test.
1660 if { !([istarget i?
86-*-*] ||
[istarget x86_64
-*-*]) } {
1663 check_runtime_nocache sse2_hw_available
{
1667 unsigned
int eax
, ebx
, ecx
, edx
;
1668 if (!__get_cpuid
(1, &eax
, &ebx
, &ecx
, &edx
))
1671 return !(edx
& bit_SSE2
);
1678 #
Return 1 if the target supports executing SSE4 instructions
, 0
1679 # otherwise.
Cache the result.
1681 proc check_sse4_hw_available
{ } {
1682 return [check_cached_effective_target sse4_hw_available
{
1683 #
If this is not the right target
then we can skip the test.
1684 if { !([istarget i?
86-*-*] ||
[istarget x86_64
-*-*]) } {
1687 check_runtime_nocache sse4_hw_available
{
1691 unsigned
int eax
, ebx
, ecx
, edx
;
1692 if (!__get_cpuid
(1, &eax
, &ebx
, &ecx
, &edx
))
1695 return !(ecx
& bit_SSE4_2
);
1702 #
Return 1 if the target supports executing AVX instructions
, 0
1703 # otherwise.
Cache the result.
1705 proc check_avx_hw_available
{ } {
1706 return [check_cached_effective_target avx_hw_available
{
1707 #
If this is not the right target
then we can skip the test.
1708 if { !([istarget i?
86-*-*] ||
[istarget x86_64
-*-*]) } {
1711 check_runtime_nocache avx_hw_available
{
1715 unsigned
int eax
, ebx
, ecx
, edx
;
1716 if (!__get_cpuid
(1, &eax
, &ebx
, &ecx
, &edx
))
1719 return ((ecx
& (bit_AVX | bit_OSXSAVE
))
1720 != (bit_AVX | bit_OSXSAVE
));
1727 #
Return 1 if the target supports executing AVX2 instructions
, 0
1728 # otherwise.
Cache the result.
1730 proc check_avx2_hw_available
{ } {
1731 return [check_cached_effective_target avx2_hw_available
{
1732 #
If this is not the right target
then we can skip the test.
1733 if { !([istarget x86_64
-*-*] ||
[istarget i?
86-*-*]) } {
1736 check_runtime_nocache avx2_hw_available
{
1741 unsigned
int eax
, ebx
, ecx
, edx
;
1743 if (__get_cpuid_max
(0, NULL
) < 7)
1746 __cpuid
(1, eax
, ebx
, ecx
, edx
);
1748 if (!(ecx
& bit_OSXSAVE
))
1751 __cpuid_count
(7, 0, eax
, ebx
, ecx
, edx
);
1753 return !(ebx
& bit_AVX2
);
1760 #
Return 1 if the target supports executing AVX512 foundation instructions
, 0
1761 # otherwise.
Cache the result.
1763 proc check_avx512f_hw_available
{ } {
1764 return [check_cached_effective_target avx512f_hw_available
{
1765 #
If this is not the right target
then we can skip the test.
1766 if { !([istarget x86_64
-*-*] ||
[istarget i?
86-*-*]) } {
1769 check_runtime_nocache avx512f_hw_available
{
1774 unsigned
int eax
, ebx
, ecx
, edx
;
1776 if (__get_cpuid_max
(0, NULL
) < 7)
1779 __cpuid
(1, eax
, ebx
, ecx
, edx
);
1781 if (!(ecx
& bit_OSXSAVE
))
1784 __cpuid_count
(7, 0, eax
, ebx
, ecx
, edx
);
1786 return !(ebx
& bit_AVX512F
);
1793 #
Return 1 if the target supports running SSE executables
, 0 otherwise.
1795 proc check_effective_target_sse_runtime
{ } {
1796 if { [check_effective_target_sse
]
1797 && [check_sse_hw_available
]
1798 && [check_sse_os_support_available
] } {
1804 #
Return 1 if the target supports running SSE2 executables
, 0 otherwise.
1806 proc check_effective_target_sse2_runtime
{ } {
1807 if { [check_effective_target_sse2
]
1808 && [check_sse2_hw_available
]
1809 && [check_sse_os_support_available
] } {
1815 #
Return 1 if the target supports running SSE4 executables
, 0 otherwise.
1817 proc check_effective_target_sse4_runtime
{ } {
1818 if { [check_effective_target_sse4
]
1819 && [check_sse4_hw_available
]
1820 && [check_sse_os_support_available
] } {
1826 #
Return 1 if the target supports running AVX executables
, 0 otherwise.
1828 proc check_effective_target_avx_runtime
{ } {
1829 if { [check_effective_target_avx
]
1830 && [check_avx_hw_available
]
1831 && [check_avx_os_support_available
] } {
1837 #
Return 1 if the target supports running AVX2 executables
, 0 otherwise.
1839 proc check_effective_target_avx2_runtime
{ } {
1840 if { [check_effective_target_avx2
]
1841 && [check_avx2_hw_available
]
1842 && [check_avx_os_support_available
] } {
1848 #
Return 1 if the target supports running AVX512f executables
, 0 otherwise.
1850 proc check_effective_target_avx512f_runtime
{ } {
1851 if { [check_effective_target_avx512f
]
1852 && [check_avx512f_hw_available
]
1853 && [check_avx512_os_support_available
] } {
1859 #
Return 1 if the target supports executing MIPS Paired
-Single instructions
,
1860 #
0 otherwise.
Cache the result.
1862 proc check_mpaired_single_hw_available
{ } {
1863 return [check_cached_effective_target mpaired_single_hw_available
{
1864 #
If this is not the right target
then we can skip the test.
1865 if { !([istarget mips
*-*-*]) } {
1868 check_runtime_nocache mpaired_single_hw_available
{
1871 asm volatile
("pll.ps $f2,$f4,$f6");
1879 #
Return 1 if the target supports executing Loongson vector instructions
,
1880 #
0 otherwise.
Cache the result.
1882 proc check_mips_loongson_hw_available
{ } {
1883 return [check_cached_effective_target mips_loongson_hw_available
{
1884 #
If this is not the right target
then we can skip the test.
1885 if { !([istarget mips
*-*-*]) } {
1888 check_runtime_nocache mips_loongson_hw_available
{
1889 #
include <loongson.h
>
1892 asm volatile
("paddw $f2,$f4,$f6");
1900 #
Return 1 if the target supports executing MIPS MSA instructions
, 0
1901 # otherwise.
Cache the result.
1903 proc check_mips_msa_hw_available
{ } {
1904 return [check_cached_effective_target mips_msa_hw_available
{
1905 #
If this is not the right target
then we can skip the test.
1906 if { !([istarget mips
*-*-*]) } {
1909 check_runtime_nocache mips_msa_hw_available
{
1910 #
if !defined
(__mips_msa
)
1911 #error
"MSA NOT AVAIL"
1913 #
if !(((__mips
== 64) ||
(__mips
== 32)) && (__mips_isa_rev
>= 2))
1914 #error
"MSA NOT AVAIL FOR ISA REV < 2"
1916 #
if !defined
(__mips_hard_float
)
1917 #error
"MSA HARD_FLOAT REQUIRED"
1919 #
if __mips_fpr
!= 64
1920 #error
"MSA 64-bit FPR REQUIRED"
1926 v8i16 v
= __builtin_msa_ldi_h
(0);
1936 #
Return 1 if the target supports running MIPS Paired
-Single
1937 # executables
, 0 otherwise.
1939 proc check_effective_target_mpaired_single_runtime
{ } {
1940 if { [check_effective_target_mpaired_single
]
1941 && [check_mpaired_single_hw_available
] } {
1947 #
Return 1 if the target supports running Loongson executables
, 0 otherwise.
1949 proc check_effective_target_mips_loongson_runtime
{ } {
1950 if { [check_effective_target_mips_loongson
]
1951 && [check_mips_loongson_hw_available
] } {
1957 #
Return 1 if the target supports running MIPS MSA executables
, 0 otherwise.
1959 proc check_effective_target_mips_msa_runtime
{ } {
1960 if { [check_effective_target_mips_msa
]
1961 && [check_mips_msa_hw_available
] } {
1967 #
Return 1 if we are compiling
for 64-bit PowerPC but we
do not use direct
1968 #
move instructions
for moves from GPR to FPR.
1970 proc check_effective_target_powerpc64_no_dm
{ } {
1971 # The
"mulld" checks if we are generating PowerPC64 code. The "lfd"
1972 # checks
if we
do not use direct moves
, but use the old
-fashioned
1973 # slower
move-via
-the
-stack.
1974 return [check_no_messages_and_pattern powerpc64_no_dm \
1975 {\mmulld\M.
*\mlfd
} assembly
{
1976 double f
(long long x
) { return x
*x
; }
1980 #
Return 1 if the target supports the __builtin_cpu_supports built
-in
,
1981 # including having a new enough library to support the test.
Cache the result.
1982 # Require at least a power7 to run
on.
1984 proc check_ppc_cpu_supports_hw_available
{ } {
1985 return [check_cached_effective_target ppc_cpu_supports_hw_available
{
1986 # Some simulators are known to not support VSX
/power8 instructions.
1987 #
For now
, disable
on Darwin
1988 if { [istarget powerpc
-*-eabi
]
1989 ||
[istarget powerpc
*-*-eabispe
]
1990 ||
[istarget
*-*-darwin
*]} {
1994 check_runtime_nocache ppc_cpu_supports_hw_available
{
1998 asm volatile
("xxlor vs0,vs0,vs0");
2000 asm volatile
("xxlor 0,0,0");
2002 if (!__builtin_cpu_supports
("vsx"))
2011 #
Return 1 if the target supports executing
750CL paired
-single instructions
, 0
2012 # otherwise.
Cache the result.
2014 proc check_750cl_hw_available
{ } {
2015 return [check_cached_effective_target
750cl_hw_available
{
2016 #
If this is not the right target
then we can skip the test.
2017 if { ![istarget powerpc
-*paired
*] } {
2020 check_runtime_nocache
750cl_hw_available
{
2024 asm volatile
("ps_mul v0,v0,v0");
2026 asm volatile
("ps_mul 0,0,0");
2035 #
Return 1 if the target supports executing power8 vector instructions
, 0
2036 # otherwise.
Cache the result.
2038 proc check_p8vector_hw_available
{ } {
2039 return [check_cached_effective_target p8vector_hw_available
{
2040 # Some simulators are known to not support VSX
/power8 instructions.
2041 #
For now
, disable
on Darwin
2042 if { [istarget powerpc
-*-eabi
]
2043 ||
[istarget powerpc
*-*-eabispe
]
2044 ||
[istarget
*-*-darwin
*]} {
2047 set options
"-mpower8-vector"
2048 check_runtime_nocache p8vector_hw_available
{
2052 asm volatile
("xxlorc vs0,vs0,vs0");
2054 asm volatile
("xxlorc 0,0,0");
2063 #
Return 1 if the target supports executing power9 vector instructions
, 0
2064 # otherwise.
Cache the result.
2066 proc check_p9vector_hw_available
{ } {
2067 return [check_cached_effective_target p9vector_hw_available
{
2068 # Some simulators are known to not support VSX
/power8
/power9
2069 # instructions.
For now
, disable
on Darwin.
2070 if { [istarget powerpc
-*-eabi
]
2071 ||
[istarget powerpc
*-*-eabispe
]
2072 ||
[istarget
*-*-darwin
*]} {
2075 set options
"-mpower9-vector"
2076 check_runtime_nocache p9vector_hw_available
{
2080 vector double v
= (vector double
) { 0.0, 0.0 };
2081 asm
("xsxexpdp %0,%1" : "+r" (e) : "wa" (v));
2089 #
Return 1 if the target supports executing power9 modulo instructions
, 0
2090 # otherwise.
Cache the result.
2092 proc check_p9modulo_hw_available
{ } {
2093 return [check_cached_effective_target p9modulo_hw_available
{
2094 # Some simulators are known to not support VSX
/power8
/power9
2095 # instructions.
For now
, disable
on Darwin.
2096 if { [istarget powerpc
-*-eabi
]
2097 ||
[istarget powerpc
*-*-eabispe
]
2098 ||
[istarget
*-*-darwin
*]} {
2101 set options
"-mmodulo"
2102 check_runtime_nocache p9modulo_hw_available
{
2105 int i
= 5, j
= 3, r
= -1;
2106 asm
("modsw %0,%1,%2" : "+r" (r) : "r" (i), "r" (j));
2114 #
Return 1 if the target supports executing __float128
on PowerPC via software
2115 # emulation
, 0 otherwise.
Cache the result.
2117 proc check_ppc_float128_sw_available
{ } {
2118 return [check_cached_effective_target ppc_float128_sw_available
{
2119 # Some simulators are known to not support VSX
/power8
/power9
2120 # instructions.
For now
, disable
on Darwin.
2121 if { [istarget powerpc
-*-eabi
]
2122 ||
[istarget powerpc
*-*-eabispe
]
2123 ||
[istarget
*-*-darwin
*]} {
2126 set options
"-mfloat128 -mvsx"
2127 check_runtime_nocache ppc_float128_sw_available
{
2128 volatile __float128 x
= 1.0q
;
2129 volatile __float128 y
= 2.0q
;
2132 __float128 z
= x
+ y
;
2140 #
Return 1 if the target supports executing __float128
on PowerPC via power9
2141 # hardware instructions
, 0 otherwise.
Cache the result.
2143 proc check_ppc_float128_hw_available
{ } {
2144 return [check_cached_effective_target ppc_float128_hw_available
{
2145 # Some simulators are known to not support VSX
/power8
/power9
2146 # instructions.
For now
, disable
on Darwin.
2147 if { [istarget powerpc
-*-eabi
]
2148 ||
[istarget powerpc
*-*-eabispe
]
2149 ||
[istarget
*-*-darwin
*]} {
2152 set options
"-mfloat128 -mvsx -mfloat128-hardware -mpower9-vector"
2153 check_runtime_nocache ppc_float128_hw_available
{
2154 volatile __float128 x
= 1.0q
;
2155 volatile __float128 y
= 2.0q
;
2158 __float128 z
= x
+ y
;
2159 __float128 w
= -1.0q
;
2161 __asm__
("xsaddqp %0,%1,%2" : "+v" (w) : "v" (x), "v" (y));
2162 return ((z
!= 3.0q
) ||
(z
!= w
);
2169 #
Return 1 if the target supports executing VSX instructions
, 0
2170 # otherwise.
Cache the result.
2172 proc check_vsx_hw_available
{ } {
2173 return [check_cached_effective_target vsx_hw_available
{
2174 # Some simulators are known to not support VSX instructions.
2175 #
For now
, disable
on Darwin
2176 if { [istarget powerpc
-*-eabi
]
2177 ||
[istarget powerpc
*-*-eabispe
]
2178 ||
[istarget
*-*-darwin
*]} {
2182 check_runtime_nocache vsx_hw_available
{
2186 asm volatile
("xxlor vs0,vs0,vs0");
2188 asm volatile
("xxlor 0,0,0");
2197 #
Return 1 if the target supports executing AltiVec instructions
, 0
2198 # otherwise.
Cache the result.
2200 proc check_vmx_hw_available
{ } {
2201 return [check_cached_effective_target vmx_hw_available
{
2202 # Some simulators are known to not support VMX instructions.
2203 if { [istarget powerpc
-*-eabi
] ||
[istarget powerpc
*-*-eabispe
] } {
2206 # Most targets don
't require special flags for this test case, but
2207 # Darwin does. Just to be sure, make sure VSX is not enabled for
2208 # the altivec tests.
2209 if { [istarget *-*-darwin*]
2210 || [istarget *-*-aix*] } {
2211 set options "-maltivec -mno-vsx"
2213 set options "-mno-vsx"
2215 check_runtime_nocache vmx_hw_available {
2219 asm volatile ("vor v0,v0,v0");
2221 asm volatile ("vor 0,0,0");
2230 proc check_ppc_recip_hw_available { } {
2231 return [check_cached_effective_target ppc_recip_hw_available {
2232 # Some simulators may not support FRE/FRES/FRSQRTE/FRSQRTES
2233 # For now, disable on Darwin
2234 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
2237 set options "-mpowerpc-gfxopt -mpowerpc-gpopt -mpopcntb"
2238 check_runtime_nocache ppc_recip_hw_available {
2239 volatile double d_recip, d_rsqrt, d_four = 4.0;
2240 volatile float f_recip, f_rsqrt, f_four = 4.0f;
2243 asm volatile ("fres %0,%1" : "=f" (f_recip) : "f" (f_four));
2244 asm volatile ("fre %0,%1" : "=d" (d_recip) : "d" (d_four));
2245 asm volatile ("frsqrtes %0,%1" : "=f" (f_rsqrt) : "f" (f_four));
2246 asm volatile ("frsqrte %0,%1" : "=f" (d_rsqrt) : "d" (d_four));
2254 # Return 1 if the target supports executing AltiVec and Cell PPU
2255 # instructions, 0 otherwise. Cache the result.
2257 proc check_effective_target_cell_hw { } {
2258 return [check_cached_effective_target cell_hw_available {
2259 # Some simulators are known to not support VMX and PPU instructions.
2260 if { [istarget powerpc-*-eabi*] } {
2263 # Most targets don't require special flags
for this test
2264 # case
, but Darwin and AIX
do.
2265 if { [istarget
*-*-darwin
*]
2266 ||
[istarget
*-*-aix
*] } {
2267 set options
"-maltivec -mcpu=cell"
2269 set options
"-mcpu=cell"
2271 check_runtime_nocache cell_hw_available
{
2275 asm volatile
("vor v0,v0,v0");
2276 asm volatile
("lvlx v0,r0,r0");
2278 asm volatile
("vor 0,0,0");
2279 asm volatile
("lvlx 0,0,0");
2288 #
Return 1 if the target supports executing
64-bit instructions
, 0
2289 # otherwise.
Cache the result.
2291 proc check_effective_target_powerpc64
{ } {
2292 global powerpc64_available_saved
2295 if [info exists powerpc64_available_saved
] {
2296 verbose
"check_effective_target_powerpc64 returning saved $powerpc64_available_saved" 2
2298 set powerpc64_available_saved
0
2300 # Some simulators are known to not support powerpc64 instructions.
2301 if { [istarget powerpc
-*-eabi
*] ||
[istarget powerpc
-ibm
-aix
*] } {
2302 verbose
"check_effective_target_powerpc64 returning 0" 2
2303 return $powerpc64_available_saved
2306 #
Set up
, compile, and
execute a test
program containing a
64-bit
2307 # instruction.
Include the current process ID in the file
2308 # names to prevent conflicts with invocations
for multiple
2313 set f
[open $src
"w"]
2314 puts $f
"int main() {"
2315 puts $f
"#ifdef __MACH__"
2316 puts $f
" asm volatile (\"extsw r0,r0\");"
2318 puts $f
" asm volatile (\"extsw 0,0\");"
2320 puts $f
" return 0; }"
2323 set opts
"additional_flags=-mcpu=G5"
2325 verbose
"check_effective_target_powerpc64 compiling testfile $src" 2
2326 set lines
[$
{tool
}_target_compile $src $exe executable
"$opts"]
2329 if [string match
"" $lines] then {
2330 # No error message
, compilation succeeded.
2331 set result
[$
{tool
}_load
"./$exe" "" ""]
2332 set status [lindex $result
0]
2333 remote_file build
delete $exe
2334 verbose
"check_effective_target_powerpc64 testfile status is <$status>" 2
2336 if { $
status == "pass" } then {
2337 set powerpc64_available_saved
1
2340 verbose
"check_effective_target_powerpc64 testfile compilation failed" 2
2344 return $powerpc64_available_saved
2347 # GCC
3.4.0 for powerpc64
-*-linux
* included an ABI fix
for passing
2348 # complex float arguments. This affects gfortran tests that
call cabsf
2349 # in libm built by an earlier compiler.
Return 0 if libm uses the same
2350 #
argument passing as the compiler under test
, 1 otherwise.
2352 proc check_effective_target_broken_cplxf_arg
{ } {
2353 # Skip the work
for targets known not to be affected.
2354 if { ![istarget powerpc
*-*-linux
*] ||
![is
-effective
-target lp64
] } {
2358 return [check_cached_effective_target broken_cplxf_arg
{
2359 check_runtime_nocache broken_cplxf_arg
{
2360 #
include <complex.h
>
2361 extern void abort
(void
);
2362 float fabsf
(float
);
2363 float cabsf
(_Complex float
);
2370 if (fabsf
(f
- 5.0) > 0.0001)
2371 /* Yes
, it
's broken. */
2373 /* All fine, not broken. */
2380 # Return 1 is this is a TI C6X target supporting C67X instructions
2381 proc check_effective_target_ti_c67x { } {
2382 return [check_no_compiler_messages ti_c67x assembly {
2383 #if !defined(_TMS320C6700)
2384 #error !_TMS320C6700
2389 # Return 1 is this is a TI C6X target supporting C64X+ instructions
2390 proc check_effective_target_ti_c64xp { } {
2391 return [check_no_compiler_messages ti_c64xp assembly {
2392 #if !defined(_TMS320C6400_PLUS)
2393 #error !_TMS320C6400_PLUS
2399 proc check_alpha_max_hw_available { } {
2400 return [check_runtime alpha_max_hw_available {
2401 int main() { return __builtin_alpha_amask(1<<8) != 0; }
2405 # Returns true iff the FUNCTION is available on the target system.
2406 # (This is essentially a Tcl implementation of Autoconf's
2409 proc check_function_available
{ function
} {
2410 return [check_no_compiler_messages $
{function
}_available \
2416 int main
() { $function
(); }
2420 # Returns true iff
"fork" is available on the target system.
2422 proc check_fork_available
{} {
2423 return [check_function_available
"fork"]
2426 # Returns true iff
"mkfifo" is available on the target system.
2428 proc check_mkfifo_available
{} {
2429 if { [istarget
*-*-cygwin
*] } {
2430 # Cygwin has mkfifo
, but support is incomplete.
2434 return [check_function_available
"mkfifo"]
2437 # Returns true iff
"__cxa_atexit" is used on the target system.
2439 proc check_cxa_atexit_available
{ } {
2440 return [check_cached_effective_target cxa_atexit_available
{
2441 if { [istarget hppa
*-*-hpux10
*] } {
2442 # HP
-UX
10 doesn
't have __cxa_atexit but subsequent test passes.
2444 } elseif { [istarget *-*-vxworks] } {
2445 # vxworks doesn't have __cxa_atexit but subsequent test passes.
2448 check_runtime_nocache cxa_atexit_available
{
2451 static unsigned
int count;
2468 Y
() { f
(); count = 2; }
2477 int main
() { return 0; }
2483 proc check_effective_target_objc2
{ } {
2484 return [check_no_compiler_messages objc2 object
{
2493 proc check_effective_target_next_runtime
{ } {
2494 return [check_no_compiler_messages objc2 object
{
2495 #ifdef __NEXT_RUNTIME__
2498 #error
!__NEXT_RUNTIME__
2503 #
Return 1 if we
're generating 32-bit code using default options, 0
2506 proc check_effective_target_ilp32 { } {
2507 return [check_no_compiler_messages ilp32 object {
2508 int dummy[sizeof (int) == 4
2509 && sizeof (void *) == 4
2510 && sizeof (long) == 4 ? 1 : -1];
2514 # Return 1 if we're generating ia32 code using default options
, 0
2517 proc check_effective_target_ia32
{ } {
2518 return [check_no_compiler_messages ia32 object
{
2519 int dummy
[sizeof
(int) == 4
2520 && sizeof
(void
*) == 4
2521 && sizeof
(long
) == 4 ?
1 : -1] = { __i386__
};
2525 #
Return 1 if we
're generating x32 code using default options, 0
2528 proc check_effective_target_x32 { } {
2529 return [check_no_compiler_messages x32 object {
2530 int dummy[sizeof (int) == 4
2531 && sizeof (void *) == 4
2532 && sizeof (long) == 4 ? 1 : -1] = { __x86_64__ };
2536 # Return 1 if we're generating
32-bit integers using default
2537 # options
, 0 otherwise.
2539 proc check_effective_target_int32
{ } {
2540 return [check_no_compiler_messages int32 object
{
2541 int dummy
[sizeof
(int) == 4 ?
1 : -1];
2545 #
Return 1 if we
're generating 32-bit or larger integers using default
2546 # options, 0 otherwise.
2548 proc check_effective_target_int32plus { } {
2549 return [check_no_compiler_messages int32plus object {
2550 int dummy[sizeof (int) >= 4 ? 1 : -1];
2554 # Return 1 if we're generating
32-bit or larger pointers using default
2555 # options
, 0 otherwise.
2557 proc check_effective_target_ptr32plus
{ } {
2558 # The msp430 has
16-bit or
20-bit pointers. The
20-bit pointer is stored
2559 # in a
32-bit slot when in memory
, so sizeof
(void
*) returns
4, but it
2560 # cannot really hold a
32-bit address
, so we always
return false here.
2561 if { [istarget msp430
-*-*] } {
2565 return [check_no_compiler_messages ptr32plus object
{
2566 int dummy
[sizeof
(void
*) >= 4 ?
1 : -1];
2570 #
Return 1 if we support
32-bit or larger array and structure sizes
2571 # using default options
, 0 otherwise. Avoid false positive
on
2572 # targets with
20 or
24 bit address spaces.
2574 proc check_effective_target_size32plus
{ } {
2575 return [check_no_compiler_messages size32plus object
{
2576 char dummy
[16777217L];
2580 # Returns
1 if we
're generating 16-bit or smaller integers with the
2581 # default options, 0 otherwise.
2583 proc check_effective_target_int16 { } {
2584 return [check_no_compiler_messages int16 object {
2585 int dummy[sizeof (int) < 4 ? 1 : -1];
2589 # Return 1 if we're generating
64-bit code using default options
, 0
2592 proc check_effective_target_lp64
{ } {
2593 return [check_no_compiler_messages lp64 object
{
2594 int dummy
[sizeof
(int) == 4
2595 && sizeof
(void
*) == 8
2596 && sizeof
(long
) == 8 ?
1 : -1];
2600 #
Return 1 if we
're generating 64-bit code using default llp64 options,
2603 proc check_effective_target_llp64 { } {
2604 return [check_no_compiler_messages llp64 object {
2605 int dummy[sizeof (int) == 4
2606 && sizeof (void *) == 8
2607 && sizeof (long long) == 8
2608 && sizeof (long) == 4 ? 1 : -1];
2612 # Return 1 if long and int have different sizes,
2615 proc check_effective_target_long_neq_int { } {
2616 return [check_no_compiler_messages long_ne_int object {
2617 int dummy[sizeof (int) != sizeof (long) ? 1 : -1];
2621 # Return 1 if the target supports long double larger than double,
2624 proc check_effective_target_large_long_double { } {
2625 return [check_no_compiler_messages large_long_double object {
2626 int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
2630 # Return 1 if the target supports double larger than float,
2633 proc check_effective_target_large_double { } {
2634 return [check_no_compiler_messages large_double object {
2635 int dummy[sizeof(double) > sizeof(float) ? 1 : -1];
2639 # Return 1 if the target supports long double of 128 bits,
2642 proc check_effective_target_longdouble128 { } {
2643 return [check_no_compiler_messages longdouble128 object {
2644 int dummy[sizeof(long double) == 16 ? 1 : -1];
2648 # Return 1 if the target supports double of 64 bits,
2651 proc check_effective_target_double64 { } {
2652 return [check_no_compiler_messages double64 object {
2653 int dummy[sizeof(double) == 8 ? 1 : -1];
2657 # Return 1 if the target supports double of at least 64 bits,
2660 proc check_effective_target_double64plus { } {
2661 return [check_no_compiler_messages double64plus object {
2662 int dummy[sizeof(double) >= 8 ? 1 : -1];
2666 # Return 1 if the target supports 'w
' suffix on floating constant
2669 proc check_effective_target_has_w_floating_suffix { } {
2671 if [check_effective_target_c++] {
2672 append opts "-std=gnu++03"
2674 return [check_no_compiler_messages w_fp_suffix object {
2679 # Return 1 if the target supports 'q
' suffix on floating constant
2682 proc check_effective_target_has_q_floating_suffix { } {
2684 if [check_effective_target_c++] {
2685 append opts "-std=gnu++03"
2687 return [check_no_compiler_messages q_fp_suffix object {
2692 # Return 1 if the target supports the _FloatN / _FloatNx type
2693 # indicated in the function name, 0 otherwise.
2695 proc check_effective_target_float16 {} {
2696 return [check_no_compiler_messages_nocache float16 object {
2698 } [add_options_for_float16 ""]]
2701 proc check_effective_target_float32 {} {
2702 return [check_no_compiler_messages_nocache float32 object {
2704 } [add_options_for_float32 ""]]
2707 proc check_effective_target_float64 {} {
2708 return [check_no_compiler_messages_nocache float64 object {
2710 } [add_options_for_float64 ""]]
2713 proc check_effective_target_float128 {} {
2714 return [check_no_compiler_messages_nocache float128 object {
2716 } [add_options_for_float128 ""]]
2719 proc check_effective_target_float32x {} {
2720 return [check_no_compiler_messages_nocache float32x object {
2722 } [add_options_for_float32x ""]]
2725 proc check_effective_target_float64x {} {
2726 return [check_no_compiler_messages_nocache float64x object {
2728 } [add_options_for_float64x ""]]
2731 proc check_effective_target_float128x {} {
2732 return [check_no_compiler_messages_nocache float128x object {
2734 } [add_options_for_float128x ""]]
2737 # Likewise, but runtime support for any special options used as well
2738 # as compile-time support is required.
2740 proc check_effective_target_float16_runtime {} {
2741 return [check_effective_target_float16]
2744 proc check_effective_target_float32_runtime {} {
2745 return [check_effective_target_float32]
2748 proc check_effective_target_float64_runtime {} {
2749 return [check_effective_target_float64]
2752 proc check_effective_target_float128_runtime {} {
2753 if { ![check_effective_target_float128] } {
2756 if { [istarget powerpc*-*-*] } {
2757 return [check_effective_target_base_quadfloat_support]
2762 proc check_effective_target_float32x_runtime {} {
2763 return [check_effective_target_float32x]
2766 proc check_effective_target_float64x_runtime {} {
2767 if { ![check_effective_target_float64x] } {
2770 if { [istarget powerpc*-*-*] } {
2771 return [check_effective_target_base_quadfloat_support]
2776 proc check_effective_target_float128x_runtime {} {
2777 return [check_effective_target_float128x]
2780 # Return 1 if the target hardware supports any options added for
2781 # _FloatN and _FloatNx types, 0 otherwise.
2783 proc check_effective_target_floatn_nx_runtime {} {
2784 if { [istarget powerpc*-*-aix*] } {
2787 if { [istarget powerpc*-*-*] } {
2788 return [check_effective_target_base_quadfloat_support]
2793 # Add options needed to use the _FloatN / _FloatNx type indicated in
2794 # the function name.
2796 proc add_options_for_float16 { flags } {
2797 if { [istarget arm*-*-*] } {
2798 return "$flags -mfp16-format=ieee"
2803 proc add_options_for_float32 { flags } {
2807 proc add_options_for_float64 { flags } {
2811 proc add_options_for_float128 { flags } {
2812 return [add_options_for___float128 "$flags"]
2815 proc add_options_for_float32x { flags } {
2819 proc add_options_for_float64x { flags } {
2820 return [add_options_for___float128 "$flags"]
2823 proc add_options_for_float128x { flags } {
2827 # Return 1 if the target supports __float128,
2830 proc check_effective_target___float128 { } {
2831 if { [istarget powerpc*-*-*] } {
2832 return [check_ppc_float128_sw_available]
2834 if { [istarget ia64-*-*]
2835 || [istarget i?86-*-*] || [istarget x86_64-*-*] } {
2841 proc add_options_for___float128 { flags } {
2842 if { [istarget powerpc*-*-*] } {
2843 return "$flags -mfloat128 -mvsx"
2848 # Return 1 if the target supports any special run-time requirements
2849 # for __float128 or _Float128,
2852 proc check_effective_target_base_quadfloat_support { } {
2853 if { [istarget powerpc*-*-*] } {
2854 return [check_vsx_hw_available]
2859 # Return 1 if the target supports compiling fixed-point,
2862 proc check_effective_target_fixed_point { } {
2863 return [check_no_compiler_messages fixed_point object {
2864 _Sat _Fract x; _Sat _Accum y;
2868 # Return 1 if the target supports compiling decimal floating point,
2871 proc check_effective_target_dfp_nocache { } {
2872 verbose "check_effective_target_dfp_nocache: compiling source" 2
2873 set ret [check_no_compiler_messages_nocache dfp object {
2874 float x __attribute__((mode(DD)));
2876 verbose "check_effective_target_dfp_nocache: returning $ret" 2
2880 proc check_effective_target_dfprt_nocache { } {
2881 return [check_runtime_nocache dfprt {
2882 typedef float d64 __attribute__((mode(DD)));
2883 d64 x = 1.2df, y = 2.3dd, z;
2884 int main () { z = x + y; return 0; }
2888 # Return 1 if the target supports compiling Decimal Floating Point,
2891 # This won't change
for different subtargets so
cache the result.
2893 proc check_effective_target_dfp
{ } {
2894 return [check_cached_effective_target dfp
{
2895 check_effective_target_dfp_nocache
2899 #
Return 1 if the target supports linking and executing Decimal Floating
2900 # Point
, 0 otherwise.
2902 # This won
't change for different subtargets so cache the result.
2904 proc check_effective_target_dfprt { } {
2905 return [check_cached_effective_target dfprt {
2906 check_effective_target_dfprt_nocache
2910 proc check_effective_target_powerpc_popcntb_ok { } {
2911 return [check_cached_effective_target powerpc_popcntb_ok {
2913 # Disable on Darwin.
2914 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
2917 check_runtime_nocache powerpc_popcntb_ok {
2919 volatile int a = 0x12345678;
2922 asm volatile ("popcntb %0,%1" : "=r" (r) : "r" (a));
2930 # Return 1 if the target supports executing DFP hardware instructions,
2931 # 0 otherwise. Cache the result.
2933 proc check_dfp_hw_available { } {
2934 return [check_cached_effective_target dfp_hw_available {
2935 # For now, disable on Darwin
2936 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
2939 check_runtime_nocache dfp_hw_available {
2940 volatile _Decimal64 r;
2941 volatile _Decimal64 a = 4.0DD;
2942 volatile _Decimal64 b = 2.0DD;
2945 asm volatile ("dadd %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2946 asm volatile ("dsub %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2947 asm volatile ("dmul %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2948 asm volatile ("ddiv %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2951 } "-mcpu=power6 -mhard-float"
2956 # Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
2958 proc check_effective_target_ucn_nocache { } {
2959 # -std=c99 is only valid for C
2960 if [check_effective_target_c] {
2961 set ucnopts "-std=c99"
2965 verbose "check_effective_target_ucn_nocache: compiling source" 2
2966 set ret [check_no_compiler_messages_nocache ucn object {
2969 verbose "check_effective_target_ucn_nocache: returning $ret" 2
2973 # Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
2975 # This won't change
for different subtargets
, so
cache the result.
2977 proc check_effective_target_ucn
{ } {
2978 return [check_cached_effective_target ucn
{
2979 check_effective_target_ucn_nocache
2983 #
Return 1 if the target needs a command line
argument to enable a SIMD
2986 proc check_effective_target_vect_cmdline_needed
{ } {
2987 global et_vect_cmdline_needed_saved
2988 global et_vect_cmdline_needed_target_name
2990 if { ![info exists et_vect_cmdline_needed_target_name
] } {
2991 set et_vect_cmdline_needed_target_name
""
2994 #
If the target has changed since we
set the cached value
, clear it.
2995 set current_target
[current_target_name
]
2996 if { $current_target
!= $et_vect_cmdline_needed_target_name
} {
2997 verbose
"check_effective_target_vect_cmdline_needed: `$et_vect_cmdline_needed_target_name' `$current_target'" 2
2998 set et_vect_cmdline_needed_target_name $current_target
2999 if { [info exists et_vect_cmdline_needed_saved
] } {
3000 verbose
"check_effective_target_vect_cmdline_needed: removing cached result" 2
3001 unset et_vect_cmdline_needed_saved
3005 if [info exists et_vect_cmdline_needed_saved
] {
3006 verbose
"check_effective_target_vect_cmdline_needed: using cached result" 2
3008 set et_vect_cmdline_needed_saved
1
3009 if { [istarget alpha
*-*-*]
3010 ||
[istarget ia64
-*-*]
3011 ||
(([istarget i?
86-*-*] ||
[istarget x86_64
-*-*])
3012 && ![is
-effective
-target ia32
])
3013 ||
([istarget powerpc
*-*-*]
3014 && ([check_effective_target_powerpc_spe
]
3015 ||
[check_effective_target_powerpc_altivec
]))
3016 ||
([istarget sparc
*-*-*] && [check_effective_target_sparc_vis
])
3017 ||
[istarget spu
-*-*]
3018 ||
([istarget arm
*-*-*] && [check_effective_target_arm_neon
])
3019 ||
[istarget aarch64
*-*-*] } {
3020 set et_vect_cmdline_needed_saved
0
3024 verbose
"check_effective_target_vect_cmdline_needed: returning $et_vect_cmdline_needed_saved" 2
3025 return $et_vect_cmdline_needed_saved
3028 #
Return 1 if the target supports hardware vectors of
int, 0 otherwise.
3030 # This won
't change for different subtargets so cache the result.
3032 proc check_effective_target_vect_int { } {
3033 global et_vect_int_saved
3036 if [info exists et_vect_int_saved($et_index)] {
3037 verbose "check_effective_target_vect_int: using cached result" 2
3039 set et_vect_int_saved($et_index) 0
3040 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
3041 || ([istarget powerpc*-*-*]
3042 && ![istarget powerpc-*-linux*paired*])
3043 || [istarget spu-*-*]
3044 || [istarget sparc*-*-*]
3045 || [istarget alpha*-*-*]
3046 || [istarget ia64-*-*]
3047 || [istarget aarch64*-*-*]
3048 || [is-effective-target arm_neon]
3049 || ([istarget mips*-*-*]
3050 && ([et-is-effective-target mips_loongson]
3051 || [et-is-effective-target mips_msa]))
3052 || ([istarget s390*-*-*]
3053 && [check_effective_target_s390_vx]) } {
3054 set et_vect_int_saved($et_index) 1
3058 verbose "check_effective_target_vect_int:\
3059 returning $et_vect_int_saved($et_index)" 2
3060 return $et_vect_int_saved($et_index)
3063 # Return 1 if the target supports signed int->float conversion
3066 proc check_effective_target_vect_intfloat_cvt { } {
3067 global et_vect_intfloat_cvt_saved
3070 if [info exists et_vect_intfloat_cvt_saved($et_index)] {
3071 verbose "check_effective_target_vect_intfloat_cvt:\
3072 using cached result" 2
3074 set et_vect_intfloat_cvt_saved($et_index) 0
3075 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
3076 || ([istarget powerpc*-*-*]
3077 && ![istarget powerpc-*-linux*paired*])
3078 || [is-effective-target arm_neon]
3079 || ([istarget mips*-*-*]
3080 && [et-is-effective-target mips_msa]) } {
3081 set et_vect_intfloat_cvt_saved($et_index) 1
3085 verbose "check_effective_target_vect_intfloat_cvt:\
3086 returning $et_vect_intfloat_cvt_saved($et_index)" 2
3087 return $et_vect_intfloat_cvt_saved($et_index)
3090 # Return 1 if the target supports signed double->int conversion
3093 proc check_effective_target_vect_doubleint_cvt { } {
3094 global et_vect_doubleint_cvt_saved
3097 if [info exists et_vect_doubleint_cvt_saved($et_index)] {
3098 verbose "check_effective_target_vect_doubleint_cvt: using cached result" 2
3100 set et_vect_doubleint_cvt_saved($et_index) 0
3101 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
3102 && [check_no_compiler_messages vect_doubleint_cvt assembly {
3103 #ifdef __tune_atom__
3104 # error No double vectorizer support.
3107 || [istarget aarch64*-*-*]
3108 || [istarget spu-*-*]
3109 || ([istarget powerpc*-*-*] && [check_vsx_hw_available])
3110 || ([istarget mips*-*-*]
3111 && [et-is-effective-target mips_msa]) } {
3112 set et_vect_doubleint_cvt_saved($et_index) 1
3116 verbose "check_effective_target_vect_doubleint_cvt:\
3117 returning $et_vect_doubleint_cvt_saved($et_index)" 2
3118 return $et_vect_doubleint_cvt_saved($et_index)
3121 # Return 1 if the target supports signed int->double conversion
3124 proc check_effective_target_vect_intdouble_cvt { } {
3125 global et_vect_intdouble_cvt_saved
3128 if [info exists et_vect_intdouble_cvt_saved($et_index)] {
3129 verbose "check_effective_target_vect_intdouble_cvt: using cached result" 2
3131 set et_vect_intdouble_cvt_saved($et_index) 0
3132 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
3133 && [check_no_compiler_messages vect_intdouble_cvt assembly {
3134 #ifdef __tune_atom__
3135 # error No double vectorizer support.
3138 || [istarget aarch64*-*-*]
3139 || [istarget spu-*-*]
3140 || ([istarget powerpc*-*-*] && [check_vsx_hw_available])
3141 || ([istarget mips*-*-*]
3142 && [et-is-effective-target mips_msa]) } {
3143 set et_vect_intdouble_cvt_saved($et_index) 1
3147 verbose "check_effective_target_vect_intdouble_cvt:\
3148 returning $et_vect_intdouble_cvt_saved($et_index)" 2
3149 return $et_vect_intdouble_cvt_saved($et_index)
3152 #Return 1 if we're supporting __int128
for target
, 0 otherwise.
3154 proc check_effective_target_int128
{ } {
3155 return [check_no_compiler_messages int128 object
{
3157 #ifndef __SIZEOF_INT128__
3166 #
Return 1 if the target supports unsigned
int->float conversion
3169 proc check_effective_target_vect_uintfloat_cvt
{ } {
3170 global et_vect_uintfloat_cvt_saved
3173 if [info exists et_vect_uintfloat_cvt_saved
($et_index
)] {
3174 verbose
"check_effective_target_vect_uintfloat_cvt:\
3175 using cached result
" 2
3177 set et_vect_uintfloat_cvt_saved
($et_index
) 0
3178 if { [istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
3179 ||
([istarget powerpc
*-*-*]
3180 && ![istarget powerpc
-*-linux
*paired
*])
3181 ||
[istarget aarch64
*-*-*]
3182 ||
[is
-effective
-target arm_neon
]
3183 ||
([istarget mips
*-*-*]
3184 && [et
-is
-effective
-target mips_msa
]) } {
3185 set et_vect_uintfloat_cvt_saved
($et_index
) 1
3189 verbose
"check_effective_target_vect_uintfloat_cvt:\
3190 returning $et_vect_uintfloat_cvt_saved
($et_index
)" 2
3191 return $et_vect_uintfloat_cvt_saved
($et_index
)
3195 #
Return 1 if the target supports signed float
->int conversion
3198 proc check_effective_target_vect_floatint_cvt
{ } {
3199 global et_vect_floatint_cvt_saved
3202 if [info exists et_vect_floatint_cvt_saved
($et_index
)] {
3203 verbose
"check_effective_target_vect_floatint_cvt:\
3204 using cached result
" 2
3206 set et_vect_floatint_cvt_saved
($et_index
) 0
3207 if { [istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
3208 ||
([istarget powerpc
*-*-*]
3209 && ![istarget powerpc
-*-linux
*paired
*])
3210 ||
[is
-effective
-target arm_neon
]
3211 ||
([istarget mips
*-*-*]
3212 && [et
-is
-effective
-target mips_msa
]) } {
3213 set et_vect_floatint_cvt_saved
($et_index
) 1
3217 verbose
"check_effective_target_vect_floatint_cvt:\
3218 returning $et_vect_floatint_cvt_saved
($et_index
)" 2
3219 return $et_vect_floatint_cvt_saved
($et_index
)
3222 #
Return 1 if the target supports unsigned float
->int conversion
3225 proc check_effective_target_vect_floatuint_cvt
{ } {
3226 global et_vect_floatuint_cvt_saved
3229 if [info exists et_vect_floatuint_cvt_saved
($et_index
)] {
3230 verbose
"check_effective_target_vect_floatuint_cvt:\
3231 using cached result
" 2
3233 set et_vect_floatuint_cvt_saved
($et_index
) 0
3234 if { ([istarget powerpc
*-*-*]
3235 && ![istarget powerpc
-*-linux
*paired
*])
3236 ||
[is
-effective
-target arm_neon
]
3237 ||
([istarget mips
*-*-*]
3238 && [et
-is
-effective
-target mips_msa
]) } {
3239 set et_vect_floatuint_cvt_saved
($et_index
) 1
3243 verbose
"check_effective_target_vect_floatuint_cvt:\
3244 returning $et_vect_floatuint_cvt_saved
($et_index
)" 2
3245 return $et_vect_floatuint_cvt_saved
($et_index
)
3248 #
Return 1 if peeling
for alignment might be profitable
on the target
3251 proc check_effective_target_vect_peeling_profitable
{ } {
3252 global et_vect_peeling_profitable_saved
3255 if [info exists et_vect_peeling_profitable_saved
($et_index
)] {
3256 verbose
"check_effective_target_vect_peeling_profitable: using cached result" 2
3258 set et_vect_peeling_profitable_saved
($et_index
) 1
3259 if { ([istarget s390
*-*-*]
3260 && [check_effective_target_s390_vx
])
3261 ||
[check_effective_target_vect_element_align_preferred
] } {
3262 set et_vect_peeling_profitable_saved
($et_index
) 0
3266 verbose
"check_effective_target_vect_peeling_profitable:\
3267 returning $et_vect_peeling_profitable_saved
($et_index
)" 2
3268 return $et_vect_peeling_profitable_saved
($et_index
)
3271 #
Return 1 if the target supports #pragma omp declare simd
, 0 otherwise.
3273 # This won
't change for different subtargets so cache the result.
3275 proc check_effective_target_vect_simd_clones { } {
3276 global et_vect_simd_clones_saved
3279 if [info exists et_vect_simd_clones_saved($et_index)] {
3280 verbose "check_effective_target_vect_simd_clones: using cached result" 2
3282 set et_vect_simd_clones_saved($et_index) 0
3283 # On i?86/x86_64 #pragma omp declare simd builds a sse2, avx,
3284 # avx2 and avx512f clone. Only the right clone for the
3285 # specified arch will be chosen, but still we need to at least
3286 # be able to assemble avx512f.
3287 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
3288 && [check_effective_target_avx512f]) } {
3289 set et_vect_simd_clones_saved($et_index) 1
3293 verbose "check_effective_target_vect_simd_clones:\
3294 returning $et_vect_simd_clones_saved($et_index)" 2
3295 return $et_vect_simd_clones_saved($et_index)
3298 # Return 1 if this is a AArch64 target supporting big endian
3299 proc check_effective_target_aarch64_big_endian { } {
3300 return [check_no_compiler_messages aarch64_big_endian assembly {
3301 #if !defined(__aarch64__) || !defined(__AARCH64EB__)
3302 #error !__aarch64__ || !__AARCH64EB__
3307 # Return 1 if this is a AArch64 target supporting little endian
3308 proc check_effective_target_aarch64_little_endian { } {
3309 if { ![istarget aarch64*-*-*] } {
3313 return [check_no_compiler_messages aarch64_little_endian assembly {
3314 #if !defined(__aarch64__) || defined(__AARCH64EB__)
3320 # Return 1 if this is a compiler supporting ARC atomic operations
3321 proc check_effective_target_arc_atomic { } {
3322 return [check_no_compiler_messages arc_atomic assembly {
3323 #if !defined(__ARC_ATOMIC__)
3329 # Return 1 if this is an arm target using 32-bit instructions
3330 proc check_effective_target_arm32 { } {
3331 if { ![istarget arm*-*-*] } {
3335 return [check_no_compiler_messages arm32 assembly {
3336 #if !defined(__arm__) || (defined(__thumb__) && !defined(__thumb2__))
3337 #error !__arm || __thumb__ && !__thumb2__
3342 # Return 1 if this is an arm target not using Thumb
3343 proc check_effective_target_arm_nothumb { } {
3344 if { ![istarget arm*-*-*] } {
3348 return [check_no_compiler_messages arm_nothumb assembly {
3349 #if !defined(__arm__) || (defined(__thumb__) || defined(__thumb2__))
3350 #error !__arm__ || __thumb || __thumb2__
3355 # Return 1 if this is a little-endian ARM target
3356 proc check_effective_target_arm_little_endian { } {
3357 if { ![istarget arm*-*-*] } {
3361 return [check_no_compiler_messages arm_little_endian assembly {
3362 #if !defined(__arm__) || !defined(__ARMEL__)
3363 #error !__arm__ || !__ARMEL__
3368 # Return 1 if this is an ARM target that only supports aligned vector accesses
3369 proc check_effective_target_arm_vect_no_misalign { } {
3370 if { ![istarget arm*-*-*] } {
3374 return [check_no_compiler_messages arm_vect_no_misalign assembly {
3375 #if !defined(__arm__) \
3376 || (defined(__ARM_FEATURE_UNALIGNED) \
3377 && defined(__ARMEL__))
3378 #error !__arm__ || (__ARMEL__ && __ARM_FEATURE_UNALIGNED)
3384 # Return 1 if this is an ARM target supporting -mfloat-abi=soft. Some
3385 # multilibs may be incompatible with this option.
3387 proc check_effective_target_arm_soft_ok { } {
3388 if { [check_effective_target_arm32] } {
3389 return [check_no_compiler_messages arm_soft_ok executable {
3390 int main() { return 0;}
3391 } "-mfloat-abi=soft"]
3397 # Return 1 if this is an ARM target supporting -mfpu=vfp
3398 # -mfloat-abi=softfp. Some multilibs may be incompatible with these
3401 proc check_effective_target_arm_vfp_ok { } {
3402 if { [check_effective_target_arm32] } {
3403 return [check_no_compiler_messages arm_vfp_ok object {
3405 } "-mfpu=vfp -mfloat-abi=softfp"]
3411 # Return 1 if this is an ARM target supporting -mfpu=vfp3
3412 # -mfloat-abi=softfp.
3414 proc check_effective_target_arm_vfp3_ok { } {
3415 if { [check_effective_target_arm32] } {
3416 return [check_no_compiler_messages arm_vfp3_ok object {
3418 } "-mfpu=vfp3 -mfloat-abi=softfp"]
3424 # Return 1 if this is an ARM target supporting -mfpu=fp-armv8
3425 # -mfloat-abi=softfp.
3426 proc check_effective_target_arm_v8_vfp_ok {} {
3427 if { [check_effective_target_arm32] } {
3428 return [check_no_compiler_messages arm_v8_vfp_ok object {
3431 __asm__ volatile ("vrinta.f32.f32 s0, s0");
3434 } "-mfpu=fp-armv8 -mfloat-abi=softfp"]
3440 # Return 1 if this is an ARM target supporting -mfpu=vfp
3441 # -mfloat-abi=hard. Some multilibs may be incompatible with these
3444 proc check_effective_target_arm_hard_vfp_ok { } {
3445 if { [check_effective_target_arm32]
3446 && ! [check-flags [list "" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=hard" }]] } {
3447 return [check_no_compiler_messages arm_hard_vfp_ok executable {
3448 int main() { return 0;}
3449 } "-mfpu=vfp -mfloat-abi=hard"]
3455 # Return 1 if this is an ARM target defining __ARM_FP. We may need
3456 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3457 # incompatible with these options. Also set et_arm_fp_flags to the
3458 # best options to add.
3460 proc check_effective_target_arm_fp_ok_nocache { } {
3461 global et_arm_fp_flags
3462 set et_arm_fp_flags ""
3463 if { [check_effective_target_arm32] } {
3464 foreach flags {"" "-mfloat-abi=softfp" "-mfloat-abi=hard"} {
3465 if { [check_no_compiler_messages_nocache arm_fp_ok object {
3467 #error __ARM_FP not defined
3470 set et_arm_fp_flags $flags
3479 proc check_effective_target_arm_fp_ok { } {
3480 return [check_cached_effective_target arm_fp_ok \
3481 check_effective_target_arm_fp_ok_nocache]
3484 # Add the options needed to define __ARM_FP. We need either
3485 # -mfloat-abi=softfp or -mfloat-abi=hard, but if one is already
3486 # specified by the multilib, use it.
3488 proc add_options_for_arm_fp { flags } {
3489 if { ! [check_effective_target_arm_fp_ok] } {
3492 global et_arm_fp_flags
3493 return "$flags $et_arm_fp_flags"
3496 # Return 1 if this is an ARM target that supports DSP multiply with
3497 # current multilib flags.
3499 proc check_effective_target_arm_dsp { } {
3500 return [check_no_compiler_messages arm_dsp assembly {
3501 #ifndef __ARM_FEATURE_DSP
3508 # Return 1 if this is an ARM target that supports unaligned word/halfword
3509 # load/store instructions.
3511 proc check_effective_target_arm_unaligned { } {
3512 return [check_no_compiler_messages arm_unaligned assembly {
3513 #ifndef __ARM_FEATURE_UNALIGNED
3514 #error no unaligned support
3520 # Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8
3521 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3522 # incompatible with these options. Also set et_arm_crypto_flags to the
3523 # best options to add.
3525 proc check_effective_target_arm_crypto_ok_nocache { } {
3526 global et_arm_crypto_flags
3527 set et_arm_crypto_flags ""
3528 if { [check_effective_target_arm_v8_neon_ok] } {
3529 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=crypto-neon-fp-armv8" "-mfpu=crypto-neon-fp-armv8 -mfloat-abi=softfp"} {
3530 if { [check_no_compiler_messages_nocache arm_crypto_ok object {
3531 #include "arm_neon.h"
3533 foo (uint8x16_t a, uint8x16_t b)
3535 return vaeseq_u8 (a, b);
3538 set et_arm_crypto_flags $flags
3547 # Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8
3549 proc check_effective_target_arm_crypto_ok { } {
3550 return [check_cached_effective_target arm_crypto_ok \
3551 check_effective_target_arm_crypto_ok_nocache]
3554 # Add options for crypto extensions.
3555 proc add_options_for_arm_crypto { flags } {
3556 if { ! [check_effective_target_arm_crypto_ok] } {
3559 global et_arm_crypto_flags
3560 return "$flags $et_arm_crypto_flags"
3563 # Add the options needed for NEON. We need either -mfloat-abi=softfp
3564 # or -mfloat-abi=hard, but if one is already specified by the
3565 # multilib, use it. Similarly, if a -mfpu option already enables
3566 # NEON, do not add -mfpu=neon.
3568 proc add_options_for_arm_neon { flags } {
3569 if { ! [check_effective_target_arm_neon_ok] } {
3572 global et_arm_neon_flags
3573 return "$flags $et_arm_neon_flags"
3576 proc add_options_for_arm_v8_vfp { flags } {
3577 if { ! [check_effective_target_arm_v8_vfp_ok] } {
3580 return "$flags -mfpu=fp-armv8 -mfloat-abi=softfp"
3583 proc add_options_for_arm_v8_neon { flags } {
3584 if { ! [check_effective_target_arm_v8_neon_ok] } {
3587 global et_arm_v8_neon_flags
3588 return "$flags $et_arm_v8_neon_flags -march=armv8-a"
3591 # Add the options needed for ARMv8.1 Adv.SIMD. Also adds the ARMv8 NEON
3592 # options for AArch64 and for ARM.
3594 proc add_options_for_arm_v8_1a_neon { flags } {
3595 if { ! [check_effective_target_arm_v8_1a_neon_ok] } {
3598 global et_arm_v8_1a_neon_flags
3599 return "$flags $et_arm_v8_1a_neon_flags"
3602 # Add the options needed for ARMv8.2 with the scalar FP16 extension.
3603 # Also adds the ARMv8 FP options for ARM and for AArch64.
3605 proc add_options_for_arm_v8_2a_fp16_scalar { flags } {
3606 if { ! [check_effective_target_arm_v8_2a_fp16_scalar_ok] } {
3609 global et_arm_v8_2a_fp16_scalar_flags
3610 return "$flags $et_arm_v8_2a_fp16_scalar_flags"
3613 # Add the options needed for ARMv8.2 with the FP16 extension. Also adds
3614 # the ARMv8 NEON options for ARM and for AArch64.
3616 proc add_options_for_arm_v8_2a_fp16_neon { flags } {
3617 if { ! [check_effective_target_arm_v8_2a_fp16_neon_ok] } {
3620 global et_arm_v8_2a_fp16_neon_flags
3621 return "$flags $et_arm_v8_2a_fp16_neon_flags"
3624 proc add_options_for_arm_crc { flags } {
3625 if { ! [check_effective_target_arm_crc_ok] } {
3628 global et_arm_crc_flags
3629 return "$flags $et_arm_crc_flags"
3632 # Add the options needed for NEON. We need either -mfloat-abi=softfp
3633 # or -mfloat-abi=hard, but if one is already specified by the
3634 # multilib, use it. Similarly, if a -mfpu option already enables
3635 # NEON, do not add -mfpu=neon.
3637 proc add_options_for_arm_neonv2 { flags } {
3638 if { ! [check_effective_target_arm_neonv2_ok] } {
3641 global et_arm_neonv2_flags
3642 return "$flags $et_arm_neonv2_flags"
3645 # Add the options needed for vfp3.
3646 proc add_options_for_arm_vfp3 { flags } {
3647 if { ! [check_effective_target_arm_vfp3_ok] } {
3650 return "$flags -mfpu=vfp3 -mfloat-abi=softfp"
3653 # Return 1 if this is an ARM target supporting -mfpu=neon
3654 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3655 # incompatible with these options. Also set et_arm_neon_flags to the
3656 # best options to add.
3658 proc check_effective_target_arm_neon_ok_nocache { } {
3659 global et_arm_neon_flags
3660 set et_arm_neon_flags ""
3661 if { [check_effective_target_arm32] } {
3662 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon" "-mfpu=neon -mfloat-abi=softfp" "-mfpu=neon -mfloat-abi=softfp -march=armv7-a" "-mfloat-abi=hard" "-mfpu=neon -mfloat-abi=hard" "-mfpu=neon -mfloat-abi=hard -march=armv7-a"} {
3663 if { [check_no_compiler_messages_nocache arm_neon_ok object {
3664 #include <arm_neon.h>
3666 #ifndef __ARM_NEON__
3669 /* Avoid the case where a test adds -mfpu=neon, but the toolchain is
3670 configured for -mcpu=arm926ej-s, for example. */
3671 #if __ARM_ARCH < 7 || __ARM_ARCH_PROFILE == 'M
'
3672 #error Architecture does not support NEON.
3675 set et_arm_neon_flags $flags
3684 proc check_effective_target_arm_neon_ok { } {
3685 return [check_cached_effective_target arm_neon_ok \
3686 check_effective_target_arm_neon_ok_nocache]
3689 # Return 1 if this is an ARM target supporting -mfpu=neon without any
3690 # -mfloat-abi= option. Useful in tests where add_options is not
3691 # supported (such as lto tests).
3693 proc check_effective_target_arm_neon_ok_no_float_abi_nocache { } {
3694 if { [check_effective_target_arm32] } {
3695 foreach flags {"-mfpu=neon"} {
3696 if { [check_no_compiler_messages_nocache arm_neon_ok_no_float_abi object {
3697 #include <arm_neon.h>
3699 #ifndef __ARM_NEON__
3702 /* Avoid the case where a test adds -mfpu=neon, but the toolchain is
3703 configured for -mcpu=arm926ej-s, for example. */
3704 #if __ARM_ARCH < 7 || __ARM_ARCH_PROFILE == 'M
'
3705 #error Architecture does not support NEON.
3716 proc check_effective_target_arm_neon_ok_no_float_abi { } {
3717 return [check_cached_effective_target arm_neon_ok_no_float_abi \
3718 check_effective_target_arm_neon_ok_no_float_abi_nocache]
3721 proc check_effective_target_arm_crc_ok_nocache { } {
3722 global et_arm_crc_flags
3723 set et_arm_crc_flags "-march=armv8-a+crc"
3724 return [check_no_compiler_messages_nocache arm_crc_ok object {
3725 #if !defined (__ARM_FEATURE_CRC32)
3728 } "$et_arm_crc_flags"]
3731 proc check_effective_target_arm_crc_ok { } {
3732 return [check_cached_effective_target arm_crc_ok \
3733 check_effective_target_arm_crc_ok_nocache]
3736 # Return 1 if this is an ARM target supporting -mfpu=neon-fp16
3737 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3738 # incompatible with these options. Also set et_arm_neon_fp16_flags to
3739 # the best options to add.
3741 proc check_effective_target_arm_neon_fp16_ok_nocache { } {
3742 global et_arm_neon_fp16_flags
3743 global et_arm_neon_flags
3744 set et_arm_neon_fp16_flags ""
3745 if { [check_effective_target_arm32]
3746 && [check_effective_target_arm_neon_ok] } {
3747 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
3748 "-mfpu=neon-fp16 -mfloat-abi=softfp"
3749 "-mfp16-format=ieee"
3750 "-mfloat-abi=softfp -mfp16-format=ieee"
3751 "-mfpu=neon-fp16 -mfp16-format=ieee"
3752 "-mfpu=neon-fp16 -mfloat-abi=softfp -mfp16-format=ieee"} {
3753 if { [check_no_compiler_messages_nocache arm_neon_fp16_ok object {
3754 #include "arm_neon.h"
3756 foo (float32x4_t arg)
3758 return vcvt_f16_f32 (arg);
3760 } "$et_arm_neon_flags $flags"] } {
3761 set et_arm_neon_fp16_flags [concat $et_arm_neon_flags $flags]
3770 proc check_effective_target_arm_neon_fp16_ok { } {
3771 return [check_cached_effective_target arm_neon_fp16_ok \
3772 check_effective_target_arm_neon_fp16_ok_nocache]
3775 proc check_effective_target_arm_neon_fp16_hw { } {
3776 if {! [check_effective_target_arm_neon_fp16_ok] } {
3779 global et_arm_neon_fp16_flags
3780 check_runtime_nocache arm_neon_fp16_hw {
3782 main (int argc, char **argv)
3784 asm ("vcvt.f32.f16 q1, d0");
3787 } $et_arm_neon_fp16_flags
3790 proc add_options_for_arm_neon_fp16 { flags } {
3791 if { ! [check_effective_target_arm_neon_fp16_ok] } {
3794 global et_arm_neon_fp16_flags
3795 return "$flags $et_arm_neon_fp16_flags"
3798 # Return 1 if this is an ARM target supporting the FP16 alternative
3799 # format. Some multilibs may be incompatible with the options needed. Also
3800 # set et_arm_neon_fp16_flags to the best options to add.
3802 proc check_effective_target_arm_fp16_alternative_ok_nocache { } {
3803 global et_arm_neon_fp16_flags
3804 set et_arm_neon_fp16_flags ""
3805 if { [check_effective_target_arm32] } {
3806 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
3807 "-mfpu=neon-fp16 -mfloat-abi=softfp"} {
3808 if { [check_no_compiler_messages_nocache \
3809 arm_fp16_alternative_ok object {
3810 #if !defined (__ARM_FP16_FORMAT_ALTERNATIVE)
3811 #error __ARM_FP16_FORMAT_ALTERNATIVE not defined
3813 } "$flags -mfp16-format=alternative"] } {
3814 set et_arm_neon_fp16_flags "$flags -mfp16-format=alternative"
3823 proc check_effective_target_arm_fp16_alternative_ok { } {
3824 return [check_cached_effective_target arm_fp16_alternative_ok \
3825 check_effective_target_arm_fp16_alternative_ok_nocache]
3828 # Return 1 if this is an ARM target supports specifying the FP16 none
3829 # format. Some multilibs may be incompatible with the options needed.
3831 proc check_effective_target_arm_fp16_none_ok_nocache { } {
3832 if { [check_effective_target_arm32] } {
3833 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
3834 "-mfpu=neon-fp16 -mfloat-abi=softfp"} {
3835 if { [check_no_compiler_messages_nocache \
3836 arm_fp16_none_ok object {
3837 #if defined (__ARM_FP16_FORMAT_ALTERNATIVE)
3838 #error __ARM_FP16_FORMAT_ALTERNATIVE defined
3840 #if defined (__ARM_FP16_FORMAT_IEEE)
3841 #error __ARM_FP16_FORMAT_IEEE defined
3843 } "$flags -mfp16-format=none"] } {
3852 proc check_effective_target_arm_fp16_none_ok { } {
3853 return [check_cached_effective_target arm_fp16_none_ok \
3854 check_effective_target_arm_fp16_none_ok_nocache]
3857 # Return 1 if this is an ARM target supporting -mfpu=neon-fp-armv8
3858 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3859 # incompatible with these options. Also set et_arm_v8_neon_flags to the
3860 # best options to add.
3862 proc check_effective_target_arm_v8_neon_ok_nocache { } {
3863 global et_arm_v8_neon_flags
3864 set et_arm_v8_neon_flags ""
3865 if { [check_effective_target_arm32] } {
3866 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp-armv8" "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
3867 if { [check_no_compiler_messages_nocache arm_v8_neon_ok object {
3869 #error not armv8 or later
3871 #include "arm_neon.h"
3875 __asm__ volatile ("vrintn.f32 q0, q0");
3877 } "$flags -march=armv8-a"] } {
3878 set et_arm_v8_neon_flags $flags
3887 proc check_effective_target_arm_v8_neon_ok { } {
3888 return [check_cached_effective_target arm_v8_neon_ok \
3889 check_effective_target_arm_v8_neon_ok_nocache]
3892 # Return 1 if this is an ARM target supporting -mfpu=neon-vfpv4
3893 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3894 # incompatible with these options. Also set et_arm_neonv2_flags to the
3895 # best options to add.
3897 proc check_effective_target_arm_neonv2_ok_nocache { } {
3898 global et_arm_neonv2_flags
3899 global et_arm_neon_flags
3900 set et_arm_neonv2_flags ""
3901 if { [check_effective_target_arm32]
3902 && [check_effective_target_arm_neon_ok] } {
3903 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-vfpv4" "-mfpu=neon-vfpv4 -mfloat-abi=softfp"} {
3904 if { [check_no_compiler_messages_nocache arm_neonv2_ok object {
3905 #include "arm_neon.h"
3907 foo (float32x2_t a, float32x2_t b, float32x2_t c)
3909 return vfma_f32 (a, b, c);
3911 } "$et_arm_neon_flags $flags"] } {
3912 set et_arm_neonv2_flags [concat $et_arm_neon_flags $flags]
3921 proc check_effective_target_arm_neonv2_ok { } {
3922 return [check_cached_effective_target arm_neonv2_ok \
3923 check_effective_target_arm_neonv2_ok_nocache]
3926 # Add the options needed for VFP FP16 support. We need either
3927 # -mfloat-abi=softfp or -mfloat-abi=hard. If one is already specified by
3928 # the multilib, use it.
3930 proc add_options_for_arm_fp16 { flags } {
3931 if { ! [check_effective_target_arm_fp16_ok] } {
3934 global et_arm_fp16_flags
3935 return "$flags $et_arm_fp16_flags"
3938 # Add the options needed to enable support for IEEE format
3939 # half-precision support. This is valid for ARM targets.
3941 proc add_options_for_arm_fp16_ieee { flags } {
3942 if { ! [check_effective_target_arm_fp16_ok] } {
3945 global et_arm_fp16_flags
3946 return "$flags $et_arm_fp16_flags -mfp16-format=ieee"
3949 # Add the options needed to enable support for ARM Alternative format
3950 # half-precision support. This is valid for ARM targets.
3952 proc add_options_for_arm_fp16_alternative { flags } {
3953 if { ! [check_effective_target_arm_fp16_ok] } {
3956 global et_arm_fp16_flags
3957 return "$flags $et_arm_fp16_flags -mfp16-format=alternative"
3960 # Return 1 if this is an ARM target that can support a VFP fp16 variant.
3961 # Skip multilibs that are incompatible with these options and set
3962 # et_arm_fp16_flags to the best options to add. This test is valid for
3965 proc check_effective_target_arm_fp16_ok_nocache { } {
3966 global et_arm_fp16_flags
3967 set et_arm_fp16_flags ""
3968 if { ! [check_effective_target_arm32] } {
3972 [list "" { *-*-* } { "-mfpu=*" } \
3973 { "-mfpu=*fp16*" "-mfpu=*fpv[4-9]*" \
3974 "-mfpu=*fpv[1-9][0-9]*" "-mfpu=*fp-armv8*" } ]] {
3975 # Multilib flags would override -mfpu.
3978 if [check-flags [list "" { *-*-* } { "-mfloat-abi=soft" } { "" } ]] {
3979 # Must generate floating-point instructions.
3982 if [check_effective_target_arm_hf_eabi] {
3983 # Use existing float-abi and force an fpu which supports fp16
3984 set et_arm_fp16_flags "-mfpu=vfpv4"
3987 if [check-flags [list "" { *-*-* } { "-mfpu=*" } { "" } ]] {
3988 # The existing -mfpu value is OK; use it, but add softfp.
3989 set et_arm_fp16_flags "-mfloat-abi=softfp"
3992 # Add -mfpu for a VFP fp16 variant since there is no preprocessor
3993 # macro to check for this support.
3994 set flags "-mfpu=vfpv4 -mfloat-abi=softfp"
3995 if { [check_no_compiler_messages_nocache arm_fp16_ok assembly {
3998 set et_arm_fp16_flags "$flags"
4005 proc check_effective_target_arm_fp16_ok { } {
4006 return [check_cached_effective_target arm_fp16_ok \
4007 check_effective_target_arm_fp16_ok_nocache]
4010 # Return 1 if the target supports executing VFP FP16 instructions, 0
4011 # otherwise. This test is valid for ARM only.
4013 proc check_effective_target_arm_fp16_hw { } {
4014 if {! [check_effective_target_arm_fp16_ok] } {
4017 global et_arm_fp16_flags
4018 check_runtime_nocache arm_fp16_hw {
4020 main (int argc, char **argv)
4024 asm ("vcvtb.f32.f16 %0, %1"
4025 : "=w" (r) : "w" (a)
4026 : /* No clobbers. */);
4027 return (r == 1.0) ? 0 : 1;
4029 } "$et_arm_fp16_flags -mfp16-format=ieee"
4032 # Creates a series of routines that return 1 if the given architecture
4033 # can be selected and a routine to give the flags to select that architecture
4034 # Note: Extra flags may be added to disable options from newer compilers
4035 # (Thumb in particular - but others may be added in the future).
4036 # Warning: Do not use check_effective_target_arm_arch_*_ok for architecture
4037 # extension (eg. ARMv8.1-A) since there is no macro defined for them. See
4038 # how only __ARM_ARCH_8A__ is checked for ARMv8.1-A.
4039 # Usage: /* { dg-require-effective-target arm_arch_v5_ok } */
4040 # /* { dg-add-options arm_arch_v5 } */
4041 # /* { dg-require-effective-target arm_arch_v5_multilib } */
4042 foreach { armfunc armflag armdefs } {
4043 v4 "-march=armv4 -marm" __ARM_ARCH_4__
4044 v4t "-march=armv4t" __ARM_ARCH_4T__
4045 v5 "-march=armv5 -marm" __ARM_ARCH_5__
4046 v5t "-march=armv5t" __ARM_ARCH_5T__
4047 v5te "-march=armv5te" __ARM_ARCH_5TE__
4048 v6 "-march=armv6" __ARM_ARCH_6__
4049 v6k "-march=armv6k" __ARM_ARCH_6K__
4050 v6t2 "-march=armv6t2" __ARM_ARCH_6T2__
4051 v6z "-march=armv6z" __ARM_ARCH_6Z__
4052 v6m "-march=armv6-m -mthumb -mfloat-abi=soft" __ARM_ARCH_6M__
4053 v7a "-march=armv7-a" __ARM_ARCH_7A__
4054 v7r "-march=armv7-r" __ARM_ARCH_7R__
4055 v7m "-march=armv7-m -mthumb" __ARM_ARCH_7M__
4056 v7em "-march=armv7e-m -mthumb" __ARM_ARCH_7EM__
4057 v7ve "-march=armv7ve -marm"
4058 "__ARM_ARCH_7A__ && __ARM_FEATURE_IDIV"
4059 v8a "-march=armv8-a" __ARM_ARCH_8A__
4060 v8_1a "-march=armv8.1a" __ARM_ARCH_8A__
4061 v8_2a "-march=armv8.2a" __ARM_ARCH_8A__
4062 v8m_base "-march=armv8-m.base -mthumb -mfloat-abi=soft"
4063 __ARM_ARCH_8M_BASE__
4064 v8m_main "-march=armv8-m.main -mthumb" __ARM_ARCH_8M_MAIN__
4065 v8r "-march=armv8-r" __ARM_ARCH_8R__ } {
4066 eval [string map [list FUNC $armfunc FLAG $armflag DEFS $armdefs ] {
4067 proc check_effective_target_arm_arch_FUNC_ok { } {
4068 if { [ string match "*-marm*" "FLAG" ] &&
4069 ![check_effective_target_arm_arm_ok] } {
4072 return [check_no_compiler_messages arm_arch_FUNC_ok assembly {
4079 proc add_options_for_arm_arch_FUNC { flags } {
4080 return "$flags FLAG"
4083 proc check_effective_target_arm_arch_FUNC_multilib { } {
4084 return [check_runtime arm_arch_FUNC_multilib {
4090 } [add_options_for_arm_arch_FUNC ""]]
4095 # Return 1 if GCC was configured with --with-mode=
4096 proc check_effective_target_default_mode { } {
4098 return [check_configured_with "with-mode="]
4101 # Return 1 if this is an ARM target where -marm causes ARM to be
4104 proc check_effective_target_arm_arm_ok { } {
4105 return [check_no_compiler_messages arm_arm_ok assembly {
4106 #if !defined (__arm__) || defined (__thumb__) || defined (__thumb2__)
4107 #error !__arm__ || __thumb__ || __thumb2__
4113 # Return 1 is this is an ARM target where -mthumb causes Thumb-1 to be
4116 proc check_effective_target_arm_thumb1_ok { } {
4117 return [check_no_compiler_messages arm_thumb1_ok assembly {
4118 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
4119 #error !__arm__ || !__thumb__ || __thumb2__
4121 int foo (int i) { return i; }
4125 # Return 1 is this is an ARM target where -mthumb causes Thumb-2 to be
4128 proc check_effective_target_arm_thumb2_ok { } {
4129 return [check_no_compiler_messages arm_thumb2_ok assembly {
4130 #if !defined(__thumb2__)
4133 int foo (int i) { return i; }
4137 # Return 1 if this is an ARM target where Thumb-1 is used without options
4138 # added by the test.
4140 proc check_effective_target_arm_thumb1 { } {
4141 return [check_no_compiler_messages arm_thumb1 assembly {
4142 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
4143 #error !__arm__ || !__thumb__ || __thumb2__
4149 # Return 1 if this is an ARM target where Thumb-2 is used without options
4150 # added by the test.
4152 proc check_effective_target_arm_thumb2 { } {
4153 return [check_no_compiler_messages arm_thumb2 assembly {
4154 #if !defined(__thumb2__)
4161 # Return 1 if this is an ARM target where conditional execution is available.
4163 proc check_effective_target_arm_cond_exec { } {
4164 return [check_no_compiler_messages arm_cond_exec assembly {
4165 #if defined(__arm__) && defined(__thumb__) && !defined(__thumb2__)
4172 # Return 1 if this is an ARM cortex-M profile cpu
4174 proc check_effective_target_arm_cortex_m { } {
4175 if { ![istarget arm*-*-*] } {
4178 return [check_no_compiler_messages arm_cortex_m assembly {
4179 #if defined(__ARM_ARCH_ISA_ARM)
4180 #error __ARM_ARCH_ISA_ARM is defined
4186 # Return 1 if this is an ARM target where -mthumb causes Thumb-1 to be
4187 # used and MOVT/MOVW instructions to be available.
4189 proc check_effective_target_arm_thumb1_movt_ok {} {
4190 if [check_effective_target_arm_thumb1_ok] {
4191 return [check_no_compiler_messages arm_movt object {
4195 asm ("movt r0, #42");
4203 # Return 1 if this is an ARM target where -mthumb causes Thumb-1 to be
4204 # used and CBZ and CBNZ instructions are available.
4206 proc check_effective_target_arm_thumb1_cbz_ok {} {
4207 if [check_effective_target_arm_thumb1_ok] {
4208 return [check_no_compiler_messages arm_movt object {
4212 asm ("cbz r0, 2f\n2:");
4220 # Return 1 if this is an ARM target where ARMv8-M Security Extensions is
4223 proc check_effective_target_arm_cmse_ok {} {
4224 return [check_no_compiler_messages arm_cmse object {
4233 # Return 1 if this compilation turns on string_ops_prefer_neon on.
4235 proc check_effective_target_arm_tune_string_ops_prefer_neon { } {
4236 return [check_no_messages_and_pattern arm_tune_string_ops_prefer_neon "@string_ops_prefer_neon:\t1" assembly {
4237 int foo (void) { return 0; }
4238 } "-O2 -mprint-tune-info" ]
4241 # Return 1 if the target supports executing NEON instructions, 0
4242 # otherwise. Cache the result.
4244 proc check_effective_target_arm_neon_hw { } {
4245 return [check_runtime arm_neon_hw_available {
4249 long long a = 0, b = 1;
4250 asm ("vorr %P0, %P1, %P2"
4252 : "0" (a), "w" (b));
4255 } [add_options_for_arm_neon ""]]
4258 proc check_effective_target_arm_neonv2_hw { } {
4259 return [check_runtime arm_neon_hwv2_available {
4260 #include "arm_neon.h"
4264 float32x2_t a, b, c;
4265 asm ("vfma.f32 %P0, %P1, %P2"
4267 : "w" (b), "w" (c));
4270 } [add_options_for_arm_neonv2 ""]]
4273 # Return 1 if the target supports the ARMv8.1 Adv.SIMD extension, 0
4274 # otherwise. The test is valid for AArch64 and ARM. Record the command
4275 # line options needed.
4277 proc check_effective_target_arm_v8_1a_neon_ok_nocache { } {
4278 global et_arm_v8_1a_neon_flags
4279 set et_arm_v8_1a_neon_flags ""
4281 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
4285 # Iterate through sets of options to find the compiler flags that
4286 # need to be added to the -march option. Start with the empty set
4287 # since AArch64 only needs the -march setting.
4288 foreach flags {"" "-mfpu=neon-fp-armv8" "-mfloat-abi=softfp" \
4289 "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
4290 foreach arches { "-march=armv8-a+rdma" "-march=armv8.1-a" } {
4291 if { [check_no_compiler_messages_nocache arm_v8_1a_neon_ok object {
4292 #if !defined (__ARM_FEATURE_QRDMX)
4293 #error "__ARM_FEATURE_QRDMX not defined"
4295 } "$flags $arches"] } {
4296 set et_arm_v8_1a_neon_flags "$flags $arches"
4305 proc check_effective_target_arm_v8_1a_neon_ok { } {
4306 return [check_cached_effective_target arm_v8_1a_neon_ok \
4307 check_effective_target_arm_v8_1a_neon_ok_nocache]
4310 # Return 1 if the target supports ARMv8.2 scalar FP16 arithmetic
4311 # instructions, 0 otherwise. The test is valid for ARM and for AArch64.
4312 # Record the command line options needed.
4314 proc check_effective_target_arm_v8_2a_fp16_scalar_ok_nocache { } {
4315 global et_arm_v8_2a_fp16_scalar_flags
4316 set et_arm_v8_2a_fp16_scalar_flags ""
4318 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
4322 # Iterate through sets of options to find the compiler flags that
4323 # need to be added to the -march option.
4324 foreach flags {"" "-mfpu=fp-armv8" "-mfloat-abi=softfp" \
4325 "-mfpu=fp-armv8 -mfloat-abi=softfp"} {
4326 if { [check_no_compiler_messages_nocache \
4327 arm_v8_2a_fp16_scalar_ok object {
4328 #if !defined (__ARM_FEATURE_FP16_SCALAR_ARITHMETIC)
4329 #error "__ARM_FEATURE_FP16_SCALAR_ARITHMETIC not defined"
4331 } "$flags -march=armv8.2-a+fp16"] } {
4332 set et_arm_v8_2a_fp16_scalar_flags "$flags -march=armv8.2-a+fp16"
4340 proc check_effective_target_arm_v8_2a_fp16_scalar_ok { } {
4341 return [check_cached_effective_target arm_v8_2a_fp16_scalar_ok \
4342 check_effective_target_arm_v8_2a_fp16_scalar_ok_nocache]
4345 # Return 1 if the target supports ARMv8.2 Adv.SIMD FP16 arithmetic
4346 # instructions, 0 otherwise. The test is valid for ARM and for AArch64.
4347 # Record the command line options needed.
4349 proc check_effective_target_arm_v8_2a_fp16_neon_ok_nocache { } {
4350 global et_arm_v8_2a_fp16_neon_flags
4351 set et_arm_v8_2a_fp16_neon_flags ""
4353 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
4357 # Iterate through sets of options to find the compiler flags that
4358 # need to be added to the -march option.
4359 foreach flags {"" "-mfpu=neon-fp-armv8" "-mfloat-abi=softfp" \
4360 "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
4361 if { [check_no_compiler_messages_nocache \
4362 arm_v8_2a_fp16_neon_ok object {
4363 #if !defined (__ARM_FEATURE_FP16_VECTOR_ARITHMETIC)
4364 #error "__ARM_FEATURE_FP16_VECTOR_ARITHMETIC not defined"
4366 } "$flags -march=armv8.2-a+fp16"] } {
4367 set et_arm_v8_2a_fp16_neon_flags "$flags -march=armv8.2-a+fp16"
4375 proc check_effective_target_arm_v8_2a_fp16_neon_ok { } {
4376 return [check_cached_effective_target arm_v8_2a_fp16_neon_ok \
4377 check_effective_target_arm_v8_2a_fp16_neon_ok_nocache]
4380 # Return 1 if the target supports ARMv8.2 Adv.SIMD Dot Product
4381 # instructions, 0 otherwise. The test is valid for ARM and for AArch64.
4382 # Record the command line options needed.
4384 proc check_effective_target_arm_v8_2a_dotprod_neon_ok_nocache { } {
4385 global et_arm_v8_2a_dotprod_neon_flags
4386 set et_arm_v8_2a_dotprod_neon_flags ""
4388 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
4392 # Iterate through sets of options to find the compiler flags that
4393 # need to be added to the -march option.
4394 foreach flags {"" "-mfloat-abi=softfp -mfpu=neon-fp-armv8" "-mfloat-abi=hard -mfpu=neon-fp-armv8"} {
4395 if { [check_no_compiler_messages_nocache \
4396 arm_v8_2a_dotprod_neon_ok object {
4397 #if !defined (__ARM_FEATURE_DOTPROD)
4398 #error "__ARM_FEATURE_DOTPROD not defined"
4400 } "$flags -march=armv8.2-a+dotprod"] } {
4401 set et_arm_v8_2a_dotprod_neon_flags "$flags -march=armv8.2-a+dotprod"
4409 proc check_effective_target_arm_v8_2a_dotprod_neon_ok { } {
4410 return [check_cached_effective_target arm_v8_2a_dotprod_neon_ok \
4411 check_effective_target_arm_v8_2a_dotprod_neon_ok_nocache]
4414 proc add_options_for_arm_v8_2a_dotprod_neon { flags } {
4415 if { ! [check_effective_target_arm_v8_2a_dotprod_neon_ok] } {
4418 global et_arm_v8_2a_dotprod_neon_flags
4419 return "$flags $et_arm_v8_2a_dotprod_neon_flags"
4422 # Return 1 if the target supports executing ARMv8 NEON instructions, 0
4425 proc check_effective_target_arm_v8_neon_hw { } {
4426 return [check_runtime arm_v8_neon_hw_available {
4427 #include "arm_neon.h"
4431 float32x2_t a = { 1.0f, 2.0f };
4432 #ifdef __ARM_ARCH_ISA_A64
4433 asm ("frinta %0.2s, %1.2s"
4437 asm ("vrinta.f32 %P0, %P1"
4441 return a[0] == 2.0f;
4443 } [add_options_for_arm_v8_neon ""]]
4446 # Return 1 if the target supports executing the ARMv8.1 Adv.SIMD extension, 0
4447 # otherwise. The test is valid for AArch64 and ARM.
4449 proc check_effective_target_arm_v8_1a_neon_hw { } {
4450 if { ![check_effective_target_arm_v8_1a_neon_ok] } {
4453 return [check_runtime arm_v8_1a_neon_hw_available {
4457 #ifdef __ARM_ARCH_ISA_A64
4458 __Int32x2_t a = {0, 1};
4459 __Int32x2_t b = {0, 2};
4462 asm ("sqrdmlah %0.2s, %1.2s, %2.2s"
4465 : /* No clobbers. */);
4469 __simd64_int32_t a = {0, 1};
4470 __simd64_int32_t b = {0, 2};
4471 __simd64_int32_t result;
4473 asm ("vqrdmlah.s32 %P0, %P1, %P2"
4476 : /* No clobbers. */);
4481 } [add_options_for_arm_v8_1a_neon ""]]
4484 # Return 1 if the target supports executing floating point instructions from
4485 # ARMv8.2 with the FP16 extension, 0 otherwise. The test is valid for ARM and
4488 proc check_effective_target_arm_v8_2a_fp16_scalar_hw { } {
4489 if { ![check_effective_target_arm_v8_2a_fp16_scalar_ok] } {
4492 return [check_runtime arm_v8_2a_fp16_scalar_hw_available {
4499 #ifdef __ARM_ARCH_ISA_A64
4501 asm ("fabs %h0, %h1"
4504 : /* No clobbers. */);
4508 asm ("vabs.f16 %0, %1"
4511 : /* No clobbers. */);
4515 return (result == 1.0) ? 0 : 1;
4517 } [add_options_for_arm_v8_2a_fp16_scalar ""]]
4520 # Return 1 if the target supports executing Adv.SIMD instructions from ARMv8.2
4521 # with the FP16 extension, 0 otherwise. The test is valid for ARM and for
4524 proc check_effective_target_arm_v8_2a_fp16_neon_hw { } {
4525 if { ![check_effective_target_arm_v8_2a_fp16_neon_ok] } {
4528 return [check_runtime arm_v8_2a_fp16_neon_hw_available {
4532 #ifdef __ARM_ARCH_ISA_A64
4534 __Float16x4_t a = {1.0, -1.0, 1.0, -1.0};
4535 __Float16x4_t result;
4537 asm ("fabs %0.4h, %1.4h"
4540 : /* No clobbers. */);
4544 __simd64_float16_t a = {1.0, -1.0, 1.0, -1.0};
4545 __simd64_float16_t result;
4547 asm ("vabs.f16 %P0, %P1"
4550 : /* No clobbers. */);
4554 return (result[0] == 1.0) ? 0 : 1;
4556 } [add_options_for_arm_v8_2a_fp16_neon ""]]
4559 # Return 1 if the target supports executing AdvSIMD instructions from ARMv8.2
4560 # with the Dot Product extension, 0 otherwise. The test is valid for ARM and for
4563 proc check_effective_target_arm_v8_2a_dotprod_neon_hw { } {
4564 if { ![check_effective_target_arm_v8_2a_dotprod_neon_ok] } {
4567 return [check_runtime arm_v8_2a_dotprod_neon_hw_available {
4568 #include "arm_neon.h"
4573 uint32x2_t results = {0,0};
4574 uint8x8_t a = {1,1,1,1,2,2,2,2};
4575 uint8x8_t b = {2,2,2,2,3,3,3,3};
4577 #ifdef __ARM_ARCH_ISA_A64
4578 asm ("udot %0.2s, %1.8b, %2.8b"
4581 : /* No clobbers. */);
4584 asm ("vudot.u8 %P0, %P1, %P2"
4587 : /* No clobbers. */);
4590 return (results[0] == 8 && results[1] == 24) ? 1 : 0;
4592 } [add_options_for_arm_v8_2a_dotprod_neon ""]]
4595 # Return 1 if this is a ARM target with NEON enabled.
4597 proc check_effective_target_arm_neon { } {
4598 if { [check_effective_target_arm32] } {
4599 return [check_no_compiler_messages arm_neon object {
4600 #ifndef __ARM_NEON__
4611 proc check_effective_target_arm_neonv2 { } {
4612 if { [check_effective_target_arm32] } {
4613 return [check_no_compiler_messages arm_neon object {
4614 #ifndef __ARM_NEON__
4617 #ifndef __ARM_FEATURE_FMA
4629 # Return 1 if this is an ARM target with load acquire and store release
4630 # instructions for 8-, 16- and 32-bit types.
4632 proc check_effective_target_arm_acq_rel { } {
4633 return [check_no_compiler_messages arm_acq_rel object {
4635 load_acquire_store_release (void)
4637 asm ("lda r0, [r1]\n\t"
4643 : : : "r0", "memory");
4648 # Add the options needed for MIPS Paired-Single.
4650 proc add_options_for_mpaired_single { flags } {
4651 if { ! [check_effective_target_mpaired_single] } {
4654 return "$flags -mpaired-single"
4657 # Add the options needed for MIPS SIMD Architecture.
4659 proc add_options_for_mips_msa { flags } {
4660 if { ! [check_effective_target_mips_msa] } {
4663 return "$flags -mmsa"
4666 # Return 1 if this a Loongson-2E or -2F target using an ABI that supports
4667 # the Loongson vector modes.
4669 proc check_effective_target_mips_loongson { } {
4670 return [check_no_compiler_messages loongson assembly {
4671 #if !defined(__mips_loongson_vector_rev)
4672 #error !__mips_loongson_vector_rev
4677 # Return 1 if this is a MIPS target that supports the legacy NAN.
4679 proc check_effective_target_mips_nanlegacy { } {
4680 return [check_no_compiler_messages nanlegacy assembly {
4682 int main () { return 0; }
4686 # Return 1 if an MSA program can be compiled to object
4688 proc check_effective_target_mips_msa { } {
4689 if ![check_effective_target_nomips16] {
4692 return [check_no_compiler_messages msa object {
4693 #if !defined(__mips_msa)
4694 #error "MSA NOT AVAIL"
4696 #if !(((__mips == 64) || (__mips == 32)) && (__mips_isa_rev >= 2))
4697 #error "MSA NOT AVAIL FOR ISA REV < 2"
4699 #if !defined(__mips_hard_float)
4700 #error "MSA HARD_FLOAT REQUIRED"
4702 #if __mips_fpr != 64
4703 #error "MSA 64-bit FPR REQUIRED"
4709 v8i16 v = __builtin_msa_ldi_h (1);
4717 # Return 1 if this is an ARM target that adheres to the ABI for the ARM
4720 proc check_effective_target_arm_eabi { } {
4721 return [check_no_compiler_messages arm_eabi object {
4722 #ifndef __ARM_EABI__
4730 # Return 1 if this is an ARM target that adheres to the hard-float variant of
4731 # the ABI for the ARM Architecture (e.g. -mfloat-abi=hard).
4733 proc check_effective_target_arm_hf_eabi { } {
4734 return [check_no_compiler_messages arm_hf_eabi object {
4735 #if !defined(__ARM_EABI__) || !defined(__ARM_PCS_VFP)
4736 #error not hard-float EABI
4743 # Return 1 if this is an ARM target supporting -mcpu=iwmmxt.
4744 # Some multilibs may be incompatible with this option.
4746 proc check_effective_target_arm_iwmmxt_ok { } {
4747 if { [check_effective_target_arm32] } {
4748 return [check_no_compiler_messages arm_iwmmxt_ok object {
4756 # Return true if LDRD/STRD instructions are prefered over LDM/STM instructions
4757 # for an ARM target.
4758 proc check_effective_target_arm_prefer_ldrd_strd { } {
4759 if { ![check_effective_target_arm32] } {
4763 return [check_no_messages_and_pattern arm_prefer_ldrd_strd "strd\tr" assembly {
4764 void foo (void) { __asm__ ("" ::: "r4", "r5"); }
4768 # Return 1 if this is a PowerPC target supporting -meabi.
4770 proc check_effective_target_powerpc_eabi_ok { } {
4771 if { [istarget powerpc*-*-*] } {
4772 return [check_no_compiler_messages powerpc_eabi_ok object {
4780 # Return 1 if this is a PowerPC target with floating-point registers.
4782 proc check_effective_target_powerpc_fprs { } {
4783 if { [istarget powerpc*-*-*]
4784 || [istarget rs6000-*-*] } {
4785 return [check_no_compiler_messages powerpc_fprs object {
4797 # Return 1 if this is a PowerPC target with hardware double-precision
4800 proc check_effective_target_powerpc_hard_double { } {
4801 if { [istarget powerpc*-*-*]
4802 || [istarget rs6000-*-*] } {
4803 return [check_no_compiler_messages powerpc_hard_double object {
4815 # Return 1 if this is a PowerPC target supporting -maltivec.
4817 proc check_effective_target_powerpc_altivec_ok { } {
4818 if { ([istarget powerpc*-*-*]
4819 && ![istarget powerpc-*-linux*paired*])
4820 || [istarget rs6000-*-*] } {
4821 # AltiVec is not supported on AIX before 5.3.
4822 if { [istarget powerpc*-*-aix4*]
4823 || [istarget powerpc*-*-aix5.1*]
4824 || [istarget powerpc*-*-aix5.2*] } {
4827 return [check_no_compiler_messages powerpc_altivec_ok object {
4835 # Return 1 if this is a PowerPC target supporting -mpower8-vector
4837 proc check_effective_target_powerpc_p8vector_ok { } {
4838 if { ([istarget powerpc*-*-*]
4839 && ![istarget powerpc-*-linux*paired*])
4840 || [istarget rs6000-*-*] } {
4841 # AltiVec is not supported on AIX before 5.3.
4842 if { [istarget powerpc*-*-aix4*]
4843 || [istarget powerpc*-*-aix5.1*]
4844 || [istarget powerpc*-*-aix5.2*] } {
4847 return [check_no_compiler_messages powerpc_p8vector_ok object {
4850 asm volatile ("xxlorc vs0,vs0,vs0");
4852 asm volatile ("xxlorc 0,0,0");
4856 } "-mpower8-vector"]
4862 # Return 1 if this is a PowerPC target supporting -mpower9-vector
4864 proc check_effective_target_powerpc_p9vector_ok { } {
4865 if { ([istarget powerpc*-*-*]
4866 && ![istarget powerpc-*-linux*paired*])
4867 || [istarget rs6000-*-*] } {
4868 # AltiVec is not supported on AIX before 5.3.
4869 if { [istarget powerpc*-*-aix4*]
4870 || [istarget powerpc*-*-aix5.1*]
4871 || [istarget powerpc*-*-aix5.2*] } {
4874 return [check_no_compiler_messages powerpc_p9vector_ok object {
4877 vector double v = (vector double) { 0.0, 0.0 };
4878 asm ("xsxexpdp %0,%1" : "+r" (e) : "wa" (v));
4881 } "-mpower9-vector"]
4887 # Return 1 if this is a PowerPC target supporting -mmodulo
4889 proc check_effective_target_powerpc_p9modulo_ok { } {
4890 if { ([istarget powerpc*-*-*]
4891 && ![istarget powerpc-*-linux*paired*])
4892 || [istarget rs6000-*-*] } {
4893 # AltiVec is not supported on AIX before 5.3.
4894 if { [istarget powerpc*-*-aix4*]
4895 || [istarget powerpc*-*-aix5.1*]
4896 || [istarget powerpc*-*-aix5.2*] } {
4899 return [check_no_compiler_messages powerpc_p9modulo_ok object {
4901 int i = 5, j = 3, r = -1;
4902 asm ("modsw %0,%1,%2" : "+r" (r) : "r" (i), "r" (j));
4911 # Return 1 if this is a PowerPC target supporting -mfloat128 via either
4912 # software emulation on power7/power8 systems or hardware support on power9.
4914 proc check_effective_target_powerpc_float128_sw_ok { } {
4915 if { ([istarget powerpc*-*-*]
4916 && ![istarget powerpc-*-linux*paired*])
4917 || [istarget rs6000-*-*] } {
4918 # AltiVec is not supported on AIX before 5.3.
4919 if { [istarget powerpc*-*-aix4*]
4920 || [istarget powerpc*-*-aix5.1*]
4921 || [istarget powerpc*-*-aix5.2*] } {
4924 return [check_no_compiler_messages powerpc_float128_sw_ok object {
4925 volatile __float128 x = 1.0q;
4926 volatile __float128 y = 2.0q;
4928 __float128 z = x + y;
4931 } "-mfloat128 -mvsx"]
4937 # Return 1 if this is a PowerPC target supporting -mfloat128 via hardware
4938 # support on power9.
4940 proc check_effective_target_powerpc_float128_hw_ok { } {
4941 if { ([istarget powerpc*-*-*]
4942 && ![istarget powerpc-*-linux*paired*])
4943 || [istarget rs6000-*-*] } {
4944 # AltiVec is not supported on AIX before 5.3.
4945 if { [istarget powerpc*-*-aix4*]
4946 || [istarget powerpc*-*-aix5.1*]
4947 || [istarget powerpc*-*-aix5.2*] } {
4950 return [check_no_compiler_messages powerpc_float128_hw_ok object {
4951 volatile __float128 x = 1.0q;
4952 volatile __float128 y = 2.0q;
4955 __asm__ ("xsaddqp %0,%1,%2" : "=v" (z) : "v" (x), "v" (y));
4958 } "-mfloat128-hardware"]
4964 # Return 1 if this is a PowerPC target supporting -mvsx
4966 proc check_effective_target_powerpc_vsx_ok { } {
4967 if { ([istarget powerpc*-*-*]
4968 && ![istarget powerpc-*-linux*paired*])
4969 || [istarget rs6000-*-*] } {
4970 # VSX is not supported on AIX before 7.1.
4971 if { [istarget powerpc*-*-aix4*]
4972 || [istarget powerpc*-*-aix5*]
4973 || [istarget powerpc*-*-aix6*] } {
4976 return [check_no_compiler_messages powerpc_vsx_ok object {
4979 asm volatile ("xxlor vs0,vs0,vs0");
4981 asm volatile ("xxlor 0,0,0");
4991 # Return 1 if this is a PowerPC target supporting -mhtm
4993 proc check_effective_target_powerpc_htm_ok { } {
4994 if { ([istarget powerpc*-*-*]
4995 && ![istarget powerpc-*-linux*paired*])
4996 || [istarget rs6000-*-*] } {
4997 # HTM is not supported on AIX yet.
4998 if { [istarget powerpc*-*-aix*] } {
5001 return [check_no_compiler_messages powerpc_htm_ok object {
5003 asm volatile ("tbegin. 0");
5012 # Return 1 if the target supports executing HTM hardware instructions,
5013 # 0 otherwise. Cache the result.
5015 proc check_htm_hw_available { } {
5016 return [check_cached_effective_target htm_hw_available {
5017 # For now, disable on Darwin
5018 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
5021 check_runtime_nocache htm_hw_available {
5031 # Return 1 if this is a PowerPC target supporting -mcpu=cell.
5033 proc check_effective_target_powerpc_ppu_ok { } {
5034 if [check_effective_target_powerpc_altivec_ok] {
5035 return [check_no_compiler_messages cell_asm_available object {
5038 asm volatile ("lvlx v0,v0,v0");
5040 asm volatile ("lvlx 0,0,0");
5050 # Return 1 if this is a PowerPC target that supports SPU.
5052 proc check_effective_target_powerpc_spu { } {
5053 if { [istarget powerpc*-*-linux*] } {
5054 return [check_effective_target_powerpc_altivec_ok]
5060 # Return 1 if this is a PowerPC SPE target. The check includes options
5061 # specified by dg-options for this test, so don't
cache the result.
5063 proc check_effective_target_powerpc_spe_nocache
{ } {
5064 if { [istarget powerpc
*-*-*] } {
5065 return [check_no_compiler_messages_nocache powerpc_spe object
{
5071 } [current_compiler_flags
]]
5077 #
Return 1 if this is a PowerPC target with SPE enabled.
5079 proc check_effective_target_powerpc_spe
{ } {
5080 if { [istarget powerpc
*-*-*] } {
5081 return [check_no_compiler_messages powerpc_spe object
{
5093 #
Return 1 if this is a PowerPC target with Altivec enabled.
5095 proc check_effective_target_powerpc_altivec
{ } {
5096 if { [istarget powerpc
*-*-*] } {
5097 return [check_no_compiler_messages powerpc_altivec object
{
5109 #
Return 1 if this is a PowerPC
405 target. The check includes options
5110 # specified by dg
-options
for this test
, so don
't cache the result.
5112 proc check_effective_target_powerpc_405_nocache { } {
5113 if { [istarget powerpc*-*-*] || [istarget rs6000-*-*] } {
5114 return [check_no_compiler_messages_nocache powerpc_405 object {
5120 } [current_compiler_flags]]
5126 # Return 1 if this is a PowerPC target using the ELFv2 ABI.
5128 proc check_effective_target_powerpc_elfv2 { } {
5129 if { [istarget powerpc*-*-*] } {
5130 return [check_no_compiler_messages powerpc_elfv2 object {
5132 #error not ELF v2 ABI
5142 # Return 1 if this is a SPU target with a toolchain that
5143 # supports automatic overlay generation.
5145 proc check_effective_target_spu_auto_overlay { } {
5146 if { [istarget spu*-*-elf*] } {
5147 return [check_no_compiler_messages spu_auto_overlay executable {
5149 } "-Wl,--auto-overlay" ]
5155 # The VxWorks SPARC simulator accepts only EM_SPARC executables and
5156 # chokes on EM_SPARC32PLUS or EM_SPARCV9 executables. Return 1 if the
5157 # test environment appears to run executables on such a simulator.
5159 proc check_effective_target_ultrasparc_hw { } {
5160 return [check_runtime ultrasparc_hw {
5161 int main() { return 0; }
5162 } "-mcpu=ultrasparc"]
5165 # Return 1 if the test environment supports executing UltraSPARC VIS2
5166 # instructions. We check this by attempting: "bmask %g0, %g0, %g0"
5168 proc check_effective_target_ultrasparc_vis2_hw { } {
5169 return [check_runtime ultrasparc_vis2_hw {
5170 int main() { __asm__(".word 0x81b00320"); return 0; }
5171 } "-mcpu=ultrasparc3"]
5174 # Return 1 if the test environment supports executing UltraSPARC VIS3
5175 # instructions. We check this by attempting: "addxc %g0, %g0, %g0"
5177 proc check_effective_target_ultrasparc_vis3_hw { } {
5178 return [check_runtime ultrasparc_vis3_hw {
5179 int main() { __asm__(".word 0x81b00220"); return 0; }
5183 # Return 1 if this is a SPARC-V9 target.
5185 proc check_effective_target_sparc_v9 { } {
5186 if { [istarget sparc*-*-*] } {
5187 return [check_no_compiler_messages sparc_v9 object {
5189 asm volatile ("return %i7+8");
5198 # Return 1 if this is a SPARC target with VIS enabled.
5200 proc check_effective_target_sparc_vis { } {
5201 if { [istarget sparc*-*-*] } {
5202 return [check_no_compiler_messages sparc_vis object {
5214 # Return 1 if the target supports hardware vector shift operation.
5216 proc check_effective_target_vect_shift { } {
5217 global et_vect_shift_saved
5220 if [info exists et_vect_shift_saved($et_index)] {
5221 verbose "check_effective_target_vect_shift: using cached result" 2
5223 set et_vect_shift_saved($et_index) 0
5224 if { ([istarget powerpc*-*-*]
5225 && ![istarget powerpc-*-linux*paired*])
5226 || [istarget ia64-*-*]
5227 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5228 || [istarget aarch64*-*-*]
5229 || [is-effective-target arm_neon]
5230 || ([istarget mips*-*-*]
5231 && ([et-is-effective-target mips_msa]
5232 || [et-is-effective-target mips_loongson]))
5233 || ([istarget s390*-*-*]
5234 && [check_effective_target_s390_vx]) } {
5235 set et_vect_shift_saved($et_index) 1
5239 verbose "check_effective_target_vect_shift:\
5240 returning $et_vect_shift_saved($et_index)" 2
5241 return $et_vect_shift_saved($et_index)
5244 proc check_effective_target_whole_vector_shift { } {
5245 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
5246 || [istarget ia64-*-*]
5247 || [istarget aarch64*-*-*]
5248 || [istarget powerpc64*-*-*]
5249 || ([is-effective-target arm_neon]
5250 && [check_effective_target_arm_little_endian])
5251 || ([istarget mips*-*-*]
5252 && [et-is-effective-target mips_loongson])
5253 || ([istarget s390*-*-*]
5254 && [check_effective_target_s390_vx]) } {
5260 verbose "check_effective_target_vect_long: returning $answer" 2
5264 # Return 1 if the target supports vector bswap operations.
5266 proc check_effective_target_vect_bswap { } {
5267 global et_vect_bswap_saved
5270 if [info exists et_vect_bswap_saved($et_index)] {
5271 verbose "check_effective_target_vect_bswap: using cached result" 2
5273 set et_vect_bswap_saved($et_index) 0
5274 if { [istarget aarch64*-*-*]
5275 || [is-effective-target arm_neon]
5277 set et_vect_bswap_saved($et_index) 1
5281 verbose "check_effective_target_vect_bswap:\
5282 returning $et_vect_bswap_saved($et_index)" 2
5283 return $et_vect_bswap_saved($et_index)
5286 # Return 1 if the target supports hardware vector shift operation for char.
5288 proc check_effective_target_vect_shift_char { } {
5289 global et_vect_shift_char_saved
5292 if [info exists et_vect_shift_char_saved($et_index)] {
5293 verbose "check_effective_target_vect_shift_char: using cached result" 2
5295 set et_vect_shift_char_saved($et_index) 0
5296 if { ([istarget powerpc*-*-*]
5297 && ![istarget powerpc-*-linux*paired*])
5298 || [is-effective-target arm_neon]
5299 || ([istarget mips*-*-*]
5300 && [et-is-effective-target mips_msa])
5301 || ([istarget s390*-*-*]
5302 && [check_effective_target_s390_vx]) } {
5303 set et_vect_shift_char_saved($et_index) 1
5307 verbose "check_effective_target_vect_shift_char:\
5308 returning $et_vect_shift_char_saved($et_index)" 2
5309 return $et_vect_shift_char_saved($et_index)
5312 # Return 1 if the target supports hardware vectors of long, 0 otherwise.
5314 # This can change for different subtargets so do not cache the result.
5316 proc check_effective_target_vect_long { } {
5317 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
5318 || (([istarget powerpc*-*-*]
5319 && ![istarget powerpc-*-linux*paired*])
5320 && [check_effective_target_ilp32])
5321 || [is-effective-target arm_neon]
5322 || ([istarget sparc*-*-*] && [check_effective_target_ilp32])
5323 || [istarget aarch64*-*-*]
5324 || ([istarget mips*-*-*]
5325 && [et-is-effective-target mips_msa])
5326 || ([istarget s390*-*-*]
5327 && [check_effective_target_s390_vx]) } {
5333 verbose "check_effective_target_vect_long: returning $answer" 2
5337 # Return 1 if the target supports hardware vectors of float, 0 otherwise.
5339 # This won't change
for different subtargets so
cache the result.
5341 proc check_effective_target_vect_float
{ } {
5342 global et_vect_float_saved
5345 if [info exists et_vect_float_saved
($et_index
)] {
5346 verbose
"check_effective_target_vect_float: using cached result" 2
5348 set et_vect_float_saved
($et_index
) 0
5349 if { [istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
5350 ||
[istarget powerpc
*-*-*]
5351 ||
[istarget spu
-*-*]
5352 ||
[istarget mips
-sde
-elf
]
5353 ||
[istarget mipsisa64
*-*-*]
5354 ||
[istarget ia64
-*-*]
5355 ||
[istarget aarch64
*-*-*]
5356 ||
([istarget mips
*-*-*]
5357 && [et
-is
-effective
-target mips_msa
])
5358 ||
[is
-effective
-target arm_neon
]
5359 ||
([istarget s390
*-*-*]
5360 && [check_effective_target_s390_vxe
]) } {
5361 set et_vect_float_saved
($et_index
) 1
5365 verbose
"check_effective_target_vect_float:\
5366 returning $et_vect_float_saved
($et_index
)" 2
5367 return $et_vect_float_saved
($et_index
)
5370 #
Return 1 if the target supports hardware vectors of double
, 0 otherwise.
5372 # This won
't change for different subtargets so cache the result.
5374 proc check_effective_target_vect_double { } {
5375 global et_vect_double_saved
5378 if [info exists et_vect_double_saved($et_index)] {
5379 verbose "check_effective_target_vect_double: using cached result" 2
5381 set et_vect_double_saved($et_index) 0
5382 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
5383 && [check_no_compiler_messages vect_double assembly {
5384 #ifdef __tune_atom__
5385 # error No double vectorizer support.
5388 || [istarget aarch64*-*-*]
5389 || [istarget spu-*-*]
5390 || ([istarget powerpc*-*-*] && [check_vsx_hw_available])
5391 || ([istarget mips*-*-*]
5392 && [et-is-effective-target mips_msa])
5393 || ([istarget s390*-*-*]
5394 && [check_effective_target_s390_vx]) } {
5395 set et_vect_double_saved($et_index) 1
5399 verbose "check_effective_target_vect_double:\
5400 returning $et_vect_double_saved($et_index)" 2
5401 return $et_vect_double_saved($et_index)
5404 # Return 1 if the target supports hardware vectors of long long, 0 otherwise.
5406 # This won't change
for different subtargets so
cache the result.
5408 proc check_effective_target_vect_long_long
{ } {
5409 global et_vect_long_long_saved
5412 if [info exists et_vect_long_long_saved
($et_index
)] {
5413 verbose
"check_effective_target_vect_long_long: using cached result" 2
5415 set et_vect_long_long_saved
($et_index
) 0
5416 if { [istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
5417 ||
([istarget mips
*-*-*]
5418 && [et
-is
-effective
-target mips_msa
])
5419 ||
([istarget s390
*-*-*]
5420 && [check_effective_target_s390_vx
]) } {
5421 set et_vect_long_long_saved
($et_index
) 1
5425 verbose
"check_effective_target_vect_long_long:\
5426 returning $et_vect_long_long_saved
($et_index
)" 2
5427 return $et_vect_long_long_saved
($et_index
)
5431 #
Return 1 if the target plus current options does not support a vector
5432 #
max instruction
on "int", 0 otherwise.
5434 # This won
't change for different subtargets so cache the result.
5436 proc check_effective_target_vect_no_int_min_max { } {
5437 global et_vect_no_int_min_max_saved
5440 if [info exists et_vect_no_int_min_max_saved($et_index)] {
5441 verbose "check_effective_target_vect_no_int_min_max:\
5442 using cached result" 2
5444 set et_vect_no_int_min_max_saved($et_index) 0
5445 if { [istarget sparc*-*-*]
5446 || [istarget spu-*-*]
5447 || [istarget alpha*-*-*]
5448 || ([istarget mips*-*-*]
5449 && [et-is-effective-target mips_loongson]) } {
5450 set et_vect_no_int_min_max_saved($et_index) 1
5453 verbose "check_effective_target_vect_no_int_min_max:\
5454 returning $et_vect_no_int_min_max_saved($et_index)" 2
5455 return $et_vect_no_int_min_max_saved($et_index)
5458 # Return 1 if the target plus current options does not support a vector
5459 # add instruction on "int", 0 otherwise.
5461 # This won't change
for different subtargets so
cache the result.
5463 proc check_effective_target_vect_no_int_add
{ } {
5464 global et_vect_no_int_add_saved
5467 if [info exists et_vect_no_int_add_saved
($et_index
)] {
5468 verbose
"check_effective_target_vect_no_int_add: using cached result" 2
5470 set et_vect_no_int_add_saved
($et_index
) 0
5471 # Alpha only supports vector add
on V8QI and V4HI.
5472 if { [istarget alpha
*-*-*] } {
5473 set et_vect_no_int_add_saved
($et_index
) 1
5476 verbose
"check_effective_target_vect_no_int_add:\
5477 returning $et_vect_no_int_add_saved
($et_index
)" 2
5478 return $et_vect_no_int_add_saved
($et_index
)
5481 #
Return 1 if the target plus current options does not support vector
5482 # bitwise instructions
, 0 otherwise.
5484 # This won
't change for different subtargets so cache the result.
5486 proc check_effective_target_vect_no_bitwise { } {
5487 global et_vect_no_bitwise_saved
5490 if [info exists et_vect_no_bitwise_saved($et_index)] {
5491 verbose "check_effective_target_vect_no_bitwise: using cached result" 2
5493 set et_vect_no_bitwise_saved($et_index) 0
5495 verbose "check_effective_target_vect_no_bitwise:\
5496 returning $et_vect_no_bitwise_saved($et_index)" 2
5497 return $et_vect_no_bitwise_saved($et_index)
5500 # Return 1 if the target plus current options supports vector permutation,
5503 # This won't change
for different subtargets so
cache the result.
5505 proc check_effective_target_vect_perm
{ } {
5506 global et_vect_perm_saved
5509 if [info exists et_vect_perm_saved
($et_index
)] {
5510 verbose
"check_effective_target_vect_perm: using cached result" 2
5512 set et_vect_perm_saved
($et_index
) 0
5513 if { [is
-effective
-target arm_neon
]
5514 ||
[istarget aarch64
*-*-*]
5515 ||
[istarget powerpc
*-*-*]
5516 ||
[istarget spu
-*-*]
5517 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
5518 ||
([istarget mips
*-*-*]
5519 && ([et
-is
-effective
-target mpaired_single
]
5520 ||
[et
-is
-effective
-target mips_msa
]))
5521 ||
([istarget s390
*-*-*]
5522 && [check_effective_target_s390_vx
]) } {
5523 set et_vect_perm_saved
($et_index
) 1
5526 verbose
"check_effective_target_vect_perm:\
5527 returning $et_vect_perm_saved
($et_index
)" 2
5528 return $et_vect_perm_saved
($et_index
)
5531 #
Return 1 if, for some VF
:
5533 #
- the target
's default vector size is VF * ELEMENT_BITS bits
5535 # - it is possible to implement the equivalent of:
5537 # int<ELEMENT_BITS>_t s1[COUNT][COUNT * VF], s2[COUNT * VF];
5538 # for (int i = 0; i < COUNT; ++i)
5539 # for (int j = 0; j < COUNT * VF; ++j)
5540 # s1[i][j] = s2[j - j % COUNT + i]
5542 # using only a single 2-vector permute for each vector in s1.
5544 # E.g. for COUNT == 3 and vector length 4, the two arrays would be:
5546 # s2 | a0 a1 a2 a3 | b0 b1 b2 b3 | c0 c1 c2 c3
5547 # ------+-------------+-------------+------------
5548 # s1[0] | a0 a0 a0 a3 | a3 a3 b2 b2 | b2 c1 c1 c1
5549 # s1[1] | a1 a1 a1 b0 | b0 b0 b3 b3 | b3 c2 c2 c2
5550 # s1[2] | a2 a2 a2 b1 | b1 b1 c0 c0 | c0 c3 c3 c3
5552 # Each s1 permute requires only two of a, b and c.
5554 # The distance between the start of vector n in s1[0] and the start
5555 # of vector n in s2 is:
5557 # A = (n * VF) % COUNT
5559 # The corresponding value for the end of vector n is:
5561 # B = (n * VF + VF - 1) % COUNT
5563 # Subtracting i from each value gives the corresponding difference
5564 # for s1[i]. The condition being tested by this function is false
5565 # iff A - i > 0 and B - i < 0 for some i and n, such that the first
5566 # element for s1[i] comes from vector n - 1 of s2 and the last element
5567 # comes from vector n + 1 of s2. The condition is therefore true iff
5568 # A <= B for all n. This is turn means the condition is true iff:
5570 # (n * VF) % COUNT + (VF - 1) % COUNT < COUNT
5572 # for all n. COUNT - (n * VF) % COUNT is bounded by gcd (VF, COUNT),
5573 # and will be that value for at least one n in [0, COUNT), so we want:
5575 # (VF - 1) % COUNT < gcd (VF, COUNT)
5577 proc vect_perm_supported { count element_bits } {
5578 set vector_bits [lindex [available_vector_sizes] 0]
5579 if { $vector_bits <= 0 } {
5582 set vf [expr { $vector_bits / $element_bits }]
5584 # Compute gcd (VF, COUNT).
5587 while { $temp1 > 0 } {
5588 set temp2 [expr { $gcd % $temp1 }]
5592 return [expr { ($vf - 1) % $count < $gcd }]
5595 # Return 1 if the target supports SLP permutation of 3 vectors when each
5596 # element has 32 bits.
5598 proc check_effective_target_vect_perm3_int { } {
5599 return [expr { [check_effective_target_vect_perm]
5600 && [vect_perm_supported 3 32] }]
5603 # Return 1 if the target plus current options supports vector permutation
5604 # on byte-sized elements, 0 otherwise.
5606 # This won't change
for different subtargets so
cache the result.
5608 proc check_effective_target_vect_perm_byte
{ } {
5609 global et_vect_perm_byte_saved
5612 if [info exists et_vect_perm_byte_saved
($et_index
)] {
5613 verbose
"check_effective_target_vect_perm_byte: using cached result" 2
5615 set et_vect_perm_byte_saved
($et_index
) 0
5616 if { ([is
-effective
-target arm_neon
]
5617 && [is
-effective
-target arm_little_endian
])
5618 ||
([istarget aarch64
*-*-*]
5619 && [is
-effective
-target aarch64_little_endian
])
5620 ||
[istarget powerpc
*-*-*]
5621 ||
[istarget spu
-*-*]
5622 ||
([istarget mips
-*.
*]
5623 && [et
-is
-effective
-target mips_msa
])
5624 ||
([istarget s390
*-*-*]
5625 && [check_effective_target_s390_vx
]) } {
5626 set et_vect_perm_byte_saved
($et_index
) 1
5629 verbose
"check_effective_target_vect_perm_byte:\
5630 returning $et_vect_perm_byte_saved
($et_index
)" 2
5631 return $et_vect_perm_byte_saved
($et_index
)
5634 #
Return 1 if the target supports SLP permutation of
3 vectors when each
5635 # element has
8 bits.
5637 proc check_effective_target_vect_perm3_byte
{ } {
5638 return [expr
{ [check_effective_target_vect_perm_byte
]
5639 && [vect_perm_supported
3 8] }]
5642 #
Return 1 if the target plus current options supports vector permutation
5643 #
on short
-sized elements
, 0 otherwise.
5645 # This won
't change for different subtargets so cache the result.
5647 proc check_effective_target_vect_perm_short { } {
5648 global et_vect_perm_short_saved
5651 if [info exists et_vect_perm_short_saved($et_index)] {
5652 verbose "check_effective_target_vect_perm_short: using cached result" 2
5654 set et_vect_perm_short_saved($et_index) 0
5655 if { ([is-effective-target arm_neon]
5656 && [is-effective-target arm_little_endian])
5657 || ([istarget aarch64*-*-*]
5658 && [is-effective-target aarch64_little_endian])
5659 || [istarget powerpc*-*-*]
5660 || [istarget spu-*-*]
5661 || ([istarget mips*-*-*]
5662 && [et-is-effective-target mips_msa])
5663 || ([istarget s390*-*-*]
5664 && [check_effective_target_s390_vx]) } {
5665 set et_vect_perm_short_saved($et_index) 1
5668 verbose "check_effective_target_vect_perm_short:\
5669 returning $et_vect_perm_short_saved($et_index)" 2
5670 return $et_vect_perm_short_saved($et_index)
5673 # Return 1 if the target supports SLP permutation of 3 vectors when each
5674 # element has 16 bits.
5676 proc check_effective_target_vect_perm3_short { } {
5677 return [expr { [check_effective_target_vect_perm_short]
5678 && [vect_perm_supported 3 16] }]
5681 # Return 1 if the target plus current options supports folding of
5682 # copysign into XORSIGN.
5684 # This won't change
for different subtargets so
cache the result.
5686 proc check_effective_target_xorsign
{ } {
5687 global et_xorsign_saved
5690 if [info exists et_xorsign_saved
($et_index
)] {
5691 verbose
"check_effective_target_xorsign: using cached result" 2
5693 set et_xorsign_saved
($et_index
) 0
5694 if { [istarget aarch64
*-*-*] ||
[istarget arm
*-*-*] } {
5695 set et_xorsign_saved
($et_index
) 1
5698 verbose
"check_effective_target_xorsign:\
5699 returning $et_xorsign_saved
($et_index
)" 2
5700 return $et_xorsign_saved
($et_index
)
5703 #
Return 1 if the target plus current options supports a vector
5704 # widening summation of
*short
* args into
*int* result
, 0 otherwise.
5706 # This won
't change for different subtargets so cache the result.
5708 proc check_effective_target_vect_widen_sum_hi_to_si_pattern { } {
5709 global et_vect_widen_sum_hi_to_si_pattern_saved
5712 if [info exists et_vect_widen_sum_hi_to_si_pattern_saved($et_index)] {
5713 verbose "check_effective_target_vect_widen_sum_hi_to_si_pattern:\
5714 using cached result" 2
5716 set et_vect_widen_sum_hi_to_si_pattern_saved($et_index) 0
5717 if { [istarget powerpc*-*-*]
5718 || [istarget aarch64*-*-*]
5719 || [is-effective-target arm_neon]
5720 || [istarget ia64-*-*] } {
5721 set et_vect_widen_sum_hi_to_si_pattern_saved($et_index) 1
5724 verbose "check_effective_target_vect_widen_sum_hi_to_si_pattern:\
5725 returning $et_vect_widen_sum_hi_to_si_pattern_saved($et_index)" 2
5726 return $et_vect_widen_sum_hi_to_si_pattern_saved($et_index)
5729 # Return 1 if the target plus current options supports a vector
5730 # widening summation of *short* args into *int* result, 0 otherwise.
5731 # A target can also support this widening summation if it can support
5732 # promotion (unpacking) from shorts to ints.
5734 # This won't change
for different subtargets so
cache the result.
5736 proc check_effective_target_vect_widen_sum_hi_to_si
{ } {
5737 global et_vect_widen_sum_hi_to_si_saved
5740 if [info exists et_vect_widen_sum_hi_to_si_saved
($et_index
)] {
5741 verbose
"check_effective_target_vect_widen_sum_hi_to_si:\
5742 using cached result
" 2
5744 set et_vect_widen_sum_hi_to_si_saved
($et_index
) \
5745 [check_effective_target_vect_unpack
]
5746 if { [istarget powerpc
*-*-*]
5747 ||
[istarget ia64
-*-*] } {
5748 set et_vect_widen_sum_hi_to_si_saved
($et_index
) 1
5751 verbose
"check_effective_target_vect_widen_sum_hi_to_si:\
5752 returning $et_vect_widen_sum_hi_to_si_saved
($et_index
)" 2
5753 return $et_vect_widen_sum_hi_to_si_saved
($et_index
)
5756 #
Return 1 if the target plus current options supports a vector
5757 # widening summation of
*char
* args into
*short
* result
, 0 otherwise.
5758 # A target can also support this widening summation
if it can support
5759 # promotion
(unpacking
) from chars to shorts.
5761 # This won
't change for different subtargets so cache the result.
5763 proc check_effective_target_vect_widen_sum_qi_to_hi { } {
5764 global et_vect_widen_sum_qi_to_hi_saved
5767 if [info exists et_vect_widen_sum_qi_to_hi_saved($et_index)] {
5768 verbose "check_effective_target_vect_widen_sum_qi_to_hi:\
5769 using cached result" 2
5771 set et_vect_widen_sum_qi_to_hi_saved($et_index) 0
5772 if { [check_effective_target_vect_unpack]
5773 || [is-effective-target arm_neon]
5774 || [istarget ia64-*-*] } {
5775 set et_vect_widen_sum_qi_to_hi_saved($et_index) 1
5778 verbose "check_effective_target_vect_widen_sum_qi_to_hi:\
5779 returning $et_vect_widen_sum_qi_to_hi_saved($et_index)" 2
5780 return $et_vect_widen_sum_qi_to_hi_saved($et_index)
5783 # Return 1 if the target plus current options supports a vector
5784 # widening summation of *char* args into *int* result, 0 otherwise.
5786 # This won't change
for different subtargets so
cache the result.
5788 proc check_effective_target_vect_widen_sum_qi_to_si
{ } {
5789 global et_vect_widen_sum_qi_to_si_saved
5792 if [info exists et_vect_widen_sum_qi_to_si_saved
($et_index
)] {
5793 verbose
"check_effective_target_vect_widen_sum_qi_to_si:\
5794 using cached result
" 2
5796 set et_vect_widen_sum_qi_to_si_saved
($et_index
) 0
5797 if { [istarget powerpc
*-*-*] } {
5798 set et_vect_widen_sum_qi_to_si_saved
($et_index
) 1
5801 verbose
"check_effective_target_vect_widen_sum_qi_to_si:\
5802 returning $et_vect_widen_sum_qi_to_si_saved
($et_index
)" 2
5803 return $et_vect_widen_sum_qi_to_si_saved
($et_index
)
5806 #
Return 1 if the target plus current options supports a vector
5807 # widening multiplication of
*char
* args into
*short
* result
, 0 otherwise.
5808 # A target can also support this widening multplication
if it can support
5809 # promotion
(unpacking
) from chars to shorts
, and vect_short_mult
(non
-widening
5810 # multiplication of shorts
).
5812 # This won
't change for different subtargets so cache the result.
5815 proc check_effective_target_vect_widen_mult_qi_to_hi { } {
5816 global et_vect_widen_mult_qi_to_hi_saved
5819 if [info exists et_vect_widen_mult_qi_to_hi_saved($et_index)] {
5820 verbose "check_effective_target_vect_widen_mult_qi_to_hi:\
5821 using cached result" 2
5823 if { [check_effective_target_vect_unpack]
5824 && [check_effective_target_vect_short_mult] } {
5825 set et_vect_widen_mult_qi_to_hi_saved($et_index) 1
5827 set et_vect_widen_mult_qi_to_hi_saved($et_index) 0
5829 if { [istarget powerpc*-*-*]
5830 || [istarget aarch64*-*-*]
5831 || [is-effective-target arm_neon]
5832 || ([istarget s390*-*-*]
5833 && [check_effective_target_s390_vx]) } {
5834 set et_vect_widen_mult_qi_to_hi_saved($et_index) 1
5837 verbose "check_effective_target_vect_widen_mult_qi_to_hi:\
5838 returning $et_vect_widen_mult_qi_to_hi_saved($et_index)" 2
5839 return $et_vect_widen_mult_qi_to_hi_saved($et_index)
5842 # Return 1 if the target plus current options supports a vector
5843 # widening multiplication of *short* args into *int* result, 0 otherwise.
5844 # A target can also support this widening multplication if it can support
5845 # promotion (unpacking) from shorts to ints, and vect_int_mult (non-widening
5846 # multiplication of ints).
5848 # This won't change
for different subtargets so
cache the result.
5851 proc check_effective_target_vect_widen_mult_hi_to_si
{ } {
5852 global et_vect_widen_mult_hi_to_si_saved
5855 if [info exists et_vect_widen_mult_hi_to_si_saved
($et_index
)] {
5856 verbose
"check_effective_target_vect_widen_mult_hi_to_si:\
5857 using cached result
" 2
5859 if { [check_effective_target_vect_unpack
]
5860 && [check_effective_target_vect_int_mult
] } {
5861 set et_vect_widen_mult_hi_to_si_saved
($et_index
) 1
5863 set et_vect_widen_mult_hi_to_si_saved
($et_index
) 0
5865 if { [istarget powerpc
*-*-*]
5866 ||
[istarget spu
-*-*]
5867 ||
[istarget ia64
-*-*]
5868 ||
[istarget aarch64
*-*-*]
5869 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
5870 ||
[is
-effective
-target arm_neon
]
5871 ||
([istarget s390
*-*-*]
5872 && [check_effective_target_s390_vx
]) } {
5873 set et_vect_widen_mult_hi_to_si_saved
($et_index
) 1
5876 verbose
"check_effective_target_vect_widen_mult_hi_to_si:\
5877 returning $et_vect_widen_mult_hi_to_si_saved
($et_index
)" 2
5878 return $et_vect_widen_mult_hi_to_si_saved
($et_index
)
5881 #
Return 1 if the target plus current options supports a vector
5882 # widening multiplication of
*char
* args into
*short
* result
, 0 otherwise.
5884 # This won
't change for different subtargets so cache the result.
5886 proc check_effective_target_vect_widen_mult_qi_to_hi_pattern { } {
5887 global et_vect_widen_mult_qi_to_hi_pattern_saved
5890 if [info exists et_vect_widen_mult_qi_to_hi_pattern_saved($et_index)] {
5891 verbose "check_effective_target_vect_widen_mult_qi_to_hi_pattern:\
5892 using cached result" 2
5894 set et_vect_widen_mult_qi_to_hi_pattern_saved($et_index) 0
5895 if { [istarget powerpc*-*-*]
5896 || ([is-effective-target arm_neon]
5897 && [check_effective_target_arm_little_endian])
5898 || ([istarget s390*-*-*]
5899 && [check_effective_target_s390_vx]) } {
5900 set et_vect_widen_mult_qi_to_hi_pattern_saved($et_index) 1
5903 verbose "check_effective_target_vect_widen_mult_qi_to_hi_pattern:\
5904 returning $et_vect_widen_mult_qi_to_hi_pattern_saved($et_index)" 2
5905 return $et_vect_widen_mult_qi_to_hi_pattern_saved($et_index)
5908 # Return 1 if the target plus current options supports a vector
5909 # widening multiplication of *short* args into *int* result, 0 otherwise.
5911 # This won't change
for different subtargets so
cache the result.
5913 proc check_effective_target_vect_widen_mult_hi_to_si_pattern
{ } {
5914 global et_vect_widen_mult_hi_to_si_pattern_saved
5917 if [info exists et_vect_widen_mult_hi_to_si_pattern_saved
($et_index
)] {
5918 verbose
"check_effective_target_vect_widen_mult_hi_to_si_pattern:\
5919 using cached result
" 2
5921 set et_vect_widen_mult_hi_to_si_pattern_saved
($et_index
) 0
5922 if { [istarget powerpc
*-*-*]
5923 ||
[istarget spu
-*-*]
5924 ||
[istarget ia64
-*-*]
5925 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
5926 ||
([is
-effective
-target arm_neon
]
5927 && [check_effective_target_arm_little_endian
])
5928 ||
([istarget s390
*-*-*]
5929 && [check_effective_target_s390_vx
]) } {
5930 set et_vect_widen_mult_hi_to_si_pattern_saved
($et_index
) 1
5933 verbose
"check_effective_target_vect_widen_mult_hi_to_si_pattern:\
5934 returning $et_vect_widen_mult_hi_to_si_pattern_saved
($et_index
)" 2
5935 return $et_vect_widen_mult_hi_to_si_pattern_saved
($et_index
)
5938 #
Return 1 if the target plus current options supports a vector
5939 # widening multiplication of
*int* args into
*long
* result
, 0 otherwise.
5941 # This won
't change for different subtargets so cache the result.
5943 proc check_effective_target_vect_widen_mult_si_to_di_pattern { } {
5944 global et_vect_widen_mult_si_to_di_pattern_saved
5947 if [info exists et_vect_widen_mult_si_to_di_pattern_saved($et_index)] {
5948 verbose "check_effective_target_vect_widen_mult_si_to_di_pattern:\
5949 using cached result" 2
5951 set et_vect_widen_mult_si_to_di_pattern_saved($et_index) 0
5952 if {[istarget ia64-*-*]
5953 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5954 || ([istarget s390*-*-*]
5955 && [check_effective_target_s390_vx]) } {
5956 set et_vect_widen_mult_si_to_di_pattern_saved($et_index) 1
5959 verbose "check_effective_target_vect_widen_mult_si_to_di_pattern:\
5960 returning $et_vect_widen_mult_si_to_di_pattern_saved($et_index)" 2
5961 return $et_vect_widen_mult_si_to_di_pattern_saved($et_index)
5964 # Return 1 if the target plus current options supports a vector
5965 # widening shift, 0 otherwise.
5967 # This won't change
for different subtargets so
cache the result.
5969 proc check_effective_target_vect_widen_shift
{ } {
5970 global et_vect_widen_shift_saved
5973 if [info exists et_vect_shift_saved
($et_index
)] {
5974 verbose
"check_effective_target_vect_widen_shift: using cached result" 2
5976 set et_vect_widen_shift_saved
($et_index
) 0
5977 if { [is
-effective
-target arm_neon
] } {
5978 set et_vect_widen_shift_saved
($et_index
) 1
5981 verbose
"check_effective_target_vect_widen_shift:\
5982 returning $et_vect_widen_shift_saved
($et_index
)" 2
5983 return $et_vect_widen_shift_saved
($et_index
)
5986 #
Return 1 if the target plus current options supports a vector
5987 # dot
-product of signed chars
, 0 otherwise.
5989 # This won
't change for different subtargets so cache the result.
5991 proc check_effective_target_vect_sdot_qi { } {
5992 global et_vect_sdot_qi_saved
5995 if [info exists et_vect_sdot_qi_saved($et_index)] {
5996 verbose "check_effective_target_vect_sdot_qi: using cached result" 2
5998 set et_vect_sdot_qi_saved($et_index) 0
5999 if { [istarget ia64-*-*]
6000 || [istarget aarch64*-*-*]
6001 || [istarget arm*-*-*]
6002 || ([istarget mips*-*-*]
6003 && [et-is-effective-target mips_msa]) } {
6004 set et_vect_udot_qi_saved 1
6007 verbose "check_effective_target_vect_sdot_qi:\
6008 returning $et_vect_sdot_qi_saved($et_index)" 2
6009 return $et_vect_sdot_qi_saved($et_index)
6012 # Return 1 if the target plus current options supports a vector
6013 # dot-product of unsigned chars, 0 otherwise.
6015 # This won't change
for different subtargets so
cache the result.
6017 proc check_effective_target_vect_udot_qi
{ } {
6018 global et_vect_udot_qi_saved
6021 if [info exists et_vect_udot_qi_saved
($et_index
)] {
6022 verbose
"check_effective_target_vect_udot_qi: using cached result" 2
6024 set et_vect_udot_qi_saved
($et_index
) 0
6025 if { [istarget powerpc
*-*-*]
6026 ||
[istarget aarch64
*-*-*]
6027 ||
[istarget arm
*-*-*]
6028 ||
[istarget ia64
-*-*]
6029 ||
([istarget mips
*-*-*]
6030 && [et
-is
-effective
-target mips_msa
]) } {
6031 set et_vect_udot_qi_saved
($et_index
) 1
6034 verbose
"check_effective_target_vect_udot_qi:\
6035 returning $et_vect_udot_qi_saved
($et_index
)" 2
6036 return $et_vect_udot_qi_saved
($et_index
)
6039 #
Return 1 if the target plus current options supports a vector
6040 # dot
-product of signed shorts
, 0 otherwise.
6042 # This won
't change for different subtargets so cache the result.
6044 proc check_effective_target_vect_sdot_hi { } {
6045 global et_vect_sdot_hi_saved
6048 if [info exists et_vect_sdot_hi_saved($et_index)] {
6049 verbose "check_effective_target_vect_sdot_hi: using cached result" 2
6051 set et_vect_sdot_hi_saved($et_index) 0
6052 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
6053 || [istarget ia64-*-*]
6054 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6055 || ([istarget mips*-*-*]
6056 && [et-is-effective-target mips_msa]) } {
6057 set et_vect_sdot_hi_saved($et_index) 1
6060 verbose "check_effective_target_vect_sdot_hi:\
6061 returning $et_vect_sdot_hi_saved($et_index)" 2
6062 return $et_vect_sdot_hi_saved($et_index)
6065 # Return 1 if the target plus current options supports a vector
6066 # dot-product of unsigned shorts, 0 otherwise.
6068 # This won't change
for different subtargets so
cache the result.
6070 proc check_effective_target_vect_udot_hi
{ } {
6071 global et_vect_udot_hi_saved
6074 if [info exists et_vect_udot_hi_saved
($et_index
)] {
6075 verbose
"check_effective_target_vect_udot_hi: using cached result" 2
6077 set et_vect_udot_hi_saved
($et_index
) 0
6078 if { ([istarget powerpc
*-*-*] && ![istarget powerpc
-*-linux
*paired
*])
6079 ||
([istarget mips
*-*-*]
6080 && [et
-is
-effective
-target mips_msa
]) } {
6081 set et_vect_udot_hi_saved
($et_index
) 1
6084 verbose
"check_effective_target_vect_udot_hi:\
6085 returning $et_vect_udot_hi_saved
($et_index
)" 2
6086 return $et_vect_udot_hi_saved
($et_index
)
6089 #
Return 1 if the target plus current options supports a vector
6090 # sad operation of unsigned chars
, 0 otherwise.
6092 # This won
't change for different subtargets so cache the result.
6094 proc check_effective_target_vect_usad_char { } {
6095 global et_vect_usad_char_saved
6098 if [info exists et_vect_usad_char_saved($et_index)] {
6099 verbose "check_effective_target_vect_usad_char: using cached result" 2
6101 set et_vect_usad_char_saved($et_index) 0
6102 if { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
6103 set et_vect_usad_char_saved($et_index) 1
6106 verbose "check_effective_target_vect_usad_char:\
6107 returning $et_vect_usad_char_saved($et_index)" 2
6108 return $et_vect_usad_char_saved($et_index)
6111 # Return 1 if the target plus current options supports a vector
6112 # demotion (packing) of shorts (to chars) and ints (to shorts)
6113 # using modulo arithmetic, 0 otherwise.
6115 # This won't change
for different subtargets so
cache the result.
6117 proc check_effective_target_vect_pack_trunc
{ } {
6118 global et_vect_pack_trunc_saved
6121 if [info exists et_vect_pack_trunc_saved
($et_index
)] {
6122 verbose
"check_effective_target_vect_pack_trunc: using cached result" 2
6124 set et_vect_pack_trunc_saved
($et_index
) 0
6125 if { ([istarget powerpc
*-*-*] && ![istarget powerpc
-*-linux
*paired
*])
6126 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
6127 ||
[istarget aarch64
*-*-*]
6128 ||
[istarget spu
-*-*]
6129 ||
([istarget arm
*-*-*] && [check_effective_target_arm_neon_ok
]
6130 && [check_effective_target_arm_little_endian
])
6131 ||
([istarget mips
*-*-*]
6132 && [et
-is
-effective
-target mips_msa
])
6133 ||
([istarget s390
*-*-*]
6134 && [check_effective_target_s390_vx
]) } {
6135 set et_vect_pack_trunc_saved
($et_index
) 1
6138 verbose
"check_effective_target_vect_pack_trunc:\
6139 returning $et_vect_pack_trunc_saved
($et_index
)" 2
6140 return $et_vect_pack_trunc_saved
($et_index
)
6143 #
Return 1 if the target plus current options supports a vector
6144 # promotion
(unpacking
) of chars
(to shorts
) and shorts
(to ints
), 0 otherwise.
6146 # This won
't change for different subtargets so cache the result.
6148 proc check_effective_target_vect_unpack { } {
6149 global et_vect_unpack_saved
6152 if [info exists et_vect_unpack_saved($et_index)] {
6153 verbose "check_effective_target_vect_unpack: using cached result" 2
6155 set et_vect_unpack_saved($et_index) 0
6156 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*paired*])
6157 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6158 || [istarget spu-*-*]
6159 || [istarget ia64-*-*]
6160 || [istarget aarch64*-*-*]
6161 || ([istarget mips*-*-*]
6162 && [et-is-effective-target mips_msa])
6163 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]
6164 && [check_effective_target_arm_little_endian])
6165 || ([istarget s390*-*-*]
6166 && [check_effective_target_s390_vx]) } {
6167 set et_vect_unpack_saved($et_index) 1
6170 verbose "check_effective_target_vect_unpack:\
6171 returning $et_vect_unpack_saved($et_index)" 2
6172 return $et_vect_unpack_saved($et_index)
6175 # Return 1 if the target plus current options does not guarantee
6176 # that its STACK_BOUNDARY is >= the reguired vector alignment.
6178 # This won't change
for different subtargets so
cache the result.
6180 proc check_effective_target_unaligned_stack
{ } {
6181 global et_unaligned_stack_saved
6183 if [info exists et_unaligned_stack_saved
] {
6184 verbose
"check_effective_target_unaligned_stack: using cached result" 2
6186 set et_unaligned_stack_saved
0
6188 verbose
"check_effective_target_unaligned_stack: returning $et_unaligned_stack_saved" 2
6189 return $et_unaligned_stack_saved
6192 #
Return 1 if the target plus current options does not have
6193 # slow unaligned access when using word size accesses.
6195 # This won
't change for different subtargets so cache the result.
6197 proc check_effective_target_word_mode_no_slow_unalign { } {
6198 global et_word_mode_no_slow_unalign_saved
6201 if [info exists et_word_mode_no_slow_unalign_saved($et_index)] {
6202 verbose "check_effective_target_word_mode_no_slow_unalign: \
6203 using cached result" 2
6205 set et_word_mode_no_slow_unalign_saved($et_index) 0
6206 if { [is-effective-target non_strict_align]
6207 && !([istarget arm*-*-*])
6209 set et_word_mode_no_slow_unalign_saved($et_index) 1
6212 verbose "check_effective_target_word_mode_no_slow_unalign:\
6213 returning $et_word_mode_no_slow_unalign_saved($et_index)" 2
6214 return $et_word_mode_no_slow_unalign_saved($et_index)
6217 # Return 1 if the target plus current options does not support a vector
6218 # alignment mechanism, 0 otherwise.
6220 # This won't change
for different subtargets so
cache the result.
6222 proc check_effective_target_vect_no_align
{ } {
6223 global et_vect_no_align_saved
6226 if [info exists et_vect_no_align_saved
($et_index
)] {
6227 verbose
"check_effective_target_vect_no_align: using cached result" 2
6229 set et_vect_no_align_saved
($et_index
) 0
6230 if { [istarget mipsisa64
*-*-*]
6231 ||
[istarget mips
-sde
-elf
]
6232 ||
[istarget sparc
*-*-*]
6233 ||
[istarget ia64
-*-*]
6234 ||
[check_effective_target_arm_vect_no_misalign
]
6235 ||
([istarget powerpc
*-*-*] && [check_p8vector_hw_available
])
6236 ||
([istarget mips
*-*-*]
6237 && [et
-is
-effective
-target mips_loongson
]) } {
6238 set et_vect_no_align_saved
($et_index
) 1
6241 verbose
"check_effective_target_vect_no_align:\
6242 returning $et_vect_no_align_saved
($et_index
)" 2
6243 return $et_vect_no_align_saved
($et_index
)
6246 #
Return 1 if the target supports a vector misalign access
, 0 otherwise.
6248 # This won
't change for different subtargets so cache the result.
6250 proc check_effective_target_vect_hw_misalign { } {
6251 global et_vect_hw_misalign_saved
6254 if [info exists et_vect_hw_misalign_saved($et_index)] {
6255 verbose "check_effective_target_vect_hw_misalign: using cached result" 2
6257 set et_vect_hw_misalign_saved($et_index) 0
6258 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
6259 || ([istarget powerpc*-*-*] && [check_p8vector_hw_available])
6260 || [istarget aarch64*-*-*]
6261 || ([istarget mips*-*-*] && [et-is-effective-target mips_msa])
6262 || ([istarget s390*-*-*]
6263 && [check_effective_target_s390_vx]) } {
6264 set et_vect_hw_misalign_saved($et_index) 1
6266 if { [istarget arm*-*-*] } {
6267 set et_vect_hw_misalign_saved($et_index) [expr ![check_effective_target_arm_vect_no_misalign]]
6270 verbose "check_effective_target_vect_hw_misalign:\
6271 returning $et_vect_hw_misalign_saved($et_index)" 2
6272 return $et_vect_hw_misalign_saved($et_index)
6276 # Return 1 if arrays are aligned to the vector alignment
6277 # boundary, 0 otherwise.
6279 proc check_effective_target_vect_aligned_arrays { } {
6280 set et_vect_aligned_arrays 0
6281 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
6282 && !([is-effective-target ia32]
6283 || ([check_avx_available] && ![check_prefer_avx128])))
6284 || [istarget spu-*-*] } {
6285 set et_vect_aligned_arrays 1
6288 verbose "check_effective_target_vect_aligned_arrays:\
6289 returning $et_vect_aligned_arrays" 2
6290 return $et_vect_aligned_arrays
6293 # Return 1 if types of size 32 bit or less are naturally aligned
6294 # (aligned to their type-size), 0 otherwise.
6296 # This won't change
for different subtargets so
cache the result.
6298 proc check_effective_target_natural_alignment_32
{ } {
6299 global et_natural_alignment_32
6301 if [info exists et_natural_alignment_32_saved
] {
6302 verbose
"check_effective_target_natural_alignment_32: using cached result" 2
6304 # FIXME
: 32bit powerpc
: guaranteed only
if MASK_ALIGN_NATURAL
/POWER.
6305 set et_natural_alignment_32_saved
1
6306 if { ([istarget
*-*-darwin
*] && [is
-effective
-target lp64
])
6307 ||
[istarget avr
-*-*] } {
6308 set et_natural_alignment_32_saved
0
6311 verbose
"check_effective_target_natural_alignment_32: returning $et_natural_alignment_32_saved" 2
6312 return $et_natural_alignment_32_saved
6315 #
Return 1 if types of size
64 bit or less are naturally aligned
(aligned to their
6316 # type
-size
), 0 otherwise.
6318 # This won
't change for different subtargets so cache the result.
6320 proc check_effective_target_natural_alignment_64 { } {
6321 global et_natural_alignment_64
6323 if [info exists et_natural_alignment_64_saved] {
6324 verbose "check_effective_target_natural_alignment_64: using cached result" 2
6326 set et_natural_alignment_64_saved 0
6327 if { ([is-effective-target lp64] && ![istarget *-*-darwin*])
6328 || [istarget spu-*-*] } {
6329 set et_natural_alignment_64_saved 1
6332 verbose "check_effective_target_natural_alignment_64: returning $et_natural_alignment_64_saved" 2
6333 return $et_natural_alignment_64_saved
6336 # Return 1 if all vector types are naturally aligned (aligned to their
6337 # type-size), 0 otherwise.
6339 proc check_effective_target_vect_natural_alignment { } {
6340 set et_vect_natural_alignment 1
6341 if { [check_effective_target_arm_eabi]
6342 || [istarget nvptx-*-*]
6343 || [istarget s390*-*-*] } {
6344 set et_vect_natural_alignment 0
6346 verbose "check_effective_target_vect_natural_alignment:\
6347 returning $et_vect_natural_alignment" 2
6348 return $et_vect_natural_alignment
6351 # Return 1 if the target doesn't prefer
any alignment beyond element
6352 # alignment during vectorization.
6354 proc check_effective_target_vect_element_align_preferred
{ } {
6355 return [check_effective_target_vect_variable_length
]
6358 #
Return 1 if we can align stack data to the preferred vector alignment.
6360 proc check_effective_target_vect_align_stack_vars
{ } {
6364 #
Return 1 if vector alignment
(for types of size
32 bit or less
) is reachable
, 0 otherwise.
6366 proc check_effective_target_vector_alignment_reachable
{ } {
6367 set et_vector_alignment_reachable
0
6368 if { [check_effective_target_vect_aligned_arrays
]
6369 ||
[check_effective_target_natural_alignment_32
] } {
6370 set et_vector_alignment_reachable
1
6372 verbose
"check_effective_target_vector_alignment_reachable:\
6373 returning $et_vector_alignment_reachable
" 2
6374 return $et_vector_alignment_reachable
6377 #
Return 1 if vector alignment
for 64 bit is reachable
, 0 otherwise.
6379 proc check_effective_target_vector_alignment_reachable_for_64bit
{ } {
6380 set et_vector_alignment_reachable_for_64bit
0
6381 if { [check_effective_target_vect_aligned_arrays
]
6382 ||
[check_effective_target_natural_alignment_64
] } {
6383 set et_vector_alignment_reachable_for_64bit
1
6385 verbose
"check_effective_target_vector_alignment_reachable_for_64bit:\
6386 returning $et_vector_alignment_reachable_for_64bit
" 2
6387 return $et_vector_alignment_reachable_for_64bit
6390 #
Return 1 if the target only requires element alignment
for vector accesses
6392 proc check_effective_target_vect_element_align
{ } {
6393 global et_vect_element_align
6396 if [info exists et_vect_element_align
($et_index
)] {
6397 verbose
"check_effective_target_vect_element_align:\
6398 using cached result
" 2
6400 set et_vect_element_align
($et_index
) 0
6401 if { ([istarget arm
*-*-*]
6402 && ![check_effective_target_arm_vect_no_misalign
])
6403 ||
[check_effective_target_vect_hw_misalign
] } {
6404 set et_vect_element_align
($et_index
) 1
6408 verbose
"check_effective_target_vect_element_align:\
6409 returning $et_vect_element_align
($et_index
)" 2
6410 return $et_vect_element_align
($et_index
)
6413 #
Return 1 if we expect to see unaligned accesses in at least some
6416 proc check_effective_target_vect_unaligned_possible
{ } {
6417 return [expr
{ ![check_effective_target_vect_element_align_preferred
]
6418 && (![check_effective_target_vect_no_align
]
6419 ||
[check_effective_target_vect_hw_misalign
]) }]
6422 #
Return 1 if the target supports vector LOAD_LANES operations
, 0 otherwise.
6424 proc check_effective_target_vect_load_lanes
{ } {
6425 global et_vect_load_lanes
6427 if [info exists et_vect_load_lanes
] {
6428 verbose
"check_effective_target_vect_load_lanes: using cached result" 2
6430 set et_vect_load_lanes
0
6431 if { ([istarget arm
*-*-*] && [check_effective_target_arm_neon_ok
])
6432 ||
[istarget aarch64
*-*-*] } {
6433 set et_vect_load_lanes
1
6437 verbose
"check_effective_target_vect_load_lanes: returning $et_vect_load_lanes" 2
6438 return $et_vect_load_lanes
6441 #
Return 1 if the target supports vector masked stores.
6443 proc check_effective_target_vect_masked_store
{ } {
6447 #
Return 1 if the target supports vector conditional operations
, 0 otherwise.
6449 proc check_effective_target_vect_condition
{ } {
6450 global et_vect_cond_saved
6453 if [info exists et_vect_cond_saved
($et_index
)] {
6454 verbose
"check_effective_target_vect_cond: using cached result" 2
6456 set et_vect_cond_saved
($et_index
) 0
6457 if { [istarget aarch64
*-*-*]
6458 ||
[istarget powerpc
*-*-*]
6459 ||
[istarget ia64
-*-*]
6460 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
6461 ||
[istarget spu
-*-*]
6462 ||
([istarget mips
*-*-*]
6463 && [et
-is
-effective
-target mips_msa
])
6464 ||
([istarget arm
*-*-*]
6465 && [check_effective_target_arm_neon_ok
])
6466 ||
([istarget s390
*-*-*]
6467 && [check_effective_target_s390_vx
]) } {
6468 set et_vect_cond_saved
($et_index
) 1
6472 verbose
"check_effective_target_vect_cond:\
6473 returning $et_vect_cond_saved
($et_index
)" 2
6474 return $et_vect_cond_saved
($et_index
)
6477 #
Return 1 if the target supports vector conditional operations where
6478 # the comparison has different type from the lhs
, 0 otherwise.
6480 proc check_effective_target_vect_cond_mixed
{ } {
6481 global et_vect_cond_mixed_saved
6484 if [info exists et_vect_cond_mixed_saved
($et_index
)] {
6485 verbose
"check_effective_target_vect_cond_mixed: using cached result" 2
6487 set et_vect_cond_mixed_saved
($et_index
) 0
6488 if { [istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
6489 ||
[istarget aarch64
*-*-*]
6490 ||
[istarget powerpc
*-*-*]
6491 ||
([istarget mips
*-*-*]
6492 && [et
-is
-effective
-target mips_msa
])
6493 ||
([istarget s390
*-*-*]
6494 && [check_effective_target_s390_vx
]) } {
6495 set et_vect_cond_mixed_saved
($et_index
) 1
6499 verbose
"check_effective_target_vect_cond_mixed:\
6500 returning $et_vect_cond_mixed_saved
($et_index
)" 2
6501 return $et_vect_cond_mixed_saved
($et_index
)
6504 #
Return 1 if the target supports vector char multiplication
, 0 otherwise.
6506 proc check_effective_target_vect_char_mult
{ } {
6507 global et_vect_char_mult_saved
6510 if [info exists et_vect_char_mult_saved
($et_index
)] {
6511 verbose
"check_effective_target_vect_char_mult: using cached result" 2
6513 set et_vect_char_mult_saved
($et_index
) 0
6514 if { [istarget aarch64
*-*-*]
6515 ||
[istarget ia64
-*-*]
6516 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
6517 ||
[check_effective_target_arm32
]
6518 ||
[check_effective_target_powerpc_altivec
]
6519 ||
([istarget mips
*-*-*]
6520 && [et
-is
-effective
-target mips_msa
])
6521 ||
([istarget s390
*-*-*]
6522 && [check_effective_target_s390_vx
]) } {
6523 set et_vect_char_mult_saved
($et_index
) 1
6527 verbose
"check_effective_target_vect_char_mult:\
6528 returning $et_vect_char_mult_saved
($et_index
)" 2
6529 return $et_vect_char_mult_saved
($et_index
)
6532 #
Return 1 if the target supports vector short multiplication
, 0 otherwise.
6534 proc check_effective_target_vect_short_mult
{ } {
6535 global et_vect_short_mult_saved
6538 if [info exists et_vect_short_mult_saved
($et_index
)] {
6539 verbose
"check_effective_target_vect_short_mult: using cached result" 2
6541 set et_vect_short_mult_saved
($et_index
) 0
6542 if { [istarget ia64
-*-*]
6543 ||
[istarget spu
-*-*]
6544 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
6545 ||
[istarget powerpc
*-*-*]
6546 ||
[istarget aarch64
*-*-*]
6547 ||
[check_effective_target_arm32
]
6548 ||
([istarget mips
*-*-*]
6549 && ([et
-is
-effective
-target mips_msa
]
6550 ||
[et
-is
-effective
-target mips_loongson
]))
6551 ||
([istarget s390
*-*-*]
6552 && [check_effective_target_s390_vx
]) } {
6553 set et_vect_short_mult_saved
($et_index
) 1
6557 verbose
"check_effective_target_vect_short_mult:\
6558 returning $et_vect_short_mult_saved
($et_index
)" 2
6559 return $et_vect_short_mult_saved
($et_index
)
6562 #
Return 1 if the target supports vector
int multiplication
, 0 otherwise.
6564 proc check_effective_target_vect_int_mult
{ } {
6565 global et_vect_int_mult_saved
6568 if [info exists et_vect_int_mult_saved
($et_index
)] {
6569 verbose
"check_effective_target_vect_int_mult: using cached result" 2
6571 set et_vect_int_mult_saved
($et_index
) 0
6572 if { ([istarget powerpc
*-*-*] && ![istarget powerpc
-*-linux
*paired
*])
6573 ||
[istarget spu
-*-*]
6574 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
6575 ||
[istarget ia64
-*-*]
6576 ||
[istarget aarch64
*-*-*]
6577 ||
([istarget mips
*-*-*]
6578 && [et
-is
-effective
-target mips_msa
])
6579 ||
[check_effective_target_arm32
]
6580 ||
([istarget s390
*-*-*]
6581 && [check_effective_target_s390_vx
]) } {
6582 set et_vect_int_mult_saved
($et_index
) 1
6586 verbose
"check_effective_target_vect_int_mult:\
6587 returning $et_vect_int_mult_saved
($et_index
)" 2
6588 return $et_vect_int_mult_saved
($et_index
)
6591 #
Return 1 if the target supports
64 bit hardware vector
6592 # multiplication of long operands with a long result
, 0 otherwise.
6594 # This can change
for different subtargets so
do not
cache the result.
6596 proc check_effective_target_vect_long_mult
{ } {
6597 if { [istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
6598 ||
(([istarget powerpc
*-*-*]
6599 && ![istarget powerpc
-*-linux
*paired
*])
6600 && [check_effective_target_ilp32
])
6601 ||
[is
-effective
-target arm_neon
]
6602 ||
([istarget sparc
*-*-*] && [check_effective_target_ilp32
])
6603 ||
[istarget aarch64
*-*-*]
6604 ||
([istarget mips
*-*-*]
6605 && [et
-is
-effective
-target mips_msa
]) } {
6611 verbose
"check_effective_target_vect_long_mult: returning $answer" 2
6615 #
Return 1 if the target supports vector even
/odd elements extraction
, 0 otherwise.
6617 proc check_effective_target_vect_extract_even_odd
{ } {
6618 global et_vect_extract_even_odd_saved
6621 if [info exists et_vect_extract_even_odd_saved
($et_index
)] {
6622 verbose
"check_effective_target_vect_extract_even_odd:\
6623 using cached result
" 2
6625 set et_vect_extract_even_odd_saved
($et_index
) 0
6626 if { [istarget aarch64
*-*-*]
6627 ||
[istarget powerpc
*-*-*]
6628 ||
[is
-effective
-target arm_neon
]
6629 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
6630 ||
[istarget ia64
-*-*]
6631 ||
[istarget spu
-*-*]
6632 ||
([istarget mips
*-*-*]
6633 && ([et
-is
-effective
-target mips_msa
]
6634 ||
[et
-is
-effective
-target mpaired_single
]))
6635 ||
([istarget s390
*-*-*]
6636 && [check_effective_target_s390_vx
]) } {
6637 set et_vect_extract_even_odd_saved
($et_index
) 1
6641 verbose
"check_effective_target_vect_extract_even_odd:\
6642 returning $et_vect_extract_even_odd_saved
($et_index
)" 2
6643 return $et_vect_extract_even_odd_saved
($et_index
)
6646 #
Return 1 if the target supports vector interleaving
, 0 otherwise.
6648 proc check_effective_target_vect_interleave
{ } {
6649 global et_vect_interleave_saved
6652 if [info exists et_vect_interleave_saved
($et_index
)] {
6653 verbose
"check_effective_target_vect_interleave: using cached result" 2
6655 set et_vect_interleave_saved
($et_index
) 0
6656 if { [istarget aarch64
*-*-*]
6657 ||
[istarget powerpc
*-*-*]
6658 ||
[is
-effective
-target arm_neon
]
6659 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
6660 ||
[istarget ia64
-*-*]
6661 ||
[istarget spu
-*-*]
6662 ||
([istarget mips
*-*-*]
6663 && ([et
-is
-effective
-target mpaired_single
]
6664 ||
[et
-is
-effective
-target mips_msa
]))
6665 ||
([istarget s390
*-*-*]
6666 && [check_effective_target_s390_vx
]) } {
6667 set et_vect_interleave_saved
($et_index
) 1
6671 verbose
"check_effective_target_vect_interleave:\
6672 returning $et_vect_interleave_saved
($et_index
)" 2
6673 return $et_vect_interleave_saved
($et_index
)
6676 foreach N
{2 3 4 8} {
6677 eval
[string map
[list N $N
] {
6678 #
Return 1 if the target supports
2-vector interleaving
6679 proc check_effective_target_vect_stridedN
{ } {
6680 global et_vect_stridedN_saved
6683 if [info exists et_vect_stridedN_saved
($et_index
)] {
6684 verbose
"check_effective_target_vect_stridedN:\
6685 using cached result
" 2
6687 set et_vect_stridedN_saved
($et_index
) 0
6689 && [check_effective_target_vect_interleave
]
6690 && [check_effective_target_vect_extract_even_odd
] } {
6691 set et_vect_stridedN_saved
($et_index
) 1
6693 if { ([istarget arm
*-*-*]
6694 ||
[istarget aarch64
*-*-*]) && N
>= 2 && N
<= 4 } {
6695 set et_vect_stridedN_saved
($et_index
) 1
6699 verbose
"check_effective_target_vect_stridedN:\
6700 returning $et_vect_stridedN_saved
($et_index
)" 2
6701 return $et_vect_stridedN_saved
($et_index
)
6706 #
Return the list of vector sizes
(in bits
) that each target supports.
6707 # A vector length of
"0" indicates variable-length vectors.
6709 proc available_vector_sizes
{ } {
6711 if { [istarget aarch64
*-*-*] } {
6712 lappend result
128 64
6713 } elseif
{ [istarget arm
*-*-*]
6714 && [check_effective_target_arm_neon_ok
] } {
6715 lappend result
128 64
6716 } elseif
{ (([istarget i?
86-*-*] ||
[istarget x86_64
-*-*])
6717 && ([check_avx_available
] && ![check_prefer_avx128
])) } {
6718 lappend result
256 128
6719 } elseif
{ [istarget sparc
*-*-*] } {
6722 # The traditional default asumption.
6728 #
Return 1 if the target supports multiple vector sizes
6730 proc check_effective_target_vect_multiple_sizes
{ } {
6731 return [expr
{ [llength
[available_vector_sizes
]] > 1 }]
6734 #
Return true
if variable-length vectors are supported.
6736 proc check_effective_target_vect_variable_length
{ } {
6737 return [expr
{ [lindex
[available_vector_sizes
] 0] == 0 }]
6740 #
Return 1 if the target supports vectors of
64 bits.
6742 proc check_effective_target_vect64
{ } {
6743 return [expr
{ [lsearch
-exact
[available_vector_sizes
] 64] >= 0 }]
6746 #
Return 1 if the target supports vector copysignf calls.
6748 proc check_effective_target_vect_call_copysignf
{ } {
6749 global et_vect_call_copysignf_saved
6752 if [info exists et_vect_call_copysignf_saved
($et_index
)] {
6753 verbose
"check_effective_target_vect_call_copysignf:\
6754 using cached result
" 2
6756 set et_vect_call_copysignf_saved
($et_index
) 0
6757 if { [istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
6758 ||
[istarget powerpc
*-*-*]
6759 ||
[istarget aarch64
*-*-*] } {
6760 set et_vect_call_copysignf_saved
($et_index
) 1
6764 verbose
"check_effective_target_vect_call_copysignf:\
6765 returning $et_vect_call_copysignf_saved
($et_index
)" 2
6766 return $et_vect_call_copysignf_saved
($et_index
)
6769 #
Return 1 if the target supports hardware square root instructions.
6771 proc check_effective_target_sqrt_insn
{ } {
6772 global et_sqrt_insn_saved
6774 if [info exists et_sqrt_insn_saved
] {
6775 verbose
"check_effective_target_hw_sqrt: using cached result" 2
6777 set et_sqrt_insn_saved
0
6778 if { [istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
6779 ||
[istarget powerpc
*-*-*]
6780 ||
[istarget aarch64
*-*-*]
6781 ||
([istarget arm
*-*-*] && [check_effective_target_arm_vfp_ok
])
6782 ||
([istarget s390
*-*-*]
6783 && [check_effective_target_s390_vx
]) } {
6784 set et_sqrt_insn_saved
1
6788 verbose
"check_effective_target_hw_sqrt: returning et_sqrt_insn_saved" 2
6789 return $et_sqrt_insn_saved
6792 #
Return 1 if the target supports vector sqrtf calls.
6794 proc check_effective_target_vect_call_sqrtf
{ } {
6795 global et_vect_call_sqrtf_saved
6798 if [info exists et_vect_call_sqrtf_saved
($et_index
)] {
6799 verbose
"check_effective_target_vect_call_sqrtf: using cached result" 2
6801 set et_vect_call_sqrtf_saved
($et_index
) 0
6802 if { [istarget aarch64
*-*-*]
6803 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
6804 ||
([istarget powerpc
*-*-*] && [check_vsx_hw_available
])
6805 ||
([istarget s390
*-*-*]
6806 && [check_effective_target_s390_vx
]) } {
6807 set et_vect_call_sqrtf_saved
($et_index
) 1
6811 verbose
"check_effective_target_vect_call_sqrtf:\
6812 returning $et_vect_call_sqrtf_saved
($et_index
)" 2
6813 return $et_vect_call_sqrtf_saved
($et_index
)
6816 #
Return 1 if the target supports vector lrint calls.
6818 proc check_effective_target_vect_call_lrint
{ } {
6819 set et_vect_call_lrint
0
6820 if { (([istarget i?
86-*-*] ||
[istarget x86_64
-*-*])
6821 && [check_effective_target_ilp32
]) } {
6822 set et_vect_call_lrint
1
6825 verbose
"check_effective_target_vect_call_lrint: returning $et_vect_call_lrint" 2
6826 return $et_vect_call_lrint
6829 #
Return 1 if the target supports vector btrunc calls.
6831 proc check_effective_target_vect_call_btrunc
{ } {
6832 global et_vect_call_btrunc_saved
6835 if [info exists et_vect_call_btrunc_saved
($et_index
)] {
6836 verbose
"check_effective_target_vect_call_btrunc:\
6837 using cached result
" 2
6839 set et_vect_call_btrunc_saved
($et_index
) 0
6840 if { [istarget aarch64
*-*-*] } {
6841 set et_vect_call_btrunc_saved
($et_index
) 1
6845 verbose
"check_effective_target_vect_call_btrunc:\
6846 returning $et_vect_call_btrunc_saved
($et_index
)" 2
6847 return $et_vect_call_btrunc_saved
($et_index
)
6850 #
Return 1 if the target supports vector btruncf calls.
6852 proc check_effective_target_vect_call_btruncf
{ } {
6853 global et_vect_call_btruncf_saved
6856 if [info exists et_vect_call_btruncf_saved
($et_index
)] {
6857 verbose
"check_effective_target_vect_call_btruncf:\
6858 using cached result
" 2
6860 set et_vect_call_btruncf_saved
($et_index
) 0
6861 if { [istarget aarch64
*-*-*] } {
6862 set et_vect_call_btruncf_saved
($et_index
) 1
6866 verbose
"check_effective_target_vect_call_btruncf:\
6867 returning $et_vect_call_btruncf_saved
($et_index
)" 2
6868 return $et_vect_call_btruncf_saved
($et_index
)
6871 #
Return 1 if the target supports vector ceil calls.
6873 proc check_effective_target_vect_call_ceil
{ } {
6874 global et_vect_call_ceil_saved
6877 if [info exists et_vect_call_ceil_saved
($et_index
)] {
6878 verbose
"check_effective_target_vect_call_ceil: using cached result" 2
6880 set et_vect_call_ceil_saved
($et_index
) 0
6881 if { [istarget aarch64
*-*-*] } {
6882 set et_vect_call_ceil_saved
($et_index
) 1
6886 verbose
"check_effective_target_vect_call_ceil:\
6887 returning $et_vect_call_ceil_saved
($et_index
)" 2
6888 return $et_vect_call_ceil_saved
($et_index
)
6891 #
Return 1 if the target supports vector ceilf calls.
6893 proc check_effective_target_vect_call_ceilf
{ } {
6894 global et_vect_call_ceilf_saved
6897 if [info exists et_vect_call_ceilf_saved
($et_index
)] {
6898 verbose
"check_effective_target_vect_call_ceilf: using cached result" 2
6900 set et_vect_call_ceilf_saved
($et_index
) 0
6901 if { [istarget aarch64
*-*-*] } {
6902 set et_vect_call_ceilf_saved
($et_index
) 1
6906 verbose
"check_effective_target_vect_call_ceilf:\
6907 returning $et_vect_call_ceilf_saved
($et_index
)" 2
6908 return $et_vect_call_ceilf_saved
($et_index
)
6911 #
Return 1 if the target supports vector floor calls.
6913 proc check_effective_target_vect_call_floor
{ } {
6914 global et_vect_call_floor_saved
6917 if [info exists et_vect_call_floor_saved
($et_index
)] {
6918 verbose
"check_effective_target_vect_call_floor: using cached result" 2
6920 set et_vect_call_floor_saved
($et_index
) 0
6921 if { [istarget aarch64
*-*-*] } {
6922 set et_vect_call_floor_saved
($et_index
) 1
6926 verbose
"check_effective_target_vect_call_floor:\
6927 returning $et_vect_call_floor_saved
($et_index
)" 2
6928 return $et_vect_call_floor_saved
($et_index
)
6931 #
Return 1 if the target supports vector floorf calls.
6933 proc check_effective_target_vect_call_floorf
{ } {
6934 global et_vect_call_floorf_saved
6937 if [info exists et_vect_call_floorf_saved
($et_index
)] {
6938 verbose
"check_effective_target_vect_call_floorf: using cached result" 2
6940 set et_vect_call_floorf_saved
($et_index
) 0
6941 if { [istarget aarch64
*-*-*] } {
6942 set et_vect_call_floorf_saved
($et_index
) 1
6946 verbose
"check_effective_target_vect_call_floorf:\
6947 returning $et_vect_call_floorf_saved
($et_index
)" 2
6948 return $et_vect_call_floorf_saved
($et_index
)
6951 #
Return 1 if the target supports vector lceil calls.
6953 proc check_effective_target_vect_call_lceil
{ } {
6954 global et_vect_call_lceil_saved
6957 if [info exists et_vect_call_lceil_saved
($et_index
)] {
6958 verbose
"check_effective_target_vect_call_lceil: using cached result" 2
6960 set et_vect_call_lceil_saved
($et_index
) 0
6961 if { [istarget aarch64
*-*-*] } {
6962 set et_vect_call_lceil_saved
($et_index
) 1
6966 verbose
"check_effective_target_vect_call_lceil:\
6967 returning $et_vect_call_lceil_saved
($et_index
)" 2
6968 return $et_vect_call_lceil_saved
($et_index
)
6971 #
Return 1 if the target supports vector lfloor calls.
6973 proc check_effective_target_vect_call_lfloor
{ } {
6974 global et_vect_call_lfloor_saved
6977 if [info exists et_vect_call_lfloor_saved
($et_index
)] {
6978 verbose
"check_effective_target_vect_call_lfloor: using cached result" 2
6980 set et_vect_call_lfloor_saved
($et_index
) 0
6981 if { [istarget aarch64
*-*-*] } {
6982 set et_vect_call_lfloor_saved
($et_index
) 1
6986 verbose
"check_effective_target_vect_call_lfloor:\
6987 returning $et_vect_call_lfloor_saved
($et_index
)" 2
6988 return $et_vect_call_lfloor_saved
($et_index
)
6991 #
Return 1 if the target supports vector nearbyint calls.
6993 proc check_effective_target_vect_call_nearbyint
{ } {
6994 global et_vect_call_nearbyint_saved
6997 if [info exists et_vect_call_nearbyint_saved
($et_index
)] {
6998 verbose
"check_effective_target_vect_call_nearbyint: using cached result" 2
7000 set et_vect_call_nearbyint_saved
($et_index
) 0
7001 if { [istarget aarch64
*-*-*] } {
7002 set et_vect_call_nearbyint_saved
($et_index
) 1
7006 verbose
"check_effective_target_vect_call_nearbyint:\
7007 returning $et_vect_call_nearbyint_saved
($et_index
)" 2
7008 return $et_vect_call_nearbyint_saved
($et_index
)
7011 #
Return 1 if the target supports vector nearbyintf calls.
7013 proc check_effective_target_vect_call_nearbyintf
{ } {
7014 global et_vect_call_nearbyintf_saved
7017 if [info exists et_vect_call_nearbyintf_saved
($et_index
)] {
7018 verbose
"check_effective_target_vect_call_nearbyintf:\
7019 using cached result
" 2
7021 set et_vect_call_nearbyintf_saved
($et_index
) 0
7022 if { [istarget aarch64
*-*-*] } {
7023 set et_vect_call_nearbyintf_saved
($et_index
) 1
7027 verbose
"check_effective_target_vect_call_nearbyintf:\
7028 returning $et_vect_call_nearbyintf_saved
($et_index
)" 2
7029 return $et_vect_call_nearbyintf_saved
($et_index
)
7032 #
Return 1 if the target supports vector
round calls.
7034 proc check_effective_target_vect_call_round
{ } {
7035 global et_vect_call_round_saved
7038 if [info exists et_vect_call_round_saved
($et_index
)] {
7039 verbose
"check_effective_target_vect_call_round: using cached result" 2
7041 set et_vect_call_round_saved
($et_index
) 0
7042 if { [istarget aarch64
*-*-*] } {
7043 set et_vect_call_round_saved
($et_index
) 1
7047 verbose
"check_effective_target_vect_call_round:\
7048 returning $et_vect_call_round_saved
($et_index
)" 2
7049 return $et_vect_call_round_saved
($et_index
)
7052 #
Return 1 if the target supports vector roundf calls.
7054 proc check_effective_target_vect_call_roundf
{ } {
7055 global et_vect_call_roundf_saved
7058 if [info exists et_vect_call_roundf_saved
($et_index
)] {
7059 verbose
"check_effective_target_vect_call_roundf: using cached result" 2
7061 set et_vect_call_roundf_saved
($et_index
) 0
7062 if { [istarget aarch64
*-*-*] } {
7063 set et_vect_call_roundf_saved
($et_index
) 1
7067 verbose
"check_effective_target_vect_call_roundf:\
7068 returning $et_vect_call_roundf_saved
($et_index
)" 2
7069 return $et_vect_call_roundf_saved
($et_index
)
7072 #
Return 1 if the target supports section
-anchors
7074 proc check_effective_target_section_anchors
{ } {
7075 global et_section_anchors_saved
7077 if [info exists et_section_anchors_saved
] {
7078 verbose
"check_effective_target_section_anchors: using cached result" 2
7080 set et_section_anchors_saved
0
7081 if { [istarget powerpc
*-*-*]
7082 ||
[istarget arm
*-*-*]
7083 ||
[istarget aarch64
*-*-*] } {
7084 set et_section_anchors_saved
1
7088 verbose
"check_effective_target_section_anchors: returning $et_section_anchors_saved" 2
7089 return $et_section_anchors_saved
7092 #
Return 1 if the target supports atomic operations
on "int_128" values.
7094 proc check_effective_target_sync_int_128
{ } {
7095 if { [istarget spu
-*-*] } {
7102 #
Return 1 if the target supports atomic operations
on "int_128" values
7103 # and can
execute them.
7104 # This requires support
for both compare
-and
-swap and true atomic loads.
7106 proc check_effective_target_sync_int_128_runtime
{ } {
7107 if { [istarget spu
-*-*] } {
7114 #
Return 1 if the target supports atomic operations
on "long long".
7116 # Note
: 32bit x86 targets require
-march
=pentium in dg
-options.
7117 # Note
: 32bit s390 targets require
-mzarch in dg
-options.
7119 proc check_effective_target_sync_long_long
{ } {
7120 if { [istarget i?
86-*-*] ||
[istarget x86_64
-*-*])
7121 ||
[istarget aarch64
*-*-*]
7122 ||
[istarget arm
*-*-*]
7123 ||
[istarget alpha
*-*-*]
7124 ||
([istarget sparc
*-*-*] && [check_effective_target_lp64
])
7125 ||
[istarget s390
*-*-*]
7126 ||
[istarget spu
-*-*] } {
7133 #
Return 1 if the target supports atomic operations
on "long long"
7134 # and can
execute them.
7136 # Note
: 32bit x86 targets require
-march
=pentium in dg
-options.
7138 proc check_effective_target_sync_long_long_runtime
{ } {
7139 if { (([istarget x86_64
-*-*] ||
[istarget i?
86-*-*])
7140 && [check_cached_effective_target sync_long_long_available
{
7141 check_runtime_nocache sync_long_long_available
{
7145 unsigned
int eax
, ebx
, ecx
, edx
;
7146 if (__get_cpuid
(1, &eax
, &ebx
, &ecx
, &edx
))
7147 return !(edx
& bit_CMPXCHG8B
);
7152 ||
[istarget aarch64
*-*-*]
7153 ||
([istarget arm
*-*-linux
-*]
7154 && [check_runtime sync_longlong_runtime
{
7160 if (sizeof
(long long
) != 8)
7163 /* Just check
for native
;
7164 checking
for kernel fallback is tricky.
*/
7165 asm volatile
("ldrexd r0,r1, [%0]"
7166 : : "r" (&l1) : "r0", "r1");
7170 ||
[istarget alpha
*-*-*]
7171 ||
([istarget sparc
*-*-*]
7172 && [check_effective_target_lp64
]
7173 && [check_effective_target_ultrasparc_hw
])
7174 ||
[istarget spu
-*-*]
7175 ||
([istarget powerpc
*-*-*] && [check_effective_target_lp64
]) } {
7182 #
Return 1 if the target supports byte swap instructions.
7184 proc check_effective_target_bswap
{ } {
7185 global et_bswap_saved
7187 if [info exists et_bswap_saved
] {
7188 verbose
"check_effective_target_bswap: using cached result" 2
7190 set et_bswap_saved
0
7191 if { [istarget aarch64
*-*-*]
7192 ||
[istarget alpha
*-*-*]
7193 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
7194 ||
[istarget m68k
-*-*]
7195 ||
[istarget powerpc
*-*-*]
7196 ||
[istarget rs6000
-*-*]
7197 ||
[istarget s390
*-*-*]
7198 ||
([istarget arm
*-*-*]
7199 && [check_no_compiler_messages_nocache arm_v6_or_later object
{
7201 #error not armv6 or later
7205 set et_bswap_saved
1
7209 verbose
"check_effective_target_bswap: returning $et_bswap_saved" 2
7210 return $et_bswap_saved
7213 #
Return 1 if the target supports atomic operations
on "int" and "long".
7215 proc check_effective_target_sync_int_long
{ } {
7216 global et_sync_int_long_saved
7218 if [info exists et_sync_int_long_saved
] {
7219 verbose
"check_effective_target_sync_int_long: using cached result" 2
7221 set et_sync_int_long_saved
0
7222 # This is intentionally powerpc but not rs6000
, rs6000 doesn
't have the
7223 # load-reserved/store-conditional instructions.
7224 if { [istarget ia64-*-*]
7225 || [istarget i?86-*-*] || [istarget x86_64-*-*]
7226 || [istarget aarch64*-*-*]
7227 || [istarget alpha*-*-*]
7228 || [istarget arm*-*-linux-*]
7229 || ([istarget arm*-*-*]
7230 && [check_effective_target_arm_acq_rel])
7231 || [istarget bfin*-*linux*]
7232 || [istarget hppa*-*linux*]
7233 || [istarget s390*-*-*]
7234 || [istarget powerpc*-*-*]
7235 || [istarget crisv32-*-*] || [istarget cris-*-*]
7236 || ([istarget sparc*-*-*] && [check_effective_target_sparc_v9])
7237 || [istarget spu-*-*]
7238 || ([istarget arc*-*-*] && [check_effective_target_arc_atomic])
7239 || [check_effective_target_mips_llsc] } {
7240 set et_sync_int_long_saved 1
7244 verbose "check_effective_target_sync_int_long: returning $et_sync_int_long_saved" 2
7245 return $et_sync_int_long_saved
7248 # Return 1 if the target supports atomic operations on "char" and "short".
7250 proc check_effective_target_sync_char_short { } {
7251 global et_sync_char_short_saved
7253 if [info exists et_sync_char_short_saved] {
7254 verbose "check_effective_target_sync_char_short: using cached result" 2
7256 set et_sync_char_short_saved 0
7257 # This is intentionally powerpc but not rs6000, rs6000 doesn't have the
7258 #
load-reserved/store
-conditional instructions.
7259 if { [istarget aarch64
*-*-*]
7260 ||
[istarget ia64
-*-*]
7261 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
7262 ||
[istarget alpha
*-*-*]
7263 ||
[istarget arm
*-*-linux
-*]
7264 ||
([istarget arm
*-*-*]
7265 && [check_effective_target_arm_acq_rel
])
7266 ||
[istarget hppa
*-*linux
*]
7267 ||
[istarget s390
*-*-*]
7268 ||
[istarget powerpc
*-*-*]
7269 ||
[istarget crisv32
-*-*] ||
[istarget cris
-*-*]
7270 ||
([istarget sparc
*-*-*] && [check_effective_target_sparc_v9
])
7271 ||
[istarget spu
-*-*]
7272 ||
([istarget arc
*-*-*] && [check_effective_target_arc_atomic
])
7273 ||
[check_effective_target_mips_llsc
] } {
7274 set et_sync_char_short_saved
1
7278 verbose
"check_effective_target_sync_char_short: returning $et_sync_char_short_saved" 2
7279 return $et_sync_char_short_saved
7282 #
Return 1 if the target uses a ColdFire FPU.
7284 proc check_effective_target_coldfire_fpu
{ } {
7285 return [check_no_compiler_messages coldfire_fpu assembly
{
7292 #
Return true
if this is a uClibc target.
7294 proc check_effective_target_uclibc
{} {
7295 return [check_no_compiler_messages uclibc object
{
7296 #
include <features.h
>
7297 #
if !defined
(__UCLIBC__
)
7303 #
Return true
if this is a uclibc target and
if the uclibc feature
7304 # described by __$feature__ is not present.
7306 proc check_missing_uclibc_feature
{feature
} {
7307 return [check_no_compiler_messages $feature object
"
7308 #
include <features.h
>
7309 #
if !defined
(__UCLIBC
) || defined
(__$
{feature
}__
)
7315 #
Return true
if this is a Newlib target.
7317 proc check_effective_target_newlib
{} {
7318 return [check_no_compiler_messages newlib object
{
7323 # Some newlib versions don
't provide a frexpl and instead depend
7324 # on frexp to implement long double conversions in their printf-like
7325 # functions. This leads to broken results. Detect such versions here.
7327 proc check_effective_target_newlib_broken_long_double_io {} {
7328 if { [is-effective-target newlib] && ![is-effective-target frexpl] } {
7334 # Return true if this is NOT a Bionic target.
7336 proc check_effective_target_non_bionic {} {
7337 return [check_no_compiler_messages non_bionic object {
7339 #if defined (__BIONIC__)
7345 # Return true if this target has error.h header.
7347 proc check_effective_target_error_h {} {
7348 return [check_no_compiler_messages error_h object {
7353 # Return true if this target has tgmath.h header.
7355 proc check_effective_target_tgmath_h {} {
7356 return [check_no_compiler_messages tgmath_h object {
7361 # Return true if target's libc supports complex functions.
7363 proc check_effective_target_libc_has_complex_functions
{} {
7364 return [check_no_compiler_messages libc_has_complex_functions object
{
7365 #
include <complex.h
>
7370 #
(a
) an error of a few ULP is expected in string to floating
-point
7371 # conversion functions
; and
7372 #
(b
) overflow is not always detected correctly by those functions.
7374 proc check_effective_target_lax_strtofp
{} {
7375 # By default
, assume that all uClibc targets suffer from this.
7376 return [check_effective_target_uclibc
]
7379 #
Return 1 if this is a target
for which wcsftime is a dummy
7380 # function that always returns
0.
7382 proc check_effective_target_dummy_wcsftime
{} {
7383 # By default
, assume that all uClibc targets suffer from this.
7384 return [check_effective_target_uclibc
]
7387 #
Return 1 if constructors with initialization priority arguments are
7388 # supposed
on this target.
7390 proc check_effective_target_init_priority
{} {
7391 return [check_no_compiler_messages init_priority assembly
"
7392 void f
() __attribute__
((constructor
(1000)));
7397 #
Return 1 if the target matches the effective target
'arg', 0 otherwise.
7398 # This can be used with
any check_
* proc that takes no
argument and
7399 # returns only
1 or
0. It could be used with check_
* procs that take
7400 # arguments with keywords that pass particular arguments.
7402 proc is
-effective
-target
{ arg } {
7405 if { ![info exists et_index
] } {
7406 # Initialize the effective target index that is used in some
7407 # check_effective_target_
* procs.
7410 if { [info procs check_effective_target_$
{arg}] != [list
] } {
7411 set selected
[check_effective_target_$
{arg}]
7414 "vmx_hw" { set selected [check_vmx_hw_available] }
7415 "vsx_hw" { set selected [check_vsx_hw_available] }
7416 "p8vector_hw" { set selected [check_p8vector_hw_available] }
7417 "p9vector_hw" { set selected [check_p9vector_hw_available] }
7418 "p9modulo_hw" { set selected [check_p9modulo_hw_available] }
7419 "ppc_float128_sw" { set selected [check_ppc_float128_sw_available] }
7420 "ppc_float128_hw" { set selected [check_ppc_float128_hw_available] }
7421 "ppc_recip_hw" { set selected [check_ppc_recip_hw_available] }
7422 "ppc_cpu_supports_hw" { set selected [check_ppc_cpu_supports_hw_available] }
7423 "dfp_hw" { set selected [check_dfp_hw_available] }
7424 "htm_hw" { set selected [check_htm_hw_available] }
7425 "named_sections" { set selected [check_named_sections_available] }
7426 "gc_sections" { set selected [check_gc_sections_available] }
7427 "cxa_atexit" { set selected [check_cxa_atexit_available] }
7428 default
{ error
"unknown effective target keyword `$arg'" }
7431 verbose
"is-effective-target: $arg $selected" 2
7435 #
Return 1 if the
argument is an effective
-target keyword
, 0 otherwise.
7437 proc is
-effective
-target
-keyword
{ arg } {
7438 if { [info procs check_effective_target_$
{arg}] != [list
] } {
7441 # These have different names
for their check_
* procs.
7443 "vmx_hw" { return 1 }
7444 "vsx_hw" { return 1 }
7445 "p8vector_hw" { return 1 }
7446 "p9vector_hw" { return 1 }
7447 "p9modulo_hw" { return 1 }
7448 "ppc_float128_sw" { return 1 }
7449 "ppc_float128_hw" { return 1 }
7450 "ppc_recip_hw" { return 1 }
7451 "dfp_hw" { return 1 }
7452 "htm_hw" { return 1 }
7453 "named_sections" { return 1 }
7454 "gc_sections" { return 1 }
7455 "cxa_atexit" { return 1 }
7456 default
{ return 0 }
7461 #
Execute tests
for all targets in EFFECTIVE_TARGETS list.
Set et_index to
7462 # indicate what target is currently being processed. This is
for
7463 # the vectorizer tests
, e.g. vect_int
, to keep track what target supports
7466 proc et
-dg
-runtest
{ runtest testcases flags default
-extra
-flags
} {
7467 global dg
-do-what
-default
7468 global EFFECTIVE_TARGETS
7471 if { [llength $EFFECTIVE_TARGETS
] > 0 } {
7472 foreach target $EFFECTIVE_TARGETS
{
7473 set target_flags $flags
7474 set dg
-do-what
-default
compile
7475 set et_index
[lsearch
-exact $EFFECTIVE_TARGETS $target
]
7476 if { [info procs add_options_for_$
{target
}] != [list
] } {
7477 set target_flags
[add_options_for_$
{target
} "$flags"]
7479 if { [info procs check_effective_target_$
{target
}_runtime
]
7480 != [list
] && [check_effective_target_$
{target
}_runtime
] } {
7481 set dg
-do-what
-default run
7483 $runtest $testcases $target_flags $
{default
-extra
-flags
}
7487 $runtest $testcases $flags $
{default
-extra
-flags
}
7491 #
Return 1 if a target matches the target in EFFECTIVE_TARGETS at index
7492 # et_index
, 0 otherwise.
7494 proc et
-is
-effective
-target
{ target
} {
7495 global EFFECTIVE_TARGETS
7498 if { [llength $EFFECTIVE_TARGETS
] > $et_index
7499 && [lindex $EFFECTIVE_TARGETS $et_index
] == $target
} {
7505 #
Return 1 if target default to short enums
7507 proc check_effective_target_short_enums
{ } {
7508 return [check_no_compiler_messages short_enums assembly
{
7510 int s
[sizeof
(enum foo
) == 1 ?
1 : -1];
7514 #
Return 1 if target supports merging string constants at link time.
7516 proc check_effective_target_string_merging
{ } {
7517 return [check_no_messages_and_pattern string_merging \
7518 "rodata\\.str" assembly {
7519 const char
*var
= "String";
7523 #
Return 1 if target has the basic signed and unsigned types in
7524 #
<stdint.h
>, 0 otherwise. This will be obsolete when GCC ensures a
7525 # working
<stdint.h
> for all targets.
7527 proc check_effective_target_stdint_types
{ } {
7528 return [check_no_compiler_messages stdint_types assembly
{
7530 int8_t a
; int16_t b
; int32_t c
; int64_t d
;
7531 uint8_t e
; uint16_t f
; uint32_t g
; uint64_t h
;
7535 #
Return 1 if target has the basic signed and unsigned types in
7536 #
<inttypes.h
>, 0 otherwise. This is
for tests that GCC
's notions of
7537 # these types agree with those in the header, as some systems have
7538 # only <inttypes.h>.
7540 proc check_effective_target_inttypes_types { } {
7541 return [check_no_compiler_messages inttypes_types assembly {
7542 #include <inttypes.h>
7543 int8_t a; int16_t b; int32_t c; int64_t d;
7544 uint8_t e; uint16_t f; uint32_t g; uint64_t h;
7548 # Return 1 if programs are intended to be run on a simulator
7549 # (i.e. slowly) rather than hardware (i.e. fast).
7551 proc check_effective_target_simulator { } {
7553 # All "src/sim" simulators set this one.
7554 if [board_info target exists is_simulator] {
7555 return [board_info target is_simulator]
7558 # The "sid" simulators don't
set that one
, but at least they
set
7560 if [board_info target
exists slow_simulator
] {
7561 return [board_info target slow_simulator
]
7567 #
Return 1 if programs are intended to be run
on hardware rather than
7570 proc check_effective_target_hw
{ } {
7572 # All
"src/sim" simulators set this one.
7573 if [board_info target
exists is_simulator
] {
7574 if [board_info target is_simulator
] {
7581 # The
"sid" simulators don't set that one, but at least they set
7583 if [board_info target
exists slow_simulator
] {
7584 if [board_info target slow_simulator
] {
7594 #
Return 1 if the target is a VxWorks kernel.
7596 proc check_effective_target_vxworks_kernel
{ } {
7597 return [check_no_compiler_messages vxworks_kernel assembly
{
7598 #
if !defined __vxworks || defined __RTP__
7604 #
Return 1 if the target is a VxWorks RTP.
7606 proc check_effective_target_vxworks_rtp
{ } {
7607 return [check_no_compiler_messages vxworks_rtp assembly
{
7608 #
if !defined __vxworks ||
!defined __RTP__
7614 #
Return 1 if the target is expected to provide wide character support.
7616 proc check_effective_target_wchar
{ } {
7617 if {[check_missing_uclibc_feature UCLIBC_HAS_WCHAR
]} {
7620 return [check_no_compiler_messages wchar assembly
{
7625 #
Return 1 if the target has
<pthread.h
>.
7627 proc check_effective_target_pthread_h
{ } {
7628 return [check_no_compiler_messages pthread_h assembly
{
7629 #
include <pthread.h
>
7633 #
Return 1 if the target can truncate a file from a file
-descriptor
,
7634 # as used by libgfortran
/io
/unix.c
:fd_truncate
; i.e. ftruncate or
7635 # chsize. We test
for a trivially functional truncation
; no stubs.
7636 # As libgfortran uses _FILE_OFFSET_BITS
64, we
do too
; it
'll cause a
7637 # different function to be used.
7639 proc check_effective_target_fd_truncate { } {
7641 #define _FILE_OFFSET_BITS 64
7648 FILE *f = fopen ("tst.tmp", "wb");
7650 const char t[] = "test writing more than ten characters";
7654 write (fd, t, sizeof (t) - 1);
7656 if (ftruncate (fd, 10) != 0)
7665 f = fopen ("tst.tmp", "rb");
7666 if (fread (s, 1, sizeof (s), f) != 10 || strncmp (s, t, 10) != 0)
7674 if { [check_runtime ftruncate $prog] } {
7678 regsub "ftruncate" $prog "chsize" prog
7679 return [check_runtime chsize $prog]
7682 # Add to FLAGS all the target-specific flags needed to access the c99 runtime.
7684 proc add_options_for_c99_runtime { flags } {
7685 if { [istarget *-*-solaris2*] } {
7686 return "$flags -std=c99"
7688 if { [istarget powerpc-*-darwin*] } {
7689 return "$flags -mmacosx-version-min=10.3"
7694 # Add to FLAGS all the target-specific flags needed to enable
7695 # full IEEE compliance mode.
7697 proc add_options_for_ieee { flags } {
7698 if { [istarget alpha*-*-*]
7699 || [istarget sh*-*-*] } {
7700 return "$flags -mieee"
7702 if { [istarget rx-*-*] } {
7703 return "$flags -mnofpu"
7708 if {![info exists flags_to_postpone]} {
7709 set flags_to_postpone ""
7712 # Add to FLAGS the flags needed to enable functions to bind locally
7713 # when using pic/PIC passes in the testsuite.
7714 proc add_options_for_bind_pic_locally { flags } {
7715 global flags_to_postpone
7717 # Instead of returning 'flags
' with the -fPIE or -fpie appended, we save it
7718 # in 'flags_to_postpone
' and append it later in gcc_target_compile procedure in
7719 # order to make sure that the multilib_flags doesn't override this.
7721 if {[check_no_compiler_messages using_pic2 assembly
{
7726 set flags_to_postpone
"-fPIE"
7729 if {[check_no_compiler_messages using_pic1 assembly
{
7734 set flags_to_postpone
"-fpie"
7740 # Add to FLAGS the flags needed to enable
64-bit vectors.
7742 proc add_options_for_double_vectors
{ flags
} {
7743 if [is
-effective
-target arm_neon_ok
] {
7744 return "$flags -mvectorize-with-neon-double"
7750 # Add to FLAGS the flags needed to
define the STACK_SIZE macro.
7752 proc add_options_for_stack_size
{ flags
} {
7753 if [is
-effective
-target stack_size
] {
7754 set stack_size
[dg
-effective
-target
-value stack_size
]
7755 return "$flags -DSTACK_SIZE=$stack_size"
7761 #
Return 1 if the target provides a full C99 runtime.
7763 proc check_effective_target_c99_runtime
{ } {
7764 return [check_cached_effective_target c99_runtime
{
7767 set file
[open
"$srcdir/gcc.dg/builtins-config.h"]
7768 set contents
[read $file
]
7771 #ifndef HAVE_C99_RUNTIME
7772 #error
!HAVE_C99_RUNTIME
7775 check_no_compiler_messages_nocache c99_runtime assembly \
7776 $contents
[add_options_for_c99_runtime
""]
7780 #
Return 1 if target wchar_t is at least
4 bytes.
7782 proc check_effective_target_4byte_wchar_t
{ } {
7783 return [check_no_compiler_messages
4byte_wchar_t object
{
7784 int dummy
[sizeof
(__WCHAR_TYPE__
) >= 4 ?
1 : -1];
7788 #
Return 1 if the target supports automatic stack alignment.
7790 proc check_effective_target_automatic_stack_alignment
{ } {
7791 # Ordinarily x86 supports automatic stack alignment ...
7792 if { [istarget i?
86*-*-*] ||
[istarget x86_64
-*-*] } then {
7793 if { [istarget
*-*-mingw
*] ||
[istarget
*-*-cygwin
*] } {
7794 # ... except Win64 SEH doesn
't. Succeed for Win32 though.
7795 return [check_effective_target_ilp32];
7802 # Return true if we are compiling for AVX target.
7804 proc check_avx_available { } {
7805 if { [check_no_compiler_messages avx_available assembly {
7815 # Return true if 32- and 16-bytes vectors are available.
7817 proc check_effective_target_vect_sizes_32B_16B { } {
7818 return [expr { [available_vector_sizes] == [list 256 128] }]
7821 # Return true if 16- and 8-bytes vectors are available.
7823 proc check_effective_target_vect_sizes_16B_8B { } {
7824 if { [check_avx_available]
7825 || [is-effective-target arm_neon]
7826 || [istarget aarch64*-*-*] } {
7834 # Return true if 128-bits vectors are preferred even if 256-bits vectors
7837 proc check_prefer_avx128 { } {
7838 if ![check_avx_available] {
7841 return [check_no_messages_and_pattern avx_explicit "xmm" assembly {
7842 float a[1024],b[1024],c[1024];
7843 void foo (void) { int i; for (i = 0; i < 1024; i++) a[i]=b[i]+c[i];}
7844 } "-O2 -ftree-vectorize"]
7848 # Return 1 if avx512f instructions can be compiled.
7850 proc check_effective_target_avx512f { } {
7851 return [check_no_compiler_messages avx512f object {
7852 typedef double __m512d __attribute__ ((__vector_size__ (64)));
7854 __m512d _mm512_add (__m512d a)
7856 return __builtin_ia32_addpd512_mask (a, a, a, 1, 4);
7861 # Return 1 if avx instructions can be compiled.
7863 proc check_effective_target_avx { } {
7864 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
7867 return [check_no_compiler_messages avx object {
7868 void _mm256_zeroall (void)
7870 __builtin_ia32_vzeroall ();
7875 # Return 1 if avx2 instructions can be compiled.
7876 proc check_effective_target_avx2 { } {
7877 return [check_no_compiler_messages avx2 object {
7878 typedef long long __v4di __attribute__ ((__vector_size__ (32)));
7880 mm256_is32_andnotsi256 (__v4di __X, __v4di __Y)
7882 return __builtin_ia32_andnotsi256 (__X, __Y);
7887 # Return 1 if sse instructions can be compiled.
7888 proc check_effective_target_sse { } {
7889 return [check_no_compiler_messages sse object {
7892 __builtin_ia32_stmxcsr ();
7898 # Return 1 if sse2 instructions can be compiled.
7899 proc check_effective_target_sse2 { } {
7900 return [check_no_compiler_messages sse2 object {
7901 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
7903 __m128i _mm_srli_si128 (__m128i __A, int __N)
7905 return (__m128i)__builtin_ia32_psrldqi128 (__A, 8);
7910 # Return 1 if sse4.1 instructions can be compiled.
7911 proc check_effective_target_sse4 { } {
7912 return [check_no_compiler_messages sse4.1 object {
7913 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
7914 typedef int __v4si __attribute__ ((__vector_size__ (16)));
7916 __m128i _mm_mullo_epi32 (__m128i __X, __m128i __Y)
7918 return (__m128i) __builtin_ia32_pmulld128 ((__v4si)__X,
7924 # Return 1 if F16C instructions can be compiled.
7926 proc check_effective_target_f16c { } {
7927 return [check_no_compiler_messages f16c object {
7928 #include "immintrin.h"
7930 foo (unsigned short val)
7932 return _cvtsh_ss (val);
7937 # Return 1 if C wchar_t type is compatible with char16_t.
7939 proc check_effective_target_wchar_t_char16_t_compatible { } {
7940 return [check_no_compiler_messages wchar_t_char16_t object {
7942 __CHAR16_TYPE__ *p16 = &wc;
7943 char t[(((__CHAR16_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
7947 # Return 1 if C wchar_t type is compatible with char32_t.
7949 proc check_effective_target_wchar_t_char32_t_compatible { } {
7950 return [check_no_compiler_messages wchar_t_char32_t object {
7952 __CHAR32_TYPE__ *p32 = &wc;
7953 char t[(((__CHAR32_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
7957 # Return 1 if pow10 function exists.
7959 proc check_effective_target_pow10 { } {
7960 return [check_runtime pow10 {
7970 # Return 1 if frexpl function exists.
7972 proc check_effective_target_frexpl { } {
7973 return [check_runtime frexpl {
7978 x = frexpl (5.0, &y);
7985 # Return 1 if issignaling function exists.
7986 proc check_effective_target_issignaling {} {
7987 return [check_runtime issignaling {
7992 return issignaling (0.0);
7997 # Return 1 if current options generate DFP instructions, 0 otherwise.
7998 proc check_effective_target_hard_dfp {} {
7999 return [check_no_messages_and_pattern hard_dfp "!adddd3" assembly {
8000 typedef float d64 __attribute__((mode(DD)));
8002 void foo (void) { z = x + y; }
8006 # Return 1 if string.h and wchar.h headers provide C++ requires overloads
8007 # for strchr etc. functions.
8009 proc check_effective_target_correct_iso_cpp_string_wchar_protos { } {
8010 return [check_no_compiler_messages correct_iso_cpp_string_wchar_protos assembly {
8013 #if !defined(__cplusplus) \
8014 || !defined(__CORRECT_ISO_CPP_STRING_H_PROTO) \
8015 || !defined(__CORRECT_ISO_CPP_WCHAR_H_PROTO)
8016 ISO C++ correct string.h and wchar.h protos not supported.
8023 # Return 1 if GNU as is used.
8025 proc check_effective_target_gas { } {
8026 global use_gas_saved
8029 if {![info exists use_gas_saved]} {
8030 # Check if the as used by gcc is GNU as.
8031 set gcc_as [lindex [${tool}_target_compile "-print-prog-name=as" "" "none" ""] 0]
8032 # Provide /dev/null as input, otherwise gas times out reading from
8034 set status [remote_exec host "$gcc_as" "-v /dev/null"]
8035 set as_output [lindex $status 1]
8036 if { [ string first "GNU" $as_output ] >= 0 } {
8042 return $use_gas_saved
8045 # Return 1 if GNU ld is used.
8047 proc check_effective_target_gld { } {
8048 global use_gld_saved
8051 if {![info exists use_gld_saved]} {
8052 # Check if the ld used by gcc is GNU ld.
8053 set gcc_ld [lindex [${tool}_target_compile "-print-prog-name=ld" "" "none" ""] 0]
8054 set status [remote_exec host "$gcc_ld" "--version"]
8055 set ld_output [lindex $status 1]
8056 if { [ string first "GNU" $ld_output ] >= 0 } {
8062 return $use_gld_saved
8065 # Return 1 if the compiler has been configure with link-time optimization
8068 proc check_effective_target_lto { } {
8069 if { [istarget nvptx-*-*] } {
8072 return [check_no_compiler_messages lto object {
8077 # Return 1 if -mx32 -maddress-mode=short can compile, 0 otherwise.
8079 proc check_effective_target_maybe_x32 { } {
8080 return [check_no_compiler_messages maybe_x32 object {
8082 } "-mx32 -maddress-mode=short"]
8085 # Return 1 if this target supports the -fsplit-stack option, 0
8088 proc check_effective_target_split_stack {} {
8089 return [check_no_compiler_messages split_stack object {
8094 # Return 1 if this target supports the -masm=intel option, 0
8097 proc check_effective_target_masm_intel {} {
8098 return [check_no_compiler_messages masm_intel object {
8099 extern void abort (void);
8103 # Return 1 if the language for the compiler under test is C.
8105 proc check_effective_target_c { } {
8107 if [string match $tool "gcc"] {
8113 # Return 1 if the language for the compiler under test is C++.
8115 proc check_effective_target_c++ { } {
8117 if { [string match $tool "g++"] || [string match $tool "libstdc++"] } {
8123 set cxx_default "c++14"
8124 # Check whether the current active language standard supports the features
8125 # of C++11/C++14 by checking for the presence of one of the -std flags.
8126 # This assumes that the default for the compiler is $cxx_default, and that
8127 # there will never be multiple -std= arguments on the command line.
8128 proc check_effective_target_c++11_only { } {
8130 if ![check_effective_target_c++] {
8133 if [check-flags { { } { } { -std=c++0x -std=gnu++0x -std=c++11 -std=gnu++11 } }] {
8136 if { $cxx_default == "c++11" && [check-flags { { } { } { } { -std=* } }] } {
8141 proc check_effective_target_c++11 { } {
8142 if [check_effective_target_c++11_only] {
8145 return [check_effective_target_c++14]
8147 proc check_effective_target_c++11_down { } {
8148 if ![check_effective_target_c++] {
8151 return [expr ![check_effective_target_c++14] ]
8154 proc check_effective_target_c++14_only { } {
8156 if ![check_effective_target_c++] {
8159 if [check-flags { { } { } { -std=c++14 -std=gnu++14 -std=c++14 -std=gnu++14 } }] {
8162 if { $cxx_default == "c++14" && [check-flags { { } { } { } { -std=* } }] } {
8168 proc check_effective_target_c++14 { } {
8169 if [check_effective_target_c++14_only] {
8172 return [check_effective_target_c++17]
8174 proc check_effective_target_c++14_down { } {
8175 if ![check_effective_target_c++] {
8178 return [expr ![check_effective_target_c++17] ]
8181 proc check_effective_target_c++98_only { } {
8183 if ![check_effective_target_c++] {
8186 if [check-flags { { } { } { -std=c++98 -std=gnu++98 -std=c++03 -std=gnu++03 } }] {
8189 if { $cxx_default == "c++98" && [check-flags { { } { } { } { -std=* } }] } {
8195 proc check_effective_target_c++17_only { } {
8197 if ![check_effective_target_c++] {
8200 if [check-flags { { } { } { -std=c++17 -std=gnu++17 -std=c++1z -std=gnu++1z } }] {
8203 if { $cxx_default == "c++17" && [check-flags { { } { } { } { -std=* } }] } {
8209 proc check_effective_target_c++17 { } {
8210 if [check_effective_target_c++17_only] {
8213 return [check_effective_target_c++2a]
8215 proc check_effective_target_c++17_down { } {
8216 if ![check_effective_target_c++] {
8219 return [expr ![check_effective_target_c++2a] ]
8222 proc check_effective_target_c++2a_only { } {
8224 if ![check_effective_target_c++] {
8227 if [check-flags { { } { } { -std=c++2a -std=gnu++2a } }] {
8230 if { $cxx_default == "c++20" && [check-flags { { } { } { } { -std=* } }] } {
8235 proc check_effective_target_c++2a { } {
8236 return [check_effective_target_c++2a_only]
8239 # Check for C++ Concepts TS support, i.e. -fconcepts flag.
8240 proc check_effective_target_concepts { } {
8241 return [check-flags { "" { } { -fconcepts } }]
8244 # Return 1 if expensive testcases should be run.
8246 proc check_effective_target_run_expensive_tests { } {
8247 if { [getenv GCC_TEST_RUN_EXPENSIVE] != "" } {
8253 # Returns 1 if "mempcpy" is available on the target system.
8255 proc check_effective_target_mempcpy {} {
8256 return [check_function_available "mempcpy"]
8259 # Returns 1 if "stpcpy" is available on the target system.
8261 proc check_effective_target_stpcpy {} {
8262 return [check_function_available "stpcpy"]
8265 # Check whether the vectorizer tests are supported by the target and
8266 # append additional target-dependent compile flags to DEFAULT_VECTCFLAGS.
8267 # If a port wants to execute the tests more than once it should append
8268 # the supported target to EFFECTIVE_TARGETS instead, and the compile flags
8269 # will be added by a call to add_options_for_<target>.
8270 # Set dg-do-what-default to either compile or run, depending on target
8271 # capabilities. Do not set this if the supported target is appended to
8272 # EFFECTIVE_TARGETS. Flags and this variable will be set by et-dg-runtest
8273 # automatically. Return the number of effective targets if vectorizer tests
8274 # are supported, 0 otherwise.
8276 proc check_vect_support_and_set_flags { } {
8277 global DEFAULT_VECTCFLAGS
8278 global dg-do-what-default
8279 global EFFECTIVE_TARGETS
8281 if [istarget powerpc-*paired*] {
8282 lappend DEFAULT_VECTCFLAGS "-mpaired"
8283 if [check_750cl_hw_available] {
8284 set dg-do-what-default run
8286 set dg-do-what-default compile
8288 } elseif [istarget powerpc*-*-*] {
8289 # Skip targets not supporting -maltivec.
8290 if ![is-effective-target powerpc_altivec_ok] {
8294 lappend DEFAULT_VECTCFLAGS "-maltivec"
8295 if [check_p9vector_hw_available] {
8296 lappend DEFAULT_VECTCFLAGS "-mpower9-vector"
8297 } elseif [check_p8vector_hw_available] {
8298 lappend DEFAULT_VECTCFLAGS "-mpower8-vector"
8299 } elseif [check_vsx_hw_available] {
8300 lappend DEFAULT_VECTCFLAGS "-mvsx" "-mno-allow-movmisalign"
8303 if [check_vmx_hw_available] {
8304 set dg-do-what-default run
8306 if [is-effective-target ilp32] {
8307 # Specify a cpu that supports VMX for compile-only tests.
8308 lappend DEFAULT_VECTCFLAGS "-mcpu=970"
8310 set dg-do-what-default compile
8312 } elseif { [istarget spu-*-*] } {
8313 set dg-do-what-default run
8314 } elseif { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
8315 lappend DEFAULT_VECTCFLAGS "-msse2"
8316 if { [check_effective_target_sse2_runtime] } {
8317 set dg-do-what-default run
8319 set dg-do-what-default compile
8321 } elseif { [istarget mips*-*-*]
8322 && [check_effective_target_nomips16] } {
8323 if { [check_effective_target_mpaired_single] } {
8324 lappend EFFECTIVE_TARGETS mpaired_single
8326 if { [check_effective_target_mips_loongson] } {
8327 lappend EFFECTIVE_TARGETS mips_loongson
8329 if { [check_effective_target_mips_msa] } {
8330 lappend EFFECTIVE_TARGETS mips_msa
8332 return [llength $EFFECTIVE_TARGETS]
8333 } elseif [istarget sparc*-*-*] {
8334 lappend DEFAULT_VECTCFLAGS "-mcpu=ultrasparc" "-mvis"
8335 if [check_effective_target_ultrasparc_hw] {
8336 set dg-do-what-default run
8338 set dg-do-what-default compile
8340 } elseif [istarget alpha*-*-*] {
8341 # Alpha's vectorization capabilities are extremely limited.
8342 # It
's more effort than its worth disabling all of the tests
8343 # that it cannot pass. But if you actually want to see what
8344 # does work, command out the return.
8347 lappend DEFAULT_VECTCFLAGS "-mmax"
8348 if [check_alpha_max_hw_available] {
8349 set dg-do-what-default run
8351 set dg-do-what-default compile
8353 } elseif [istarget ia64-*-*] {
8354 set dg-do-what-default run
8355 } elseif [is-effective-target arm_neon_ok] {
8356 eval lappend DEFAULT_VECTCFLAGS [add_options_for_arm_neon ""]
8357 # NEON does not support denormals, so is not used for vectorization by
8358 # default to avoid loss of precision. We must pass -ffast-math to test
8359 # vectorization of float operations.
8360 lappend DEFAULT_VECTCFLAGS "-ffast-math"
8361 if [is-effective-target arm_neon_hw] {
8362 set dg-do-what-default run
8364 set dg-do-what-default compile
8366 } elseif [istarget "aarch64*-*-*"] {
8367 set dg-do-what-default run
8368 } elseif [istarget s390*-*-*] {
8369 # The S/390 backend set a default of 2 for that value.
8370 # Override it to have the same situation as with other
8372 lappend DEFAULT_VECTCFLAGS "--param" "min-vect-loop-bound=1"
8373 lappend DEFAULT_VECTCFLAGS "--param" "max-unrolled-insns=200"
8374 lappend DEFAULT_VECTCFLAGS "--param" "max-unroll-times=8"
8375 lappend DEFAULT_VECTCFLAGS "--param" "max-completely-peeled-insns=200"
8376 lappend DEFAULT_VECTCFLAGS "--param" "max-completely-peel-times=16"
8377 if [check_effective_target_s390_vxe] {
8378 lappend DEFAULT_VECTCFLAGS "-march=z14" "-mzarch"
8379 set dg-do-what-default run
8380 } elseif [check_effective_target_s390_vx] {
8381 lappend DEFAULT_VECTCFLAGS "-march=z13" "-mzarch"
8382 set dg-do-what-default run
8384 lappend DEFAULT_VECTCFLAGS "-march=z14" "-mzarch"
8385 set dg-do-what-default compile
8394 # Return 1 if the target does *not* require strict alignment.
8396 proc check_effective_target_non_strict_align {} {
8398 # On ARM, the default is to use STRICT_ALIGNMENT, but there
8399 # are interfaces defined for misaligned access and thus
8400 # depending on the architecture levels unaligned access is
8402 if [istarget "arm*-*-*"] {
8403 return [check_effective_target_arm_unaligned]
8406 return [check_no_compiler_messages non_strict_align assembly {
8408 typedef char __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__))) c;
8410 void foo(void) { z = (c *) y; }
8414 # Return 1 if the target has <ucontext.h>.
8416 proc check_effective_target_ucontext_h { } {
8417 return [check_no_compiler_messages ucontext_h assembly {
8418 #include <ucontext.h>
8422 proc check_effective_target_aarch64_tiny { } {
8423 if { [istarget aarch64*-*-*] } {
8424 return [check_no_compiler_messages aarch64_tiny object {
8425 #ifdef __AARCH64_CMODEL_TINY__
8428 #error target not AArch64 tiny code model
8436 # Create functions to check that the AArch64 assembler supports the
8437 # various architecture extensions via the .arch_extension pseudo-op.
8439 foreach { aarch64_ext } { "fp" "simd" "crypto" "crc" "lse" "dotprod"} {
8440 eval [string map [list FUNC $aarch64_ext] {
8441 proc check_effective_target_aarch64_asm_FUNC_ok { } {
8442 if { [istarget aarch64*-*-*] } {
8443 return [check_no_compiler_messages aarch64_FUNC_assembler object {
8444 __asm__ (".arch_extension FUNC");
8445 } "-march=armv8-a+FUNC"]
8453 proc check_effective_target_aarch64_small { } {
8454 if { [istarget aarch64*-*-*] } {
8455 return [check_no_compiler_messages aarch64_small object {
8456 #ifdef __AARCH64_CMODEL_SMALL__
8459 #error target not AArch64 small code model
8467 proc check_effective_target_aarch64_large { } {
8468 if { [istarget aarch64*-*-*] } {
8469 return [check_no_compiler_messages aarch64_large object {
8470 #ifdef __AARCH64_CMODEL_LARGE__
8473 #error target not AArch64 large code model
8482 # Return 1 if this is a reduced AVR Tiny core. Such cores have different
8483 # register set, instruction set, addressing capabilities and ABI.
8485 proc check_effective_target_avr_tiny { } {
8486 if { [istarget avr*-*-*] } {
8487 return [check_no_compiler_messages avr_tiny object {
8491 #error target not a reduced AVR Tiny core
8499 # Return 1 if <fenv.h> is available with all the standard IEEE
8500 # exceptions and floating-point exceptions are raised by arithmetic
8501 # operations. (If the target requires special options for "inexact"
8502 # exceptions, those need to be specified in the testcases.)
8504 proc check_effective_target_fenv_exceptions {} {
8505 return [check_runtime fenv_exceptions {
8508 #ifndef FE_DIVBYZERO
8509 # error Missing FE_DIVBYZERO
8512 # error Missing FE_INEXACT
8515 # error Missing FE_INVALID
8518 # error Missing FE_OVERFLOW
8520 #ifndef FE_UNDERFLOW
8521 # error Missing FE_UNDERFLOW
8523 volatile float a = 0.0f, r;
8528 if (fetestexcept (FE_INVALID))
8533 } [add_options_for_ieee "-std=gnu99"]]
8536 proc check_effective_target_tiny {} {
8537 global et_target_tiny_saved
8539 if [info exists et_target_tiny_saved] {
8540 verbose "check_effective_target_tiny: using cached result" 2
8542 set et_target_tiny_saved 0
8543 if { [istarget aarch64*-*-*]
8544 && [check_effective_target_aarch64_tiny] } {
8545 set et_target_tiny_saved 1
8547 if { [istarget avr-*-*]
8548 && [check_effective_target_avr_tiny] } {
8549 set et_target_tiny_saved 1
8553 return $et_target_tiny_saved
8556 # Return 1 if LOGICAL_OP_NON_SHORT_CIRCUIT is set to 0 for the current target.
8558 proc check_effective_target_logical_op_short_circuit {} {
8559 if { [istarget mips*-*-*]
8560 || [istarget arc*-*-*]
8561 || [istarget avr*-*-*]
8562 || [istarget crisv32-*-*] || [istarget cris-*-*]
8563 || [istarget mmix-*-*]
8564 || [istarget s390*-*-*]
8565 || [istarget powerpc*-*-*]
8566 || [istarget nios2*-*-*]
8567 || [istarget riscv*-*-*]
8568 || [istarget visium-*-*]
8569 || [check_effective_target_arm_cortex_m] } {
8575 # Record that dg-final test TEST requires convential compilation.
8577 proc force_conventional_output_for { test } {
8578 if { [info proc $test] == "" } {
8579 perror "$test does not exist"
8582 proc ${test}_required_options {} {
8583 global gcc_force_conventional_output
8584 return $gcc_force_conventional_output
8588 # Return 1 if the x86-64 target supports PIE with copy reloc, 0
8589 # otherwise. Cache the result.
8591 proc check_effective_target_pie_copyreloc { } {
8592 global pie_copyreloc_available_saved
8594 global GCC_UNDER_TEST
8596 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
8600 # Need auto-host.h to check linker support.
8601 if { ![file exists ../../auto-host.h ] } {
8605 if [info exists pie_copyreloc_available_saved] {
8606 verbose "check_effective_target_pie_copyreloc returning saved $pie_copyreloc_available_saved" 2
8608 # Set up and compile to see if linker supports PIE with copy
8609 # reloc. Include the current process ID in the file names to
8610 # prevent conflicts with invocations for multiple testsuites.
8615 set f [open $src "w"]
8616 puts $f "#include \"../../auto-host.h\""
8617 puts $f "#if HAVE_LD_PIE_COPYRELOC == 0"
8618 puts $f "# error Linker does not support PIE with copy reloc."
8622 verbose "check_effective_target_pie_copyreloc compiling testfile $src" 2
8623 set lines [${tool}_target_compile $src $obj object ""]
8628 if [string match "" $lines] then {
8629 verbose "check_effective_target_pie_copyreloc testfile compilation passed" 2
8630 set pie_copyreloc_available_saved 1
8632 verbose "check_effective_target_pie_copyreloc testfile compilation failed" 2
8633 set pie_copyreloc_available_saved 0
8637 return $pie_copyreloc_available_saved
8640 # Return 1 if the x86 target supports R_386_GOT32X relocation, 0
8641 # otherwise. Cache the result.
8643 proc check_effective_target_got32x_reloc { } {
8644 global got32x_reloc_available_saved
8646 global GCC_UNDER_TEST
8648 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
8652 # Need auto-host.h to check linker support.
8653 if { ![file exists ../../auto-host.h ] } {
8657 if [info exists got32x_reloc_available_saved] {
8658 verbose "check_effective_target_got32x_reloc returning saved $got32x_reloc_available_saved" 2
8660 # Include the current process ID in the file names to prevent
8661 # conflicts with invocations for multiple testsuites.
8663 set src got32x[pid].c
8664 set obj got32x[pid].o
8666 set f [open $src "w"]
8667 puts $f "#include \"../../auto-host.h\""
8668 puts $f "#if HAVE_AS_IX86_GOT32X == 0"
8669 puts $f "# error Assembler does not support R_386_GOT32X."
8673 verbose "check_effective_target_got32x_reloc compiling testfile $src" 2
8674 set lines [${tool}_target_compile $src $obj object ""]
8679 if [string match "" $lines] then {
8680 verbose "check_effective_target_got32x_reloc testfile compilation passed" 2
8681 set got32x_reloc_available_saved 1
8683 verbose "check_effective_target_got32x_reloc testfile compilation failed" 2
8684 set got32x_reloc_available_saved 0
8688 return $got32x_reloc_available_saved
8691 # Return 1 if the x86 target supports calling ___tls_get_addr via GOT,
8692 # 0 otherwise. Cache the result.
8694 proc check_effective_target_tls_get_addr_via_got { } {
8695 global tls_get_addr_via_got_available_saved
8697 global GCC_UNDER_TEST
8699 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
8703 # Need auto-host.h to check linker support.
8704 if { ![file exists ../../auto-host.h ] } {
8708 if [info exists tls_get_addr_via_got_available_saved] {
8709 verbose "check_effective_target_tls_get_addr_via_got returning saved $tls_get_addr_via_got_available_saved" 2
8711 # Include the current process ID in the file names to prevent
8712 # conflicts with invocations for multiple testsuites.
8714 set src tls_get_addr_via_got[pid].c
8715 set obj tls_get_addr_via_got[pid].o
8717 set f [open $src "w"]
8718 puts $f "#include \"../../auto-host.h\""
8719 puts $f "#if HAVE_AS_IX86_TLS_GET_ADDR_GOT == 0"
8720 puts $f "# error Assembler/linker do not support calling ___tls_get_addr via GOT."
8724 verbose "check_effective_target_tls_get_addr_via_got compiling testfile $src" 2
8725 set lines [${tool}_target_compile $src $obj object ""]
8730 if [string match "" $lines] then {
8731 verbose "check_effective_target_tls_get_addr_via_got testfile compilation passed" 2
8732 set tls_get_addr_via_got_available_saved 1
8734 verbose "check_effective_target_tls_get_addr_via_got testfile compilation failed" 2
8735 set tls_get_addr_via_got_available_saved 0
8739 return $tls_get_addr_via_got_available_saved
8742 # Return 1 if the target uses comdat groups.
8744 proc check_effective_target_comdat_group {} {
8745 return [check_no_messages_and_pattern comdat_group "\.section\[^\n\r]*,comdat" assembly {
8747 inline int foo () { return 1; }
8752 # Return 1 if target supports __builtin_eh_return
8753 proc check_effective_target_builtin_eh_return { } {
8754 return [check_no_compiler_messages builtin_eh_return object {
8755 void test (long l, void *p)
8757 __builtin_eh_return (l, p);
8762 # Return 1 if the target supports max reduction for vectors.
8764 proc check_effective_target_vect_max_reduc { } {
8765 if { [istarget aarch64*-*-*] || [is-effective-target arm_neon] } {
8771 # Return 1 if there is an nvptx offload compiler.
8773 proc check_effective_target_offload_nvptx { } {
8774 return [check_no_compiler_messages offload_nvptx object {
8775 int main () {return 0;}
8776 } "-foffload=nvptx-none" ]
8779 # Return 1 if the compiler has been configured with hsa offloading.
8781 proc check_effective_target_offload_hsa { } {
8782 return [check_no_compiler_messages offload_hsa assembly {
8783 int main () {return 0;}
8787 # Return 1 if the target support -fprofile-update=atomic
8788 proc check_effective_target_profile_update_atomic {} {
8789 return [check_no_compiler_messages profile_update_atomic assembly {
8790 int main (void) { return 0; }
8791 } "-fprofile-update=atomic -fprofile-generate"]
8794 # Return 1 if vector (va - vector add) instructions are understood by
8795 # the assembler and can be executed. This also covers checking for
8796 # the VX kernel feature. A kernel without that feature does not
8797 # enable the vector facility and the following check will die with a
8799 proc check_effective_target_s390_vx { } {
8800 if ![istarget s390*-*-*] then {
8804 return [check_runtime s390_check_vx {
8807 asm ("va %%v24, %%v26, %%v28, 3" : : : "v24", "v26", "v28");
8810 } "-march=z13 -mzarch" ]
8813 # Same as above but for the z14 vector enhancement facility. Test
8814 # is performed with the vector nand instruction.
8815 proc check_effective_target_s390_vxe { } {
8816 if ![istarget s390*-*-*] then {
8820 return [check_runtime s390_check_vxe {
8823 asm ("vnn %%v24, %%v26, %%v28" : : : "v24", "v26", "v28");
8826 } "-march=z14 -mzarch" ]
8829 #For versions of ARM architectures that have hardware div insn,
8830 #disable the divmod transform
8832 proc check_effective_target_arm_divmod_simode { } {
8833 return [check_no_compiler_messages arm_divmod assembly {
8834 #ifdef __ARM_ARCH_EXT_IDIV__
8841 # Return 1 if target supports divmod hardware insn or divmod libcall.
8843 proc check_effective_target_divmod { } {
8844 #TODO: Add checks for all targets that have either hardware divmod insn
8845 # or define libfunc for divmod.
8846 if { [istarget arm*-*-*]
8847 || [istarget i?86-*-*] || [istarget x86_64-*-*] } {
8853 # Return 1 if target supports divmod for SImode. The reason for
8854 # separating this from check_effective_target_divmod is that
8855 # some versions of ARM architecture define div instruction
8856 # only for simode, and for these archs, we do not want to enable
8857 # divmod transform for simode.
8859 proc check_effective_target_divmod_simode { } {
8860 if { [istarget arm*-*-*] } {
8861 return [check_effective_target_arm_divmod_simode]
8864 return [check_effective_target_divmod]
8867 # Return 1 if store merging optimization is applicable for target.
8868 # Store merging is not profitable for targets like the avr which
8869 # can load/store only one byte at a time. Use int size as a proxy
8870 # for the number of bytes the target can write, and skip for targets
8871 # with a smallish (< 32) size.
8873 proc check_effective_target_store_merge { } {
8874 if { [is-effective-target non_strict_align ] && [is-effective-target int32plus] } {
8881 # Return 1 if we're able to assemble rdrand
8883 proc check_effective_target_rdrand
{ } {
8884 return [check_no_compiler_messages_nocache rdrand object
{
8889 __builtin_ia32_rdrand32_step
(&val
);
8895 #
Return 1 if the target supports coprocessor instructions
: cdp
, ldc
, ldcl
,
8896 # stc
, stcl
, mcr and mrc.
8897 proc check_effective_target_arm_coproc1_ok_nocache
{ } {
8898 if { ![istarget arm
*-*-*] } {
8901 return [check_no_compiler_messages_nocache arm_coproc1_ok assembly
{
8902 #
if (__thumb__
&& !__thumb2__
) || __ARM_ARCH
< 4
8908 proc check_effective_target_arm_coproc1_ok
{ } {
8909 return [check_cached_effective_target arm_coproc1_ok \
8910 check_effective_target_arm_coproc1_ok_nocache
]
8913 #
Return 1 if the target supports all coprocessor instructions checked by
8914 # check_effective_target_arm_coproc1_ok in addition to the following
: cdp2
,
8915 # ldc2
, ldc2l
, stc2
, stc2l
, mcr2 and mrc2.
8916 proc check_effective_target_arm_coproc2_ok_nocache
{ } {
8917 if { ![check_effective_target_arm_coproc1_ok
] } {
8920 return [check_no_compiler_messages_nocache arm_coproc2_ok assembly
{
8921 #
if (__thumb__
&& !__thumb2__
) || __ARM_ARCH
< 5
8927 proc check_effective_target_arm_coproc2_ok
{ } {
8928 return [check_cached_effective_target arm_coproc2_ok \
8929 check_effective_target_arm_coproc2_ok_nocache
]
8932 #
Return 1 if the target supports all coprocessor instructions checked by
8933 # check_effective_target_arm_coproc2_ok in addition the following
: mcrr and
8935 proc check_effective_target_arm_coproc3_ok_nocache
{ } {
8936 if { ![check_effective_target_arm_coproc2_ok
] } {
8939 return [check_no_compiler_messages_nocache arm_coproc3_ok assembly
{
8940 #
if (__thumb__
&& !__thumb2__
) \
8941 ||
(__ARM_ARCH
< 6 && !defined
(__ARM_ARCH_5TE__
))
8947 proc check_effective_target_arm_coproc3_ok
{ } {
8948 return [check_cached_effective_target arm_coproc3_ok \
8949 check_effective_target_arm_coproc3_ok_nocache
]
8952 #
Return 1 if the target supports all coprocessor instructions checked by
8953 # check_effective_target_arm_coproc3_ok in addition the following
: mcrr2 and
8955 proc check_effective_target_arm_coproc4_ok_nocache
{ } {
8956 if { ![check_effective_target_arm_coproc3_ok
] } {
8959 return [check_no_compiler_messages_nocache arm_coproc4_ok assembly
{
8960 #
if (__thumb__
&& !__thumb2__
) || __ARM_ARCH
< 6
8966 proc check_effective_target_arm_coproc4_ok
{ } {
8967 return [check_cached_effective_target arm_coproc4_ok \
8968 check_effective_target_arm_coproc4_ok_nocache
]
8971 #
Return 1 if the target supports the auto_inc_dec optimization pass.
8972 proc check_effective_target_autoincdec
{ } {
8973 if { ![check_no_compiler_messages auto_incdec assembly
{ void f
() { }
8974 } "-O2 -fdump-rtl-auto_inc_dec" ] } {
8978 set dumpfile
[glob
-nocomplain
"auto_incdec[pid].c.\[0-9\]\[0-9\]\[0-9\]r.auto_inc_dec"]
8979 if { [file
exists $dumpfile
] } {
8980 file
delete $dumpfile
8986 #
Return 1 if the target has support
for stack probing designed
8987 # to avoid stack
-clash style attacks.
8989 # This is used to restrict the stack
-clash mitigation tests to
8990 # just those targets that have been explicitly supported.
8992 # In addition to the prologue work
on those targets
, each target
's
8993 # properties should be described in the functions below so that
8994 # tests do not become a mess of unreadable target conditions.
8996 proc check_effective_target_supports_stack_clash_protection { } {
8998 # Temporary until the target bits are fully ACK'd.
8999 #
if { [istarget aarch
*-*-*] } {
9003 if { [istarget x86_64
-*-*] ||
[istarget i?
86-*-*]
9004 ||
[istarget powerpc
*-*-*] ||
[istarget rs6000
*-*-*]
9005 ||
[istarget s390
*-*-*] } {
9011 #
Return 1 if the target creates a frame pointer
for non
-leaf functions
9012 # Note we ignore cases where we apply tail
call optimization here.
9013 proc check_effective_target_frame_pointer_for_non_leaf
{ } {
9014 if { [istarget aarch
*-*-*] } {
9018 # Solaris
/x86 defaults to
-fno
-omit
-frame
-pointer.
9019 if { [istarget i?
86-*-solaris
*] ||
[istarget x86_64
-*-solaris
*] } {
9026 #
Return 1 if the target
's calling sequence or its ABI
9027 # create implicit stack probes at or prior to function entry.
9028 proc check_effective_target_caller_implicit_probes { } {
9030 # On x86/x86_64 the call instruction itself pushes the return
9031 # address onto the stack. That is an implicit probe of *sp.
9032 if { [istarget x86_64-*-*] || [istarget i?86-*-*] } {
9036 # On PPC, the ABI mandates that the address of the outer
9037 # frame be stored at *sp. Thus each allocation of stack
9038 # space is itself an implicit probe of *sp.
9039 if { [istarget powerpc*-*-*] || [istarget rs6000*-*-*] } {
9043 # s390's ABI has a register save area allocated by the
9044 # caller
for use by the callee. The mere existence does
9045 # not constitute a probe by the caller
, but when the slots
9046 # used by the callee those stores are implicit probes.
9047 if { [istarget s390
*-*-*] } {
9051 # Not strictly true
on aarch64
, but we have agreed that we will
9052 #
consider any function that pushes SP more than
3kbytes into
9053 # the guard
page as broken. This essentially means that we can
9054 #
consider the aarch64 as having a caller implicit probe at
9056 if { [istarget aarch64
*-*-*] } {
9063 # Targets that potentially realign the stack pointer often cause residual
9064 # stack allocations and make it difficult to elimination loops or residual
9065 # allocations
for dynamic stack allocations
9066 proc check_effective_target_callee_realigns_stack
{ } {
9067 if { [istarget x86_64
-*-*] ||
[istarget i?
86-*-*] } {
9073 #
Return 1 if CET instructions can be compiled.
9074 proc check_effective_target_cet
{ } {
9075 if { !([istarget i?
86-*-*] ||
[istarget x86_64
-*-*]) } {
9078 return [check_no_compiler_messages cet object
{