1 # Copyright
(C
) 1999-2023 Free Software Foundation
, Inc.
3 # This
program is free software
; you can redistribute it and
/or modify
4 # it under the terms of the GNU General Public License as published by
5 # the Free Software Foundation
; either version
3 of the License
, or
6 #
(at your option
) any later version.
8 # This
program is distributed in the hope that it will be useful
,
9 # but WITHOUT
ANY WARRANTY
; without even the implied warranty of
10 # MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. See the
11 # GNU General Public License
for more details.
13 # You should have received a copy of the GNU General Public License
14 # along with GCC
; see the file COPYING3.
If not see
15 #
<http
://www.gnu.org
/licenses
/>.
17 # Please email
any bugs
, comments
, and
/or additions to this file to
:
18 # gcc
-patches@gcc.gnu.org
20 # This file defines procs
for determining features supported by the target.
22 # Try to
compile the code given by CONTENTS into an output file of
23 # type TYPE
, where TYPE is as
for target_compile.
Return a list
24 # whose first element contains the compiler messages and whose
25 # second element is the
name of the output file.
27 # BASENAME is a prefix to use
for source and output files.
28 #
If ARGS is not empty
, its first element is a string that
29 # should be added to the command line.
31 # Assume by default that CONTENTS is C code.
32 # Otherwise
, code should contain
:
33 #
"/* Assembly" for assembly code,
36 #
"! Fortran" for Fortran code,
38 #
"// ObjC++" for ObjC++
41 # and
"(* Modula-2" for Modula-2
42 #
If the tool is ObjC
/ObjC
++ then we overide the extension to .m
/.mm to
43 # allow
for ObjC
/ObjC
++ specific flags.
45 proc check_compile
{basename type contents
args} {
47 verbose
"check_compile tool: $tool for $basename"
49 # Save additional_sources to avoid compiling testsuite
's sources
50 # against check_compile's source.
51 global additional_sources
52 if [info exists additional_sources
] {
53 set tmp_additional_sources
"$additional_sources"
54 set additional_sources
""
57 if { [llength $
args] > 0 } {
58 set options
[list
"additional_flags=[lindex $args 0]"]
62 # Silence
"command-line option [...] is valid for [...] but not for [...]"
63 # that we may easily run into here
, if more than one language is involved.
64 lappend options additional_flags
=-Wno
-complain
-wrong
-lang
66 switch -glob
-- $contents
{
67 "*/\\* Assembly*" { set src ${basename}[pid].S }
68 "*! Fortran*" { set src ${basename}[pid].f90 }
69 "*// C++*" { set src ${basename}[pid].cc }
70 "*// D*" { set src ${basename}[pid].d }
71 "*// ObjC++*" { set src ${basename}[pid].mm }
72 "*/\\* ObjC*" { set src ${basename}[pid].m }
73 "*// Go*" { set src ${basename}[pid].go }
74 "*// Rust*" { set src ${basename}[pid].rs }
75 "*(\\* Modula-2*" { set src ${basename}[pid].mod }
78 "objc" { set src ${basename}[pid].m }
79 "obj-c++" { set src ${basename}[pid].mm }
80 default
{ set src $
{basename
}[pid
].c
}
85 set compile_type $type
87 assembly
{ set output $
{basename
}[pid
].s
}
88 object
{ set output $
{basename
}[pid
].o
}
89 executable
{ set output $
{basename
}[pid
].exe
}
92 set output $
{basename
}[pid
].s
93 lappend options
"additional_flags=-fdump-$type"
94 set compile_type assembly
100 global compiler_flags
101 set save_compiler_flags $compiler_flags
102 set lines
[$
{tool
}_target_compile $src $output $compile_type
"$options"]
103 set compiler_flags $save_compiler_flags
106 set scan_output $output
107 # Don
't try folding this into the switch above; calling "glob" before the
108 # file is created won't work.
109 if [regexp
"rtl-(.*)" $type dummy rtl_type] {
110 set scan_output
"[glob $src.\[0-9\]\[0-9\]\[0-9\]r.$rtl_type]"
112 } elseif
[regexp
"tree-(.*)" $type dummy tree_type] {
113 set scan_output
"[glob $src.\[0-9\]\[0-9\]\[0-9\]t.$tree_type]"
117 # Restore additional_sources.
118 if [info exists additional_sources
] {
119 set additional_sources
"$tmp_additional_sources"
122 return [list $lines $scan_output
]
125 proc current_target_name
{ } {
127 if [info exists target_info
(target
,name)] {
128 set answer $target_info
(target
,name)
135 # Implement an effective
-target check
for property PROP by invoking
136 # the Tcl command
ARGS and seeing
if it returns true.
138 proc check_cached_effective_target
{ prop
args } {
141 set target
[current_target_name
]
142 if {![info exists et_cache
($prop
,$target
)]} {
143 verbose
"check_cached_effective_target $prop: checking $target" 2
144 if {[string is true
-strict $
args] ||
[string is false
-strict $
args]} {
145 error
{check_cached_effective_target condition already evaluated
; did you pass
[...
] instead of the expected
{...
}?
}
147 set code
[catch
{uplevel eval $
args} result
]
148 if {$code
!= 0 && $code
!= 2} {
149 return -code $code $result
151 set et_cache
($prop
,$target
) $result
154 set value $et_cache
($prop
,$target
)
155 verbose
"check_cached_effective_target $prop: returning $value for $target" 2
159 # Implements a version of check_cached_effective_target that also takes et_index
160 # into account when creating the
key for the
cache.
161 proc check_cached_effective_target_indexed
{ prop
args } {
163 set key "$et_index $prop"
164 verbose
"check_cached_effective_target_index $prop: returning $key" 2
166 return [check_cached_effective_target $
key [list uplevel eval $
args]]
169 # Clear effective
-target
cache. This is useful after testing
170 # effective
-target features and overriding TEST_ALWAYS_FLAGS and
/or
172 #
If one changes ALWAYS_CXXFLAGS or TEST_ALWAYS_FLAGS
then they should
173 #
do a clear_effective_target_cache at the end as the target
cache can
174 # make decisions based upon the flags
, and those decisions need to be
175 # redone when the flags change. An example of this is the
176 # asan_init
/asan_finish pair.
178 proc clear_effective_target_cache
{ } {
183 # Like check_compile
, but
delete the output file and
return true
if the
184 # compiler printed no messages.
185 proc check_no_compiler_messages_nocache
{args} {
186 set result
[eval check_compile $
args]
187 set lines
[lindex $result
0]
188 set output
[lindex $result
1]
189 remote_file build
delete $output
190 return [string match
"" $lines]
193 # Like check_no_compiler_messages_nocache
, but
cache the result.
194 # PROP is the
property we
're checking, and doubles as a prefix for
195 # temporary filenames.
196 proc check_no_compiler_messages {prop args} {
197 return [check_cached_effective_target $prop {
198 eval [list check_no_compiler_messages_nocache $prop] $args
202 # Like check_compile, but return true if the compiler printed no
203 # messages and if the contents of the output file satisfy PATTERN.
204 # If PATTERN has the form "!REGEXP", the contents satisfy it if they
205 # don't match regular expression REGEXP
, otherwise they satisfy it
206 #
if they
do match regular expression PATTERN.
(PATTERN can start
207 # with something like
"[!]" if the regular expression needs to match
208 #
"!" as the first character.)
210 #
Delete the output file before returning. The other arguments are
211 # as
for check_compile.
212 proc check_no_messages_and_pattern_nocache
{basename pattern
args} {
215 set result
[eval
[list check_compile $basename
] $
args]
216 set lines
[lindex $result
0]
217 set output
[lindex $result
1]
220 if { [string match
"" $lines] } {
221 set chan
[open
"$output"]
222 set invert
[regexp
{^
!(.
*)} $pattern dummy pattern
]
223 set ok
[expr
{ [regexp $pattern
[read $chan
]] != $invert
}]
227 remote_file build
delete $output
231 # Like check_no_messages_and_pattern_nocache
, but
cache the result.
232 # PROP is the
property we
're checking, and doubles as a prefix for
233 # temporary filenames.
234 proc check_no_messages_and_pattern {prop pattern args} {
235 return [check_cached_effective_target $prop {
236 eval [list check_no_messages_and_pattern_nocache $prop $pattern] $args
240 # Try to compile and run an executable from code CONTENTS. Return true
241 # if the compiler reports no messages and if execution "passes" in the
242 # usual DejaGNU sense. The arguments are as for check_compile, with
243 # TYPE implicitly being "executable".
244 proc check_runtime_nocache {basename contents args} {
247 set result [eval [list check_compile $basename executable $contents] $args]
248 set lines [lindex $result 0]
249 set output [lindex $result 1]
252 if { [string match "" $lines] } {
253 # No error messages, everything is OK.
254 set result [remote_load target "./$output" "" ""]
255 set status [lindex $result 0]
256 verbose "check_runtime_nocache $basename: status is <$status>" 2
257 if { $status == "pass" } {
261 remote_file build delete $output
265 # Like check_runtime_nocache, but cache the result. PROP is the
266 # property we're checking
, and doubles as a prefix
for temporary
268 proc check_runtime
{prop
args} {
271 return [check_cached_effective_target $prop
{
272 eval
[list check_runtime_nocache $prop
] $
args
276 #
Return 1 if GCC was configured with $pattern.
277 proc check_configured_with
{ pattern
} {
280 set options
[list
"additional_flags=-v"]
281 set gcc_output
[$
{tool
}_target_compile
"" "" "none" $options]
282 if { [ regexp
"Configured with: \[^\n\]*$pattern" $gcc_output ] } {
283 verbose
"Matched: $pattern" 2
287 verbose
"Failed to match: $pattern" 2
291 ###############################
292 # proc check_weak_available
{ }
293 ###############################
295 # weak symbols are only supported in some configs
/object formats
296 # this proc returns
1 if they
're supported, 0 if they're not
, or
-1 if unsure
298 proc check_weak_available
{ } {
301 # All mips targets should support it
303 if { [ string first
"mips" $target_cpu ] >= 0 } {
307 # All AIX targets should support it
309 if { [istarget
*-*-aix
*] } {
313 # All solaris2 targets should support it
315 if { [istarget
*-*-solaris2
*] } {
319 # Windows targets Cygwin and MingW32 support it
321 if { [istarget
*-*-cygwin
*] ||
[istarget
*-*-mingw
*] } {
325 # nvptx
(nearly
) supports it
327 if { [istarget nvptx
-*-*] } {
331 # pdp11 doesn
't support it
333 if { [istarget pdp11*-*-*] } {
337 # VxWorks hardly supports it (vx7 RTPs only)
339 if { [istarget *-*-vxworks*] } {
343 # ELF and ECOFF support it. a.out does with gas/gld but may also with
344 # other linkers, so we should try it
346 set objformat [gcc_target_object_format]
354 unknown { return -1 }
359 # return options to add to enable weak undefined symbols.
361 proc add_options_for_weak_undefined { flags } {
362 if { [istarget *-*-darwin*] } {
363 lappend flags "-Wl,-undefined,dynamic_lookup"
364 if { [istarget *-*-darwin\[89\]*] } {
365 lappend flags "-Wl,-flat_namespace"
371 # return 1 if weak undefined symbols are supported.
373 proc check_effective_target_weak_undefined { } {
374 if { [istarget hppa*-*-hpux*] } {
377 return [check_runtime weak_undefined {
378 extern void foo () __attribute__((weak));
379 int main (void) { if (foo) return 1; return 0; }
380 } [add_options_for_weak_undefined ""]]
383 ###############################
384 # proc check_weak_override_available { }
385 ###############################
387 # Like check_weak_available, but return 0 if weak symbol definitions
388 # cannot be overridden.
390 proc check_weak_override_available { } {
391 if { [istarget *-*-mingw*] } {
394 return [check_weak_available]
397 # Return 1 if VMA is equal to LMA for the .data section, 0
398 # otherwise. Cache the result.
400 proc check_effective_target_vma_equals_lma { } {
403 return [check_cached_effective_target vma_equals_lma {
404 set src vma_equals_lma[pid].c
405 set exe vma_equals_lma[pid].exe
406 verbose "check_effective_target_vma_equals_lma compiling testfile $src" 2
407 set f [open $src "w"]
408 puts $f "#ifdef __cplusplus\nextern \"C\"\n#endif\n"
409 puts $f "int foo = 42; void main() {}"
411 set lines [${tool}_target_compile $src $exe executable ""]
414 if [string match "" $lines] then {
417 set objdump_name [find_binutils_prog objdump]
418 set output [remote_exec host "$objdump_name" "--section-headers --section=.data $exe"]
419 set output [lindex $output 1]
421 remote_file build delete $exe
423 # Example output of objdump:
424 #vma_equals_lma9059.exe: file format elf32-littlearm
427 #Idx Name Size VMA LMA File off Algn
428 # 6 .data 00000558 20000000 08002658 00020000 2**3
429 # CONTENTS, ALLOC, LOAD, DATA
431 # Capture LMA and VMA columns for .data section
432 if ![ regexp {\d*\d+\s+\.data\s+\d+\s+(\d+)\s+(\d+)} $output dummy vma lma ] {
433 verbose "Could not parse objdump output" 2
436 return [string equal $vma $lma]
439 remote_file build delete $exe
440 verbose "Could not determine if VMA is equal to LMA. Assuming not equal." 2
446 # The "noinit" attribute is only supported by some targets.
447 # This proc returns 1 if it's supported
, 0 if it
's not.
449 proc check_effective_target_noinit { } {
450 if { [istarget arm*-*-eabi]
451 || [istarget msp430-*-*] } {
458 # The "persistent" attribute is only supported by some targets.
459 # This proc returns 1 if it's supported
, 0 if it
's not.
461 proc check_effective_target_persistent { } {
462 if { [istarget arm*-*-eabi]
463 || [istarget msp430-*-*] } {
470 ###############################
471 # proc check_visibility_available { what_kind }
472 ###############################
474 # The visibility attribute is only support in some object formats
475 # This proc returns 1 if it is supported, 0 if not.
476 # The argument is the kind of visibility, default/protected/hidden/internal.
478 proc check_visibility_available { what_kind } {
479 if [string match "" $what_kind] { set what_kind "hidden" }
481 return [check_no_compiler_messages visibility_available_$what_kind object "
482 void f() __attribute__((visibility(\"$what_kind\")));
487 ###############################
488 # proc check_alias_available { }
489 ###############################
491 # Determine if the target toolchain supports the alias attribute.
493 # Returns 2 if the target supports aliases. Returns 1 if the target
494 # only supports weak aliased. Returns 0 if the target does not
495 # support aliases at all. Returns -1 if support for aliases could not
498 proc check_alias_available { } {
501 return [check_cached_effective_target alias_available {
504 verbose "check_alias_available compiling testfile $src" 2
505 set f [open $src "w"]
506 # Compile a small test program. The definition of "g" is
507 # necessary to keep the Solaris assembler from complaining
509 puts $f "#ifdef __cplusplus\nextern \"C\"\n#endif\n"
510 puts $f "void g() {} void f() __attribute__((alias(\"g\")));"
512 set lines [${tool}_target_compile $src $obj object ""]
514 remote_file build delete $obj
516 if [string match "" $lines] then {
517 # No error messages, everything is OK.
520 if [regexp "alias definitions not supported" $lines] {
521 verbose "check_alias_available target does not support aliases" 2
523 set objformat [gcc_target_object_format]
525 if { $objformat == "elf" } {
526 verbose "check_alias_available but target uses ELF format, so it ought to" 2
532 if [regexp "only weak aliases are supported" $lines] {
533 verbose "check_alias_available target supports only weak aliases" 2
543 # Returns 1 if the target toolchain supports strong aliases, 0 otherwise.
545 proc check_effective_target_alias { } {
546 if { [check_alias_available] < 2 } {
553 # Returns 1 if the target uses the ELF object format, 0 otherwise.
555 proc check_effective_target_elf { } {
556 if { [gcc_target_object_format] == "elf" } {
563 # Returns 1 if the target toolchain supports ifunc, 0 otherwise.
565 proc check_ifunc_available { } {
566 return [check_no_compiler_messages ifunc_available object {
571 typedef void F (void);
572 F* g (void) { return &f_; }
573 void f () __attribute__ ((ifunc ("g")));
580 # Returns true if --gc-sections is supported on the target.
582 proc check_gc_sections_available { } {
585 return [check_cached_effective_target gc_sections_available {
586 # Some targets don't support gc
-sections despite whatever
's
587 # advertised by ld's options.
588 if { [istarget alpha
*-*-*]
589 ||
[istarget ia64
-*-*] } {
593 # elf2flt uses
-q
(--emit
-relocs
), which is incompatible with
595 if { [board_info target
exists ldflags
]
596 && [regexp
" -elf2flt\[ =\]" " [board_info target ldflags] "] } {
600 # VxWorks kernel modules are relocatable objects linked with
-r
,
601 #
while RTP executables are linked with
-q
(--emit
-relocs
).
602 # Both of these options are incompatible with
--gc
-sections.
603 if { [istarget
*-*-vxworks
*] } {
607 # Check
if the
ld used by gcc supports
--gc
-sections.
608 set options
[list
"additional_flags=-print-prog-name=ld"]
609 set gcc_ld
[lindex
[$
{tool
}_target_compile
"" "" "none" $options] 0]
610 set ld_output
[remote_exec host
"$gcc_ld" "--help"]
611 if { [ string first
"--gc-sections" $ld_output ] >= 0 } {
619 # Returns
1 if "dot" is supported on the host.
621 proc check_dot_available
{ } {
622 verbose
"check_dot_available" 2
624 set status [remote_exec host
"dot" "-V"]
625 verbose
" status: $status" 2
626 if { [lindex $
status 0] != 0 } {
632 #
Return 1 if according to target_info struct and explicit target list
633 # target is supposed to support trampolines.
635 proc check_effective_target_trampolines
{ } {
636 if [target_info
exists gcc
,no_trampolines
] {
639 if { [istarget avr
-*-*]
640 ||
[istarget msp430
-*-*]
641 ||
[istarget nvptx
-*-*]
642 ||
[istarget pru
-*-*]
643 ||
[istarget bpf
-*-*] } {
649 #
Return 1 if target has limited stack size.
651 proc check_effective_target_stack_size
{ } {
652 if [target_info
exists gcc
,stack_size
] {
658 #
Return the value attribute of an effective target
, otherwise
return 0.
660 proc dg
-effective
-target
-value
{ effective_target
} {
661 if { "$effective_target" == "stack_size" } {
662 if [check_effective_target_stack_size
] {
663 return [target_info gcc
,stack_size
]
670 #
Return 1 if signal.h is supported.
672 proc check_effective_target_signal
{ } {
673 if [target_info
exists gcc
,signal_suppress
] {
679 #
Return 1 if according to target_info struct and explicit target list
680 # target disables
-fdelete
-null
-pointer
-checks. Targets should
return 0
681 #
if they simply default to
-fno
-delete-null
-pointer
-checks but obey
682 #
-fdelete
-null
-pointer
-checks when passed explicitly
(and tests that
683 # depend
on this option should
do that
).
685 proc check_effective_target_keeps_null_pointer_checks
{ } {
686 if [target_info
exists keeps_null_pointer_checks
] {
689 if { [istarget msp430
-*-*]
690 ||
[istarget avr
-*-*] } {
696 #
Return the autofdo profile wrapper
698 # Linux by default allows
516KB of perf event buffers
699 # in
/proc
/sys
/kernel
/perf_event_mlock_kb
700 # Each individual perf tries to grab it
701 # This causes problems with parallel test suite runs. Instead
702 #
limit us to
8 pages
(32K
), which should be good enough
703 #
for the small test programs. With the default settings
704 # this allows parallelism of
16 and higher of parallel gcc
-auto
-profile
705 proc profopt
-perf
-wrapper
{ } {
707 return "$srcdir/../config/i386/gcc-auto-profile --all -m8 "
710 #
Return true
if profiling is supported
on the target.
712 proc check_profiling_available
{ test_what
} {
713 verbose
"Profiling argument is <$test_what>" 1
715 # These conditions depend
on the
argument so examine them before
716 # looking at the
cache variable.
718 # Tree profiling requires TLS runtime support.
719 if { $test_what
== "-fprofile-generate" } {
720 if { ![check_effective_target_tls_runtime
] } {
725 if { $test_what
== "-fauto-profile" } {
726 if { !([istarget i?
86-*-linux
*] ||
[istarget x86_64
-*-linux
*]) } {
727 verbose
"autofdo only supported on linux"
730 # not cross compiling?
732 verbose
"autofdo not supported for non native builds"
735 set event
[profopt
-perf
-wrapper
]
737 verbose
"autofdo not supported"
741 set status [remote_exec host
"$srcdir/../config/i386/gcc-auto-profile" "-m8 true -v >/dev/null"]
742 if { [lindex $
status 0] != 0 } {
743 verbose
"autofdo not supported because perf does not work"
747 # no good way to check this in advance
-- check later instead.
748 #
set status [remote_exec host
"create_gcov" "2>/dev/null"]
749 #
if { [lindex $
status 0] != 255 } {
750 # verbose
"autofdo not supported due to missing create_gcov"
755 # Support
for -p
on solaris2 relies
on mcrt1.o which comes with the
756 # vendor compiler. We cannot reliably predict the directory where the
757 # vendor compiler
(and thus mcrt1.o
) is installed so we can
't
758 # necessarily find mcrt1.o even if we have it.
759 if { [istarget *-*-solaris2*] && $test_what == "-p" } {
763 # We don't yet support profiling
for MIPS16.
764 if { [istarget mips
*-*-*]
765 && ![check_effective_target_nomips16
]
766 && ($test_what
== "-p" || $test_what == "-pg") } {
770 # MinGW does not support
-p.
771 if { [istarget
*-*-mingw
*] && $test_what
== "-p" } {
775 # cygwin does not support
-p.
776 if { [istarget
*-*-cygwin
*] && $test_what
== "-p" } {
780 # uClibc does not have gcrt1.o.
781 if { [check_effective_target_uclibc
]
782 && ($test_what
== "-p" || $test_what == "-pg") } {
786 # Now examine the
cache variable.
787 set profiling_working \
788 [check_cached_effective_target profiling_available
{
789 # Some targets don
't have any implementation of __bb_init_func or are
790 # missing other needed machinery.
791 if {[istarget aarch64*-*-elf]
792 || [istarget am3*-*-linux*]
793 || [istarget amdgcn-*-*]
794 || [istarget arm*-*-eabi*]
795 || [istarget arm*-*-elf]
796 || [istarget arm*-*-symbianelf*]
797 || [istarget avr-*-*]
798 || [istarget bfin-*-*]
799 || [istarget cris-*-*]
800 || [istarget csky-*-elf*]
801 || [istarget fido-*-elf]
802 || [istarget h8300-*-*]
803 || [istarget lm32-*-*]
804 || [istarget m32c-*-elf]
805 || [istarget m68k-*-elf]
806 || [istarget m68k-*-uclinux*]
807 || [istarget mips*-*-elf*]
808 || [istarget mmix-*-*]
809 || [istarget mn10300-*-elf*]
810 || [istarget moxie-*-elf*]
811 || [istarget msp430-*-*]
812 || [istarget nds32*-*-elf]
813 || [istarget nios2-*-elf]
814 || [istarget nvptx-*-*]
815 || [istarget powerpc-*-eabi*]
816 || [istarget powerpc-*-elf]
817 || [istarget pru-*-*]
819 || [istarget tic6x-*-elf]
820 || [istarget visium-*-*]
821 || [istarget xstormy16-*]
822 || [istarget xtensa*-*-elf]
823 || [istarget *-*-rtems*]
824 || [istarget *-*-vxworks*] } {
831 # -pg link test result can't be cached since it may change between
833 if { $profiling_working
== 1
834 && ![check_no_compiler_messages_nocache profiling executable
{
835 int main
() { return 0; } } "-pg"] } {
836 set profiling_working
0
839 return $profiling_working
842 # Check to see
if a target is
"freestanding". This is as per the definition
843 # in Section
4 of C99 standard. Effectively
, it is a target which supports no
844 # extra headers or libraries other than what is considered essential.
845 proc check_effective_target_freestanding
{ } {
846 if { [istarget nvptx
-*-*] } {
852 # Check to see that file I
/O functions are available.
853 proc check_effective_target_fileio
{ } {
854 return [check_no_compiler_messages fileio_available executable
{
857 char
*n
= tmpnam
(NULL
);
858 FILE
*f
= fopen
(n
, "w");
865 #
Return 1 if target has packed layout of structure members by
866 # default
, 0 otherwise. Note that this is slightly different than
867 # whether the target has
"natural alignment": both attributes may be
870 proc check_effective_target_default_packed
{ } {
871 return [check_no_compiler_messages default_packed assembly
{
872 struct x
{ char a
; long b
; } c
;
873 int s
[sizeof
(c
) == sizeof
(char
) + sizeof
(long
) ?
1 : -1];
877 #
Return 1 if target has PCC_BITFIELD_TYPE_MATTERS defined. See
878 # documentation
, where the test also comes from.
880 proc check_effective_target_pcc_bitfield_type_matters
{ } {
881 # PCC_BITFIELD_TYPE_MATTERS isn
't just about unnamed or empty
882 # bitfields, but let's stick to the example code from the docs.
883 return [check_no_compiler_messages pcc_bitfield_type_matters assembly
{
884 struct foo1
{ char x
; char
:0; char y
; };
885 struct foo2
{ char x
; int :0; char y
; };
886 int s
[sizeof
(struct foo1
) != sizeof
(struct foo2
) ?
1 : -1];
890 # Add to FLAGS all the target
-specific flags needed to use thread
-local storage.
892 proc add_options_for_tls
{ flags
} {
893 #
On AIX
, __tls_get_addr
/___tls_get_addr only lives in
894 # libthread
, so always pass
-pthread
for native TLS.
895 # Need to duplicate native TLS check from
896 # check_effective_target_tls_native to avoid recursion.
897 if { ([istarget powerpc
-ibm
-aix
*]) &&
898 [check_no_messages_and_pattern tls_native
"!emutls" assembly {
900 int f
(void
) { return i
; }
901 void g
(int j
) { i
= j
; }
903 return "-pthread [g++_link_flags [get_multilibs "-pthread"] ] $flags "
908 #
Return 1 if indirect jumps are supported
, 0 otherwise.
910 proc check_effective_target_indirect_jumps
{} {
911 if { [istarget nvptx
-*-*] ||
[istarget bpf
-*-*] } {
917 #
Return 1 if nonlocal
goto is supported
, 0 otherwise.
919 proc check_effective_target_nonlocal_goto
{} {
920 if { [istarget nvptx
-*-*] ||
[istarget bpf
-*-*] } {
926 #
Return 1 if global constructors are supported
, 0 otherwise.
928 proc check_effective_target_global_constructor
{} {
929 if { [istarget nvptx
-*-*]
930 ||
[istarget bpf
-*-*] } {
936 #
Return 1 if taking label
values is supported
, 0 otherwise.
938 proc check_effective_target_label_values
{} {
939 if { [istarget nvptx
-*-*] ||
[target_info
exists gcc
,no_label_values
] } {
946 #
Return 1 if builtin_return_address and builtin_frame_address are
947 # supported
, 0 otherwise.
949 proc check_effective_target_return_address
{} {
950 if { [istarget nvptx
-*-*] } {
953 # No notion of
return address in eBPF.
954 if { [istarget bpf
-*-*] } {
957 # It could be supported
on amdgcn
, but isn
't yet.
958 if { [istarget amdgcn*-*-*] } {
964 # Return 1 if the assembler does not verify function types against
965 # calls, 0 otherwise. Such verification will typically show up problems
966 # with K&R C function declarations.
968 proc check_effective_target_untyped_assembly {} {
969 if { [istarget nvptx-*-*] } {
975 # Return 1 if alloca is supported, 0 otherwise.
977 proc check_effective_target_alloca {} {
978 if { [istarget nvptx-*-*] } {
979 return [check_no_compiler_messages alloca assembly {
981 void g (int n) { f (__builtin_alloca (n)); }
987 # Return 1 if thread local storage (TLS) is supported, 0 otherwise.
989 proc check_effective_target_tls {} {
990 return [check_no_compiler_messages tls assembly {
992 int f (void) { return i; }
993 void g (int j) { i = j; }
997 # Return 1 if *native* thread local storage (TLS) is supported, 0 otherwise.
999 proc check_effective_target_tls_native {} {
1000 # VxWorks uses emulated TLS machinery, but with non-standard helper
1001 # functions, so we fail to automatically detect it.
1002 if { [istarget *-*-vxworks*] } {
1006 return [check_no_messages_and_pattern tls_native "!emutls" assembly {
1008 int f (void) { return i; }
1009 void g (int j) { i = j; }
1013 # Return 1 if *emulated* thread local storage (TLS) is supported, 0 otherwise.
1015 proc check_effective_target_tls_emulated {} {
1016 # VxWorks uses emulated TLS machinery, but with non-standard helper
1017 # functions, so we fail to automatically detect it.
1018 if { [istarget *-*-vxworks*] } {
1022 return [check_no_messages_and_pattern tls_emulated "emutls" assembly {
1024 int f (void) { return i; }
1025 void g (int j) { i = j; }
1029 # Return 1 if TLS executables can run correctly, 0 otherwise.
1031 proc check_effective_target_tls_runtime {} {
1032 return [check_runtime tls_runtime {
1033 __thread int thr __attribute__((tls_model("global-dynamic"))) = 0;
1034 int main (void) { return thr; }
1035 } [add_options_for_tls ""]]
1038 # Return 1 if atomic compare-and-swap is supported on 'int'
1040 proc check_effective_target_cas_char {} {
1041 return [check_no_compiler_messages cas_char assembly {
1042 #ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1
1048 proc check_effective_target_cas_int {} {
1049 return [check_no_compiler_messages cas_int assembly {
1050 #if __INT_MAX__ == 0x7fff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_2
1052 #elif __INT_MAX__ == 0x7fffffff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
1060 # Return 1 if -ffunction-sections is supported, 0 otherwise.
1062 proc check_effective_target_function_sections {} {
1063 # Darwin has its own scheme and silently accepts -ffunction-sections.
1064 if { [istarget *-*-darwin*] } {
1068 return [check_no_compiler_messages functionsections assembly {
1070 } "-ffunction-sections"]
1073 # Return 1 if instruction scheduling is available, 0 otherwise.
1075 proc check_effective_target_scheduling {} {
1076 return [check_no_compiler_messages scheduling object {
1078 } "-fschedule-insns"]
1081 # Return 1 if trapping arithmetic is available, 0 otherwise.
1083 proc check_effective_target_trapping {} {
1084 return [check_no_compiler_messages trapping object {
1085 int add (int a, int b) { return a + b; }
1089 # Return 1 if compilation with -fgraphite is error-free for trivial
1090 # code, 0 otherwise.
1092 proc check_effective_target_fgraphite {} {
1093 return [check_no_compiler_messages fgraphite object {
1098 # Return 1 if compiled with --enable-offload-targets=
1099 # This affects host compilation as ENABLE_OFFLOAD then evaluates to true.
1100 proc check_effective_target_offloading_enabled {} {
1101 return [check_configured_with "--enable-offload-targets"]
1104 # Return 1 if compilation with -fopenacc is error-free for trivial
1105 # code, 0 otherwise.
1107 proc check_effective_target_fopenacc {} {
1108 # nvptx/amdgcn can be built with the device-side bits of openacc, but it
1109 # does not make sense to test it as an openacc host.
1110 if [istarget nvptx-*-*] { return 0 }
1111 if [istarget amdgcn-*-*] { return 0 }
1113 return [check_no_compiler_messages fopenacc object {
1118 # Return 1 if compilation with -fopenmp is error-free for trivial
1119 # code, 0 otherwise.
1121 proc check_effective_target_fopenmp {} {
1122 # nvptx/amdgcn can be built with the device-side bits of libgomp, but it
1123 # does not make sense to test it as an openmp host.
1124 if [istarget nvptx-*-*] { return 0 }
1125 if [istarget amdgcn-*-*] { return 0 }
1127 return [check_no_compiler_messages fopenmp object {
1132 # Return 1 if compilation with -fgnu-tm is error-free for trivial
1133 # code, 0 otherwise.
1135 proc check_effective_target_fgnu_tm {} {
1136 return [check_no_compiler_messages fgnu_tm object {
1141 # Return 1 if the target supports mmap, 0 otherwise.
1143 proc check_effective_target_mmap {} {
1144 return [check_function_available "mmap"]
1147 # Return 1 if the target supports sysconf, 0 otherwise.
1149 proc check_effective_target_sysconf {} {
1150 # VxWorks has sysconf in rtp mode only, but our way to test can't
1151 # tell kernel
mode doesn
't, as we're doing partial links
for
1152 # kernel modules. We can tell by checking
for a declaration
, or
1153 #
for some sysconf parm
, because configurations that don
't offer
1154 # sysconf don't have either.
1155 if { [istarget
*-*-vxworks
*] } {
1156 return [check_no_compiler_messages sysconfdecl assembly
{
1158 int f
() { return sysconf
(_SC_PAGESIZE
); }
1161 return [check_function_available
"sysconf"]
1164 #
Return 1 if the target supports dlopen
, 0 otherwise.
1165 proc check_effective_target_dlopen
{} {
1166 return [check_no_compiler_messages dlopen executable
{
1168 int main
(void
) { dlopen
("dummy.so", RTLD_NOW); }
1169 } [add_options_for_dlopen
""]]
1172 proc add_options_for_dlopen
{ flags
} {
1173 return "$flags -ldl"
1176 #
Return 1 if the target supports clone
, 0 otherwise.
1177 proc check_effective_target_clone
{} {
1178 return [check_function_available
"clone"]
1181 #
Return 1 if the target supports posix_memalign
, 0 otherwise.
1182 proc check_effective_target_posix_memalign
{} {
1183 if { [istarget
*-*-vxworks
*] } {
1184 # VxWorks doesn
't have posix_memalign but our way to test
1185 # can't tell as we
're doing partial links for kernel modules.
1188 return [check_function_available "posix_memalign"]
1191 # Return 1 if the target supports setrlimit, 0 otherwise.
1192 proc check_effective_target_setrlimit {} {
1193 # Darwin has non-posix compliant RLIMIT_AS
1194 if { [istarget *-*-darwin*] } {
1197 return [check_function_available "setrlimit"]
1200 # Return 1 if the target supports gettimeofday, 0 otherwise.
1201 proc check_effective_target_gettimeofday {} {
1202 return [check_function_available "gettimeofday"]
1205 # Return 1 if the target supports swapcontext, 0 otherwise.
1206 proc check_effective_target_swapcontext {} {
1207 return [check_no_compiler_messages swapcontext executable {
1208 #include <ucontext.h>
1211 ucontext_t orig_context,child_context;
1212 if (swapcontext(&child_context, &orig_context) < 0) { }
1217 # Return 1 if the target supports POSIX threads, 0 otherwise.
1218 proc check_effective_target_pthread {} {
1219 return [check_no_compiler_messages pthread object {
1220 #include <pthread.h>
1225 # Return 1 if the target supports both Unix and internet sockets, 0 otherwise.
1226 proc check_effective_target_sockets {} {
1227 return [check_no_compiler_messages socket executable {
1228 #include <sys/socket.h>
1230 #include <netinet/in.h>
1232 socket(AF_UNIX, SOCK_STREAM, 0);
1233 socket(AF_INET, SOCK_DGRAM, 0);
1239 # Return 1 if compilation with -mpe-aligned-commons is error-free
1240 # for trivial code, 0 otherwise.
1242 proc check_effective_target_pe_aligned_commons {} {
1243 if { [istarget *-*-cygwin*] || [istarget *-*-mingw*] } {
1244 return [check_no_compiler_messages pe_aligned_commons object {
1246 } "-mpe-aligned-commons"]
1251 # Return 1 if the target supports -static
1252 proc check_effective_target_static {} {
1253 if { [istarget arm*-*-uclinuxfdpiceabi] } {
1256 return [check_no_compiler_messages static executable {
1257 int main (void) { return 0; }
1261 # Return 1 if the target supports -fstack-protector
1262 proc check_effective_target_fstack_protector {} {
1263 if { [istarget hppa*-*-*] } {
1266 return [check_runtime fstack_protector {
1268 int main (int argc, char *argv[]) {
1270 return !strcpy (buf, strrchr (argv[0], '/'));
1272 } "-fstack-protector"]
1275 # Return 1 if the target supports -fstack-check or -fstack-check=$stack_kind
1276 proc check_stack_check_available { stack_kind } {
1277 if [string match "" $stack_kind] then {
1278 set stack_opt "-fstack-check"
1279 } else { set stack_opt "-fstack-check=$stack_kind" }
1281 return [check_no_compiler_messages stack_check_$stack_kind executable {
1282 int main (void) { return 0; }
1286 # Return 1 if compilation with -freorder-blocks-and-partition is error-free
1287 # for trivial code, 0 otherwise. As some targets (ARM for example) only
1288 # warn when -fprofile-use is also supplied we test that combination too.
1290 proc check_effective_target_freorder {} {
1291 if { [check_no_compiler_messages freorder object {
1293 } "-freorder-blocks-and-partition"]
1294 && [check_no_compiler_messages fprofile_use_freorder object {
1296 } "-fprofile-use -freorder-blocks-and-partition -Wno-missing-profile"] } {
1302 # Return 1 if -fpic and -fPIC are supported, as in no warnings or errors
1303 # emitted, 0 otherwise. Whether a shared library can actually be built is
1304 # out of scope for this test.
1306 proc check_effective_target_fpic { } {
1307 # Note that M68K has a multilib that supports -fpic but not
1308 # -fPIC, so we need to check both. We test with a program that
1309 # requires GOT references.
1310 foreach arg {fpic fPIC} {
1311 if [check_no_compiler_messages $arg object {
1312 extern int foo (void); extern int bar;
1313 int baz (void) { return foo () + bar; }
1321 # On AArch64, if -fpic is not supported, then we will fall back to -fPIC
1322 # silently. So, we can't rely
on above
"check_effective_target_fpic" as it
1323 # assumes compiler will give warning
if -fpic not supported. Here we check
1324 # whether binutils supports those new
-fpic relocation modifiers
, and assume
1325 #
-fpic is supported
if there is binutils support. GCC configuration will
1326 # enable
-fpic
for AArch64 in this case.
1328 #
"check_effective_target_aarch64_small_fpic" is dedicated for checking small
1329 # memory
model -fpic relocation types.
1331 proc check_effective_target_aarch64_small_fpic
{ } {
1332 if { [istarget aarch64
*-*-*] } {
1333 return [check_no_compiler_messages aarch64_small_fpic object
{
1334 void foo
(void
) { asm
("ldr x0, [x2, #:gotpage_lo15:globalsym]"); }
1341 #
On AArch64
, instruction sequence
for TLS LE under
-mtls
-size
=32 will utilize
1342 # the relocation modifier
"tprel_g0_nc" together with MOVK, it's only supported
1343 # in binutils since
2015-03-04 as PR gas
/17843.
1345 # This test directive make sure binutils support all features needed by TLS LE
1346 # under
-mtls
-size
=32 on AArch64.
1348 proc check_effective_target_aarch64_tlsle32
{ } {
1349 if { [istarget aarch64
*-*-*] } {
1350 return [check_no_compiler_messages aarch64_tlsle32 object
{
1351 void foo
(void
) { asm
("movk x1,#:tprel_g0_nc:t1"); }
1358 #
Return 1 if -shared is supported
, as in no warnings or errors
1359 # emitted
, 0 otherwise.
1361 proc check_effective_target_shared
{ } {
1362 # Note that M68K has a multilib that supports
-fpic but not
1363 #
-fPIC
, so we need to check both. We test with a
program that
1364 # requires GOT references.
1365 return [check_no_compiler_messages shared executable
{
1366 extern
int foo
(void
); extern
int bar
;
1367 int baz
(void
) { return foo
() + bar
; }
1371 #
Return 1 if -pie
, -fpie and
-fPIE are supported
, 0 otherwise.
1373 proc check_effective_target_pie
{ } {
1374 if { [istarget
*-*-darwin\
[912\
]*]
1375 ||
[istarget
*-*-dragonfly
*]
1376 ||
[istarget
*-*-freebsd
*]
1377 ||
[istarget
*-*-linux
*]
1378 ||
[istarget arm
*-*-uclinuxfdpiceabi
]
1379 ||
[istarget
*-*-gnu
*]
1380 ||
[istarget
*-*-amdhsa
]} {
1383 if { [istarget
*-*-solaris2.1\
[1-9\
]*] } {
1384 # Full PIE support was added in Solaris
11.3, but gcc errors out
1385 #
if missing
, so check
for that.
1386 return [check_no_compiler_messages pie executable
{
1387 int main
(void
) { return 0; }
1393 #
Return true
if the target supports
-mpaired
-single
(as used
on MIPS
).
1395 proc check_effective_target_mpaired_single
{ args } {
1396 return [check_no_compiler_messages mpaired_single object
{
1401 #
Return true
if the target has access to FPU instructions.
1403 proc check_effective_target_hard_float
{ } {
1404 if { [istarget loongarch
*-*-*] } {
1405 return [check_no_compiler_messages hard_float assembly
{
1406 #
if (defined __loongarch_soft_float
)
1407 #error __loongarch_soft_float
1412 if { [istarget mips
*-*-*] } {
1413 return [check_no_compiler_messages hard_float assembly
{
1414 #
if (defined __mips_soft_float || defined __mips16
)
1415 #error __mips_soft_float || __mips16
1420 # This proc is actually checking the availabilty of FPU
1421 # support
for doubles
, so
on the RX we must fail
if the
1422 #
64-bit double multilib has been selected.
1423 if { [istarget rx
-*-*] } {
1425 #
return [check_no_compiler_messages hard_float assembly
{
1426 #
if defined __RX_64_BIT_DOUBLES__
1427 #error __RX_64_BIT_DOUBLES__
1432 # The generic test doesn
't work for C-SKY because some cores have
1433 # hard float for single precision only.
1434 if { [istarget csky*-*-*] } {
1435 return [check_no_compiler_messages hard_float assembly {
1436 #if defined __csky_soft_float__
1437 #error __csky_soft_float__
1442 # The generic test equates hard_float with "no call for adding doubles".
1443 return [check_no_messages_and_pattern hard_float "!\\(call" rtl-expand {
1444 double a (double b, double c) { return b + c; }
1448 # Return true if the target is a 64-bit MIPS target.
1450 proc check_effective_target_mips64 { } {
1451 return [check_no_compiler_messages mips64 assembly {
1458 # Return true if the target is a MIPS target that does not produce
1461 proc check_effective_target_nomips16 { } {
1462 return [check_no_compiler_messages nomips16 object {
1466 /* A cheap way of testing for -mflip-mips16. */
1467 void foo (void) { asm ("addiu $20,$20,1"); }
1468 void bar (void) { asm ("addiu $20,$20,1"); }
1473 # Add the options needed for MIPS16 function attributes. At the moment,
1474 # we don't support MIPS16 PIC.
1476 proc add_options_for_mips16_attribute
{ flags
} {
1477 return "$flags -mno-abicalls -fno-pic -DMIPS16=__attribute__((mips16))"
1480 #
Return true
if we can force a
mode that allows MIPS16 code generation.
1481 # We don
't support MIPS16 PIC, and only support MIPS16 -mhard-float
1484 proc check_effective_target_mips16_attribute { } {
1485 return [check_no_compiler_messages mips16_attribute assembly {
1489 #if defined __mips_hard_float \
1490 && (!defined _ABIO32 || _MIPS_SIM != _ABIO32) \
1491 && (!defined _ABIO64 || _MIPS_SIM != _ABIO64)
1492 #error __mips_hard_float && (!_ABIO32 || !_ABIO64)
1494 } [add_options_for_mips16_attribute ""]]
1497 # Return 1 if the target supports long double larger than double when
1498 # using the new ABI, 0 otherwise.
1500 proc check_effective_target_mips_newabi_large_long_double { } {
1501 return [check_no_compiler_messages mips_newabi_large_long_double object {
1502 int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
1506 # Return true if the target is a MIPS target that has access
1507 # to the LL and SC instructions.
1509 proc check_effective_target_mips_llsc { } {
1510 if { ![istarget mips*-*-*] } {
1513 # Assume that these instructions are always implemented for
1514 # non-elf* targets, via emulation if necessary.
1515 if { ![istarget *-*-elf*] } {
1518 # Otherwise assume LL/SC support for everything but MIPS I.
1519 return [check_no_compiler_messages mips_llsc assembly {
1526 # Return true if the target is a MIPS target that uses in-place relocations.
1528 proc check_effective_target_mips_rel { } {
1529 if { ![istarget mips*-*-*] } {
1532 return [check_no_compiler_messages mips_rel object {
1533 #if (defined _ABIN32 && _MIPS_SIM == _ABIN32) \
1534 || (defined _ABI64 && _MIPS_SIM == _ABI64)
1535 #error _ABIN32 && (_ABIN32 || _ABI64)
1540 # Return true if the target is a MIPS target that uses the EABI.
1542 proc check_effective_target_mips_eabi { } {
1543 if { ![istarget mips*-*-*] } {
1546 return [check_no_compiler_messages mips_eabi object {
1553 # Return 1 if the current multilib does not generate PIC by default.
1555 proc check_effective_target_nonpic { } {
1556 return [check_no_compiler_messages nonpic assembly {
1563 # Return 1 if the current multilib generates PIE by default.
1565 proc check_effective_target_pie_enabled { } {
1566 return [check_no_compiler_messages pie_enabled assembly {
1573 # Return 1 if the target generates -fstack-protector by default.
1575 proc check_effective_target_fstack_protector_enabled {} {
1576 return [ check_no_compiler_messages fstack_protector_enabled assembly {
1577 #if !defined(__SSP__) && !defined(__SSP_ALL__) && \
1578 !defined(__SSP_STRONG__) && !defined(__SSP_EXPICIT__)
1584 # Return 1 if the target does not use a status wrapper.
1586 proc check_effective_target_unwrapped { } {
1587 if { [target_info needs_status_wrapper] != "" \
1588 && [target_info needs_status_wrapper] != "0" } {
1594 # Return true if iconv is supported on the target. In particular IBM1047.
1596 proc check_iconv_available { test_what } {
1599 # If the tool configuration file has not set libiconv, try "-liconv"
1600 if { ![info exists libiconv] } {
1601 set libiconv "-liconv"
1603 set test_what [lindex $test_what 1]
1604 return [check_runtime_nocache $test_what [subst {
1610 cd = iconv_open ("$test_what", "UTF-8");
1611 if (cd == (iconv_t) -1)
1618 # Return true if the atomic library is supported on the target.
1619 proc check_effective_target_libatomic_available { } {
1620 return [check_no_compiler_messages libatomic_available executable {
1621 int main (void) { return 0; }
1625 # Return 1 if an ASCII locale is supported on this host, 0 otherwise.
1627 proc check_ascii_locale_available { } {
1631 # Return true if named sections are supported on this target.
1633 proc check_named_sections_available { } {
1634 return [check_no_compiler_messages named_sections assembly {
1635 int __attribute__ ((section("whatever"))) foo;
1639 # Return true if the "naked" function attribute is supported on this target.
1641 proc check_effective_target_naked_functions { } {
1642 return [check_no_compiler_messages naked_functions assembly {
1643 void f() __attribute__((naked));
1647 # Return 1 if the target supports Fortran real kinds larger than real(8),
1650 # When the target name changes, replace the cached result.
1652 proc check_effective_target_fortran_large_real { } {
1653 return [check_no_compiler_messages fortran_large_real executable {
1655 integer,parameter :: k = selected_real_kind (precision (0.0_8) + 1)
1662 # Return 1 if the target supports Fortran real kind real(16),
1663 # 0 otherwise. Contrary to check_effective_target_fortran_large_real
1664 # this checks for Real(16) only; the other returned real(10) if
1665 # both real(10) and real(16) are available.
1667 # When the target name changes, replace the cached result.
1669 proc check_effective_target_fortran_real_16 { } {
1670 return [check_no_compiler_messages fortran_real_16 executable {
1678 # Return 1 if the target supports Fortran real kind 10,
1679 # 0 otherwise. Contrary to check_effective_target_fortran_large_real
1680 # this checks for real(10) only.
1682 # When the target name changes, replace the cached result.
1684 proc check_effective_target_fortran_real_10 { } {
1685 return [check_no_compiler_messages fortran_real_10 executable {
1693 # Return 1 if the target supports Fortran real kind C_FLOAT128,
1694 # 0 otherwise. This differs from check_effective_target_fortran_real_16
1695 # because _Float128 has the additional requirement that it be the
1696 # 128-bit IEEE encoding; even if _Float128 is available in C, it may not
1697 # have a corresponding Fortran kind on targets (PowerPC) that use some
1698 # other encoding for long double/TFmode/real(16).
1699 proc check_effective_target_fortran_real_c_float128 { } {
1700 return [check_no_compiler_messages fortran_real_c_float128 executable {
1703 real(kind=c_float128) :: x
1709 # Return 1 if the target supports Fortran's IEEE modules
,
1712 # When the target
name changes
, replace the cached result.
1714 proc check_effective_target_fortran_ieee
{ flags
} {
1715 return [check_no_compiler_messages fortran_ieee executable
{
1717 use
, intrinsic
:: ieee_features
1723 #
Return 1 if the target supports
SQRT for the
largest floating
-point
1724 # type.
(Some targets lack the libm support
for this FP type.
)
1725 #
On most targets
, this check effectively checks either whether sqrtl is
1726 # available or
on __float128 systems whether libquadmath is installed
,
1727 # which provides sqrtq.
1729 # When the target
name changes
, replace the cached result.
1731 proc check_effective_target_fortran_largest_fp_has_sqrt
{ } {
1732 return [check_no_compiler_messages fortran_largest_fp_has_sqrt executable
{
1734 use iso_fortran_env
, only
: real_kinds
1735 integer,parameter
:: maxFP
= real_kinds
(ubound
(real_kinds
,dim
=1))
1736 real
(kind
=maxFP
), volatile
:: x
1744 #
Return 1 if the target supports Fortran
integer kinds larger than
1745 #
integer(8), 0 otherwise.
1747 # When the target
name changes
, replace the cached result.
1749 proc check_effective_target_fortran_large_int
{ } {
1750 return [check_no_compiler_messages fortran_large_int executable
{
1752 integer,parameter
:: k
= selected_int_kind
(range
(0_8
) + 1)
1753 integer(kind
=k
) :: i
1758 #
Return 1 if the target supports Fortran
integer(16), 0 otherwise.
1760 # When the target
name changes
, replace the cached result.
1762 proc check_effective_target_fortran_integer_16
{ } {
1763 return [check_no_compiler_messages fortran_integer_16 executable
{
1770 #
Return 1 if we can statically link libgfortran
, 0 otherwise.
1772 # When the target
name changes
, replace the cached result.
1774 proc check_effective_target_static_libgfortran
{ } {
1775 return [check_no_compiler_messages static_libgfortran executable
{
1782 #
Return 1 if we can use the
-rdynamic option
, 0 otherwise.
1784 proc check_effective_target_rdynamic
{ } {
1785 return [check_no_compiler_messages rdynamic executable
{
1786 int main
() { return 0; }
1790 proc check_linker_plugin_available
{ } {
1791 return [check_no_compiler_messages_nocache linker_plugin executable
{
1792 int main
() { return 0; }
1793 } "-flto -fuse-linker-plugin"]
1796 #
Return 1 if the target has RISC
-V vector extension
, 0 otherwise.
1799 proc check_effective_target_riscv_vector
{ } {
1800 # Check that we are compiling
for v by checking the __riscv_v marco.
1801 return [check_no_compiler_messages riscv_vector assembly
{
1802 #
if !defined
(__riscv_v
)
1803 #error
"__riscv_v not defined!"
1808 #
Return 1 if the we can build a vector example with proper
-march flags
1809 # and the current target can
execute it
, 0 otherwise.
Cache the result.
1811 proc check_effective_target_riscv_vector_hw
{ } {
1813 return [check_runtime riscv_vector_hw32
{
1816 asm
("vsetivli zero,8,e16,m1,ta,ma");
1817 asm
("vadd.vv v8,v8,v16" : : : "v8");
1820 } "-march=rv32gcv -mabi=ilp32d"] || [check_runtime riscv_vector_hw64 {
1823 asm
("vsetivli zero,8,e16,m1,ta,ma");
1824 asm
("vadd.vv v8,v8,v16" : : : "v8");
1827 } "-march=rv64gcv -mabi=lp64d"]
1830 #
Return 1 if the we can build a Zvfh vector example with proper
-march flags
1831 # and the current target can
execute it
, 0 otherwise.
Cache the result.
1833 proc check_effective_target_riscv_zvfh_hw
{ } {
1834 if ![check_effective_target_riscv_vector_hw
] then {
1838 return [check_runtime riscv_zvfh_hw32
{
1841 asm
("vsetivli zero,8,e16,m1,ta,ma");
1842 asm
("vfadd.vv v8,v8,v16" : : : "v8");
1845 } "-march=rv32gcv_zvfh -mabi=ilp32d"]
1846 ||
[check_runtime riscv_zvfh_hw64
{
1849 asm
("vsetivli zero,8,e16,m1,ta,ma");
1850 asm
("vfadd.vv v8,v8,v16" : : : "v8");
1853 } "-march=rv64gcv_zvfh -mabi=lp64d"]
1857 #
Return 1 if the target is RV32
, 0 otherwise.
Cache the result.
1859 proc check_effective_target_rv32
{ } {
1860 # Check that we are compiling
for RV32 by checking the xlen size.
1861 return [check_no_compiler_messages riscv_rv32 assembly
{
1862 #
if !defined
(__riscv_xlen
)
1863 #error
"__riscv_xlen not defined!"
1865 #
if __riscv_xlen
!= 32
1872 #
Return 1 if the target is RV64
, 0 otherwise.
Cache the result.
1874 proc check_effective_target_rv64
{ } {
1875 # Check that we are compiling
for RV64 by checking the xlen size.
1876 return [check_no_compiler_messages riscv_rv64 assembly
{
1877 #
if !defined
(__riscv_xlen
)
1878 #error
"__riscv_xlen not defined!"
1880 #
if __riscv_xlen
!= 64
1887 #
Return 1 if the target OS supports running SSE executables
, 0
1888 # otherwise.
Cache the result.
1890 proc check_sse_os_support_available
{ } {
1891 return [check_cached_effective_target sse_os_support_available
{
1892 #
If this is not the right target
then we can skip the test.
1893 if { !([istarget i?
86-*-*] ||
[istarget x86_64
-*-*]) } {
1901 #
Return 1 if the target OS supports running AVX executables
, 0
1902 # otherwise.
Cache the result.
1904 proc check_avx_os_support_available
{ } {
1905 return [check_cached_effective_target avx_os_support_available
{
1906 #
If this is not the right target
then we can skip the test.
1907 if { !([istarget i?
86-*-*] ||
[istarget x86_64
-*-*]) } {
1910 # Check that OS has AVX and SSE saving enabled.
1911 check_runtime_nocache avx_os_support_available
{
1914 unsigned
int eax
, edx
;
1916 asm
("xgetbv" : "=a" (eax), "=d" (edx) : "c" (0));
1917 return (eax
& 0x06) != 0x06;
1924 #
Return 1 if the target OS supports running AVX executables
, 0
1925 # otherwise.
Cache the result.
1927 proc check_avx512_os_support_available
{ } {
1928 return [check_cached_effective_target avx512_os_support_available
{
1929 #
If this is not the right target
then we can skip the test.
1930 if { !([istarget i?
86-*-*] ||
[istarget x86_64
-*-*]) } {
1933 # Check that OS has AVX512
, AVX and SSE saving enabled.
1934 check_runtime_nocache avx512_os_support_available
{
1937 unsigned
int eax
, edx
;
1939 asm
("xgetbv" : "=a" (eax), "=d" (edx) : "c" (0));
1940 return (eax
& 0xe6) != 0xe6;
1947 #
Return 1 if the target supports executing SSE instructions
, 0
1948 # otherwise.
Cache the result.
1950 proc check_sse_hw_available
{ } {
1951 return [check_cached_effective_target sse_hw_available
{
1952 #
If this is not the right target
then we can skip the test.
1953 if { !([istarget i?
86-*-*] ||
[istarget x86_64
-*-*]) } {
1956 check_runtime_nocache sse_hw_available
{
1960 unsigned
int eax
, ebx
, ecx
, edx
;
1961 if (!__get_cpuid
(1, &eax
, &ebx
, &ecx
, &edx
))
1964 return !(edx
& bit_SSE
);
1971 #
Return 1 if the target supports executing SSE2 instructions
, 0
1972 # otherwise.
Cache the result.
1974 proc check_sse2_hw_available
{ } {
1975 return [check_cached_effective_target sse2_hw_available
{
1976 #
If this is not the right target
then we can skip the test.
1977 if { !([istarget i?
86-*-*] ||
[istarget x86_64
-*-*]) } {
1980 check_runtime_nocache sse2_hw_available
{
1984 unsigned
int eax
, ebx
, ecx
, edx
;
1985 if (!__get_cpuid
(1, &eax
, &ebx
, &ecx
, &edx
))
1988 return !(edx
& bit_SSE2
);
1995 #
Return 1 if the target supports executing SSE4 instructions
, 0
1996 # otherwise.
Cache the result.
1998 proc check_sse4_hw_available
{ } {
1999 return [check_cached_effective_target sse4_hw_available
{
2000 #
If this is not the right target
then we can skip the test.
2001 if { !([istarget i?
86-*-*] ||
[istarget x86_64
-*-*]) } {
2004 check_runtime_nocache sse4_hw_available
{
2008 unsigned
int eax
, ebx
, ecx
, edx
;
2009 if (!__get_cpuid
(1, &eax
, &ebx
, &ecx
, &edx
))
2012 return !(ecx
& bit_SSE4_2
);
2019 #
Return 1 if the target supports executing AVX instructions
, 0
2020 # otherwise.
Cache the result.
2022 proc check_avx_hw_available
{ } {
2023 return [check_cached_effective_target avx_hw_available
{
2024 #
If this is not the right target
then we can skip the test.
2025 if { !([istarget i?
86-*-*] ||
[istarget x86_64
-*-*]) } {
2028 check_runtime_nocache avx_hw_available
{
2032 unsigned
int eax
, ebx
, ecx
, edx
;
2033 if (!__get_cpuid
(1, &eax
, &ebx
, &ecx
, &edx
))
2036 return ((ecx
& (bit_AVX | bit_OSXSAVE
))
2037 != (bit_AVX | bit_OSXSAVE
));
2044 #
Return 1 if the target supports executing AVX2 instructions
, 0
2045 # otherwise.
Cache the result.
2047 proc check_avx2_hw_available
{ } {
2048 return [check_cached_effective_target avx2_hw_available
{
2049 #
If this is not the right target
then we can skip the test.
2050 if { !([istarget x86_64
-*-*] ||
[istarget i?
86-*-*]) } {
2053 check_runtime_nocache avx2_hw_available
{
2058 unsigned
int eax
, ebx
, ecx
, edx
;
2060 if (__get_cpuid_max
(0, NULL
) < 7)
2063 __cpuid
(1, eax
, ebx
, ecx
, edx
);
2065 if (!(ecx
& bit_OSXSAVE
))
2068 __cpuid_count
(7, 0, eax
, ebx
, ecx
, edx
);
2070 return !(ebx
& bit_AVX2
);
2077 #
Return 1 if the target supports executing AVX512 foundation instructions
, 0
2078 # otherwise.
Cache the result.
2080 proc check_avx512f_hw_available
{ } {
2081 return [check_cached_effective_target avx512f_hw_available
{
2082 #
If this is not the right target
then we can skip the test.
2083 if { !([istarget x86_64
-*-*] ||
[istarget i?
86-*-*]) } {
2086 check_runtime_nocache avx512f_hw_available
{
2091 unsigned
int eax
, ebx
, ecx
, edx
;
2093 if (__get_cpuid_max
(0, NULL
) < 7)
2096 __cpuid
(1, eax
, ebx
, ecx
, edx
);
2098 if (!(ecx
& bit_OSXSAVE
))
2101 __cpuid_count
(7, 0, eax
, ebx
, ecx
, edx
);
2103 return !(ebx
& bit_AVX512F
);
2110 #
Return 1 if the target supports running SSE executables
, 0 otherwise.
2112 proc check_effective_target_sse_runtime
{ } {
2113 if { [check_effective_target_sse
]
2114 && [check_sse_hw_available
]
2115 && [check_sse_os_support_available
] } {
2121 #
Return 1 if the target supports running SSE2 executables
, 0 otherwise.
2123 proc check_effective_target_sse2_runtime
{ } {
2124 if { [check_effective_target_sse2
]
2125 && [check_sse2_hw_available
]
2126 && [check_sse_os_support_available
] } {
2132 #
Return 1 if the target supports running SSE4 executables
, 0 otherwise.
2134 proc check_effective_target_sse4_runtime
{ } {
2135 if { [check_effective_target_sse4
]
2136 && [check_sse4_hw_available
]
2137 && [check_sse_os_support_available
] } {
2143 #
Return 1 if the target supports running AVX executables
, 0 otherwise.
2145 proc check_effective_target_avx_runtime
{ } {
2146 if { [check_effective_target_avx
]
2147 && [check_avx_hw_available
]
2148 && [check_avx_os_support_available
] } {
2154 #
Return 1 if the target supports running AVX2 executables
, 0 otherwise.
2156 proc check_effective_target_avx2_runtime
{ } {
2157 if { [check_effective_target_avx2
]
2158 && [check_avx2_hw_available
]
2159 && [check_avx_os_support_available
] } {
2165 #
Return 1 if the target supports running AVX512f executables
, 0 otherwise.
2167 proc check_effective_target_avx512f_runtime
{ } {
2168 if { [check_effective_target_avx512f
]
2169 && [check_avx512f_hw_available
]
2170 && [check_avx512_os_support_available
] } {
2176 #
Return 1 if bmi2 instructions can be compiled.
2177 proc check_effective_target_bmi2
{ } {
2178 if { !([istarget i?
86-*-*] ||
[istarget x86_64
-*-*]) } {
2181 return [check_no_compiler_messages bmi2 object
{
2183 _bzhi_u32
(unsigned
int __X
, unsigned
int __Y
)
2185 return __builtin_ia32_bzhi_si
(__X
, __Y
);
2190 #
Return 1 if the target supports executing MIPS Paired
-Single instructions
,
2191 #
0 otherwise.
Cache the result.
2193 proc check_mpaired_single_hw_available
{ } {
2194 return [check_cached_effective_target mpaired_single_hw_available
{
2195 #
If this is not the right target
then we can skip the test.
2196 if { !([istarget mips
*-*-*]) } {
2199 check_runtime_nocache mpaired_single_hw_available
{
2202 asm volatile
("pll.ps $f2,$f4,$f6");
2210 #
Return 1 if the target supports executing Loongson vector instructions
,
2211 #
0 otherwise.
Cache the result.
2213 proc check_mips_loongson_mmi_hw_available
{ } {
2214 return [check_cached_effective_target mips_loongson_mmi_hw_available
{
2215 #
If this is not the right target
then we can skip the test.
2216 if { !([istarget mips
*-*-*]) } {
2219 check_runtime_nocache mips_loongson_mmi_hw_available
{
2220 #
include <loongson
-mmiintrin.h
>
2223 asm volatile
("paddw $f2,$f4,$f6");
2231 #
Return 1 if the target supports executing MIPS MSA instructions
, 0
2232 # otherwise.
Cache the result.
2234 proc check_mips_msa_hw_available
{ } {
2235 return [check_cached_effective_target mips_msa_hw_available
{
2236 #
If this is not the right target
then we can skip the test.
2237 if { !([istarget mips
*-*-*]) } {
2240 check_runtime_nocache mips_msa_hw_available
{
2241 #
if !defined
(__mips_msa
)
2242 #error
"MSA NOT AVAIL"
2244 #
if !(((__mips
== 64) ||
(__mips
== 32)) && (__mips_isa_rev
>= 2))
2245 #error
"MSA NOT AVAIL FOR ISA REV < 2"
2247 #
if !defined
(__mips_hard_float
)
2248 #error
"MSA HARD_FLOAT REQUIRED"
2250 #
if __mips_fpr
!= 64
2251 #error
"MSA 64-bit FPR REQUIRED"
2257 v8i16 v
= __builtin_msa_ldi_h
(0);
2267 #
Return 1 if the target supports running MIPS Paired
-Single
2268 # executables
, 0 otherwise.
2270 proc check_effective_target_mpaired_single_runtime
{ } {
2271 if { [check_effective_target_mpaired_single
"-mpaired-single"]
2272 && [check_mpaired_single_hw_available
] } {
2278 #
Return 1 if the target supports running Loongson executables
, 0 otherwise.
2280 proc check_effective_target_mips_loongson_mmi_runtime
{ } {
2281 if { [check_effective_target_mips_loongson_mmi
"-mloongson-mmi"]
2282 && [check_mips_loongson_mmi_hw_available
] } {
2288 #
Return 1 if the target supports running MIPS MSA executables
, 0 otherwise.
2290 proc check_effective_target_mips_msa_runtime
{ } {
2291 if { [check_effective_target_mips_msa
"-mmsa"]
2292 && [check_mips_msa_hw_available
] } {
2298 #
Return 1 if we are compiling
for 64-bit PowerPC but we
do not use direct
2299 #
move instructions
for moves from GPR to FPR.
2301 proc check_effective_target_powerpc64_no_dm
{ } {
2302 # The
"mulld" checks if we are generating PowerPC64 code. The "lfd"
2303 # checks
if we
do not use direct moves
, but use the old
-fashioned
2304 # slower
move-via
-the
-stack.
2305 return [check_no_messages_and_pattern powerpc64_no_dm \
2306 {\mmulld\M.
*\mlfd
} assembly
{
2307 double f
(long long x
) { return x
*x
; }
2311 #
Return 1 if the target supports the __builtin_cpu_supports built
-in
,
2312 # including having a new enough library to support the test.
Cache the result.
2313 # Require at least a power7 to run
on.
2315 proc check_ppc_cpu_supports_hw_available
{ } {
2316 return [check_cached_effective_target ppc_cpu_supports_hw_available
{
2317 # Some simulators are known to not support VSX
/power8 instructions.
2318 #
For now
, disable
on Darwin
2319 if { [istarget powerpc
-*-eabi
]
2320 ||
[istarget powerpc
*-*-eabispe
]
2321 ||
[istarget
*-*-darwin
*]} {
2325 check_runtime_nocache ppc_cpu_supports_hw_available
{
2329 asm volatile
("xxlor vs0,vs0,vs0");
2331 asm volatile
("xxlor 0,0,0");
2333 if (!__builtin_cpu_supports
("vsx"))
2342 #
Return 1 if the target supports executing
750CL paired
-single instructions
, 0
2343 # otherwise.
Cache the result.
2345 proc check_750cl_hw_available
{ } {
2346 return [check_cached_effective_target
750cl_hw_available
{
2347 #
If this is not the right target
then we can skip the test.
2348 if { ![istarget powerpc
-*paired
*] } {
2351 check_runtime_nocache
750cl_hw_available
{
2355 asm volatile
("ps_mul v0,v0,v0");
2357 asm volatile
("ps_mul 0,0,0");
2366 #
Return 1 if the target supports executing power8 vector instructions
, 0
2367 # otherwise.
Cache the result.
2369 proc check_p8vector_hw_available
{ } {
2370 return [check_cached_effective_target p8vector_hw_available
{
2371 # Some simulators are known to not support VSX
/power8 instructions.
2372 #
For now
, disable
on Darwin
2373 if { [istarget powerpc
-*-eabi
]
2374 ||
[istarget powerpc
*-*-eabispe
]
2375 ||
[istarget
*-*-darwin
*]} {
2378 set options
"-mpower8-vector"
2379 check_runtime_nocache p8vector_hw_available
{
2383 asm volatile
("xxlorc vs0,vs0,vs0");
2385 asm volatile
("xxlorc 0,0,0");
2394 #
Return 1 if the target supports executing power9 vector instructions
, 0
2395 # otherwise.
Cache the result.
2397 proc check_p9vector_hw_available
{ } {
2398 return [check_cached_effective_target p9vector_hw_available
{
2399 # Some simulators are known to not support VSX
/power8
/power9
2400 # instructions.
For now
, disable
on Darwin.
2401 if { [istarget powerpc
-*-eabi
]
2402 ||
[istarget powerpc
*-*-eabispe
]
2403 ||
[istarget
*-*-darwin
*]} {
2406 set options
"-mpower9-vector"
2407 check_runtime_nocache p9vector_hw_available
{
2411 vector double v
= (vector double
) { 0.0, 0.0 };
2412 asm
("xsxexpdp %0,%1" : "+r" (e) : "wa" (v));
2420 #
Return 1 if the PowerPC target generates PC
-relative instructions
2421 # automatically
for targets that support PC
-relative instructions.
2422 proc check_effective_target_powerpc_pcrel
{ } {
2423 return [check_no_messages_and_pattern powerpc_pcrel \
2424 {\mpla\M
} assembly
{
2425 static unsigned short s
;
2426 unsigned short
*p_foo
(void
) { return &s
; }
2427 } {-O2
-mcpu
=power10
}]
2430 #
Return 1 if the PowerPC target generates prefixed instructions automatically
2431 #
for targets that support prefixed instructions.
2432 proc check_effective_target_powerpc_prefixed_addr
{ } {
2433 return [check_no_messages_and_pattern powerpc_prefixed_addr \
2434 {\mplwz\M
} assembly
{
2435 unsigned
int foo
(unsigned
int *p
) { return p
[0x12345]; }
2436 } {-O2
-mcpu
=power10
}]
2439 #
Return 1 if the target supports executing power9 modulo instructions
, 0
2440 # otherwise.
Cache the result.
2442 proc check_p9modulo_hw_available
{ } {
2443 return [check_cached_effective_target p9modulo_hw_available
{
2444 # Some simulators are known to not support VSX
/power8
/power9
2445 # instructions.
For now
, disable
on Darwin.
2446 if { [istarget powerpc
-*-eabi
]
2447 ||
[istarget powerpc
*-*-eabispe
]
2448 ||
[istarget
*-*-darwin
*]} {
2451 set options
"-mmodulo"
2452 check_runtime_nocache p9modulo_hw_available
{
2455 int i
= 5, j
= 3, r
= -1;
2456 asm
("modsw %0,%1,%2" : "+r" (r) : "r" (i), "r" (j));
2465 #
Return 1 if the target supports executing power10 instructions
, 0 otherwise.
2466 #
Cache the result. It is assumed that
if a simulator does not support the
2467 # power10 instructions
, that it will generate an error and this test will fail.
2469 proc check_power10_hw_available
{ } {
2470 return [check_cached_effective_target power10_hw_available
{
2471 check_runtime_nocache power10_hw_available
{
2474 /* Set e first and use
+r to check
if pli actually works.
*/
2476 asm
("pli %0,%1" : "+r" (e) : "n" (0x12345));
2485 #
Return 1 if the target supports executing MMA instructions
, 0 otherwise.
2486 #
Cache the result. It is assumed that
if a simulator does not support the
2487 # MMA instructions
, that it will generate an error and this test will fail.
2489 proc check_ppc_mma_hw_available
{ } {
2490 return [check_cached_effective_target ppc_mma_hw_available
{
2491 check_runtime_nocache ppc_mma_hw_available
{
2492 #
include <altivec.h
>
2493 typedef double v4sf_t __attribute__
((vector_size
(16)));
2500 __builtin_mma_xxsetaccz
(&acc0
);
2501 __builtin_mma_disassemble_acc
(result
, &acc0
);
2502 if (result
[0][0] != 0.0)
2510 #
Return 1 if the target supports executing __float128
on PowerPC via software
2511 # emulation
, 0 otherwise.
Cache the result.
2513 proc check_ppc_float128_sw_available
{ } {
2514 return [check_cached_effective_target ppc_float128_sw_available
{
2515 # Some simulators are known to not support VSX
/power8
/power9
2516 # instructions.
For now
, disable
on Darwin and VxWorks.
2517 if { [istarget
*-*-vxworks
*]
2518 ||
[istarget powerpc
-*-eabi
]
2519 ||
[istarget powerpc
*-*-eabispe
]
2520 ||
[istarget
*-*-darwin
*]} {
2523 set options
"-mfloat128 -mvsx"
2524 check_runtime_nocache ppc_float128_sw_available
{
2525 volatile __float128 x
= 1.0q
;
2526 volatile __float128 y
= 2.0q
;
2529 __float128 z
= x
+ y
;
2537 #
Return 1 if the target supports executing __float128
on PowerPC via power9
2538 # hardware instructions
, 0 otherwise.
Cache the result.
2540 proc check_ppc_float128_hw_available
{ } {
2541 return [check_cached_effective_target ppc_float128_hw_available
{
2542 # Some simulators are known to not support VSX
/power8
/power9
2543 # instructions.
For now
, disable
on Darwin.
2544 if { [istarget
*-*-vxworks
*]
2545 ||
[istarget powerpc
-*-eabi
]
2546 ||
[istarget powerpc
*-*-eabispe
]
2547 ||
[istarget
*-*-darwin
*]} {
2550 set options
"-mfloat128 -mvsx -mfloat128-hardware -mpower9-vector"
2551 check_runtime_nocache ppc_float128_hw_available
{
2552 volatile __float128 x
= 1.0q
;
2553 volatile __float128 y
= 2.0q
;
2556 __float128 z
= x
+ y
;
2557 __float128 w
= -1.0q
;
2559 __asm__
("xsaddqp %0,%1,%2" : "+v" (w) : "v" (x), "v" (y));
2560 return ((z
!= 3.0q
) ||
(z
!= w
));
2567 # See
if the __ieee128 keyword is understood.
2568 proc check_effective_target_ppc_ieee128_ok
{ } {
2569 return [check_cached_effective_target ppc_ieee128_ok
{
2570 # disable
on AIX and VxWorks.
2571 if { [istarget
*-*-aix
*]
2572 ||
[istarget
*-*-vxworks
*]} {
2575 set options
"-mfloat128"
2576 check_runtime_nocache ppc_ieee128_ok
{
2587 # Check
if GCC and GLIBC supports explicitly specifying that the long double
2588 # format uses the IBM
128-bit extended double format. Under little endian
2589 # PowerPC Linux
, you need GLIBC
2.32 or later to be able to use a different
2590 # long double format
for running a
program than the
system default.
2592 proc check_effective_target_long_double_ibm128
{ } {
2593 return [check_runtime_nocache long_double_ibm128
{
2596 /* use volatile to prevent optimization.
*/
2597 volatile __ibm128 a
= (__ibm128
) 3.0;
2598 volatile long double one
= 1.0L;
2599 volatile long double two
= 2.0L;
2600 volatile long double b
;
2606 if (sizeof
(long double
) != 16)
2609 /* eliminate removing volatile cast warning.
*/
2612 if (memcmp
(&a2
, &b2
, 16) != 0)
2614 sprintf
(buffer
, "%lg", b);
2615 return strcmp
(buffer
, "3") != 0;
2617 } [add_options_for_long_double_ibm128
""]]
2620 #
Return the appropriate options to specify that long double uses the IBM
2621 #
128-bit format
on PowerPC.
2623 proc add_options_for_long_double_ibm128
{ flags
} {
2624 if { [istarget powerpc
*-*-*] } {
2625 return "$flags -mlong-double-128 -Wno-psabi -mabi=ibmlongdouble"
2630 # Check
if GCC and GLIBC supports explicitly specifying that the long double
2631 # format uses the IEEE
128-bit format. Under little endian PowerPC Linux
, you
2632 # need GLIBC
2.32 or later to be able to use a different long double format
for
2633 # running a
program than the
system default.
2635 proc check_effective_target_long_double_ieee128
{ } {
2636 return [check_runtime_nocache long_double_ieee128
{
2639 /* use volatile to prevent optimization.
*/
2640 volatile _Float128 a
= 3.0f128
;
2641 volatile long double one
= 1.0L;
2642 volatile long double two
= 2.0L;
2643 volatile long double b
;
2649 if (sizeof
(long double
) != 16)
2652 /* eliminate removing volatile cast warning.
*/
2655 if (memcmp
(&a2
, &b2
, 16) != 0)
2657 sprintf
(buffer
, "%lg", b);
2658 return strcmp
(buffer
, "3") != 0;
2660 } [add_options_for_long_double_ieee128
""]]
2663 #
Return the appropriate options to specify that long double uses the IBM
2664 #
128-bit format
on PowerPC.
2665 proc add_options_for_long_double_ieee128
{ flags
} {
2666 if { [istarget powerpc
*-*-*] } {
2667 return "$flags -mlong-double-128 -Wno-psabi -mabi=ieeelongdouble"
2672 # Check
if GCC and GLIBC supports explicitly specifying that the long double
2673 # format uses the IEEE
64-bit. Under little endian PowerPC Linux
, you need
2674 # GLIBC
2.32 or later to be able to use a different long double format
for
2675 # running a
program than the
system default.
2677 proc check_effective_target_long_double_64bit
{ } {
2678 return [check_runtime_nocache long_double_64bit
{
2681 /* use volatile to prevent optimization.
*/
2682 volatile double a
= 3.0;
2683 volatile long double one
= 1.0L;
2684 volatile long double two
= 2.0L;
2685 volatile long double b
;
2691 if (sizeof
(long double
) != 8)
2694 /* eliminate removing volatile cast warning.
*/
2697 if (memcmp
(&a2
, &b2
, 16) != 0)
2699 sprintf
(buffer
, "%lg", b);
2700 return strcmp
(buffer
, "3") != 0;
2702 } [add_options_for_ppc_long_double_override_64bit
""]]
2705 #
Return the appropriate options to specify that long double uses the IEEE
2706 #
64-bit format
on PowerPC.
2708 proc add_options_for_long_double_64bit
{ flags
} {
2709 if { [istarget powerpc
*-*-*] } {
2710 return "$flags -mlong-double-64"
2715 #
Return 1 if the target supports executing VSX instructions
, 0
2716 # otherwise.
Cache the result.
2718 proc check_vsx_hw_available
{ } {
2719 return [check_cached_effective_target vsx_hw_available
{
2720 # Some simulators are known to not support VSX instructions.
2721 #
For now
, disable
on Darwin
2722 if { [istarget powerpc
-*-eabi
]
2723 ||
[istarget powerpc
*-*-eabispe
]
2724 ||
[istarget
*-*-darwin
*]} {
2728 check_runtime_nocache vsx_hw_available
{
2732 asm volatile
("xxlor vs0,vs0,vs0");
2734 asm volatile
("xxlor 0,0,0");
2743 #
Return 1 if the target supports executing AltiVec instructions
, 0
2744 # otherwise.
Cache the result.
2746 proc check_vmx_hw_available
{ } {
2747 return [check_cached_effective_target vmx_hw_available
{
2748 # Some simulators are known to not support VMX instructions.
2749 if { [istarget powerpc
-*-eabi
] ||
[istarget powerpc
*-*-eabispe
] } {
2752 # Most targets don
't require special flags for this test case, but
2753 # Darwin does. Just to be sure, make sure VSX is not enabled for
2754 # the altivec tests.
2755 if { [istarget *-*-darwin*]
2756 || [istarget *-*-aix*] } {
2757 set options "-maltivec -mno-vsx"
2759 set options "-mno-vsx"
2761 check_runtime_nocache vmx_hw_available {
2765 asm volatile ("vor v0,v0,v0");
2767 asm volatile ("vor 0,0,0");
2776 proc check_ppc_recip_hw_available { } {
2777 return [check_cached_effective_target ppc_recip_hw_available {
2778 # Some simulators may not support FRE/FRES/FRSQRTE/FRSQRTES
2779 # For now, disable on Darwin
2780 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
2783 set options "-mpowerpc-gfxopt -mpowerpc-gpopt -mpopcntb"
2784 check_runtime_nocache ppc_recip_hw_available {
2785 volatile double d_recip, d_rsqrt, d_four = 4.0;
2786 volatile float f_recip, f_rsqrt, f_four = 4.0f;
2789 asm volatile ("fres %0,%1" : "=f" (f_recip) : "f" (f_four));
2790 asm volatile ("fre %0,%1" : "=d" (d_recip) : "d" (d_four));
2791 asm volatile ("frsqrtes %0,%1" : "=f" (f_rsqrt) : "f" (f_four));
2792 asm volatile ("frsqrte %0,%1" : "=f" (d_rsqrt) : "d" (d_four));
2800 # Return 1 if the target supports executing AltiVec and Cell PPU
2801 # instructions, 0 otherwise. Cache the result.
2803 proc check_effective_target_cell_hw { } {
2804 return [check_cached_effective_target cell_hw_available {
2805 # Some simulators are known to not support VMX and PPU instructions.
2806 if { [istarget powerpc-*-eabi*] } {
2809 # Most targets don't require special flags
for this test
2810 # case
, but Darwin and AIX
do.
2811 if { [istarget
*-*-darwin
*]
2812 ||
[istarget
*-*-aix
*] } {
2813 set options
"-maltivec -mcpu=cell"
2815 set options
"-mcpu=cell"
2817 check_runtime_nocache cell_hw_available
{
2821 asm volatile
("vor v0,v0,v0");
2822 asm volatile
("lvlx v0,r0,r0");
2824 asm volatile
("vor 0,0,0");
2825 asm volatile
("lvlx 0,0,0");
2834 #
Return 1 if the target supports executing
64-bit instructions
, 0
2835 # otherwise.
Cache the result.
2837 proc check_effective_target_powerpc64
{ } {
2838 global powerpc64_available_saved
2841 if [info exists powerpc64_available_saved
] {
2842 verbose
"check_effective_target_powerpc64 returning saved $powerpc64_available_saved" 2
2844 set powerpc64_available_saved
0
2846 # Some simulators are known to not support powerpc64 instructions.
2847 if { [istarget powerpc
-*-eabi
*] ||
[istarget powerpc
-ibm
-aix
*] } {
2848 verbose
"check_effective_target_powerpc64 returning 0" 2
2849 return $powerpc64_available_saved
2852 #
Set up
, compile, and
execute a test
program containing a
64-bit
2853 # instruction.
Include the current process ID in the file
2854 # names to prevent conflicts with invocations
for multiple
2859 set f
[open $src
"w"]
2860 puts $f
"int main() {"
2861 puts $f
"#ifdef __MACH__"
2862 puts $f
" asm volatile (\"extsw r0,r0\");"
2864 puts $f
" asm volatile (\"extsw 0,0\");"
2866 puts $f
" return 0; }"
2869 set opts
"additional_flags=-mcpu=G5"
2871 verbose
"check_effective_target_powerpc64 compiling testfile $src" 2
2872 set lines
[$
{tool
}_target_compile $src $exe executable
"$opts"]
2875 if [string match
"" $lines] then {
2876 # No error message
, compilation succeeded.
2877 set result
[$
{tool
}_load
"./$exe" "" ""]
2878 set status [lindex $result
0]
2879 remote_file build
delete $exe
2880 verbose
"check_effective_target_powerpc64 testfile status is <$status>" 2
2882 if { $
status == "pass" } then {
2883 set powerpc64_available_saved
1
2886 verbose
"check_effective_target_powerpc64 testfile compilation failed" 2
2890 return $powerpc64_available_saved
2893 # GCC
3.4.0 for powerpc64
-*-linux
* included an ABI fix
for passing
2894 # complex float arguments. This affects gfortran tests that
call cabsf
2895 # in libm built by an earlier compiler.
Return 0 if libm uses the same
2896 #
argument passing as the compiler under test
, 1 otherwise.
2898 proc check_effective_target_broken_cplxf_arg
{ } {
2899 # Skip the work
for targets known not to be affected.
2900 if { ![istarget powerpc
*-*-linux
*] ||
![is
-effective
-target lp64
] } {
2904 return [check_cached_effective_target broken_cplxf_arg
{
2905 check_runtime_nocache broken_cplxf_arg
{
2906 #
include <complex.h
>
2907 extern void abort
(void
);
2908 float fabsf
(float
);
2909 float cabsf
(_Complex float
);
2916 if (fabsf
(f
- 5.0) > 0.0001)
2917 /* Yes
, it
's broken. */
2919 /* All fine, not broken. */
2926 # Return 1 is this is a TI C6X target supporting C67X instructions
2927 proc check_effective_target_ti_c67x { } {
2928 return [check_no_compiler_messages ti_c67x assembly {
2929 #if !defined(_TMS320C6700)
2930 #error !_TMS320C6700
2935 # Return 1 is this is a TI C6X target supporting C64X+ instructions
2936 proc check_effective_target_ti_c64xp { } {
2937 return [check_no_compiler_messages ti_c64xp assembly {
2938 #if !defined(_TMS320C6400_PLUS)
2939 #error !_TMS320C6400_PLUS
2944 # Check if a -march=... option is given, as part of (earlier) options.
2945 proc check_effective_target_march_option { } {
2946 return [check-flags [list "" { *-*-* } { "-march=*" } { "" } ]]
2949 proc check_alpha_max_hw_available { } {
2950 return [check_runtime alpha_max_hw_available {
2951 int main() { return __builtin_alpha_amask(1<<8) != 0; }
2955 # Returns true iff the FUNCTION is available on the target system.
2956 # (This is essentially a Tcl implementation of Autoconf's
2959 proc check_function_available
{ function
} {
2960 return [check_no_compiler_messages $
{function
}_available \
2966 int main
() { $function
(); }
2970 # Returns true iff
"fork" is available on the target system.
2972 proc check_fork_available
{} {
2973 if { [istarget
*-*-vxworks
*] } {
2974 # VxWorks doesn
't have fork but our way to test can't
2975 # tell as we
're doing partial links for kernel modules.
2978 if { [istarget cris-*-*] } {
2979 # Compiling and linking works, and an executable running e.g.
2980 # gcc.dg/torture/ftrapv-1.c works on now-historical hardware,
2981 # but the GNU simulator emits an error for the fork syscall.
2982 return [check_effective_target_hw]
2984 return [check_function_available "fork"]
2987 # Returns true iff "mkfifo" is available on the target system.
2989 proc check_mkfifo_available {} {
2990 if { [istarget *-*-cygwin*] } {
2991 # Cygwin has mkfifo, but support is incomplete.
2995 return [check_function_available "mkfifo"]
2998 # Returns true iff "__cxa_atexit" is used on the target system.
3000 proc check_cxa_atexit_available { } {
3001 return [check_cached_effective_target cxa_atexit_available {
3002 if { [istarget *-*-vxworks] } {
3003 # vxworks doesn't have __cxa_atexit but subsequent test passes.
3006 check_runtime_nocache cxa_atexit_available
{
3009 static unsigned
int count;
3026 Y
() { f
(); count = 2; }
3035 int main
() { return 0; }
3041 proc check_effective_target_objc2
{ } {
3042 return [check_no_compiler_messages objc2 object
{
3051 proc check_effective_target_next_runtime
{ } {
3052 return [check_no_compiler_messages objc2 object
{
3053 #ifdef __NEXT_RUNTIME__
3056 #error
!__NEXT_RUNTIME__
3061 #
Return 1 if we
're generating code for big-endian memory order.
3063 proc check_effective_target_be { } {
3064 return [check_no_compiler_messages be object {
3065 int dummy[__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__ ? 1 : -1];
3069 # Return 1 if we're generating code
for little
-endian memory order.
3071 proc check_effective_target_le
{ } {
3072 return [check_no_compiler_messages le object
{
3073 int dummy
[__BYTE_ORDER__
== __ORDER_LITTLE_ENDIAN__ ?
1 : -1];
3077 #
Return 1 if we can link a
program with
2+GB of data.
3079 proc check_effective_target_two_plus_gigs
{ } {
3080 return [check_no_compiler_messages two_plus_gigs executable
{
3081 char dummy
[0x80000000];
3082 int main
() { return 0; }
3086 #
Return 1 if we
're generating 32-bit code using default options, 0
3089 proc check_effective_target_ilp32 { } {
3090 return [check_no_compiler_messages ilp32 object {
3091 int dummy[sizeof (int) == 4
3092 && sizeof (void *) == 4
3093 && sizeof (long) == 4 ? 1 : -1];
3097 # Return 1 if we're generating ia32 code using default options
, 0
3100 proc check_effective_target_ia32
{ } {
3101 return [check_no_compiler_messages ia32 object
{
3102 int dummy
[sizeof
(int) == 4
3103 && sizeof
(void
*) == 4
3104 && sizeof
(long
) == 4 ?
1 : -1] = { __i386__
};
3108 #
Return 1 if we
're generating x32 code using default options, 0
3111 proc check_effective_target_x32 { } {
3112 return [check_no_compiler_messages x32 object {
3113 int dummy[sizeof (int) == 4
3114 && sizeof (void *) == 4
3115 && sizeof (long) == 4 ? 1 : -1] = { __x86_64__ };
3119 # Return 1 if we're generating
32-bit integers using default
3120 # options
, 0 otherwise.
3122 proc check_effective_target_int32
{ } {
3123 return [check_no_compiler_messages int32 object
{
3124 int dummy
[sizeof
(int) == 4 ?
1 : -1];
3128 #
Return 1 if we
're generating 32-bit or larger integers using default
3129 # options, 0 otherwise.
3131 proc check_effective_target_int32plus { } {
3132 return [check_no_compiler_messages int32plus object {
3133 int dummy[sizeof (int) >= 4 ? 1 : -1];
3137 # Return 1 if we're generating
64-bit long long using default options
,
3140 proc check_effective_target_longlong64
{ } {
3141 return [check_no_compiler_messages longlong64 object
{
3142 int dummy
[sizeof
(long long
) == 8 ?
1 : -1];
3146 #
Return 1 if we
're generating 32-bit or larger pointers using default
3147 # options, 0 otherwise.
3149 proc check_effective_target_ptr32plus { } {
3150 # The msp430 has 16-bit or 20-bit pointers. The 20-bit pointer is stored
3151 # in a 32-bit slot when in memory, so sizeof(void *) returns 4, but it
3152 # cannot really hold a 32-bit address, so we always return false here.
3153 if { [istarget msp430-*-*] } {
3157 return [check_no_compiler_messages ptr32plus object {
3158 int dummy[sizeof (void *) >= 4 ? 1 : -1];
3162 # Return 1 if we support 16-bit or larger array and structure sizes
3163 # using default options, 0 otherwise.
3164 # This implies at least a 20-bit address space, as no targets have an address
3165 # space between 16 and 20 bits.
3167 proc check_effective_target_size20plus { } {
3168 return [check_no_compiler_messages size20plus object {
3173 # Return 1 if target supports function pointers, 0 otherwise.
3175 proc check_effective_target_function_pointers { } {
3176 if { [istarget pru-*-*] } {
3177 return [check_no_compiler_messages func_ptr_avail assembly {
3178 #ifdef __PRU_EABI_GNU__
3186 # Return 1 if target supports arbitrarily large return values, 0 otherwise.
3188 proc check_effective_target_large_return_values { } {
3189 if { [istarget pru-*-*] } {
3190 return [check_no_compiler_messages large_return_values assembly {
3191 #ifdef __PRU_EABI_GNU__
3198 # Return 1 if we support 20-bit or larger array and structure sizes
3199 # using default options, 0 otherwise.
3200 # This implies at least a 24-bit address space, as no targets have an address
3201 # space between 20 and 24 bits.
3203 proc check_effective_target_size24plus { } {
3204 return [check_no_compiler_messages size24plus object {
3205 char dummy[524289L];
3209 # Return 1 if we support 24-bit or larger array and structure sizes
3210 # using default options, 0 otherwise.
3211 # This implies at least a 32-bit address space, as no targets have an address
3212 # space between 24 and 32 bits.
3214 proc check_effective_target_size32plus { } {
3215 return [check_no_compiler_messages size32plus object {
3216 char dummy[16777217L];
3220 # Returns 1 if we're generating
16-bit or smaller integers with the
3221 # default options
, 0 otherwise.
3223 proc check_effective_target_int16
{ } {
3224 return [check_no_compiler_messages int16 object
{
3225 int dummy
[sizeof
(int) < 4 ?
1 : -1];
3229 #
Return 1 if we
're generating 64-bit code using default options, 0
3232 proc check_effective_target_lp64 { } {
3233 return [check_no_compiler_messages lp64 object {
3234 int dummy[sizeof (int) == 4
3235 && sizeof (void *) == 8
3236 && sizeof (long) == 8 ? 1 : -1];
3240 # Return 1 if we're generating
64-bit code using default llp64 options
,
3243 proc check_effective_target_llp64
{ } {
3244 return [check_no_compiler_messages llp64 object
{
3245 int dummy
[sizeof
(int) == 4
3246 && sizeof
(void
*) == 8
3247 && sizeof
(long long
) == 8
3248 && sizeof
(long
) == 4 ?
1 : -1];
3252 #
Return 1 if long and
int have different sizes
,
3255 proc check_effective_target_long_neq_int
{ } {
3256 return [check_no_compiler_messages long_ne_int object
{
3257 int dummy
[sizeof
(int) != sizeof
(long
) ?
1 : -1];
3261 #
Return 1 if int size is equal to float size
,
3264 proc check_effective_target_int_eq_float
{ } {
3265 return [check_no_compiler_messages int_eq_float object
{
3266 int dummy
[sizeof
(int) >= sizeof
(float
) ?
1 : -1];
3270 #
Return 1 if short size is equal to
int size
,
3273 proc check_effective_target_short_eq_int
{ } {
3274 return [check_no_compiler_messages short_eq_int object
{
3275 int dummy
[sizeof
(short
) == sizeof
(int) ?
1 : -1];
3279 #
Return 1 if pointer size is equal to short size
,
3282 proc check_effective_target_ptr_eq_short
{ } {
3283 return [check_no_compiler_messages ptr_eq_short object
{
3284 int dummy
[sizeof
(void
*) == sizeof
(short
) ?
1 : -1];
3288 #
Return 1 if pointer size is equal to long size
,
3291 proc check_effective_target_ptr_eq_long
{ } {
3292 # sizeof
(void
*) == 4 for msp430
-elf
-mlarge which is equal to
3293 # sizeof
(long
). Avoid false positive.
3294 if { [istarget msp430
-*-*] } {
3297 return [check_no_compiler_messages ptr_eq_long object
{
3298 int dummy
[sizeof
(void
*) == sizeof
(long
) ?
1 : -1];
3302 #
Return 1 if the target supports long double larger than double
,
3305 proc check_effective_target_large_long_double
{ } {
3306 return [check_no_compiler_messages large_long_double object
{
3307 int dummy
[sizeof
(long double
) > sizeof
(double
) ?
1 : -1];
3311 #
Return 1 if the target supports double larger than float
,
3314 proc check_effective_target_large_double
{ } {
3315 return [check_no_compiler_messages large_double object
{
3316 int dummy
[sizeof
(double
) > sizeof
(float
) ?
1 : -1];
3320 #
Return 1 if the target supports long double of
128 bits
,
3323 proc check_effective_target_longdouble128
{ } {
3324 return [check_no_compiler_messages longdouble128 object
{
3325 int dummy
[sizeof
(long double
) == 16 ?
1 : -1];
3329 #
Return 1 if the target supports long double of
64 bits
,
3332 proc check_effective_target_longdouble64
{ } {
3333 return [check_no_compiler_messages longdouble64 object
{
3334 int dummy
[sizeof
(long double
) == 8 ?
1 : -1];
3338 #
Return 1 if the target supports double of
64 bits
,
3341 proc check_effective_target_double64
{ } {
3342 return [check_no_compiler_messages double64 object
{
3343 int dummy
[sizeof
(double
) == 8 ?
1 : -1];
3347 #
Return 1 if the target supports double of at least
64 bits
,
3350 proc check_effective_target_double64plus
{ } {
3351 return [check_no_compiler_messages double64plus object
{
3352 int dummy
[sizeof
(double
) >= 8 ?
1 : -1];
3356 #
Return 1 if the target supports
'w' suffix
on floating constant
3359 proc check_effective_target_has_w_floating_suffix
{ } {
3361 if [check_effective_target_c
++] {
3362 append opts
"-std=gnu++03"
3364 return [check_no_compiler_messages w_fp_suffix object
{
3369 #
Return 1 if the target supports
'q' suffix
on floating constant
3372 proc check_effective_target_has_q_floating_suffix
{ } {
3374 if [check_effective_target_c
++] {
3375 append opts
"-std=gnu++03"
3377 return [check_no_compiler_messages q_fp_suffix object
{
3382 #
Return 1 if the target supports the _FloatN
/ _FloatNx type
3383 # indicated in the function
name, 0 otherwise.
3385 proc check_effective_target_float16
{} {
3386 return [check_no_compiler_messages_nocache float16 object
{
3387 _Float16 foo
(_Float16 x
) { return x
; }
3388 } [add_options_for_float16
""]]
3391 proc check_effective_target_float32
{} {
3392 return [check_no_compiler_messages_nocache float32 object
{
3394 } [add_options_for_float32
""]]
3397 proc check_effective_target_float64
{} {
3398 return [check_no_compiler_messages_nocache float64 object
{
3400 } [add_options_for_float64
""]]
3403 proc check_effective_target_float128
{} {
3404 return [check_no_compiler_messages_nocache float128 object
{
3406 } [add_options_for_float128
""]]
3409 proc check_effective_target_float32x
{} {
3410 return [check_no_compiler_messages_nocache float32x object
{
3412 } [add_options_for_float32x
""]]
3415 proc check_effective_target_float64x
{} {
3416 return [check_no_compiler_messages_nocache float64x object
{
3418 } [add_options_for_float64x
""]]
3421 proc check_effective_target_float128x
{} {
3422 return [check_no_compiler_messages_nocache float128x object
{
3424 } [add_options_for_float128x
""]]
3427 # Likewise
, but runtime support
for any special options used as well
3428 # as
compile-time support is required.
3430 proc check_effective_target_float16_runtime
{} {
3431 return [check_effective_target_float16
]
3434 proc check_effective_target_float32_runtime
{} {
3435 return [check_effective_target_float32
]
3438 proc check_effective_target_float64_runtime
{} {
3439 return [check_effective_target_float64
]
3442 proc check_effective_target_float128_runtime
{} {
3443 if { ![check_effective_target_float128
] } {
3446 if { [istarget powerpc
*-*-*] } {
3447 return [check_effective_target_base_quadfloat_support
]
3452 proc check_effective_target_float32x_runtime
{} {
3453 return [check_effective_target_float32x
]
3456 proc check_effective_target_float64x_runtime
{} {
3457 if { ![check_effective_target_float64x
] } {
3460 if { [istarget powerpc
*-*-*] } {
3461 return [check_effective_target_base_quadfloat_support
]
3466 proc check_effective_target_float128x_runtime
{} {
3467 return [check_effective_target_float128x
]
3470 #
Return 1 if the target hardware supports
any options added
for
3471 # _FloatN and _FloatNx types
, 0 otherwise.
3473 proc check_effective_target_floatn_nx_runtime
{} {
3474 if { [istarget powerpc
*-*-aix
*] } {
3477 if { [istarget powerpc
*-*-*] } {
3478 return [check_effective_target_base_quadfloat_support
]
3483 # Add options needed to use the _FloatN
/ _FloatNx type indicated in
3484 # the function
name.
3486 proc add_options_for_float16
{ flags
} {
3487 if { [istarget arm
*-*-*] } {
3488 return "$flags -mfp16-format=ieee"
3493 proc add_options_for_float32
{ flags
} {
3497 proc add_options_for_float64
{ flags
} {
3501 proc add_options_for_float128
{ flags
} {
3502 return [add_options_for___float128
"$flags"]
3505 proc add_options_for_float32x
{ flags
} {
3509 proc add_options_for_float64x
{ flags
} {
3510 return [add_options_for___float128
"$flags"]
3513 proc add_options_for_float128x
{ flags
} {
3517 #
Return 1 if the target supports __float128
,
3520 proc check_effective_target___float128
{ } {
3521 if { [istarget powerpc
*-*-*] } {
3522 return [check_ppc_float128_sw_available
]
3524 if { [istarget ia64
-*-*]
3525 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*] } {
3531 proc add_options_for___float128
{ flags
} {
3532 if { [istarget powerpc
*-*-*] } {
3533 return "$flags -mfloat128 -mvsx"
3538 #
Return 1 if the target supports
any special run
-time requirements
3539 #
for __float128 or _Float128
,
3542 proc check_effective_target_base_quadfloat_support
{ } {
3543 if { [istarget powerpc
*-*-*] } {
3544 return [check_vsx_hw_available
]
3549 #
Return 1 if the target supports the __bf16 type
, 0 otherwise.
3551 proc check_effective_target_bfloat16
{} {
3552 return [check_no_compiler_messages_nocache bfloat16 object
{
3553 __bf16 foo
(__bf16 x
) { return x
+ x
; }
3554 } [add_options_for_bfloat16
""]]
3557 proc check_effective_target_bfloat16_runtime
{} {
3558 return [check_effective_target_bfloat16
]
3561 proc add_options_for_bfloat16
{ flags
} {
3565 #
Return 1 if the target supports all four forms of fused multiply
-add
3566 #
(fma
, fms
, fnma
, and fnms
) for both float and double.
3568 proc check_effective_target_scalar_all_fma
{ } {
3569 return [istarget aarch64
*-*-*]
3572 #
Return 1 if the target supports compiling fixed
-point
,
3575 proc check_effective_target_fixed_point
{ } {
3576 return [check_no_compiler_messages fixed_point object
{
3577 _Sat _Fract x
; _Sat _Accum y
;
3581 #
Return 1 if the target supports compiling decimal floating point
,
3584 proc check_effective_target_dfp_nocache
{ } {
3585 verbose
"check_effective_target_dfp_nocache: compiling source" 2
3586 set ret
[check_no_compiler_messages_nocache dfp object
{
3587 float x __attribute__
((mode(DD
)));
3589 verbose
"check_effective_target_dfp_nocache: returning $ret" 2
3593 proc check_effective_target_dfprt_nocache
{ } {
3594 return [check_runtime_nocache dfprt
{
3595 typedef float d64 __attribute__
((mode(DD
)));
3596 d64 x
= 1.2df
, y
= 2.3dd
, z
;
3597 int main
() { z
= x
+ y
; return 0; }
3601 #
Return 1 if the target supports compiling Decimal Floating Point
,
3604 # This won
't change for different subtargets so cache the result.
3606 proc check_effective_target_dfp { } {
3607 return [check_cached_effective_target dfp {
3608 check_effective_target_dfp_nocache
3612 # Return 1 if the target supports linking and executing Decimal Floating
3613 # Point, 0 otherwise.
3615 # This won't change
for different subtargets so
cache the result.
3617 proc check_effective_target_dfprt
{ } {
3618 return [check_cached_effective_target dfprt
{
3619 check_effective_target_dfprt_nocache
3623 #
Return 1 if the target uses the BID format
for Decimal Floating
3624 # Point
, 0 otherwise.
3626 proc check_effective_target_dfp_bid
{ } {
3627 if { [istarget aarch64
*-*-*]
3628 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]} {
3634 #
Return 1 iff target has unsigned plain
'char' by default.
3636 proc check_effective_target_unsigned_char
{} {
3637 return [check_no_compiler_messages unsigned_char assembly
{
3642 proc check_effective_target_powerpc_popcntb_ok
{ } {
3643 return [check_cached_effective_target powerpc_popcntb_ok
{
3645 # Disable
on Darwin.
3646 if { [istarget powerpc
-*-eabi
] ||
[istarget powerpc
*-*-eabispe
] ||
[istarget
*-*-darwin
*]} {
3649 check_runtime_nocache powerpc_popcntb_ok
{
3651 volatile
int a
= 0x12345678;
3654 asm volatile
("popcntb %0,%1" : "=r" (r) : "r" (a));
3662 #
Return 1 if the target supports executing DFP hardware instructions
,
3663 #
0 otherwise.
Cache the result.
3665 proc check_dfp_hw_available
{ } {
3666 return [check_cached_effective_target dfp_hw_available
{
3667 #
For now
, disable
on Darwin
3668 if { [istarget powerpc
-*-eabi
] ||
[istarget powerpc
*-*-eabispe
] ||
[istarget
*-*-darwin
*]} {
3671 check_runtime_nocache dfp_hw_available
{
3672 volatile _Decimal64 r
;
3673 volatile _Decimal64 a
= 4.0DD
;
3674 volatile _Decimal64 b
= 2.0DD
;
3677 asm volatile
("dadd %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
3678 asm volatile
("dsub %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
3679 asm volatile
("dmul %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
3680 asm volatile
("ddiv %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
3683 } "-mcpu=power6 -mhard-float"
3688 #
Return 1 if the target supports compiling and assembling UCN
, 0 otherwise.
3690 proc check_effective_target_ucn_nocache
{ } {
3691 #
-std
=c99 is only valid
for C
3692 if [check_effective_target_c
] {
3693 set ucnopts
"-std=c99"
3697 verbose
"check_effective_target_ucn_nocache: compiling source" 2
3698 set ret
[check_no_compiler_messages_nocache ucn object
{
3701 verbose
"check_effective_target_ucn_nocache: returning $ret" 2
3705 #
Return 1 if the target supports compiling and assembling UCN
, 0 otherwise.
3707 # This won
't change for different subtargets, so cache the result.
3709 proc check_effective_target_ucn { } {
3710 return [check_cached_effective_target ucn {
3711 check_effective_target_ucn_nocache
3715 # Return 1 if the target needs a command line argument to enable a SIMD
3718 proc check_effective_target_vect_cmdline_needed { } {
3719 global et_vect_cmdline_needed_target_name
3721 if { ![info exists et_vect_cmdline_needed_target_name] } {
3722 set et_vect_cmdline_needed_target_name ""
3725 # If the target has changed since we set the cached value, clear it.
3726 set current_target [current_target_name]
3727 if { $current_target != $et_vect_cmdline_needed_target_name } {
3728 verbose "check_effective_target_vect_cmdline_needed: `$et_vect_cmdline_needed_target_name' `$current_target
'" 2
3729 set et_vect_cmdline_needed_target_name $current_target
3730 if { [info exists et_vect_cmdline_needed_saved] } {
3731 verbose "check_effective_target_vect_cmdline_needed: removing cached result" 2
3732 unset et_vect_cmdline_needed_saved
3736 return [check_cached_effective_target vect_cmdline_needed {
3737 if { [istarget alpha*-*-*]
3738 || [istarget ia64-*-*]
3739 || (([istarget i?86-*-*] || [istarget x86_64-*-*])
3740 && ![is-effective-target ia32])
3741 || ([istarget powerpc*-*-*]
3742 && ([check_effective_target_powerpc_spe]
3743 || [check_effective_target_powerpc_altivec]))
3744 || ([istarget sparc*-*-*] && [check_effective_target_sparc_vis])
3745 || ([istarget arm*-*-*] && [check_effective_target_arm_neon])
3746 || [istarget aarch64*-*-*]
3747 || [istarget amdgcn*-*-*]} {
3754 # Return 1 if the target supports hardware vectors of int, 0 otherwise.
3756 # This won't change
for different subtargets so
cache the result.
3758 proc check_effective_target_vect_int
{ } {
3759 return [check_cached_effective_target_indexed vect_int
{
3761 [istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
3762 ||
([istarget powerpc
*-*-*]
3763 && ![istarget powerpc
-*-linux
*paired
*])
3764 ||
[istarget amdgcn
-*-*]
3765 ||
[istarget sparc
*-*-*]
3766 ||
[istarget alpha
*-*-*]
3767 ||
[istarget ia64
-*-*]
3768 ||
[istarget aarch64
*-*-*]
3769 ||
[is
-effective
-target arm_neon
]
3770 ||
([istarget mips
*-*-*]
3771 && ([et
-is
-effective
-target mips_loongson_mmi
]
3772 ||
[et
-is
-effective
-target mips_msa
]))
3773 ||
([istarget s390
*-*-*]
3774 && [check_effective_target_s390_vx
])
3778 #
Return 1 if the target supports hardware vectorization of complex additions of
3779 # byte
, 0 otherwise.
3781 # This won
't change for different subtargets so cache the result.
3783 proc check_effective_target_vect_complex_add_byte { } {
3784 return [check_cached_effective_target_indexed vect_complex_add_byte {
3786 ([check_effective_target_aarch64_sve2]
3787 && [check_effective_target_aarch64_little_endian])
3788 || ([check_effective_target_arm_v8_1m_mve_fp_ok]
3789 && [check_effective_target_arm_little_endian])
3793 # Return 1 if the target supports hardware vectorization of complex additions of
3794 # short, 0 otherwise.
3796 # This won't change
for different subtargets so
cache the result.
3798 proc check_effective_target_vect_complex_add_short
{ } {
3799 return [check_cached_effective_target_indexed vect_complex_add_short
{
3801 ([check_effective_target_aarch64_sve2
]
3802 && [check_effective_target_aarch64_little_endian
])
3803 ||
([check_effective_target_arm_v8_1m_mve_fp_ok
]
3804 && [check_effective_target_arm_little_endian
])
3808 #
Return 1 if the target supports hardware vectorization of complex additions of
3811 # This won
't change for different subtargets so cache the result.
3813 proc check_effective_target_vect_complex_add_int { } {
3814 return [check_cached_effective_target_indexed vect_complex_add_int {
3816 ([check_effective_target_aarch64_sve2]
3817 && [check_effective_target_aarch64_little_endian])
3818 || ([check_effective_target_arm_v8_1m_mve_fp_ok]
3819 && [check_effective_target_arm_little_endian])
3823 # Return 1 if the target supports hardware vectorization of complex additions of
3824 # long, 0 otherwise.
3826 # This won't change
for different subtargets so
cache the result.
3828 proc check_effective_target_vect_complex_add_long
{ } {
3829 return [check_cached_effective_target_indexed vect_complex_add_long
{
3831 ([check_effective_target_aarch64_sve2
]
3832 && [check_effective_target_aarch64_little_endian
])
3833 ||
([check_effective_target_arm_v8_1m_mve_fp_ok
]
3834 && [check_effective_target_arm_little_endian
])
3838 #
Return 1 if the target supports hardware vectorization of complex additions of
3839 # half
, 0 otherwise.
3841 # This won
't change for different subtargets so cache the result.
3843 proc check_effective_target_vect_complex_add_half { } {
3844 return [check_cached_effective_target_indexed vect_complex_add_half {
3846 ([check_effective_target_arm_v8_3a_fp16_complex_neon_ok]
3847 && ([check_effective_target_aarch64_little_endian]
3848 || [check_effective_target_arm_little_endian]))
3849 || ([check_effective_target_aarch64_sve2]
3850 && [check_effective_target_aarch64_little_endian])
3851 || ([check_effective_target_arm_v8_1m_mve_fp_ok]
3852 && [check_effective_target_arm_little_endian])
3856 # Return 1 if the target supports hardware vectorization of complex additions of
3857 # float, 0 otherwise.
3859 # This won't change
for different subtargets so
cache the result.
3861 proc check_effective_target_vect_complex_add_float
{ } {
3862 return [check_cached_effective_target_indexed vect_complex_add_float
{
3864 ([check_effective_target_arm_v8_3a_complex_neon_ok
]
3865 && ([check_effective_target_aarch64_little_endian
]
3866 ||
[check_effective_target_arm_little_endian
]))
3867 ||
([check_effective_target_aarch64_sve2
]
3868 && [check_effective_target_aarch64_little_endian
])
3869 ||
([check_effective_target_arm_v8_1m_mve_fp_ok
]
3870 && [check_effective_target_arm_little_endian
])
3874 #
Return 1 if the target supports hardware vectorization of complex additions of
3875 # double
, 0 otherwise.
3877 # This won
't change for different subtargets so cache the result.
3879 proc check_effective_target_vect_complex_add_double { } {
3880 return [check_cached_effective_target_indexed vect_complex_add_double {
3882 (([check_effective_target_arm_v8_3a_complex_neon_ok]
3883 && [check_effective_target_aarch64_little_endian])
3884 || ([check_effective_target_aarch64_sve2]
3885 && [check_effective_target_aarch64_little_endian]))
3889 # Return 1 if the target supports signed int->float conversion
3892 proc check_effective_target_vect_intfloat_cvt { } {
3893 return [check_cached_effective_target_indexed vect_intfloat_cvt {
3894 expr { [istarget i?86-*-*] || [istarget x86_64-*-*]
3895 || ([istarget powerpc*-*-*]
3896 && ![istarget powerpc-*-linux*paired*])
3897 || [is-effective-target arm_neon]
3898 || ([istarget mips*-*-*]
3899 && [et-is-effective-target mips_msa])
3900 || [istarget amdgcn-*-*]
3901 || ([istarget s390*-*-*]
3902 && [check_effective_target_s390_vxe2]) }}]
3905 # Return 1 if the target supports signed double->int conversion
3908 proc check_effective_target_vect_doubleint_cvt { } {
3909 return [check_cached_effective_target_indexed vect_doubleint_cvt {
3910 expr { (([istarget i?86-*-*] || [istarget x86_64-*-*])
3911 && [check_no_compiler_messages vect_doubleint_cvt assembly {
3912 #ifdef __tune_atom__
3913 # error No double vectorizer support.
3916 || [istarget aarch64*-*-*]
3917 || ([istarget powerpc*-*-*] && [check_vsx_hw_available])
3918 || ([istarget mips*-*-*]
3919 && [et-is-effective-target mips_msa])
3920 || ([istarget s390*-*-*]
3921 && [check_effective_target_s390_vx]) }}]
3924 # Return 1 if the target supports signed int->double conversion
3927 proc check_effective_target_vect_intdouble_cvt { } {
3928 return [check_cached_effective_target_indexed vect_intdouble_cvt {
3929 expr { (([istarget i?86-*-*] || [istarget x86_64-*-*])
3930 && [check_no_compiler_messages vect_intdouble_cvt assembly {
3931 #ifdef __tune_atom__
3932 # error No double vectorizer support.
3935 || [istarget aarch64*-*-*]
3936 || ([istarget powerpc*-*-*] && [check_vsx_hw_available])
3937 || ([istarget mips*-*-*]
3938 && [et-is-effective-target mips_msa])
3939 || ([istarget s390*-*-*]
3940 && [check_effective_target_s390_vx]) }}]
3943 #Return 1 if we're supporting __int128
for target
, 0 otherwise.
3945 proc check_effective_target_int128
{ } {
3946 return [check_no_compiler_messages int128 object
{
3948 #ifndef __SIZEOF_INT128__
3957 #
Return 1 if the target supports unsigned
int->float conversion
3960 proc check_effective_target_vect_uintfloat_cvt
{ } {
3961 return [check_cached_effective_target_indexed vect_uintfloat_cvt
{
3962 expr
{ [istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
3963 ||
([istarget powerpc
*-*-*]
3964 && ![istarget powerpc
-*-linux
*paired
*])
3965 ||
[istarget aarch64
*-*-*]
3966 ||
[is
-effective
-target arm_neon
]
3967 ||
([istarget mips
*-*-*]
3968 && [et
-is
-effective
-target mips_msa
])
3969 ||
[istarget amdgcn
-*-*]
3970 ||
([istarget s390
*-*-*]
3971 && [check_effective_target_s390_vxe2
]) }}]
3975 #
Return 1 if the target supports signed float
->int conversion
3978 proc check_effective_target_vect_floatint_cvt
{ } {
3979 return [check_cached_effective_target_indexed vect_floatint_cvt
{
3980 expr
{ [istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
3981 ||
([istarget powerpc
*-*-*]
3982 && ![istarget powerpc
-*-linux
*paired
*])
3983 ||
[is
-effective
-target arm_neon
]
3984 ||
([istarget mips
*-*-*]
3985 && [et
-is
-effective
-target mips_msa
])
3986 ||
[istarget amdgcn
-*-*]
3987 ||
([istarget s390
*-*-*]
3988 && [check_effective_target_s390_vxe2
]) }}]
3991 #
Return 1 if the target supports unsigned float
->int conversion
3994 proc check_effective_target_vect_floatuint_cvt
{ } {
3995 return [check_cached_effective_target_indexed vect_floatuint_cvt
{
3996 expr
{ ([istarget powerpc
*-*-*]
3997 && ![istarget powerpc
-*-linux
*paired
*])
3998 ||
[is
-effective
-target arm_neon
]
3999 ||
([istarget mips
*-*-*]
4000 && [et
-is
-effective
-target mips_msa
])
4001 ||
[istarget amdgcn
-*-*]
4002 ||
([istarget s390
*-*-*]
4003 && [check_effective_target_s390_vxe2
]) }}]
4006 #
Return 1 if peeling
for alignment might be profitable
on the target
4009 proc check_effective_target_vect_peeling_profitable
{ } {
4010 return [check_cached_effective_target_indexed vect_peeling_profitable
{
4011 expr
{ ([istarget s390
*-*-*]
4012 && [check_effective_target_s390_vx
])
4013 ||
[check_effective_target_vect_element_align_preferred
] }}]
4016 #
Return 1 if the target supports #pragma omp declare simd
, 0 otherwise.
4018 # This won
't change for different subtargets so cache the result.
4020 proc check_effective_target_vect_simd_clones { } {
4021 # On i?86/x86_64 #pragma omp declare simd builds a sse2, avx,
4022 # avx2 and avx512f clone. Only the right clone for the
4023 # specified arch will be chosen, but still we need to at least
4024 # be able to assemble avx512f.
4025 return [check_cached_effective_target_indexed vect_simd_clones {
4026 expr { (([istarget i?86-*-*] || [istarget x86_64-*-*])
4027 && [check_effective_target_avx512f])
4028 || [istarget amdgcn-*-*] }}]
4031 # Return 1 if this is a AArch64 target supporting big endian
4032 proc check_effective_target_aarch64_big_endian { } {
4033 return [check_no_compiler_messages aarch64_big_endian assembly {
4034 #if !defined(__aarch64__) || !defined(__AARCH64EB__)
4035 #error !__aarch64__ || !__AARCH64EB__
4040 # Return 1 if this is a AArch64 target supporting little endian
4041 proc check_effective_target_aarch64_little_endian { } {
4042 if { ![istarget aarch64*-*-*] } {
4046 return [check_no_compiler_messages aarch64_little_endian assembly {
4047 #if !defined(__aarch64__) || defined(__AARCH64EB__)
4053 # Return 1 if this is an AArch64 target supporting SVE.
4054 proc check_effective_target_aarch64_sve { } {
4055 if { ![istarget aarch64*-*-*] } {
4058 return [check_no_compiler_messages aarch64_sve assembly {
4059 #if !defined (__ARM_FEATURE_SVE)
4065 # Return 1 if this is an AArch64 target supporting SVE2.
4066 proc check_effective_target_aarch64_sve2 { } {
4067 if { ![istarget aarch64*-*-*] } {
4070 return [check_no_compiler_messages aarch64_sve2 assembly {
4071 #if !defined (__ARM_FEATURE_SVE2)
4077 # Return 1 if this is an AArch64 target only supporting SVE (not SVE2).
4078 proc check_effective_target_aarch64_sve1_only { } {
4079 return [expr { [check_effective_target_aarch64_sve]
4080 && ![check_effective_target_aarch64_sve2] }]
4083 # Return the size in bits of an SVE vector, or 0 if the size is variable.
4084 proc aarch64_sve_bits { } {
4085 return [check_cached_effective_target aarch64_sve_bits {
4088 set src dummy[pid].c
4089 set f [open $src "w"]
4090 puts $f "int bits = __ARM_FEATURE_SVE_BITS;"
4092 set output [${tool}_target_compile $src "" preprocess ""]
4095 regsub {.*bits = ([^;]*);.*} $output {\1} bits
4100 # Return 1 if this is a compiler supporting ARC atomic operations
4101 proc check_effective_target_arc_atomic { } {
4102 return [check_no_compiler_messages arc_atomic assembly {
4103 #if !defined(__ARC_ATOMIC__)
4109 # Return 1 if this is an arm target using 32-bit instructions
4110 proc check_effective_target_arm32 { } {
4111 if { ![istarget arm*-*-*] } {
4115 return [check_no_compiler_messages arm32 assembly {
4116 #if !defined(__arm__) || (defined(__thumb__) && !defined(__thumb2__))
4117 #error !__arm || __thumb__ && !__thumb2__
4122 # Return 1 if this is an arm target not using Thumb
4123 proc check_effective_target_arm_nothumb { } {
4124 if { ![istarget arm*-*-*] } {
4128 return [check_no_compiler_messages arm_nothumb assembly {
4129 #if !defined(__arm__) || (defined(__thumb__) || defined(__thumb2__))
4130 #error !__arm__ || __thumb || __thumb2__
4135 # Return 1 if this is a little-endian ARM target
4136 proc check_effective_target_arm_little_endian { } {
4137 if { ![istarget arm*-*-*] } {
4141 return [check_no_compiler_messages arm_little_endian assembly {
4142 #if !defined(__arm__) || !defined(__ARMEL__)
4143 #error !__arm__ || !__ARMEL__
4148 # Return 1 if this is an ARM target that only supports aligned vector accesses
4149 proc check_effective_target_arm_vect_no_misalign { } {
4150 if { ![istarget arm*-*-*] } {
4154 return [check_no_compiler_messages arm_vect_no_misalign assembly {
4155 #if !defined(__arm__) \
4156 || (defined(__ARM_FEATURE_UNALIGNED) \
4157 && defined(__ARMEL__))
4158 #error !__arm__ || (__ARMEL__ && __ARM_FEATURE_UNALIGNED)
4164 # Return 1 if this is an ARM target supporting -mfloat-abi=soft. Some
4165 # multilibs may be incompatible with this option.
4167 proc check_effective_target_arm_soft_ok { } {
4168 return [check_no_compiler_messages arm_soft_ok object {
4171 int main (void) { return 0; }
4172 } "-mfloat-abi=soft"]
4175 # Return 1 if this is an ARM target supporting -mfloat-abi=soft even
4176 # for linking. Some multilibs may be incompatible with this option,
4177 # and some linkers may reject incompatible options.
4179 proc check_effective_target_arm_soft_ok_link { } {
4180 return [check_no_compiler_messages arm_soft_ok_link executable {
4183 int main (void) { return 0; }
4184 } "-mfloat-abi=soft"]
4187 # Return 1 if this is an ARM target supporting -mfpu=vfp with an
4190 proc check_effective_target_arm_vfp_ok_nocache { } {
4191 global et_arm_vfp_flags
4192 set et_arm_vfp_flags ""
4193 if { [check_effective_target_arm32] } {
4194 foreach flags {"-mfpu=vfp" "-mfpu=vfp -mfloat-abi=softfp" "-mfpu=vfp -mfloat-abi=hard"} {
4195 if { [check_no_compiler_messages_nocache arm_vfp_ok object {
4197 #error __ARM_FP not defined
4200 set et_arm_vfp_flags $flags
4209 proc check_effective_target_arm_vfp_ok { } {
4210 return [check_cached_effective_target arm_vfp_ok \
4211 check_effective_target_arm_vfp_ok_nocache]
4214 # Add the options needed to compile code with -mfpu=vfp. We need either
4215 # -mfloat-abi=softfp or -mfloat-abi=hard, but if one is already
4216 # specified by the multilib, use it.
4218 proc add_options_for_arm_vfp { flags } {
4219 if { ! [check_effective_target_arm_vfp_ok] } {
4222 global et_arm_vfp_flags
4223 return "$flags $et_arm_vfp_flags"
4226 # Return 1 if this is an ARM target supporting -mfpu=vfp3
4227 # -mfloat-abi=softfp.
4229 proc check_effective_target_arm_vfp3_ok { } {
4230 if { [check_effective_target_arm32] } {
4231 return [check_no_compiler_messages arm_vfp3_ok object {
4233 } "-mfpu=vfp3 -mfloat-abi=softfp"]
4239 # Return 1 if this is an ARM target supporting -mfpu=fp-armv8
4240 # -mfloat-abi=softfp.
4241 proc check_effective_target_arm_v8_vfp_ok {} {
4242 if { [check_effective_target_arm32] } {
4243 return [check_no_compiler_messages arm_v8_vfp_ok object {
4246 __asm__ volatile ("vrinta.f32.f32 s0, s0");
4249 } "-mfpu=fp-armv8 -mfloat-abi=softfp"]
4255 # Return 1 if this is an ARM target supporting -mfpu=vfp
4256 # -mfloat-abi=hard. Some multilibs may be incompatible with these
4259 proc check_effective_target_arm_hard_vfp_ok { } {
4260 if { [check_effective_target_arm32]
4261 && ! [check-flags [list "" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=hard" }]] } {
4262 return [check_no_compiler_messages arm_hard_vfp_ok executable {
4263 int main() { return 0;}
4264 } "-mfpu=vfp -mfloat-abi=hard"]
4270 # Return 1 if this is an ARM target defining __ARM_FP. We may need
4271 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
4272 # incompatible with these options. Also set et_arm_fp_flags to the
4273 # best options to add.
4275 proc check_effective_target_arm_fp_ok_nocache { } {
4276 global et_arm_fp_flags
4277 set et_arm_fp_flags ""
4278 if { [check_effective_target_arm32] } {
4279 foreach flags {"" "-mfloat-abi=softfp" "-mfloat-abi=hard"} {
4280 if { [check_no_compiler_messages_nocache arm_fp_ok object {
4282 #error __ARM_FP not defined
4285 set et_arm_fp_flags $flags
4294 proc check_effective_target_arm_fp_ok { } {
4295 return [check_cached_effective_target arm_fp_ok \
4296 check_effective_target_arm_fp_ok_nocache]
4299 # Add the options needed to define __ARM_FP. We need either
4300 # -mfloat-abi=softfp or -mfloat-abi=hard, but if one is already
4301 # specified by the multilib, use it.
4303 proc add_options_for_arm_fp { flags } {
4304 if { ! [check_effective_target_arm_fp_ok] } {
4307 global et_arm_fp_flags
4308 return "$flags $et_arm_fp_flags"
4311 # Return 1 if this is an ARM target defining __ARM_FP with
4312 # double-precision support. We may need -mfloat-abi=softfp or
4313 # equivalent options. Some multilibs may be incompatible with these
4314 # options. Also set et_arm_fp_dp_flags to the best options to add.
4316 proc check_effective_target_arm_fp_dp_ok_nocache { } {
4317 global et_arm_fp_dp_flags
4318 set et_arm_fp_dp_flags ""
4319 if { [check_effective_target_arm32] } {
4320 foreach flags {"" "-mfloat-abi=softfp" "-mfloat-abi=hard"} {
4321 if { [check_no_compiler_messages_nocache arm_fp_dp_ok object {
4323 #error __ARM_FP not defined
4325 #if ((__ARM_FP & 8) == 0)
4326 #error __ARM_FP indicates that double-precision is not supported
4329 set et_arm_fp_dp_flags $flags
4338 proc check_effective_target_arm_fp_dp_ok { } {
4339 return [check_cached_effective_target arm_fp_dp_ok \
4340 check_effective_target_arm_fp_dp_ok_nocache]
4343 # Add the options needed to define __ARM_FP with double-precision
4344 # support. We need either -mfloat-abi=softfp or -mfloat-abi=hard, but
4345 # if one is already specified by the multilib, use it.
4347 proc add_options_for_arm_fp_dp { flags } {
4348 if { ! [check_effective_target_arm_fp_dp_ok] } {
4351 global et_arm_fp_dp_flags
4352 return "$flags $et_arm_fp_dp_flags"
4355 # Return 1 if this is an ARM target that supports DSP multiply with
4356 # current multilib flags.
4358 proc check_effective_target_arm_dsp { } {
4359 return [check_no_compiler_messages arm_dsp assembly {
4360 #ifndef __ARM_FEATURE_DSP
4363 #include <arm_acle.h>
4368 # Return 1 if this is an ARM target that supports unaligned word/halfword
4369 # load/store instructions.
4371 proc check_effective_target_arm_unaligned { } {
4372 return [check_no_compiler_messages arm_unaligned assembly {
4373 #ifndef __ARM_FEATURE_UNALIGNED
4374 #error no unaligned support
4380 # Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8
4381 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
4382 # incompatible with these options. Also set et_arm_crypto_flags to the
4383 # best options to add.
4385 proc check_effective_target_arm_crypto_ok_nocache { } {
4386 global et_arm_crypto_flags
4387 set et_arm_crypto_flags ""
4388 if { [check_effective_target_arm_v8_neon_ok] } {
4389 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=crypto-neon-fp-armv8" "-mfpu=crypto-neon-fp-armv8 -mfloat-abi=softfp"} {
4390 if { [check_no_compiler_messages_nocache arm_crypto_ok object {
4391 #include "arm_neon.h"
4393 foo (uint8x16_t a, uint8x16_t b)
4395 return vaeseq_u8 (a, b);
4398 set et_arm_crypto_flags $flags
4407 # Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8
4409 proc check_effective_target_arm_crypto_ok { } {
4410 return [check_cached_effective_target arm_crypto_ok \
4411 check_effective_target_arm_crypto_ok_nocache]
4414 # Add options for crypto extensions.
4415 proc add_options_for_arm_crypto { flags } {
4416 if { ! [check_effective_target_arm_crypto_ok] } {
4419 global et_arm_crypto_flags
4420 return "$flags $et_arm_crypto_flags"
4423 # Add the options needed for NEON. We need either -mfloat-abi=softfp
4424 # or -mfloat-abi=hard, but if one is already specified by the
4425 # multilib, use it. Similarly, if a -mfpu option already enables
4426 # NEON, do not add -mfpu=neon.
4428 proc add_options_for_arm_neon { flags } {
4429 if { ! [check_effective_target_arm_neon_ok] } {
4432 global et_arm_neon_flags
4433 return "$flags $et_arm_neon_flags"
4436 proc add_options_for_arm_v8_vfp { flags } {
4437 if { ! [check_effective_target_arm_v8_vfp_ok] } {
4440 return "$flags -mfpu=fp-armv8 -mfloat-abi=softfp"
4443 proc add_options_for_arm_v8_neon { flags } {
4444 if { ! [check_effective_target_arm_v8_neon_ok] } {
4447 global et_arm_v8_neon_flags
4448 return "$flags $et_arm_v8_neon_flags -march=armv8-a"
4451 # Add the options needed for ARMv8.1 Adv.SIMD. Also adds the ARMv8 NEON
4452 # options for AArch64 and for ARM.
4454 proc add_options_for_arm_v8_1a_neon { flags } {
4455 if { ! [check_effective_target_arm_v8_1a_neon_ok] } {
4458 global et_arm_v8_1a_neon_flags
4459 return "$flags $et_arm_v8_1a_neon_flags"
4462 # Add the options needed for ARMv8.2 with the scalar FP16 extension.
4463 # Also adds the ARMv8 FP options for ARM and for AArch64.
4465 proc add_options_for_arm_v8_2a_fp16_scalar { flags } {
4466 if { ! [check_effective_target_arm_v8_2a_fp16_scalar_ok] } {
4469 global et_arm_v8_2a_fp16_scalar_flags
4470 return "$flags $et_arm_v8_2a_fp16_scalar_flags"
4473 # Add the options needed for ARMv8.2 with the FP16 extension. Also adds
4474 # the ARMv8 NEON options for ARM and for AArch64.
4476 proc add_options_for_arm_v8_2a_fp16_neon { flags } {
4477 if { ! [check_effective_target_arm_v8_2a_fp16_neon_ok] } {
4480 global et_arm_v8_2a_fp16_neon_flags
4481 return "$flags $et_arm_v8_2a_fp16_neon_flags"
4484 proc add_options_for_arm_crc { flags } {
4485 if { ! [check_effective_target_arm_crc_ok] } {
4488 global et_arm_crc_flags
4489 return "$flags $et_arm_crc_flags"
4492 # Add the options needed for NEON. We need either -mfloat-abi=softfp
4493 # or -mfloat-abi=hard, but if one is already specified by the
4494 # multilib, use it. Similarly, if a -mfpu option already enables
4495 # NEON, do not add -mfpu=neon.
4497 proc add_options_for_arm_neonv2 { flags } {
4498 if { ! [check_effective_target_arm_neonv2_ok] } {
4501 global et_arm_neonv2_flags
4502 return "$flags $et_arm_neonv2_flags"
4505 # Add the options needed for vfp3.
4506 proc add_options_for_arm_vfp3 { flags } {
4507 if { ! [check_effective_target_arm_vfp3_ok] } {
4510 return "$flags -mfpu=vfp3 -mfloat-abi=softfp"
4513 # Return 1 if this is an ARM target supporting -mfpu=neon
4514 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
4515 # incompatible with these options. Also set et_arm_neon_flags to the
4516 # best options to add.
4518 proc check_effective_target_arm_neon_ok_nocache { } {
4519 global et_arm_neon_flags
4520 set et_arm_neon_flags ""
4521 if { [check_effective_target_arm32] } {
4522 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon" "-mfpu=neon -mfloat-abi=softfp" "-mfpu=neon -mfloat-abi=softfp -march=armv7-a" "-mfloat-abi=hard" "-mfpu=neon -mfloat-abi=hard" "-mfpu=neon -mfloat-abi=hard -march=armv7-a"} {
4523 if { [check_no_compiler_messages_nocache arm_neon_ok object {
4524 #include <arm_neon.h>
4526 #ifndef __ARM_NEON__
4529 /* Avoid the case where a test adds -mfpu=neon, but the toolchain is
4530 configured for -mcpu=arm926ej-s, for example. */
4531 #if __ARM_ARCH < 7 || __ARM_ARCH_PROFILE == 'M
'
4532 #error Architecture does not support NEON.
4535 set et_arm_neon_flags $flags
4544 proc check_effective_target_arm_neon_ok { } {
4545 return [check_cached_effective_target arm_neon_ok \
4546 check_effective_target_arm_neon_ok_nocache]
4550 # Return 1 if this is an ARM target supporting the SIMD32 intrinsics
4551 # from arm_acle.h. Some multilibs may be incompatible with these options.
4552 # Also set et_arm_simd32_flags to the best options to add.
4553 # arm_acle.h includes stdint.h which can cause trouble with incompatible
4554 # -mfloat-abi= options.
4556 proc check_effective_target_arm_simd32_ok_nocache { } {
4557 global et_arm_simd32_flags
4558 set et_arm_simd32_flags ""
4559 foreach flags {"" "-march=armv6" "-march=armv6 -mfloat-abi=softfp" "-march=armv6 -mfloat-abi=hard"} {
4560 if { [check_no_compiler_messages_nocache arm_simd32_ok object {
4561 #include <arm_acle.h>
4563 #ifndef __ARM_FEATURE_SIMD32
4567 set et_arm_simd32_flags $flags
4575 proc check_effective_target_arm_simd32_ok { } {
4576 return [check_cached_effective_target arm_simd32_ok \
4577 check_effective_target_arm_simd32_ok_nocache]
4580 proc add_options_for_arm_simd32 { flags } {
4581 if { ! [check_effective_target_arm_simd32_ok] } {
4584 global et_arm_simd32_flags
4585 return "$flags $et_arm_simd32_flags"
4588 # Return 1 if this is an ARM target supporting the __ssat and __usat
4589 # saturation intrinsics from arm_acle.h. Some multilibs may be
4590 # incompatible with these options. Also set et_arm_sat_flags to the
4591 # best options to add. arm_acle.h includes stdint.h which can cause
4592 # trouble with incompatible -mfloat-abi= options.
4594 proc check_effective_target_arm_sat_ok_nocache { } {
4595 global et_arm_sat_flags
4596 set et_arm_sat_flags ""
4597 foreach flags {"" "-march=armv6" "-march=armv6 -mfloat-abi=softfp" "-march=armv6 -mfloat-abi=hard -mfpu=vfp"} {
4598 if { [check_no_compiler_messages_nocache et_arm_sat_flags object {
4599 #include <arm_acle.h>
4601 #ifndef __ARM_FEATURE_SAT
4605 set et_arm_sat_flags $flags
4613 proc check_effective_target_arm_sat_ok { } {
4614 return [check_cached_effective_target et_arm_sat_flags \
4615 check_effective_target_arm_sat_ok_nocache]
4618 proc add_options_for_arm_sat { flags } {
4619 if { ! [check_effective_target_arm_sat_ok] } {
4622 global et_arm_sat_flags
4623 return "$flags $et_arm_sat_flags"
4626 # Return 1 if this is an ARM target supporting the DSP intrinsics from
4627 # arm_acle.h. Some multilibs may be incompatible with these options.
4628 # Also set et_arm_dsp_flags to the best options to add.
4629 # arm_acle.h includes stdint.h which can cause trouble with incompatible
4630 # -mfloat-abi= options.
4631 # check_effective_target_arm_dsp also exists, which checks the current
4632 # multilib, without trying other options.
4634 proc check_effective_target_arm_dsp_ok_nocache { } {
4635 global et_arm_dsp_flags
4636 set et_arm_dsp_flags ""
4637 foreach flags {"" "-march=armv5te" "-march=armv5te -mfloat-abi=softfp" "-march=armv5te -mfloat-abi=hard"} {
4638 if { [check_no_compiler_messages_nocache et_arm_dsp_ok object {
4639 #include <arm_acle.h>
4641 #ifndef __ARM_FEATURE_DSP
4645 set et_arm_dsp_flags $flags
4653 proc check_effective_target_arm_dsp_ok { } {
4654 return [check_cached_effective_target et_arm_dsp_flags \
4655 check_effective_target_arm_dsp_ok_nocache]
4658 proc add_options_for_arm_dsp { flags } {
4659 if { ! [check_effective_target_arm_dsp_ok] } {
4662 global et_arm_dsp_flags
4663 return "$flags $et_arm_dsp_flags"
4666 # Return 1 if this is an ARM target supporting -mfpu=neon without any
4667 # -mfloat-abi= option. Useful in tests where add_options is not
4668 # supported (such as lto tests).
4670 proc check_effective_target_arm_neon_ok_no_float_abi_nocache { } {
4671 if { [check_effective_target_arm32] } {
4672 foreach flags {"-mfpu=neon"} {
4673 if { [check_no_compiler_messages_nocache arm_neon_ok_no_float_abi object {
4674 #include <arm_neon.h>
4676 #ifndef __ARM_NEON__
4679 /* Avoid the case where a test adds -mfpu=neon, but the toolchain is
4680 configured for -mcpu=arm926ej-s, for example. */
4681 #if __ARM_ARCH < 7 || __ARM_ARCH_PROFILE == 'M
'
4682 #error Architecture does not support NEON.
4693 proc check_effective_target_arm_neon_ok_no_float_abi { } {
4694 return [check_cached_effective_target arm_neon_ok_no_float_abi \
4695 check_effective_target_arm_neon_ok_no_float_abi_nocache]
4698 proc check_effective_target_arm_crc_ok_nocache { } {
4699 global et_arm_crc_flags
4700 set et_arm_crc_flags "-march=armv8-a+crc"
4701 return [check_no_compiler_messages_nocache arm_crc_ok object {
4702 #if !defined (__ARM_FEATURE_CRC32)
4705 #include <arm_acle.h>
4706 } "$et_arm_crc_flags"]
4709 proc check_effective_target_arm_crc_ok { } {
4710 return [check_cached_effective_target arm_crc_ok \
4711 check_effective_target_arm_crc_ok_nocache]
4714 # Return 1 if this is an ARM target supporting -mfpu=neon-fp16
4715 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
4716 # incompatible with these options. Also set et_arm_neon_fp16_flags to
4717 # the best options to add.
4719 proc check_effective_target_arm_neon_fp16_ok_nocache { } {
4720 global et_arm_neon_fp16_flags
4721 global et_arm_neon_flags
4722 set et_arm_neon_fp16_flags ""
4723 if { [check_effective_target_arm32]
4724 && [check_effective_target_arm_neon_ok] } {
4725 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
4726 "-mfpu=neon-fp16 -mfloat-abi=softfp"
4727 "-mfp16-format=ieee"
4728 "-mfloat-abi=softfp -mfp16-format=ieee"
4729 "-mfpu=neon-fp16 -mfp16-format=ieee"
4730 "-mfpu=neon-fp16 -mfloat-abi=softfp -mfp16-format=ieee"} {
4731 if { [check_no_compiler_messages_nocache arm_neon_fp16_ok object {
4732 #include "arm_neon.h"
4734 foo (float32x4_t arg)
4736 return vcvt_f16_f32 (arg);
4738 } "$et_arm_neon_flags $flags"] } {
4739 set et_arm_neon_fp16_flags [concat $et_arm_neon_flags $flags]
4748 proc check_effective_target_arm_neon_fp16_ok { } {
4749 return [check_cached_effective_target arm_neon_fp16_ok \
4750 check_effective_target_arm_neon_fp16_ok_nocache]
4753 # Return 1 if this is an ARM target supporting -mfpu=neon-fp16
4754 # and -mfloat-abi=softfp together. Some multilibs may be
4755 # incompatible with these options. Also set et_arm_neon_softfp_fp16_flags to
4756 # the best options to add.
4758 proc check_effective_target_arm_neon_softfp_fp16_ok_nocache { } {
4759 global et_arm_neon_softfp_fp16_flags
4760 global et_arm_neon_flags
4761 set et_arm_neon_softfp_fp16_flags ""
4762 if { [check_effective_target_arm32]
4763 && [check_effective_target_arm_neon_ok] } {
4764 foreach flags {"-mfpu=neon-fp16 -mfloat-abi=softfp"
4765 "-mfpu=neon-fp16 -mfloat-abi=softfp -mfp16-format=ieee"} {
4766 if { [check_no_compiler_messages_nocache arm_neon_softfp_fp16_ok object {
4767 #include "arm_neon.h"
4769 foo (float32x4_t arg)
4771 return vcvt_f16_f32 (arg);
4773 } "$et_arm_neon_flags $flags"] } {
4774 set et_arm_neon_softfp_fp16_flags [concat $et_arm_neon_flags $flags]
4783 proc check_effective_target_arm_neon_softfp_fp16_ok { } {
4784 return [check_cached_effective_target arm_neon_softfp_fp16_ok \
4785 check_effective_target_arm_neon_softfp_fp16_ok_nocache]
4790 proc check_effective_target_arm_neon_fp16_hw { } {
4791 if {! [check_effective_target_arm_neon_fp16_ok] } {
4794 global et_arm_neon_fp16_flags
4795 check_runtime arm_neon_fp16_hw {
4797 main (int argc, char **argv)
4799 asm ("vcvt.f32.f16 q1, d0");
4802 } $et_arm_neon_fp16_flags
4805 proc add_options_for_arm_neon_fp16 { flags } {
4806 if { ! [check_effective_target_arm_neon_fp16_ok] } {
4809 global et_arm_neon_fp16_flags
4810 return "$flags $et_arm_neon_fp16_flags"
4813 proc add_options_for_arm_neon_softfp_fp16 { flags } {
4814 if { ! [check_effective_target_arm_neon_softfp_fp16_ok] } {
4817 global et_arm_neon_softfp_fp16_flags
4818 return "$flags $et_arm_neon_softfp_fp16_flags"
4821 proc add_options_for_aarch64_sve { flags } {
4822 if { ![istarget aarch64*-*-*] || [check_effective_target_aarch64_sve] } {
4825 return "$flags -march=armv8.2-a+sve"
4828 # Return 1 if this is an ARM target supporting the FP16 alternative
4829 # format. Some multilibs may be incompatible with the options needed. Also
4830 # set et_arm_neon_fp16_flags to the best options to add.
4832 proc check_effective_target_arm_fp16_alternative_ok_nocache { } {
4833 if { [istarget *-*-vxworks7*] } {
4834 # Not supported by the target system.
4837 global et_arm_neon_fp16_flags
4838 set et_arm_neon_fp16_flags ""
4839 if { [check_effective_target_arm32] } {
4840 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
4841 "-mfpu=neon-fp16 -mfloat-abi=softfp"} {
4842 if { [check_no_compiler_messages_nocache \
4843 arm_fp16_alternative_ok object {
4844 #if !defined (__ARM_FP16_FORMAT_ALTERNATIVE)
4845 #error __ARM_FP16_FORMAT_ALTERNATIVE not defined
4847 } "$flags -mfp16-format=alternative"] } {
4848 set et_arm_neon_fp16_flags "$flags -mfp16-format=alternative"
4857 proc check_effective_target_arm_fp16_alternative_ok { } {
4858 return [check_cached_effective_target arm_fp16_alternative_ok \
4859 check_effective_target_arm_fp16_alternative_ok_nocache]
4862 # Return 1 if this is an ARM target supports specifying the FP16 none
4863 # format. Some multilibs may be incompatible with the options needed.
4865 proc check_effective_target_arm_fp16_none_ok_nocache { } {
4866 if { [check_effective_target_arm32] } {
4867 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
4868 "-mfpu=neon-fp16 -mfloat-abi=softfp"} {
4869 if { [check_no_compiler_messages_nocache \
4870 arm_fp16_none_ok object {
4871 #if defined (__ARM_FP16_FORMAT_ALTERNATIVE)
4872 #error __ARM_FP16_FORMAT_ALTERNATIVE defined
4874 #if defined (__ARM_FP16_FORMAT_IEEE)
4875 #error __ARM_FP16_FORMAT_IEEE defined
4877 } "$flags -mfp16-format=none"] } {
4886 proc check_effective_target_arm_fp16_none_ok { } {
4887 return [check_cached_effective_target arm_fp16_none_ok \
4888 check_effective_target_arm_fp16_none_ok_nocache]
4891 # Return 1 if this is an ARM target supporting -mfpu=neon-fp-armv8
4892 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
4893 # incompatible with these options. Also set et_arm_v8_neon_flags to the
4894 # best options to add.
4896 proc check_effective_target_arm_v8_neon_ok_nocache { } {
4897 global et_arm_v8_neon_flags
4898 set et_arm_v8_neon_flags ""
4899 if { [check_effective_target_arm32] } {
4900 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp-armv8" "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
4901 if { [check_no_compiler_messages_nocache arm_v8_neon_ok object {
4903 #error not armv8 or later
4905 #include "arm_neon.h"
4909 __asm__ volatile ("vrintn.f32 q0, q0");
4911 } "$flags -march=armv8-a"] } {
4912 set et_arm_v8_neon_flags $flags
4921 proc check_effective_target_arm_v8_neon_ok { } {
4922 return [check_cached_effective_target arm_v8_neon_ok \
4923 check_effective_target_arm_v8_neon_ok_nocache]
4926 # Return 1 if this is an ARM target supporting -mfpu=neon-vfpv4
4927 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
4928 # incompatible with these options. Also set et_arm_neonv2_flags to the
4929 # best options to add.
4931 proc check_effective_target_arm_neonv2_ok_nocache { } {
4932 global et_arm_neonv2_flags
4933 global et_arm_neon_flags
4934 set et_arm_neonv2_flags ""
4935 if { [check_effective_target_arm32]
4936 && [check_effective_target_arm_neon_ok] } {
4937 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-vfpv4" "-mfpu=neon-vfpv4 -mfloat-abi=softfp"} {
4938 if { [check_no_compiler_messages_nocache arm_neonv2_ok object {
4939 #include "arm_neon.h"
4941 foo (float32x2_t a, float32x2_t b, float32x2_t c)
4943 return vfma_f32 (a, b, c);
4945 } "$et_arm_neon_flags $flags"] } {
4946 set et_arm_neonv2_flags [concat $et_arm_neon_flags $flags]
4955 proc check_effective_target_arm_neonv2_ok { } {
4956 return [check_cached_effective_target arm_neonv2_ok \
4957 check_effective_target_arm_neonv2_ok_nocache]
4960 # Add the options needed for VFP FP16 support. We need either
4961 # -mfloat-abi=softfp or -mfloat-abi=hard. If one is already specified by
4962 # the multilib, use it.
4964 proc add_options_for_arm_fp16 { flags } {
4965 if { ! [check_effective_target_arm_fp16_ok] } {
4968 global et_arm_fp16_flags
4969 return "$flags $et_arm_fp16_flags"
4972 # Add the options needed to enable support for IEEE format
4973 # half-precision support. This is valid for ARM targets.
4975 proc add_options_for_arm_fp16_ieee { flags } {
4976 if { ! [check_effective_target_arm_fp16_ok] } {
4979 global et_arm_fp16_flags
4980 return "$flags $et_arm_fp16_flags -mfp16-format=ieee"
4983 # Add the options needed to enable support for ARM Alternative format
4984 # half-precision support. This is valid for ARM targets.
4986 proc add_options_for_arm_fp16_alternative { flags } {
4987 if { ! [check_effective_target_arm_fp16_ok] } {
4990 global et_arm_fp16_flags
4991 return "$flags $et_arm_fp16_flags -mfp16-format=alternative"
4994 # Return 1 if this is an ARM target that can support a VFP fp16 variant.
4995 # Skip multilibs that are incompatible with these options and set
4996 # et_arm_fp16_flags to the best options to add. This test is valid for
4999 proc check_effective_target_arm_fp16_ok_nocache { } {
5000 global et_arm_fp16_flags
5001 set et_arm_fp16_flags ""
5002 if { ! [check_effective_target_arm32] } {
5006 [list "" { *-*-* } { "-mfpu=*" } \
5007 { "-mfpu=*fp16*" "-mfpu=*fpv[4-9]*" \
5008 "-mfpu=*fpv[1-9][0-9]*" "-mfpu=*fp-armv8*" } ]] {
5009 # Multilib flags would override -mfpu.
5012 if [check-flags [list "" { *-*-* } { "-mfloat-abi=soft" } { "" } ]] {
5013 # Must generate floating-point instructions.
5016 if [check_effective_target_arm_hf_eabi] {
5017 # Use existing float-abi and force an fpu which supports fp16
5018 set et_arm_fp16_flags "-mfpu=vfpv4"
5021 if [check-flags [list "" { *-*-* } { "-mfpu=*" } { "" } ]] {
5022 # The existing -mfpu value is OK; use it, but add softfp.
5023 set et_arm_fp16_flags "-mfloat-abi=softfp"
5026 # Add -mfpu for a VFP fp16 variant since there is no preprocessor
5027 # macro to check for this support.
5028 set flags "-mfpu=vfpv4 -mfloat-abi=softfp"
5029 if { [check_no_compiler_messages_nocache arm_fp16_ok assembly {
5032 set et_arm_fp16_flags "$flags"
5039 proc check_effective_target_arm_fp16_ok { } {
5040 return [check_cached_effective_target arm_fp16_ok \
5041 check_effective_target_arm_fp16_ok_nocache]
5044 # Return 1 if the target supports executing VFP FP16 instructions, 0
5045 # otherwise. This test is valid for ARM only.
5047 proc check_effective_target_arm_fp16_hw { } {
5048 if {! [check_effective_target_arm_fp16_ok] } {
5051 global et_arm_fp16_flags
5052 check_runtime arm_fp16_hw {
5054 main (int argc, char **argv)
5058 asm ("vcvtb.f32.f16 %0, %1"
5059 : "=w" (r) : "w" (a)
5060 : /* No clobbers. */);
5061 return (r == 1.0) ? 0 : 1;
5063 } "$et_arm_fp16_flags -mfp16-format=ieee"
5066 # Creates a series of routines that return 1 if the given architecture
5067 # can be selected and a routine to give the flags to select that architecture
5068 # Note: Extra flags may be added to disable options from newer compilers
5069 # (Thumb in particular - but others may be added in the future).
5070 # Warning: Do not use check_effective_target_arm_arch_*_ok for architecture
5071 # extension (eg. ARMv8.1-A) since there is no macro defined for them. See
5072 # how only __ARM_ARCH_8A__ is checked for ARMv8.1-A.
5073 # Usage: /* { dg-require-effective-target arm_arch_v5_ok } */
5074 # /* { dg-add-options arm_arch_v5t } */
5075 # /* { dg-require-effective-target arm_arch_v5t_multilib } */
5076 foreach { armfunc armflag armdefs } {
5077 v4 "-march=armv4 -marm" __ARM_ARCH_4__
5078 v4t "-march=armv4t -mfloat-abi=softfp" __ARM_ARCH_4T__
5079 v4t_arm "-march=armv4t -marm" __ARM_ARCH_4T__
5080 v4t_thumb "-march=armv4t -mthumb -mfloat-abi=softfp" __ARM_ARCH_4T__
5081 v5t "-march=armv5t -mfloat-abi=softfp" __ARM_ARCH_5T__
5082 v5t_arm "-march=armv5t -marm" __ARM_ARCH_5T__
5083 v5t_thumb "-march=armv5t -mthumb -mfloat-abi=softfp" __ARM_ARCH_5T__
5084 v5te "-march=armv5te -mfloat-abi=softfp" __ARM_ARCH_5TE__
5085 v5te_arm "-march=armv5te -marm" __ARM_ARCH_5TE__
5086 v5te_thumb "-march=armv5te -mthumb -mfloat-abi=softfp" __ARM_ARCH_5TE__
5087 v6 "-march=armv6 -mfloat-abi=softfp" __ARM_ARCH_6__
5088 v6_arm "-march=armv6 -marm" __ARM_ARCH_6__
5089 v6_thumb "-march=armv6 -mthumb -mfloat-abi=softfp" __ARM_ARCH_6__
5090 v6k "-march=armv6k -mfloat-abi=softfp" __ARM_ARCH_6K__
5091 v6k_arm "-march=armv6k -marm" __ARM_ARCH_6K__
5092 v6k_thumb "-march=armv6k -mthumb -mfloat-abi=softfp" __ARM_ARCH_6K__
5093 v6t2 "-march=armv6t2" __ARM_ARCH_6T2__
5094 v6z "-march=armv6z -mfloat-abi=softfp" __ARM_ARCH_6Z__
5095 v6z_arm "-march=armv6z -marm" __ARM_ARCH_6Z__
5096 v6z_thumb "-march=armv6z -mthumb -mfloat-abi=softfp" __ARM_ARCH_6Z__
5097 v6m "-march=armv6-m -mthumb -mfloat-abi=soft" __ARM_ARCH_6M__
5098 v7a "-march=armv7-a" __ARM_ARCH_7A__
5099 v7r "-march=armv7-r" __ARM_ARCH_7R__
5100 v7m "-march=armv7-m -mthumb" __ARM_ARCH_7M__
5101 v7em "-march=armv7e-m -mthumb" __ARM_ARCH_7EM__
5102 v7ve "-march=armv7ve -marm"
5103 "__ARM_ARCH_7A__ && __ARM_FEATURE_IDIV"
5104 v8a "-march=armv8-a" __ARM_ARCH_8A__
5105 v8a_hard "-march=armv8-a -mfpu=neon-fp-armv8 -mfloat-abi=hard" __ARM_ARCH_8A__
5106 v8_1a "-march=armv8.1-a" __ARM_ARCH_8A__
5107 v8_2a "-march=armv8.2-a" __ARM_ARCH_8A__
5108 v8r "-march=armv8-r" __ARM_ARCH_8R__
5109 v8m_base "-march=armv8-m.base -mthumb -mfloat-abi=soft"
5110 __ARM_ARCH_8M_BASE__
5111 v8m_main "-march=armv8-m.main -mthumb" __ARM_ARCH_8M_MAIN__
5112 v8_1m_main "-march=armv8.1-m.main -mthumb" __ARM_ARCH_8M_MAIN__
5113 v9a "-march=armv9-a" __ARM_ARCH_9A__ } {
5114 eval [string map [list FUNC $armfunc FLAG $armflag DEFS $armdefs ] {
5115 proc check_effective_target_arm_arch_FUNC_ok { } {
5116 return [check_no_compiler_messages arm_arch_FUNC_ok assembly {
5128 proc add_options_for_arm_arch_FUNC { flags } {
5129 return "$flags FLAG"
5132 proc check_effective_target_arm_arch_FUNC_link { } {
5133 return [check_no_compiler_messages arm_arch_FUNC_link executable {
5136 int main (void) { return 0; }
5137 } [add_options_for_arm_arch_FUNC ""]]
5140 proc check_effective_target_arm_arch_FUNC_multilib { } {
5141 return [check_runtime arm_arch_FUNC_multilib {
5147 } [add_options_for_arm_arch_FUNC ""]]
5152 # Return 1 if GCC was configured with --with-mode=
5153 proc check_effective_target_default_mode { } {
5155 return [check_configured_with "with-mode="]
5158 # Return 1 if this is an ARM target where -marm causes ARM to be
5161 proc check_effective_target_arm_arm_ok { } {
5162 return [check_no_compiler_messages arm_arm_ok assembly {
5163 #if !defined (__arm__) || defined (__thumb__) || defined (__thumb2__)
5164 #error !__arm__ || __thumb__ || __thumb2__
5170 # Return 1 is this is an ARM target where -mthumb causes Thumb-1 to be
5173 proc check_effective_target_arm_thumb1_ok { } {
5174 return [check_no_compiler_messages arm_thumb1_ok assembly {
5175 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
5176 #error !__arm__ || !__thumb__ || __thumb2__
5178 int foo (int i) { return i; }
5182 # Return 1 is this is an ARM target where -mthumb causes Thumb-2 to be
5185 proc check_effective_target_arm_thumb2_ok { } {
5186 return [check_no_compiler_messages arm_thumb2_ok assembly {
5187 #if !defined(__thumb2__)
5190 int foo (int i) { return i; }
5194 # Return 1 if this is an ARM target where Thumb-1 is used without options
5195 # added by the test.
5197 proc check_effective_target_arm_thumb1 { } {
5198 return [check_no_compiler_messages arm_thumb1 assembly {
5199 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
5200 #error !__arm__ || !__thumb__ || __thumb2__
5206 # Return 1 if this is an ARM target where Thumb-2 is used without options
5207 # added by the test.
5209 proc check_effective_target_arm_thumb2 { } {
5210 return [check_no_compiler_messages arm_thumb2 assembly {
5211 #if !defined(__thumb2__)
5218 # Return 1 if this is an ARM target where conditional execution is available.
5220 proc check_effective_target_arm_cond_exec { } {
5221 return [check_no_compiler_messages arm_cond_exec assembly {
5222 #if defined(__arm__) && defined(__thumb__) && !defined(__thumb2__)
5229 # Return 1 if this is an ARM cortex-M profile cpu
5231 proc check_effective_target_arm_cortex_m { } {
5232 if { ![istarget arm*-*-*] } {
5235 return [check_no_compiler_messages arm_cortex_m assembly {
5236 #if defined(__ARM_ARCH_ISA_ARM)
5237 #error __ARM_ARCH_ISA_ARM is defined
5243 # Return 1 if this is an ARM target where -mthumb causes Thumb-1 to be
5244 # used and MOVT/MOVW instructions to be available.
5246 proc check_effective_target_arm_thumb1_movt_ok {} {
5247 if [check_effective_target_arm_thumb1_ok] {
5248 return [check_no_compiler_messages arm_movt object {
5252 asm ("movt r0, #42");
5260 # Return 1 if this is an ARM target where -mthumb causes Thumb-1 to be
5261 # used and CBZ and CBNZ instructions are available.
5263 proc check_effective_target_arm_thumb1_cbz_ok {} {
5264 if [check_effective_target_arm_thumb1_ok] {
5265 return [check_no_compiler_messages arm_movt object {
5269 asm ("cbz r0, 2f\n2:");
5277 # Return 1 if this is an ARM target where ARMv8-M Security Extensions is
5280 proc check_effective_target_arm_cmse_ok {} {
5281 return [check_no_compiler_messages arm_cmse object {
5290 # Return 1 if the target supports executing CMSE instructions, 0
5291 # otherwise. Cache the result.
5293 proc check_effective_target_arm_cmse_hw { } {
5294 return [check_runtime arm_cmse_hw_available {
5298 asm ("ldr\t%0, =0xe000ed44\n" \
5300 "sg" : "=l" (id_pfr1));
5301 /* Exit with code 0 iff security extension is available. */
5302 return !(id_pfr1 & 0xf0);
5307 # Return 1 if the target supports executing MVE instructions, 0
5310 proc check_effective_target_arm_mve_hw {} {
5311 return [check_runtime arm_mve_hw_available {
5317 asm ("sqrshrl %Q1, %R1, #64, %2"
5319 : "0" (a), "r" (b));
5322 } [add_options_for_arm_v8_1m_mve_fp ""]]
5325 # Return 1 if this is an ARM target where ARMv8-M Security Extensions with
5326 # clearing instructions (clrm, vscclrm, vstr/vldr with FPCXT) is available.
5328 proc check_effective_target_arm_cmse_clear_ok {} {
5329 return [check_no_compiler_messages arm_cmse_clear object {
5333 asm ("clrm {r1, r2}");
5338 # Return 1 if this is an ARM target supporting
5339 # -mbranch-protection=standard, 0 otherwise.
5341 proc check_effective_target_mbranch_protection_ok {} {
5343 return [check_no_compiler_messages mbranch_protection_ok object {
5344 int main (void) { return 0; }
5345 } "-mbranch-protection=standard"]
5348 # Return 1 if the target supports executing PACBTI instructions, 0
5351 proc check_effective_target_arm_pacbti_hw {} {
5352 return [check_runtime arm_pacbti_hw_available {
5353 __attribute__ ((naked)) int
5356 asm ("pac r12, lr, sp");
5358 asm ("autg r12, lr, sp");
5361 } "-march=armv8.1-m.main+pacbti+fp -mbranch-protection=standard -mthumb -mfloat-abi=hard"]
5364 # Return 1 if this compilation turns on string_ops_prefer_neon on.
5366 proc check_effective_target_arm_tune_string_ops_prefer_neon { } {
5367 return [check_no_messages_and_pattern arm_tune_string_ops_prefer_neon "@string_ops_prefer_neon:\t1" assembly {
5368 int foo (void) { return 0; }
5369 } "-O2 -mprint-tune-info" ]
5372 # Return 1 if the target supports executing NEON instructions, 0
5373 # otherwise. Cache the result.
5375 proc check_effective_target_arm_neon_hw { } {
5376 return [check_runtime arm_neon_hw_available {
5380 long long a = 0, b = 1;
5381 asm ("vorr %P0, %P1, %P2"
5383 : "0" (a), "w" (b));
5386 } [add_options_for_arm_neon ""]]
5389 # Return true if this is an AArch64 target that can run SVE code.
5391 proc check_effective_target_aarch64_sve_hw { } {
5392 if { ![istarget aarch64*-*-*] } {
5395 return [check_runtime aarch64_sve_hw_available {
5399 asm volatile ("ptrue p0.b");
5402 } [add_options_for_aarch64_sve ""]]
5405 # Return true if this is an AArch64 target that can run SVE2 code.
5407 proc check_effective_target_aarch64_sve2_hw { } {
5408 if { ![istarget aarch64*-*-*] } {
5411 return [check_runtime aarch64_sve2_hw_available {
5415 asm volatile ("addp z0.b, p0/m, z0.b, z1.b");
5421 # Return true if this is an AArch64 target that can run SVE code and
5422 # if its SVE vectors have exactly BITS bits.
5424 proc aarch64_sve_hw_bits { bits } {
5425 if { ![check_effective_target_aarch64_sve_hw] } {
5428 return [check_runtime aarch64_sve${bits}_hw [subst {
5433 asm volatile ("cntd %0" : "=r" (res));
5434 if (res * 64 != $bits)
5438 }] [add_options_for_aarch64_sve ""]]
5441 # Return true if this is an AArch64 target that can run SVE code and
5442 # if its SVE vectors have exactly 256 bits.
5444 foreach N { 128 256 512 1024 2048 } {
5445 eval [string map [list N $N] {
5446 proc check_effective_target_aarch64_sveN_hw { } {
5447 return [aarch64_sve_hw_bits N]
5452 proc check_effective_target_arm_neonv2_hw { } {
5453 return [check_runtime arm_neon_hwv2_available {
5454 #include "arm_neon.h"
5458 float32x2_t a, b, c;
5459 asm ("vfma.f32 %P0, %P1, %P2"
5461 : "w" (b), "w" (c));
5464 } [add_options_for_arm_neonv2 ""]]
5467 # ID_AA64PFR1_EL1.BT using bits[3:0] == 1 implies BTI implimented.
5468 proc check_effective_target_aarch64_bti_hw { } {
5469 if { ![istarget aarch64*-*-*] } {
5472 return [check_runtime aarch64_bti_hw_available {
5477 asm volatile ("mrs %0, id_aa64pfr1_el1" : "=r" (a));
5478 return !((a & 0xf) == 1);
5483 # Return 1 if the target supports executing the armv8.3-a FJCVTZS
5485 proc check_effective_target_aarch64_fjcvtzs_hw { } {
5486 if { ![istarget aarch64*-*-*] } {
5489 return [check_runtime aarch64_fjcvtzs_hw_available {
5495 asm volatile ("fjcvtzs %w0, %d1"
5498 : /* No clobbers. */);
5501 } "-march=armv8.3-a" ]
5504 # Return 1 if GCC was configured with --enable-standard-branch-protection
5505 proc check_effective_target_default_branch_protection { } {
5506 return [check_configured_with "enable-standard-branch-protection"]
5509 # Return 1 if this is an ARM target supporting -mfloat-abi=softfp.
5511 proc check_effective_target_arm_softfp_ok { } {
5512 return [check_no_compiler_messages arm_softfp_ok object {
5515 int main (void) { return 0; }
5516 } "-mfloat-abi=softfp"]
5519 # Return 1 if this is an ARM target supporting -mfloat-abi=hard.
5521 proc check_effective_target_arm_hard_ok { } {
5522 return [check_no_compiler_messages arm_hard_ok object {
5525 int main (void) { return 0; }
5526 } "-mfloat-abi=hard"]
5529 # Return 1 if this is an ARM target supporting MVE.
5530 proc check_effective_target_arm_mve { } {
5531 if { ![istarget arm*-*-*] } {
5534 return [check_no_compiler_messages arm_mve assembly {
5535 #if !defined (__ARM_FEATURE_MVE)
5541 # Return 1 if the target supports ARMv8.1-M MVE with floating point
5542 # instructions, 0 otherwise. The test is valid for ARM.
5543 # Record the command line options needed.
5545 proc check_effective_target_arm_v8_1m_mve_fp_ok_nocache { } {
5546 global et_arm_v8_1m_mve_fp_flags
5547 set et_arm_v8_1m_mve_fp_flags ""
5549 if { ![istarget arm*-*-*] } {
5553 # Iterate through sets of options to find the compiler flags that
5554 # need to be added to the -march option.
5555 foreach flags {"" "-mfloat-abi=softfp -mfpu=auto -march=armv8.1-m.main+mve.fp" "-mfloat-abi=hard -mfpu=auto -march=armv8.1-m.main+mve.fp"} {
5556 if { [check_no_compiler_messages_nocache \
5557 arm_v8_1m_mve_fp_ok object {
5558 #include <arm_mve.h>
5559 #if !(__ARM_FEATURE_MVE & 2)
5560 #error "__ARM_FEATURE_MVE for floating point not defined"
5562 #if __ARM_BIG_ENDIAN
5563 #error "MVE intrinsics are not supported in Big-Endian mode."
5565 } "$flags -mthumb"] } {
5566 set et_arm_v8_1m_mve_fp_flags "$flags -mthumb --save-temps"
5574 proc check_effective_target_arm_v8_1m_mve_fp_ok { } {
5575 return [check_cached_effective_target arm_v8_1m_mve_fp_ok \
5576 check_effective_target_arm_v8_1m_mve_fp_ok_nocache]
5579 proc add_options_for_arm_v8_1m_mve_fp { flags } {
5580 if { ! [check_effective_target_arm_v8_1m_mve_fp_ok] } {
5583 global et_arm_v8_1m_mve_fp_flags
5584 return "$flags $et_arm_v8_1m_mve_fp_flags"
5587 # Return 1 if the target supports the ARMv8.1 Adv.SIMD extension, 0
5588 # otherwise. The test is valid for AArch64 and ARM. Record the command
5589 # line options needed.
5591 proc check_effective_target_arm_v8_1a_neon_ok_nocache { } {
5592 global et_arm_v8_1a_neon_flags
5593 set et_arm_v8_1a_neon_flags ""
5595 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
5599 # Iterate through sets of options to find the compiler flags that
5600 # need to be added to the -march option. Start with the empty set
5601 # since AArch64 only needs the -march setting.
5602 foreach flags {"" "-mfpu=neon-fp-armv8" "-mfloat-abi=softfp" \
5603 "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
5604 foreach arches { "-march=armv8-a+rdma" "-march=armv8.1-a" } {
5605 if { [check_no_compiler_messages_nocache arm_v8_1a_neon_ok object {
5606 #if !defined (__ARM_FEATURE_QRDMX)
5607 #error "__ARM_FEATURE_QRDMX not defined"
5609 } "$flags $arches"] } {
5610 set et_arm_v8_1a_neon_flags "$flags $arches"
5619 proc check_effective_target_arm_v8_1a_neon_ok { } {
5620 return [check_cached_effective_target arm_v8_1a_neon_ok \
5621 check_effective_target_arm_v8_1a_neon_ok_nocache]
5624 # Return 1 if the target supports ARMv8.2 scalar FP16 arithmetic
5625 # instructions, 0 otherwise. The test is valid for ARM and for AArch64.
5626 # Record the command line options needed.
5628 proc check_effective_target_arm_v8_2a_fp16_scalar_ok_nocache { } {
5629 global et_arm_v8_2a_fp16_scalar_flags
5630 set et_arm_v8_2a_fp16_scalar_flags ""
5632 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
5636 # Iterate through sets of options to find the compiler flags that
5637 # need to be added to the -march option.
5638 foreach flags {"" "-mfpu=fp-armv8" "-mfloat-abi=softfp" \
5639 "-mfpu=fp-armv8 -mfloat-abi=softfp"} {
5640 if { [check_no_compiler_messages_nocache \
5641 arm_v8_2a_fp16_scalar_ok object {
5642 #if !defined (__ARM_FEATURE_FP16_SCALAR_ARITHMETIC)
5643 #error "__ARM_FEATURE_FP16_SCALAR_ARITHMETIC not defined"
5645 } "$flags -march=armv8.2-a+fp16"] } {
5646 set et_arm_v8_2a_fp16_scalar_flags "$flags -march=armv8.2-a+fp16"
5654 proc check_effective_target_arm_v8_2a_fp16_scalar_ok { } {
5655 return [check_cached_effective_target arm_v8_2a_fp16_scalar_ok \
5656 check_effective_target_arm_v8_2a_fp16_scalar_ok_nocache]
5659 # Return 1 if the target supports ARMv8.2 Adv.SIMD FP16 arithmetic
5660 # instructions, 0 otherwise. The test is valid for ARM and for AArch64.
5661 # Record the command line options needed.
5663 proc check_effective_target_arm_v8_2a_fp16_neon_ok_nocache { } {
5664 global et_arm_v8_2a_fp16_neon_flags
5665 set et_arm_v8_2a_fp16_neon_flags ""
5667 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
5671 # Iterate through sets of options to find the compiler flags that
5672 # need to be added to the -march option.
5673 foreach flags {"" "-mfpu=neon-fp-armv8" "-mfloat-abi=softfp" \
5674 "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
5675 if { [check_no_compiler_messages_nocache \
5676 arm_v8_2a_fp16_neon_ok object {
5677 #if !defined (__ARM_FEATURE_FP16_VECTOR_ARITHMETIC)
5678 #error "__ARM_FEATURE_FP16_VECTOR_ARITHMETIC not defined"
5680 } "$flags -march=armv8.2-a+fp16"] } {
5681 set et_arm_v8_2a_fp16_neon_flags "$flags -march=armv8.2-a+fp16"
5689 proc check_effective_target_arm_v8_2a_fp16_neon_ok { } {
5690 return [check_cached_effective_target arm_v8_2a_fp16_neon_ok \
5691 check_effective_target_arm_v8_2a_fp16_neon_ok_nocache]
5694 # Return 1 if the target supports ARMv8.2 Adv.SIMD Dot Product
5695 # instructions, 0 otherwise. The test is valid for ARM and for AArch64.
5696 # Record the command line options needed.
5698 proc check_effective_target_arm_v8_2a_dotprod_neon_ok_nocache { } {
5699 global et_arm_v8_2a_dotprod_neon_flags
5700 set et_arm_v8_2a_dotprod_neon_flags ""
5702 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
5706 # Iterate through sets of options to find the compiler flags that
5707 # need to be added to the -march option.
5708 foreach flags {"" "-mfloat-abi=softfp -mfpu=neon-fp-armv8" "-mfloat-abi=hard -mfpu=neon-fp-armv8"} {
5709 if { [check_no_compiler_messages_nocache \
5710 arm_v8_2a_dotprod_neon_ok object {
5712 #if !defined (__ARM_FEATURE_DOTPROD)
5713 #error "__ARM_FEATURE_DOTPROD not defined"
5715 } "$flags -march=armv8.2-a+dotprod"] } {
5716 set et_arm_v8_2a_dotprod_neon_flags "$flags -march=armv8.2-a+dotprod"
5724 # Return 1 if the target supports ARMv8.1-M MVE
5725 # instructions, 0 otherwise. The test is valid for ARM.
5726 # Record the command line options needed.
5728 proc check_effective_target_arm_v8_1m_mve_ok_nocache { } {
5729 global et_arm_v8_1m_mve_flags
5730 set et_arm_v8_1m_mve_flags ""
5732 if { ![istarget arm*-*-*] } {
5736 # Iterate through sets of options to find the compiler flags that
5737 # need to be added to the -march option.
5738 foreach flags {"" "-mfloat-abi=softfp -mfpu=auto -march=armv8.1-m.main+mve" "-mfloat-abi=hard -mfpu=auto -march=armv8.1-m.main+mve"} {
5739 if { [check_no_compiler_messages_nocache \
5740 arm_v8_1m_mve_ok object {
5741 #if !defined (__ARM_FEATURE_MVE)
5742 #error "__ARM_FEATURE_MVE not defined"
5744 #if __ARM_BIG_ENDIAN
5745 #error "MVE intrinsics are not supported in Big-Endian mode."
5747 #include <arm_mve.h>
5748 } "$flags -mthumb"] } {
5749 set et_arm_v8_1m_mve_flags "$flags -mthumb --save-temps"
5757 proc check_effective_target_arm_v8_1m_mve_ok { } {
5758 return [check_cached_effective_target arm_v8_1m_mve_ok \
5759 check_effective_target_arm_v8_1m_mve_ok_nocache]
5762 proc add_options_for_arm_v8_1m_mve { flags } {
5763 if { ! [check_effective_target_arm_v8_1m_mve_ok] } {
5766 global et_arm_v8_1m_mve_flags
5767 return "$flags $et_arm_v8_1m_mve_flags"
5770 proc check_effective_target_arm_v8_2a_dotprod_neon_ok { } {
5771 return [check_cached_effective_target arm_v8_2a_dotprod_neon_ok \
5772 check_effective_target_arm_v8_2a_dotprod_neon_ok_nocache]
5775 proc add_options_for_arm_v8_2a_dotprod_neon { flags } {
5776 if { ! [check_effective_target_arm_v8_2a_dotprod_neon_ok] } {
5779 global et_arm_v8_2a_dotprod_neon_flags
5780 return "$flags $et_arm_v8_2a_dotprod_neon_flags"
5783 # Return 1 if the target supports ARMv8.2+i8mm Adv.SIMD Dot Product
5784 # instructions, 0 otherwise. The test is valid for ARM and for AArch64.
5785 # Record the command line options needed.
5787 proc check_effective_target_arm_v8_2a_i8mm_ok_nocache { } {
5788 global et_arm_v8_2a_i8mm_flags
5789 set et_arm_v8_2a_i8mm_flags ""
5791 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
5795 # Iterate through sets of options to find the compiler flags that
5796 # need to be added to the -march option.
5797 foreach flags {"" "-mfloat-abi=softfp -mfpu=neon-fp-armv8" "-mfloat-abi=hard -mfpu=neon-fp-armv8" } {
5798 if { [check_no_compiler_messages_nocache \
5799 arm_v8_2a_i8mm_ok object {
5800 #include <arm_neon.h>
5801 #if !defined (__ARM_FEATURE_MATMUL_INT8)
5802 #error "__ARM_FEATURE_MATMUL_INT8 not defined"
5804 } "$flags -march=armv8.2-a+i8mm"] } {
5805 set et_arm_v8_2a_i8mm_flags "$flags -march=armv8.2-a+i8mm"
5813 proc check_effective_target_arm_v8_2a_i8mm_ok { } {
5814 return [check_cached_effective_target arm_v8_2a_i8mm_ok \
5815 check_effective_target_arm_v8_2a_i8mm_ok_nocache]
5818 proc add_options_for_arm_v8_2a_i8mm { flags } {
5819 if { ! [check_effective_target_arm_v8_2a_i8mm_ok] } {
5822 global et_arm_v8_2a_i8mm_flags
5823 return "$flags $et_arm_v8_2a_i8mm_flags"
5826 # Return 1 if the target supports FP16 VFMAL and VFMSL
5827 # instructions, 0 otherwise.
5828 # Record the command line options needed.
5830 proc check_effective_target_arm_fp16fml_neon_ok_nocache { } {
5831 global et_arm_fp16fml_neon_flags
5832 set et_arm_fp16fml_neon_flags ""
5834 if { ![istarget arm*-*-*] } {
5838 # Iterate through sets of options to find the compiler flags that
5839 # need to be added to the -march option.
5840 foreach flags {"" "-mfloat-abi=softfp -mfpu=neon-fp-armv8" "-mfloat-abi=hard -mfpu=neon-fp-armv8"} {
5841 if { [check_no_compiler_messages_nocache \
5842 arm_fp16fml_neon_ok assembly {
5843 #include <arm_neon.h>
5845 foo (float32x2_t r, float16x4_t a, float16x4_t b)
5847 return vfmlal_high_f16 (r, a, b);
5849 } "$flags -march=armv8.2-a+fp16fml"] } {
5850 set et_arm_fp16fml_neon_flags "$flags -march=armv8.2-a+fp16fml"
5858 proc check_effective_target_arm_fp16fml_neon_ok { } {
5859 return [check_cached_effective_target arm_fp16fml_neon_ok \
5860 check_effective_target_arm_fp16fml_neon_ok_nocache]
5863 proc add_options_for_arm_fp16fml_neon { flags } {
5864 if { ! [check_effective_target_arm_fp16fml_neon_ok] } {
5867 global et_arm_fp16fml_neon_flags
5868 return "$flags $et_arm_fp16fml_neon_flags"
5871 # Return 1 if the target supports BFloat16 SIMD instructions, 0 otherwise.
5872 # The test is valid for ARM and for AArch64.
5874 proc check_effective_target_arm_v8_2a_bf16_neon_ok_nocache { } {
5875 global et_arm_v8_2a_bf16_neon_flags
5876 set et_arm_v8_2a_bf16_neon_flags ""
5878 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
5882 foreach flags {"" "-mfloat-abi=softfp -mfpu=neon-fp-armv8" "-mfloat-abi=hard -mfpu=neon-fp-armv8" } {
5883 if { [check_no_compiler_messages_nocache arm_v8_2a_bf16_neon_ok object {
5884 #include <arm_neon.h>
5885 #if !defined (__ARM_FEATURE_BF16_VECTOR_ARITHMETIC)
5886 #error "__ARM_FEATURE_BF16_VECTOR_ARITHMETIC not defined"
5888 } "$flags -march=armv8.2-a+bf16"] } {
5889 set et_arm_v8_2a_bf16_neon_flags "$flags -march=armv8.2-a+bf16"
5897 proc check_effective_target_arm_v8_2a_bf16_neon_ok { } {
5898 return [check_cached_effective_target arm_v8_2a_bf16_neon_ok \
5899 check_effective_target_arm_v8_2a_bf16_neon_ok_nocache]
5902 proc add_options_for_arm_v8_2a_bf16_neon { flags } {
5903 if { ! [check_effective_target_arm_v8_2a_bf16_neon_ok] } {
5906 global et_arm_v8_2a_bf16_neon_flags
5907 return "$flags $et_arm_v8_2a_bf16_neon_flags"
5910 # A series of routines are created to 1) check if a given architecture is
5911 # effective (check_effective_target_*_ok) and then 2) give the corresponding
5912 # flags that enable the architecture (add_options_for_*).
5913 # The series includes:
5914 # arm_v8m_main_cde: Armv8-m CDE (Custom Datapath Extension).
5915 # arm_v8m_main_cde_fp: Armv8-m CDE with FP registers.
5916 # arm_v8_1m_main_cde_mve: Armv8.1-m CDE with MVE.
5917 # arm_v8_1m_main_cde_mve_fp: Armv8.1-m CDE with MVE with FP support.
5919 # /* { dg-require-effective-target arm_v8m_main_cde_ok } */
5920 # /* { dg-add-options arm_v8m_main_cde } */
5921 # The tests are valid for Arm.
5923 foreach { armfunc armflag armdef arminc } {
5925 "-march=armv8-m.main+cdecp0+cdecp6 -mthumb"
5926 "defined (__ARM_FEATURE_CDE)"
5929 "-march=armv8-m.main+fp+cdecp0+cdecp6 -mthumb -mfpu=auto"
5930 "defined (__ARM_FEATURE_CDE) && defined (__ARM_FP)"
5932 arm_v8_1m_main_cde_mve
5933 "-march=armv8.1-m.main+mve+cdecp0+cdecp6 -mthumb -mfpu=auto"
5934 "defined (__ARM_FEATURE_CDE) && defined (__ARM_FEATURE_MVE)"
5935 "#include <arm_mve.h>"
5936 arm_v8_1m_main_cde_mve_fp
5937 "-march=armv8.1-m.main+mve.fp+cdecp0+cdecp6 -mthumb -mfpu=auto"
5938 "defined (__ARM_FEATURE_CDE) || __ARM_FEATURE_MVE == 3"
5939 "#include <arm_mve.h>"
5941 eval [string map [list FUNC $armfunc FLAG $armflag DEF $armdef INC $arminc ] {
5942 proc check_effective_target_FUNC_ok_nocache { } {
5943 global et_FUNC_flags
5944 set et_FUNC_flags ""
5946 if { ![istarget arm*-*-*] } {
5950 if { [check_no_compiler_messages_nocache FUNC_ok assembly {
5954 #include <arm_cde.h>
5957 set et_FUNC_flags "FLAG"
5964 proc check_effective_target_FUNC_ok { } {
5965 return [check_cached_effective_target FUNC_ok \
5966 check_effective_target_FUNC_ok_nocache]
5969 proc add_options_for_FUNC { flags } {
5970 if { ! [check_effective_target_FUNC_ok] } {
5973 global et_FUNC_flags
5974 return "$flags $et_FUNC_flags"
5977 proc check_effective_target_FUNC_link { } {
5978 if { ! [check_effective_target_FUNC_ok] } {
5981 return [check_no_compiler_messages FUNC_link executable {
5985 #include <arm_cde.h>
5992 } [add_options_for_FUNC ""]]
5995 proc check_effective_target_FUNC_multilib { } {
5996 if { ! [check_effective_target_FUNC_ok] } {
5999 return [check_runtime FUNC_multilib {
6003 #include <arm_cde.h>
6010 } [add_options_for_FUNC ""]]
6015 # Return 1 if the target supports executing ARMv8 NEON instructions, 0
6018 proc check_effective_target_arm_v8_neon_hw { } {
6019 return [check_runtime arm_v8_neon_hw_available {
6020 #include "arm_neon.h"
6024 float32x2_t a = { 1.0f, 2.0f };
6025 #ifdef __ARM_ARCH_ISA_A64
6026 asm ("frinta %0.2s, %1.2s"
6030 asm ("vrinta.f32 %P0, %P1"
6034 return a[0] == 2.0f;
6036 } [add_options_for_arm_v8_neon ""]]
6039 # Return 1 if the target supports executing the ARMv8.1 Adv.SIMD extension, 0
6040 # otherwise. The test is valid for AArch64 and ARM.
6042 proc check_effective_target_arm_v8_1a_neon_hw { } {
6043 if { ![check_effective_target_arm_v8_1a_neon_ok] } {
6046 return [check_runtime arm_v8_1a_neon_hw_available {
6050 #ifdef __ARM_ARCH_ISA_A64
6051 __Int32x2_t a = {0, 1};
6052 __Int32x2_t b = {0, 2};
6055 asm ("sqrdmlah %0.2s, %1.2s, %2.2s"
6058 : /* No clobbers. */);
6062 __simd64_int32_t a = {0, 1};
6063 __simd64_int32_t b = {0, 2};
6064 __simd64_int32_t result;
6066 asm ("vqrdmlah.s32 %P0, %P1, %P2"
6069 : /* No clobbers. */);
6074 } [add_options_for_arm_v8_1a_neon ""]]
6077 # Return 1 if the target supports executing floating point instructions from
6078 # ARMv8.2 with the FP16 extension, 0 otherwise. The test is valid for ARM and
6081 proc check_effective_target_arm_v8_2a_fp16_scalar_hw { } {
6082 if { ![check_effective_target_arm_v8_2a_fp16_scalar_ok] } {
6085 return [check_runtime arm_v8_2a_fp16_scalar_hw_available {
6092 #ifdef __ARM_ARCH_ISA_A64
6094 asm ("fabs %h0, %h1"
6097 : /* No clobbers. */);
6101 asm ("vabs.f16 %0, %1"
6104 : /* No clobbers. */);
6108 return (result == 1.0) ? 0 : 1;
6110 } [add_options_for_arm_v8_2a_fp16_scalar ""]]
6113 # Return 1 if the target supports executing Adv.SIMD instructions from ARMv8.2
6114 # with the FP16 extension, 0 otherwise. The test is valid for ARM and for
6117 proc check_effective_target_arm_v8_2a_fp16_neon_hw { } {
6118 if { ![check_effective_target_arm_v8_2a_fp16_neon_ok] } {
6121 return [check_runtime arm_v8_2a_fp16_neon_hw_available {
6125 #ifdef __ARM_ARCH_ISA_A64
6127 __Float16x4_t a = {1.0, -1.0, 1.0, -1.0};
6128 __Float16x4_t result;
6130 asm ("fabs %0.4h, %1.4h"
6133 : /* No clobbers. */);
6137 __simd64_float16_t a = {1.0, -1.0, 1.0, -1.0};
6138 __simd64_float16_t result;
6140 asm ("vabs.f16 %P0, %P1"
6143 : /* No clobbers. */);
6147 return (result[0] == 1.0) ? 0 : 1;
6149 } [add_options_for_arm_v8_2a_fp16_neon ""]]
6152 # Return 1 if the target supports executing AdvSIMD instructions from ARMv8.2
6153 # with the Dot Product extension, 0 otherwise. The test is valid for ARM and for
6156 proc check_effective_target_arm_v8_2a_dotprod_neon_hw { } {
6157 if { ![check_effective_target_arm_v8_2a_dotprod_neon_ok] } {
6160 return [check_runtime arm_v8_2a_dotprod_neon_hw_available {
6161 #include "arm_neon.h"
6166 uint32x2_t results = {0,0};
6167 uint8x8_t a = {1,1,1,1,2,2,2,2};
6168 uint8x8_t b = {2,2,2,2,3,3,3,3};
6170 #ifdef __ARM_ARCH_ISA_A64
6171 asm ("udot %0.2s, %1.8b, %2.8b"
6174 : /* No clobbers. */);
6177 asm ("vudot.u8 %P0, %P1, %P2"
6180 : /* No clobbers. */);
6183 return (results[0] == 8 && results[1] == 24) ? 1 : 0;
6185 } [add_options_for_arm_v8_2a_dotprod_neon ""]]
6188 # Return 1 if the target supports executing AdvSIMD instructions from ARMv8.2
6189 # with the i8mm extension, 0 otherwise. The test is valid for ARM and for
6192 proc check_effective_target_arm_v8_2a_i8mm_neon_hw { } {
6193 if { ![check_effective_target_arm_v8_2a_i8mm_ok] } {
6196 return [check_runtime arm_v8_2a_i8mm_neon_hw_available {
6197 #include "arm_neon.h"
6202 uint32x2_t results = {0,0};
6203 uint8x8_t a = {1,1,1,1,2,2,2,2};
6204 int8x8_t b = {2,2,2,2,3,3,3,3};
6206 #ifdef __ARM_ARCH_ISA_A64
6207 asm ("usdot %0.2s, %1.8b, %2.8b"
6210 : /* No clobbers. */);
6213 asm ("vusdot.u8 %P0, %P1, %P2"
6216 : /* No clobbers. */);
6219 return (vget_lane_u32 (results, 0) == 8
6220 && vget_lane_u32 (results, 1) == 24) ? 1 : 0;
6222 } [add_options_for_arm_v8_2a_i8mm ""]]
6225 # Return 1 if this is a ARM target with NEON enabled.
6227 proc check_effective_target_arm_neon { } {
6228 if { [check_effective_target_arm32] } {
6229 return [check_no_compiler_messages arm_neon object {
6230 #ifndef __ARM_NEON__
6241 proc check_effective_target_arm_neonv2 { } {
6242 if { [check_effective_target_arm32] } {
6243 return [check_no_compiler_messages arm_neon object {
6244 #ifndef __ARM_NEON__
6247 #ifndef __ARM_FEATURE_FMA
6259 # Return 1 if this is an ARM target with load acquire and store release
6260 # instructions for 8-, 16- and 32-bit types.
6262 proc check_effective_target_arm_acq_rel { } {
6263 return [check_no_compiler_messages arm_acq_rel object {
6265 load_acquire_store_release (void)
6267 asm ("lda r0, [r1]\n\t"
6273 : : : "r0", "memory");
6278 # Add the options needed for MIPS Paired-Single.
6280 proc add_options_for_mpaired_single { flags } {
6281 if { ! [check_effective_target_mpaired_single "-mpaired-single"] } {
6284 return "$flags -mpaired-single"
6287 # Add the options needed for MIPS SIMD Architecture.
6289 proc add_options_for_mips_msa { flags } {
6290 if { ! [check_effective_target_mips_msa "-mmsa"] } {
6293 return "$flags -mmsa"
6296 # Add the options needed for MIPS Loongson MMI Architecture.
6298 proc add_options_for_mips_loongson_mmi { flags } {
6299 if { ! [check_effective_target_mips_loongson_mmi "-mloongson-mmi"] } {
6302 return "$flags -mloongson-mmi"
6306 # Return 1 if this a Loongson-2E or -2F target using an ABI that supports
6307 # the Loongson vector modes.
6309 proc check_effective_target_mips_loongson_mmi { args } {
6310 return [check_no_compiler_messages loongson assembly {
6311 #if !defined(__mips_loongson_mmi)
6312 #error !__mips_loongson_mmi
6314 #if !defined(__mips_loongson_vector_rev)
6315 #error !__mips_loongson_vector_rev
6320 # Return 1 if this is a MIPS target that supports the legacy NAN.
6322 proc check_effective_target_mips_nanlegacy { } {
6323 return [check_no_compiler_messages nanlegacy assembly {
6325 int main () { return 0; }
6329 # Return 1 if an MSA program can be compiled to object
6331 proc check_effective_target_mips_msa { args } {
6332 if ![check_effective_target_nomips16] {
6335 return [check_no_compiler_messages msa object {
6336 #if !defined(__mips_msa)
6337 #error "MSA NOT AVAIL"
6339 #if !(((__mips == 64) || (__mips == 32)) && (__mips_isa_rev >= 2))
6340 #error "MSA NOT AVAIL FOR ISA REV < 2"
6342 #if !defined(__mips_hard_float)
6343 #error "MSA HARD_FLOAT REQUIRED"
6345 #if __mips_fpr != 64
6346 #error "MSA 64-bit FPR REQUIRED"
6352 v8i16 v = __builtin_msa_ldi_h (1);
6360 # Return 1 if this is an ARM target that adheres to the ABI for the ARM
6363 proc check_effective_target_arm_eabi { } {
6364 return [check_no_compiler_messages arm_eabi object {
6365 #ifndef __ARM_EABI__
6373 # Return 1 if this is an ARM target that adheres to the hard-float variant of
6374 # the ABI for the ARM Architecture (e.g. -mfloat-abi=hard).
6376 proc check_effective_target_arm_hf_eabi { } {
6377 return [check_no_compiler_messages arm_hf_eabi object {
6378 #if !defined(__ARM_EABI__) || !defined(__ARM_PCS_VFP)
6379 #error not hard-float EABI
6386 # Return 1 if this is an ARM target uses emulated floating point
6389 proc check_effective_target_arm_softfloat { } {
6390 return [check_no_compiler_messages arm_softfloat object {
6391 #if !defined(__SOFTFP__)
6392 #error not soft-float EABI
6399 # Return 1 if this is an ARM target supporting -mcpu=iwmmxt.
6400 # Some multilibs may be incompatible with this option.
6402 proc check_effective_target_arm_iwmmxt_ok { } {
6403 if { [check_effective_target_arm32] } {
6404 return [check_no_compiler_messages arm_iwmmxt_ok object {
6412 # Return true if LDRD/STRD instructions are prefered over LDM/STM instructions
6413 # for an ARM target.
6414 proc check_effective_target_arm_prefer_ldrd_strd { } {
6415 if { ![check_effective_target_arm32] } {
6419 return [check_no_messages_and_pattern arm_prefer_ldrd_strd "strd\tr" assembly {
6420 void foo (void) { __asm__ ("" ::: "r4", "r5"); }
6424 # Return true if LDRD/STRD instructions are available on this target.
6425 proc check_effective_target_arm_ldrd_strd_ok { } {
6426 if { ![check_effective_target_arm32] } {
6430 return [check_no_compiler_messages arm_ldrd_strd_ok object {
6433 __UINT64_TYPE__ a = 1, b = 10;
6434 __UINT64_TYPE__ *c = &b;
6435 // `a` will be in a valid register since it's a DImode quantity.
6444 #
Return 1 if this is a PowerPC target supporting
-meabi.
6446 proc check_effective_target_powerpc_eabi_ok
{ } {
6447 if { [istarget powerpc
*-*-*] } {
6448 return [check_no_compiler_messages powerpc_eabi_ok object
{
6456 #
Return 1 if this is a PowerPC target with floating
-point registers.
6458 proc check_effective_target_powerpc_fprs
{ } {
6459 if { [istarget powerpc
*-*-*]
6460 ||
[istarget rs6000
-*-*] } {
6461 return [check_no_compiler_messages powerpc_fprs object
{
6473 #
Return 1 if this is a PowerPC target with hardware double
-precision
6476 proc check_effective_target_powerpc_hard_double
{ } {
6477 if { [istarget powerpc
*-*-*]
6478 ||
[istarget rs6000
-*-*] } {
6479 return [check_no_compiler_messages powerpc_hard_double object
{
6491 #
Return 1 if this is a PowerPC target with hardware floating point
sqrt.
6493 proc check_effective_target_powerpc_sqrt
{ } {
6494 # We need to be PowerPC
, and we need to have hardware fp enabled.
6495 if {![check_effective_target_powerpc_fprs
]} {
6499 return [check_no_compiler_messages powerpc_sqrt object
{
6503 #error _ARCH_PPCSQ is not defined
6509 #
Return 1 if this is a PowerPC target supporting
-maltivec.
6511 proc check_effective_target_powerpc_altivec_ok
{ } {
6512 # Not PowerPC
, then not ok
6513 if { !([istarget powerpc
*-*-*] ||
[istarget rs6000
-*-*]) } { return 0 }
6515 # Paired Single
, then not ok
6516 if { [istarget powerpc
-*-linux
*paired
*] } { return 0 }
6518 # AltiVec is not supported
on AIX before
5.3.
6519 if { [istarget powerpc
*-*-aix4
*]
6520 ||
[istarget powerpc
*-*-aix5.1
*]
6521 ||
[istarget powerpc
*-*-aix5.2
*] } { return 0 }
6523 #
Return true iff compiling with
-maltivec does not error.
6524 return [check_no_compiler_messages powerpc_altivec_ok object
{
6529 #
Return 1 if this is a PowerPC target supporting
-mpower8
-vector
6531 proc check_effective_target_powerpc_p8vector_ok
{ } {
6532 if { ([istarget powerpc
*-*-*]
6533 && ![istarget powerpc
-*-linux
*paired
*])
6534 ||
[istarget rs6000
-*-*] } {
6535 # AltiVec is not supported
on AIX before
5.3.
6536 if { [istarget powerpc
*-*-aix4
*]
6537 ||
[istarget powerpc
*-*-aix5.1
*]
6538 ||
[istarget powerpc
*-*-aix5.2
*] } {
6541 # Darwin doesn
't run on power8, so far.
6542 if { [istarget *-*-darwin*] } {
6545 return [check_no_compiler_messages powerpc_p8vector_ok object {
6547 asm volatile ("xxlorc 0,0,0");
6550 } "-mpower8-vector"]
6556 # Return 1 if this is a PowerPC target supporting -mpower9-vector
6558 proc check_effective_target_powerpc_p9vector_ok { } {
6559 if { ([istarget powerpc*-*-*]
6560 && ![istarget powerpc-*-linux*paired*])
6561 || [istarget rs6000-*-*] } {
6562 # AltiVec is not supported on AIX before 5.3.
6563 if { [istarget powerpc*-*-aix4*]
6564 || [istarget powerpc*-*-aix5.1*]
6565 || [istarget powerpc*-*-aix5.2*] } {
6568 # Darwin doesn't run
on power9
, so far.
6569 if { [istarget
*-*-darwin
*] } {
6572 return [check_no_compiler_messages powerpc_p9vector_ok object
{
6575 vector double v
= (vector double
) { 0.0, 0.0 };
6576 asm
("xsxexpdp %0,%1" : "+r" (e) : "wa" (v));
6579 } "-mpower9-vector"]
6585 #
Return 1 if this is a PowerPC target supporting
-mmodulo
6587 proc check_effective_target_powerpc_p9modulo_ok
{ } {
6588 if { ([istarget powerpc
*-*-*]
6589 && ![istarget powerpc
-*-linux
*paired
*])
6590 ||
[istarget rs6000
-*-*] } {
6591 # AltiVec is not supported
on AIX before
5.3.
6592 if { [istarget powerpc
*-*-aix4
*]
6593 ||
[istarget powerpc
*-*-aix5.1
*]
6594 ||
[istarget powerpc
*-*-aix5.2
*] } {
6597 return [check_no_compiler_messages powerpc_p9modulo_ok object
{
6599 int i
= 5, j
= 3, r
= -1;
6600 asm
("modsw %0,%1,%2" : "+r" (r) : "r" (i), "r" (j));
6609 #
return 1 if our compiler returns the ARCH_PWR defines with the options
6610 # as provided by the test.
6611 proc check_effective_target_has_arch_pwr5
{ } {
6612 return [check_no_compiler_messages_nocache arch_pwr5 assembly
{
6616 #error does not have power5 support.
6618 /* "has power5 support" */
6621 } [current_compiler_flags
]]
6624 proc check_effective_target_has_arch_pwr6
{ } {
6625 return [check_no_compiler_messages_nocache arch_pwr6 assembly
{
6629 #error does not have power6 support.
6631 /* "has power6 support" */
6634 } [current_compiler_flags
]]
6637 proc check_effective_target_has_arch_pwr7
{ } {
6638 return [check_no_compiler_messages_nocache arch_pwr7 assembly
{
6642 #error does not have power7 support.
6644 /* "has power7 support" */
6647 } [current_compiler_flags
]]
6650 proc check_effective_target_has_arch_pwr8
{ } {
6651 return [check_no_compiler_messages_nocache arch_pwr8 assembly
{
6655 #error does not have power8 support.
6657 /* "has power8 support" */
6660 } [current_compiler_flags
]]
6663 proc check_effective_target_has_arch_pwr9
{ } {
6664 return [check_no_compiler_messages_nocache arch_pwr9 assembly
{
6668 #error does not have power9 support.
6670 /* "has power9 support" */
6673 } [current_compiler_flags
]]
6676 proc check_effective_target_has_arch_pwr10
{ } {
6677 return [check_no_compiler_messages_nocache arch_pwr10 assembly
{
6681 #error does not have power10 support.
6683 /* "has power10 support" */
6686 } [current_compiler_flags
]]
6689 proc check_effective_target_has_arch_ppc64
{ } {
6690 return [check_no_compiler_messages_nocache arch_ppc64 assembly
{
6694 #error does not have ppc64 support.
6696 /* "has ppc64 support" */
6699 } [current_compiler_flags
]]
6702 #
Return 1 if this is a PowerPC target supporting
-mcpu
=power10.
6703 #
Limit this to
64-bit linux systems
for now until other targets support
6706 proc check_effective_target_power10_ok
{ } {
6707 if { ([istarget powerpc64
*-*-linux
*]) } {
6708 return [check_no_compiler_messages power10_ok object
{
6711 asm
("pli %0,%1" : "=r" (e) : "n" (0x12345));
6720 #
Return 1 if this is a PowerPC target supporting
-mfloat128 via either
6721 # software emulation
on power7
/power8 systems or hardware support
on power9.
6723 proc check_effective_target_powerpc_float128_sw_ok
{ } {
6724 if { ([istarget powerpc
*-*-*]
6725 && ![istarget powerpc
-*-linux
*paired
*])
6726 ||
[istarget rs6000
-*-*] } {
6727 # AltiVec is not supported
on AIX before
5.3.
6728 if { [istarget powerpc
*-*-aix4
*]
6729 ||
[istarget powerpc
*-*-aix5.1
*]
6730 ||
[istarget powerpc
*-*-aix5.2
*] } {
6733 # Darwin doesn
't have VSX, so no soft support for float128.
6734 if { [istarget *-*-darwin*] } {
6737 return [check_no_compiler_messages powerpc_float128_sw_ok object {
6738 volatile __float128 x = 1.0q;
6739 volatile __float128 y = 2.0q;
6741 __float128 z = x + y;
6744 } "-mfloat128 -mvsx"]
6750 # Return 1 if this is a PowerPC target supporting -mfloat128 via hardware
6751 # support on power9.
6753 proc check_effective_target_powerpc_float128_hw_ok { } {
6754 if { ([istarget powerpc*-*-*]
6755 && ![istarget powerpc-*-linux*paired*])
6756 || [istarget rs6000-*-*] } {
6757 # AltiVec is not supported on AIX before 5.3.
6758 if { [istarget powerpc*-*-aix4*]
6759 || [istarget powerpc*-*-aix5.1*]
6760 || [istarget powerpc*-*-aix5.2*] } {
6763 # Darwin doesn't run
on any machine with float128 h
/w so far.
6764 if { [istarget
*-*-darwin
*] } {
6767 return [check_no_compiler_messages powerpc_float128_hw_ok object
{
6768 volatile __float128 x
= 1.0q
;
6769 volatile __float128 y
= 2.0q
;
6772 __asm__
("xsaddqp %0,%1,%2" : "=v" (z) : "v" (x), "v" (y));
6775 } "-mfloat128-hardware"]
6781 #
Return 1 if current options
define float128
, 0 otherwise.
6783 proc check_effective_target_ppc_float128
{ } {
6784 return [check_no_compiler_messages_nocache ppc_float128 object
{
6787 #ifndef __FLOAT128__
6794 #
Return 1 if current options generate float128 insns
, 0 otherwise.
6796 proc check_effective_target_ppc_float128_insns
{ } {
6797 return [check_no_compiler_messages_nocache ppc_float128 object
{
6800 #ifndef __FLOAT128_HARDWARE__
6807 #
Return 1 if current options generate VSX instructions
, 0 otherwise.
6809 proc check_effective_target_powerpc_vsx
{ } {
6810 return [check_no_compiler_messages_nocache powerpc_vsx object
{
6820 #
Return 1 if this is a PowerPC target supporting
-mvsx
6822 proc check_effective_target_powerpc_vsx_ok
{ } {
6823 if { ([istarget powerpc
*-*-*]
6824 && ![istarget powerpc
-*-linux
*paired
*])
6825 ||
[istarget rs6000
-*-*] } {
6826 # VSX is not supported
on AIX before
7.1.
6827 if { [istarget powerpc
*-*-aix4
*]
6828 ||
[istarget powerpc
*-*-aix5
*]
6829 ||
[istarget powerpc
*-*-aix6
*] } {
6832 # Darwin doesn
't have VSX, even if it's used with an assembler
6833 #Â which recognises the insns.
6834 if { [istarget
*-*-darwin
*] } {
6837 return [check_no_compiler_messages powerpc_vsx_ok object
{
6839 asm volatile
("xxlor 0,0,0");
6848 #
Return 1 if this is a PowerPC target supporting
-mhtm
6850 proc check_effective_target_powerpc_htm_ok
{ } {
6851 if { ([istarget powerpc
*-*-*]
6852 && ![istarget powerpc
-*-linux
*paired
*])
6853 ||
[istarget rs6000
-*-*] } {
6854 # HTM is not supported
on AIX yet.
6855 if { [istarget powerpc
*-*-aix
*] } {
6858 return [check_no_compiler_messages powerpc_htm_ok object
{
6860 asm volatile
("tbegin. 0");
6869 #
Return 1 if the target supports executing HTM hardware instructions
,
6870 #
0 otherwise.
Cache the result.
6872 proc check_htm_hw_available
{ } {
6873 return [check_cached_effective_target htm_hw_available
{
6874 #
For now
, disable
on Darwin
6875 if { [istarget powerpc
-*-eabi
] ||
[istarget powerpc
*-*-eabispe
] ||
[istarget
*-*-darwin
*]} {
6878 check_runtime_nocache htm_hw_available
{
6888 #
Return 1 if this is a PowerPC target supporting
-mcpu
=cell.
6890 proc check_effective_target_powerpc_ppu_ok
{ } {
6891 if [check_effective_target_powerpc_altivec_ok
] {
6892 return [check_no_compiler_messages cell_asm_available object
{
6895 asm volatile
("lvlx v0,v0,v0");
6897 asm volatile
("lvlx 0,0,0");
6907 #
Return 1 if this is a PowerPC target that supports SPU.
6909 proc check_effective_target_powerpc_spu
{ } {
6910 if { [istarget powerpc
*-*-linux
*] } {
6911 return [check_effective_target_powerpc_altivec_ok
]
6917 #
Return 1 if this is a PowerPC SPE target. The check includes options
6918 # specified by dg
-options
for this test
, so don
't cache the result.
6920 proc check_effective_target_powerpc_spe_nocache { } {
6921 if { [istarget powerpc*-*-*] } {
6922 return [check_no_compiler_messages_nocache powerpc_spe object {
6928 } [current_compiler_flags]]
6934 # Return 1 if this is a PowerPC target with SPE enabled.
6936 proc check_effective_target_powerpc_spe { } {
6937 if { [istarget powerpc*-*-*] } {
6938 return [check_no_compiler_messages powerpc_spe object {
6950 # Return 1 if this is a PowerPC target with Altivec enabled.
6952 proc check_effective_target_powerpc_altivec { } {
6953 if { [istarget powerpc*-*-*] } {
6954 return [check_no_compiler_messages powerpc_altivec object {
6966 # Return 1 if this is a PowerPC 405 target. The check includes options
6967 # specified by dg-options for this test, so don't
cache the result.
6969 proc check_effective_target_powerpc_405_nocache
{ } {
6970 if { [istarget powerpc
*-*-*] ||
[istarget rs6000
-*-*] } {
6971 return [check_no_compiler_messages_nocache powerpc_405 object
{
6977 } [current_compiler_flags
]]
6983 #
Return 1 if this is a PowerPC target using the ELFv2 ABI.
6985 proc check_effective_target_powerpc_elfv2
{ } {
6986 if { [istarget powerpc
*-*-*] } {
6987 return [check_no_compiler_messages powerpc_elfv2 object
{
6989 #error not ELF v2 ABI
6999 #
Return 1 if this is a PowerPC target supporting
-mrop
-protect
7001 proc check_effective_target_rop_ok
{ } {
7002 return [check_effective_target_power10_ok
] && [check_effective_target_powerpc_elfv2
]
7005 # The VxWorks SPARC simulator accepts only EM_SPARC executables and
7006 # chokes
on EM_SPARC32PLUS or EM_SPARCV9 executables.
Return 1 if the
7007 # test environment appears to run executables
on such a simulator.
7009 proc check_effective_target_ultrasparc_hw
{ } {
7010 return [check_runtime ultrasparc_hw
{
7011 int main
() { return 0; }
7012 } "-mcpu=ultrasparc"]
7015 #
Return 1 if the test environment supports executing UltraSPARC VIS2
7016 # instructions. We check this by attempting
: "bmask %g0, %g0, %g0"
7018 proc check_effective_target_ultrasparc_vis2_hw
{ } {
7019 return [check_runtime ultrasparc_vis2_hw
{
7020 int main
() { __asm__
(".word 0x81b00320"); return 0; }
7021 } "-mcpu=ultrasparc3"]
7024 #
Return 1 if the test environment supports executing UltraSPARC VIS3
7025 # instructions. We check this by attempting
: "addxc %g0, %g0, %g0"
7027 proc check_effective_target_ultrasparc_vis3_hw
{ } {
7028 return [check_runtime ultrasparc_vis3_hw
{
7029 int main
() { __asm__
(".word 0x81b00220"); return 0; }
7033 #
Return 1 if this is a SPARC
-V9 target.
7035 proc check_effective_target_sparc_v9
{ } {
7036 if { [istarget sparc
*-*-*] } {
7037 return [check_no_compiler_messages sparc_v9 object
{
7039 asm volatile
("return %i7+8");
7048 #
Return 1 if this is a SPARC target with VIS enabled.
7050 proc check_effective_target_sparc_vis
{ } {
7051 if { [istarget sparc
*-*-*] } {
7052 return [check_no_compiler_messages sparc_vis object
{
7064 #
Return 1 if the target supports hardware vector shift operation.
7066 proc check_effective_target_vect_shift
{ } {
7067 return [check_cached_effective_target_indexed vect_shift
{
7068 expr
{([istarget powerpc
*-*-*]
7069 && ![istarget powerpc
-*-linux
*paired
*])
7070 ||
[istarget ia64
-*-*]
7071 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
7072 ||
[istarget aarch64
*-*-*]
7073 ||
[is
-effective
-target arm_neon
]
7074 ||
([istarget mips
*-*-*]
7075 && ([et
-is
-effective
-target mips_msa
]
7076 ||
[et
-is
-effective
-target mips_loongson_mmi
]))
7077 ||
([istarget s390
*-*-*]
7078 && [check_effective_target_s390_vx
])
7079 ||
[istarget amdgcn
-*-*] }}]
7082 #
Return 1 if the target supports hardware vector shift by register operation.
7084 proc check_effective_target_vect_var_shift
{ } {
7085 return [check_cached_effective_target_indexed vect_var_shift
{
7086 expr
{(([istarget i?
86-*-*] ||
[istarget x86_64
-*-*])
7087 && [check_avx2_available
])
7088 ||
[istarget aarch64
*-*-*]
7092 proc check_effective_target_whole_vector_shift
{ } {
7093 if { [istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
7094 ||
[istarget ia64
-*-*]
7095 ||
[istarget aarch64
*-*-*]
7096 ||
[istarget powerpc64
*-*-*]
7097 ||
([is
-effective
-target arm_neon
]
7098 && [check_effective_target_arm_little_endian
])
7099 ||
([istarget mips
*-*-*]
7100 && [et
-is
-effective
-target mips_loongson_mmi
])
7101 ||
([istarget s390
*-*-*]
7102 && [check_effective_target_s390_vx
])
7103 ||
[istarget amdgcn
-*-*] } {
7109 verbose
"check_effective_target_vect_long: returning $answer" 2
7113 #
Return 1 if the target supports vector bswap operations.
7115 proc check_effective_target_vect_bswap
{ } {
7116 return [check_cached_effective_target_indexed vect_bswap
{
7117 expr
{ [istarget aarch64
*-*-*]
7118 ||
[is
-effective
-target arm_neon
]
7119 ||
[istarget amdgcn
-*-*] }}]
7122 #
Return 1 if the target supports comparison of
bool vectors
for at
7123 # least one vector length.
7125 proc check_effective_target_vect_bool_cmp
{ } {
7126 return [check_cached_effective_target_indexed vect_bool_cmp
{
7127 expr
{ [istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
7128 ||
[istarget aarch64
*-*-*]
7129 ||
[is
-effective
-target arm_neon
] }}]
7132 #
Return 1 if the target supports addition of char vectors
for at least
7133 # one vector length.
7135 proc check_effective_target_vect_char_add
{ } {
7136 return [check_cached_effective_target_indexed vect_char_add
{
7138 [istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
7139 ||
([istarget powerpc
*-*-*]
7140 && ![istarget powerpc
-*-linux
*paired
*])
7141 ||
[istarget amdgcn
-*-*]
7142 ||
[istarget ia64
-*-*]
7143 ||
[istarget aarch64
*-*-*]
7144 ||
[is
-effective
-target arm_neon
]
7145 ||
([istarget mips
*-*-*]
7146 && ([et
-is
-effective
-target mips_loongson_mmi
]
7147 ||
[et
-is
-effective
-target mips_msa
]))
7148 ||
([istarget s390
*-*-*]
7149 && [check_effective_target_s390_vx
])
7153 #
Return 1 if the target supports hardware vector shift operation
for char.
7155 proc check_effective_target_vect_shift_char
{ } {
7156 return [check_cached_effective_target_indexed vect_shift_char
{
7157 expr
{ ([istarget powerpc
*-*-*]
7158 && ![istarget powerpc
-*-linux
*paired
*])
7159 ||
[is
-effective
-target arm_neon
]
7160 ||
([istarget mips
*-*-*]
7161 && [et
-is
-effective
-target mips_msa
])
7162 ||
([istarget s390
*-*-*]
7163 && [check_effective_target_s390_vx
])
7164 ||
[istarget amdgcn
-*-*] }}]
7167 #
Return 1 if the target supports hardware vectors of long
, 0 otherwise.
7169 # This can change
for different subtargets so
do not
cache the result.
7171 proc check_effective_target_vect_long
{ } {
7172 if { [istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
7173 ||
(([istarget powerpc
*-*-*]
7174 && ![istarget powerpc
-*-linux
*paired
*])
7175 && [check_effective_target_ilp32
])
7176 ||
[is
-effective
-target arm_neon
]
7177 ||
([istarget sparc
*-*-*] && [check_effective_target_ilp32
])
7178 ||
[istarget aarch64
*-*-*]
7179 ||
([istarget mips
*-*-*]
7180 && [et
-is
-effective
-target mips_msa
])
7181 ||
([istarget s390
*-*-*]
7182 && [check_effective_target_s390_vx
])
7183 ||
[istarget amdgcn
-*-*] } {
7189 verbose
"check_effective_target_vect_long: returning $answer" 2
7193 #
Return 1 if the target supports hardware vectors of float when
7194 #
-funsafe
-math
-optimizations is enabled
, 0 otherwise.
7196 # This won
't change for different subtargets so cache the result.
7198 proc check_effective_target_vect_float { } {
7199 return [check_cached_effective_target_indexed vect_float {
7200 expr { [istarget i?86-*-*] || [istarget x86_64-*-*]
7201 || [istarget powerpc*-*-*]
7202 || [istarget mips-sde-elf]
7203 || [istarget mipsisa64*-*-*]
7204 || [istarget ia64-*-*]
7205 || [istarget aarch64*-*-*]
7206 || ([istarget mips*-*-*]
7207 && [et-is-effective-target mips_msa])
7208 || [is-effective-target arm_neon]
7209 || ([istarget s390*-*-*]
7210 && [check_effective_target_s390_vxe])
7211 || [istarget amdgcn-*-*] }}]
7214 # Return 1 if the target supports hardware vectors of float without
7215 # -funsafe-math-optimizations being enabled, 0 otherwise.
7217 proc check_effective_target_vect_float_strict { } {
7218 return [expr { [check_effective_target_vect_float]
7219 && ![istarget arm*-*-*] }]
7222 # Return 1 if the target supports hardware vectors of double, 0 otherwise.
7224 # This won't change
for different subtargets so
cache the result.
7226 proc check_effective_target_vect_double
{ } {
7227 return [check_cached_effective_target_indexed vect_double
{
7228 expr
{ (([istarget i?
86-*-*] ||
[istarget x86_64
-*-*])
7229 && [check_no_compiler_messages vect_double assembly
{
7230 #ifdef __tune_atom__
7231 # error No double vectorizer support.
7234 ||
[istarget aarch64
*-*-*]
7235 ||
([istarget powerpc
*-*-*] && [check_vsx_hw_available
])
7236 ||
([istarget mips
*-*-*]
7237 && [et
-is
-effective
-target mips_msa
])
7238 ||
([istarget s390
*-*-*]
7239 && [check_effective_target_s390_vx
])
7240 ||
[istarget amdgcn
-*-*]} }]
7243 #
Return 1 if the target supports conditional addition
, subtraction
,
7244 # multiplication
, division
, minimum and maximum
on vectors of double
,
7245 # via the cond_ optabs.
Return 0 otherwise.
7247 proc check_effective_target_vect_double_cond_arith
{ } {
7248 return [check_effective_target_aarch64_sve
]
7251 #
Return 1 if the target supports hardware vectors of long long
, 0 otherwise.
7253 # This won
't change for different subtargets so cache the result.
7255 proc check_effective_target_vect_long_long { } {
7256 return [check_cached_effective_target_indexed vect_long_long {
7257 expr { [istarget i?86-*-*] || [istarget x86_64-*-*]
7258 || ([istarget mips*-*-*]
7259 && [et-is-effective-target mips_msa])
7260 || ([istarget s390*-*-*]
7261 && [check_effective_target_s390_vx])
7262 || ([istarget powerpc*-*-*]
7263 && ![istarget powerpc-*-linux*paired*]
7264 && [check_effective_target_has_arch_pwr8])
7265 || [istarget aarch64*-*-*] }}]
7269 # Return 1 if the target plus current options does not support a vector
7270 # max instruction on "int", 0 otherwise.
7272 # This won't change
for different subtargets so
cache the result.
7274 proc check_effective_target_vect_no_int_min_max
{ } {
7275 return [check_cached_effective_target_indexed vect_no_int_min_max
{
7276 expr
{ [istarget sparc
*-*-*]
7277 ||
[istarget alpha
*-*-*]
7278 ||
([istarget mips
*-*-*]
7279 && [et
-is
-effective
-target mips_loongson_mmi
]) }}]
7282 #
Return 1 if the target plus current options does not support a vector
7283 # add instruction
on "int", 0 otherwise.
7285 # This won
't change for different subtargets so cache the result.
7287 proc check_effective_target_vect_no_int_add { } {
7288 # Alpha only supports vector add on V8QI and V4HI.
7289 return [check_cached_effective_target_indexed vect_no_int_add {
7290 expr { [istarget alpha*-*-*] }}]
7293 # Return 1 if the target plus current options does not support vector
7294 # bitwise instructions, 0 otherwise.
7296 # This won't change
for different subtargets so
cache the result.
7298 proc check_effective_target_vect_no_bitwise
{ } {
7299 return [check_cached_effective_target_indexed vect_no_bitwise
{ return 0 }]
7302 #
Return 1 if the target plus current options supports vector permutation
,
7305 # This won
't change for different subtargets so cache the result.
7307 proc check_effective_target_vect_perm { } {
7308 return [check_cached_effective_target_indexed vect_perm {
7309 expr { [is-effective-target arm_neon]
7310 || [istarget aarch64*-*-*]
7311 || [istarget powerpc*-*-*]
7312 || [istarget i?86-*-*] || [istarget x86_64-*-*]
7313 || ([istarget mips*-*-*]
7314 && ([et-is-effective-target mpaired_single]
7315 || [et-is-effective-target mips_msa]))
7316 || ([istarget s390*-*-*]
7317 && [check_effective_target_s390_vx])
7318 || [istarget amdgcn-*-*] }}]
7321 # Return 1 if, for some VF:
7323 # - the target's default vector size is VF
* ELEMENT_BITS bits
7325 #
- it is possible to implement the equivalent of
:
7327 #
int<ELEMENT_BITS
>_t s1
[COUNT][COUNT * VF
], s2
[COUNT * VF
];
7328 #
for (int i
= 0; i
< COUNT; ++i
)
7329 #
for (int j
= 0; j
< COUNT * VF
; ++j
)
7330 # s1
[i
][j
] = s2
[j
- j
% COUNT + i
]
7332 # using only a single
2-vector permute
for each vector in s1.
7334 # E.g.
for COUNT == 3 and vector length
4, the two arrays would be
:
7336 # s2 | a0 a1 a2 a3 | b0 b1 b2 b3 | c0 c1 c2 c3
7337 #
------+-------------+-------------+------------
7338 # s1
[0] | a0 a0 a0 a3 | a3 a3 b2 b2 | b2 c1 c1 c1
7339 # s1
[1] | a1 a1 a1 b0 | b0 b0 b3 b3 | b3 c2 c2 c2
7340 # s1
[2] | a2 a2 a2 b1 | b1 b1 c0 c0 | c0 c3 c3 c3
7342 # Each s1 permute requires only two of a
, b and c.
7344 # The distance between the start of vector n in s1
[0] and the start
7345 # of vector n in s2 is
:
7347 # A
= (n
* VF
) % COUNT
7349 # The corresponding value
for the end of vector n is
:
7351 # B
= (n
* VF
+ VF
- 1) % COUNT
7353 # Subtracting i from each value gives the corresponding difference
7354 #
for s1
[i
]. The condition being tested by this function is false
7355 # iff A
- i
> 0 and B
- i
< 0 for some i and n
, such that the first
7356 # element
for s1
[i
] comes from vector n
- 1 of s2 and the last element
7357 # comes from vector n
+ 1 of s2. The condition is therefore true iff
7358 # A
<= B
for all n. This is turn means the condition is true iff
:
7360 #
(n
* VF
) % COUNT + (VF
- 1) % COUNT < COUNT
7362 #
for all n.
COUNT - (n
* VF
) % COUNT is bounded by gcd
(VF
, COUNT),
7363 # and will be that value
for at least one n in
[0, COUNT), so we want
:
7365 #
(VF
- 1) % COUNT < gcd
(VF
, COUNT)
7367 proc vect_perm_supported
{ count element_bits
} {
7368 set vector_bits
[lindex
[available_vector_sizes
] 0]
7369 # The number of vectors has to be a power of
2 when permuting
7370 #
variable-length vectors.
7371 if { $vector_bits
<= 0 && ($
count & -$
count) != $
count } {
7374 set vf
[expr
{ $vector_bits
/ $element_bits
}]
7376 # Compute gcd
(VF
, COUNT).
7379 while { $temp1
> 0 } {
7380 set temp2
[expr
{ $gcd
% $temp1
}]
7384 return [expr
{ ($vf
- 1) % $
count < $gcd
}]
7387 #
Return 1 if the target supports SLP permutation of
3 vectors when each
7388 # element has
32 bits.
7390 proc check_effective_target_vect_perm3_int
{ } {
7391 return [expr
{ [check_effective_target_vect_perm
]
7392 && [vect_perm_supported
3 32] }]
7395 #
Return 1 if the target plus current options supports vector permutation
7396 #
on byte
-sized elements
, 0 otherwise.
7398 # This won
't change for different subtargets so cache the result.
7400 proc check_effective_target_vect_perm_byte { } {
7401 return [check_cached_effective_target_indexed vect_perm_byte {
7402 expr { ([is-effective-target arm_neon]
7403 && [is-effective-target arm_little_endian])
7404 || ([istarget aarch64*-*-*]
7405 && [is-effective-target aarch64_little_endian])
7406 || [istarget powerpc*-*-*]
7407 || ([istarget mips-*.*]
7408 && [et-is-effective-target mips_msa])
7409 || ([istarget s390*-*-*]
7410 && [check_effective_target_s390_vx])
7411 || [istarget amdgcn-*-*] }}]
7414 # Return 1 if the target supports SLP permutation of 3 vectors when each
7415 # element has 8 bits.
7417 proc check_effective_target_vect_perm3_byte { } {
7418 return [expr { [check_effective_target_vect_perm_byte]
7419 && [vect_perm_supported 3 8] }]
7422 # Return 1 if the target plus current options supports vector permutation
7423 # on short-sized elements, 0 otherwise.
7425 # This won't change
for different subtargets so
cache the result.
7427 proc check_effective_target_vect_perm_short
{ } {
7428 return [check_cached_effective_target_indexed vect_perm_short
{
7429 expr
{ ([is
-effective
-target arm_neon
]
7430 && [is
-effective
-target arm_little_endian
])
7431 ||
([istarget aarch64
*-*-*]
7432 && [is
-effective
-target aarch64_little_endian
])
7433 ||
[istarget powerpc
*-*-*]
7434 ||
(([istarget i?
86-*-*] ||
[istarget x86_64
-*-*])
7435 && [check_ssse3_available
])
7436 ||
([istarget mips
*-*-*]
7437 && [et
-is
-effective
-target mips_msa
])
7438 ||
([istarget s390
*-*-*]
7439 && [check_effective_target_s390_vx
])
7440 ||
[istarget amdgcn
-*-*] }}]
7443 #
Return 1 if the target supports SLP permutation of
3 vectors when each
7444 # element has
16 bits.
7446 proc check_effective_target_vect_perm3_short
{ } {
7447 return [expr
{ [check_effective_target_vect_perm_short
]
7448 && [vect_perm_supported
3 16] }]
7451 #
Return 1 if the target plus current options supports folding of
7452 # copysign into XORSIGN.
7454 # This won
't change for different subtargets so cache the result.
7456 proc check_effective_target_xorsign { } {
7457 return [check_cached_effective_target_indexed xorsign {
7458 expr { [istarget i?86-*-*] || [istarget x86_64-*-*]
7459 || [istarget aarch64*-*-*] || [istarget arm*-*-*] }}]
7462 # Return 1 if the target plus current options supports a vector
7463 # widening summation of *short* args into *int* result, 0 otherwise.
7465 # This won't change
for different subtargets so
cache the result.
7467 proc check_effective_target_vect_widen_sum_hi_to_si_pattern
{ } {
7468 return [check_cached_effective_target_indexed vect_widen_sum_hi_to_si_pattern
{
7469 expr
{ [istarget powerpc
*-*-*]
7470 ||
([istarget aarch64
*-*-*]
7471 && ![check_effective_target_aarch64_sve
])
7472 ||
[is
-effective
-target arm_neon
]
7473 ||
[istarget ia64
-*-*] }}]
7476 #
Return 1 if the target plus current options supports a vector
7477 # widening summation of
*short
* args into
*int* result
, 0 otherwise.
7478 # A target can also support this widening summation
if it can support
7479 # promotion
(unpacking
) from shorts to ints.
7481 # This won
't change for different subtargets so cache the result.
7483 proc check_effective_target_vect_widen_sum_hi_to_si { } {
7484 return [check_cached_effective_target_indexed vect_widen_sum_hi_to_si {
7485 expr { [check_effective_target_vect_unpack]
7486 || [istarget powerpc*-*-*]
7487 || [istarget ia64-*-*] }}]
7490 # Return 1 if the target plus current options supports a vector
7491 # widening summation of *char* args into *short* result, 0 otherwise.
7492 # A target can also support this widening summation if it can support
7493 # promotion (unpacking) from chars to shorts.
7495 # This won't change
for different subtargets so
cache the result.
7497 proc check_effective_target_vect_widen_sum_qi_to_hi
{ } {
7498 return [check_cached_effective_target_indexed vect_widen_sum_qi_to_hi
{
7499 expr
{ [check_effective_target_vect_unpack
]
7500 ||
[is
-effective
-target arm_neon
]
7501 ||
[istarget ia64
-*-*] }}]
7504 #
Return 1 if the target plus current options supports a vector
7505 # widening summation of
*char
* args into
*int* result
, 0 otherwise.
7507 # This won
't change for different subtargets so cache the result.
7509 proc check_effective_target_vect_widen_sum_qi_to_si { } {
7510 return [check_cached_effective_target_indexed vect_widen_sum_qi_to_si {
7511 expr { [istarget powerpc*-*-*] }}]
7514 # Return 1 if the target plus current options supports a vector
7515 # widening multiplication of *char* args into *short* result, 0 otherwise.
7516 # A target can also support this widening multplication if it can support
7517 # promotion (unpacking) from chars to shorts, and vect_short_mult (non-widening
7518 # multiplication of shorts).
7520 # This won't change
for different subtargets so
cache the result.
7523 proc check_effective_target_vect_widen_mult_qi_to_hi
{ } {
7524 return [check_cached_effective_target_indexed vect_widen_mult_qi_to_hi
{
7525 expr
{ ([check_effective_target_vect_unpack
]
7526 && [check_effective_target_vect_short_mult
])
7527 ||
([istarget powerpc
*-*-*]
7528 ||
([istarget aarch64
*-*-*]
7529 && ![check_effective_target_aarch64_sve
])
7530 ||
[is
-effective
-target arm_neon
]
7531 ||
([istarget s390
*-*-*]
7532 && [check_effective_target_s390_vx
]))
7533 ||
[istarget amdgcn
-*-*] }}]
7536 #
Return 1 if the target plus current options supports a vector
7537 # widening multiplication of
*short
* args into
*int* result
, 0 otherwise.
7538 # A target can also support this widening multplication
if it can support
7539 # promotion
(unpacking
) from shorts to ints
, and vect_int_mult
(non
-widening
7540 # multiplication of ints
).
7542 # This won
't change for different subtargets so cache the result.
7545 proc check_effective_target_vect_widen_mult_hi_to_si { } {
7546 return [check_cached_effective_target_indexed vect_widen_mult_hi_to_si {
7547 expr { ([check_effective_target_vect_unpack]
7548 && [check_effective_target_vect_int_mult])
7549 || ([istarget powerpc*-*-*]
7550 || [istarget ia64-*-*]
7551 || ([istarget aarch64*-*-*]
7552 && ![check_effective_target_aarch64_sve])
7553 || [istarget i?86-*-*] || [istarget x86_64-*-*]
7554 || [is-effective-target arm_neon]
7555 || ([istarget s390*-*-*]
7556 && [check_effective_target_s390_vx]))
7557 || [istarget amdgcn-*-*] }}]
7560 # Return 1 if the target plus current options supports a vector
7561 # widening multiplication of *char* args into *short* result, 0 otherwise.
7563 # This won't change
for different subtargets so
cache the result.
7565 proc check_effective_target_vect_widen_mult_qi_to_hi_pattern
{ } {
7566 return [check_cached_effective_target_indexed vect_widen_mult_qi_to_hi_pattern
{
7567 expr
{ [istarget powerpc
*-*-*]
7568 ||
([is
-effective
-target arm_neon
]
7569 && [check_effective_target_arm_little_endian
])
7570 ||
([istarget s390
*-*-*]
7571 && [check_effective_target_s390_vx
])
7572 ||
[istarget amdgcn
-*-*] }}]
7575 #
Return 1 if the target plus current options supports a vector
7576 # widening multiplication of
*short
* args into
*int* result
, 0 otherwise.
7578 # This won
't change for different subtargets so cache the result.
7580 proc check_effective_target_vect_widen_mult_hi_to_si_pattern { } {
7581 return [check_cached_effective_target_indexed vect_widen_mult_hi_to_si_pattern {
7582 expr { [istarget powerpc*-*-*]
7583 || [istarget ia64-*-*]
7584 || [istarget i?86-*-*] || [istarget x86_64-*-*]
7585 || ([is-effective-target arm_neon]
7586 && [check_effective_target_arm_little_endian])
7587 || ([istarget s390*-*-*]
7588 && [check_effective_target_s390_vx])
7589 || [istarget amdgcn-*-*] }}]
7592 # Return 1 if the target plus current options supports a vector
7593 # widening multiplication of *int* args into *long* result, 0 otherwise.
7595 # This won't change
for different subtargets so
cache the result.
7597 proc check_effective_target_vect_widen_mult_si_to_di_pattern
{ } {
7598 return [check_cached_effective_target_indexed vect_widen_mult_si_to_di_pattern
{
7599 expr
{ [istarget ia64
-*-*]
7600 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
7601 ||
([istarget s390
*-*-*]
7602 && [check_effective_target_s390_vx
]) }}]
7605 #
Return 1 if the target plus current options supports a vector
7606 # widening shift
, 0 otherwise.
7608 # This won
't change for different subtargets so cache the result.
7610 proc check_effective_target_vect_widen_shift { } {
7611 return [check_cached_effective_target_indexed vect_widen_shift {
7612 expr { [is-effective-target arm_neon] }}]
7615 # Return 1 if the target plus current options supports a vector
7616 # dot-product of signed chars, 0 otherwise.
7618 # This won't change
for different subtargets so
cache the result.
7620 proc check_effective_target_vect_sdot_qi
{ } {
7621 return [check_cached_effective_target_indexed vect_sdot_qi
{
7622 expr
{ [istarget ia64
-*-*]
7623 ||
[istarget aarch64
*-*-*]
7624 ||
[istarget arm
*-*-*]
7625 ||
([istarget mips
*-*-*]
7626 && [et
-is
-effective
-target mips_msa
]) }}]
7629 #
Return 1 if the target plus current options supports a vector
7630 # dot
-product of unsigned chars
, 0 otherwise.
7632 # This won
't change for different subtargets so cache the result.
7634 proc check_effective_target_vect_udot_qi { } {
7635 return [check_cached_effective_target_indexed vect_udot_qi {
7636 expr { [istarget powerpc*-*-*]
7637 || [istarget aarch64*-*-*]
7638 || [istarget arm*-*-*]
7639 || [istarget ia64-*-*]
7640 || ([istarget mips*-*-*]
7641 && [et-is-effective-target mips_msa]) }}]
7644 # Return 1 if the target plus current options supports a vector
7645 # dot-product where one operand of the multiply is signed char
7646 # and the other unsigned chars, 0 otherwise.
7648 # This won't change
for different subtargets so
cache the result.
7650 proc check_effective_target_vect_usdot_qi
{ } {
7651 return [check_cached_effective_target_indexed vect_usdot_qi
{
7652 expr
{ [istarget aarch64
*-*-*]
7653 ||
[istarget arm
*-*-*] }}]
7657 #
Return 1 if the target plus current options supports a vector
7658 # dot
-product of signed shorts
, 0 otherwise.
7660 # This won
't change for different subtargets so cache the result.
7662 proc check_effective_target_vect_sdot_hi { } {
7663 return [check_cached_effective_target_indexed vect_sdot_hi {
7664 expr { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
7665 || [istarget ia64-*-*]
7666 || [istarget i?86-*-*] || [istarget x86_64-*-*]
7667 || ([istarget mips*-*-*]
7668 && [et-is-effective-target mips_msa]) }}]
7671 # Return 1 if the target plus current options supports a vector
7672 # dot-product of unsigned shorts, 0 otherwise.
7674 # This won't change
for different subtargets so
cache the result.
7676 proc check_effective_target_vect_udot_hi
{ } {
7677 return [check_cached_effective_target_indexed vect_udot_hi
{
7678 expr
{ ([istarget powerpc
*-*-*] && ![istarget powerpc
-*-linux
*paired
*])
7679 ||
([istarget mips
*-*-*]
7680 && [et
-is
-effective
-target mips_msa
]) }}]
7683 #
Return 1 if the target plus current options supports a vector
7684 # sad operation of unsigned chars
, 0 otherwise.
7686 # This won
't change for different subtargets so cache the result.
7688 proc check_effective_target_vect_usad_char { } {
7689 return [check_cached_effective_target_indexed vect_usad_char {
7690 expr { [istarget i?86-*-*]
7691 || [istarget x86_64-*-*]
7692 || ([istarget aarch64*-*-*]
7693 && ![check_effective_target_aarch64_sve])
7694 || ([istarget powerpc*-*-*]
7695 && [check_p9vector_hw_available])}}]
7698 # Return 1 if the target plus current options supports both signed
7699 # and unsigned average operations on vectors of bytes.
7701 proc check_effective_target_vect_avg_qi {} {
7702 return [expr { [istarget aarch64*-*-*]
7703 && ![check_effective_target_aarch64_sve1_only] }]
7706 # Return 1 if the target plus current options supports both signed
7707 # and unsigned multiply-high-with-round-and-scale operations
7708 # on vectors of half-words.
7710 proc check_effective_target_vect_mulhrs_hi {} {
7711 return [expr { [istarget aarch64*-*-*]
7712 && [check_effective_target_aarch64_sve2] }]
7715 # Return 1 if the target plus current options supports signed division
7716 # by power-of-2 operations on vectors of 4-byte integers.
7718 proc check_effective_target_vect_sdiv_pow2_si {} {
7719 return [expr { [istarget aarch64*-*-*]
7720 && [check_effective_target_aarch64_sve] }]
7723 # Return 1 if the target plus current options supports a vector
7724 # demotion (packing) of shorts (to chars) and ints (to shorts)
7725 # using modulo arithmetic, 0 otherwise.
7727 # This won't change
for different subtargets so
cache the result.
7729 proc check_effective_target_vect_pack_trunc
{ } {
7730 return [check_cached_effective_target_indexed vect_pack_trunc
{
7731 expr
{ ([istarget powerpc
*-*-*] && ![istarget powerpc
-*-linux
*paired
*])
7732 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
7733 ||
[istarget aarch64
*-*-*]
7734 ||
([istarget arm
*-*-*] && [check_effective_target_arm_neon_ok
]
7735 && [check_effective_target_arm_little_endian
])
7736 ||
([istarget mips
*-*-*]
7737 && [et
-is
-effective
-target mips_msa
])
7738 ||
([istarget s390
*-*-*]
7739 && [check_effective_target_s390_vx
])
7740 ||
[istarget amdgcn
*-*-*] }}]
7743 #
Return 1 if the target plus current options supports a vector
7744 # promotion
(unpacking
) of chars
(to shorts
) and shorts
(to ints
), 0 otherwise.
7746 # This won
't change for different subtargets so cache the result.
7748 proc check_effective_target_vect_unpack { } {
7749 return [check_cached_effective_target_indexed vect_unpack {
7750 expr { ([istarget powerpc*-*-*] && ![istarget powerpc-*paired*])
7751 || [istarget i?86-*-*] || [istarget x86_64-*-*]
7752 || [istarget ia64-*-*]
7753 || [istarget aarch64*-*-*]
7754 || ([istarget mips*-*-*]
7755 && [et-is-effective-target mips_msa])
7756 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]
7757 && [check_effective_target_arm_little_endian])
7758 || ([istarget s390*-*-*]
7759 && [check_effective_target_s390_vx])
7760 || [istarget amdgcn*-*-*] }}]
7763 # Return 1 if the target plus current options does not guarantee
7764 # that its STACK_BOUNDARY is >= the reguired vector alignment.
7766 # This won't change
for different subtargets so
cache the result.
7768 proc check_effective_target_unaligned_stack
{ } {
7769 return [check_cached_effective_target_indexed unaligned_stack
{ expr
0 }]
7772 #
Return 1 if the target plus current options does not support a vector
7773 # alignment mechanism
, 0 otherwise.
7775 # This won
't change for different subtargets so cache the result.
7777 proc check_effective_target_vect_no_align { } {
7778 return [check_cached_effective_target_indexed vect_no_align {
7779 expr { [istarget mipsisa64*-*-*]
7780 || [istarget mips-sde-elf]
7781 || [istarget sparc*-*-*]
7782 || [istarget ia64-*-*]
7783 || [check_effective_target_arm_vect_no_misalign]
7784 || ([istarget powerpc*-*-*] && [check_p8vector_hw_available])
7785 || ([istarget mips*-*-*]
7786 && [et-is-effective-target mips_loongson_mmi]) }}]
7789 # Return 1 if the target supports a vector misalign access, 0 otherwise.
7791 # This won't change
for different subtargets so
cache the result.
7793 proc check_effective_target_vect_hw_misalign
{ } {
7794 return [check_cached_effective_target_indexed vect_hw_misalign
{
7795 if { [istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
7796 ||
([istarget powerpc
*-*-*] && [check_p8vector_hw_available
])
7797 ||
[istarget aarch64
*-*-*]
7798 ||
([istarget mips
*-*-*] && [et
-is
-effective
-target mips_msa
])
7799 ||
([istarget s390
*-*-*]
7800 && [check_effective_target_s390_vx
]) } {
7803 if { [istarget arm
*-*-*]
7804 && ![check_effective_target_arm_vect_no_misalign
] } {
7812 #
Return 1 if arrays are aligned to the vector alignment
7813 # boundary
, 0 otherwise.
7815 proc check_effective_target_vect_aligned_arrays
{ } {
7816 set et_vect_aligned_arrays
0
7817 if { (([istarget i?
86-*-*] ||
[istarget x86_64
-*-*])
7818 && !([is
-effective
-target ia32
]
7819 ||
([check_avx_available
] && ![check_prefer_avx128
]))) } {
7820 set et_vect_aligned_arrays
1
7823 verbose
"check_effective_target_vect_aligned_arrays:\
7824 returning $et_vect_aligned_arrays
" 2
7825 return $et_vect_aligned_arrays
7828 #
Return 1 if the biggest alignment required by target is
1 * BITS_PER_UNIT.
7829 # In such case the target does not impose
any alignment constraints.
7831 proc check_effective_target_no_alignment_constraints
{ } {
7832 return [check_runtime_nocache no_alignment_constraints
{
7836 return __BIGGEST_ALIGNMENT__
== 1 ?
0 : 1;
7841 #
Return 1 if types of size
32 bit or less are naturally aligned
7842 #
(aligned to their type
-size
), 0 otherwise.
7844 # This won
't change for different subtargets so cache the result.
7846 proc check_effective_target_natural_alignment_32 { } {
7847 # FIXME: 32bit powerpc: guaranteed only if MASK_ALIGN_NATURAL/POWER.
7848 # FIXME: m68k has -malign-int
7849 return [check_cached_effective_target_indexed natural_alignment_32 {
7850 if { ([istarget *-*-darwin*] && [is-effective-target lp64])
7851 || [istarget avr-*-*]
7852 || [istarget m68k-*-linux*]
7853 || [istarget pru-*-*]
7854 || [istarget stormy16-*-*]
7855 || [istarget rl78-*-*]
7856 || [istarget pdp11-*-*]
7857 || [istarget msp430-*-*]
7858 || [istarget m32c-*-*]
7859 || [istarget cris-*-*] } {
7867 # Return 1 if types of size 64 bit or less are naturally aligned (aligned to their
7868 # type-size), 0 otherwise.
7870 # This won't change
for different subtargets so
cache the result.
7872 proc check_effective_target_natural_alignment_64
{ } {
7873 return [check_cached_effective_target_indexed natural_alignment_64
{
7874 expr
{ [is
-effective
-target natural_alignment_32
]
7875 && [is
-effective
-target lp64
] && ![istarget
*-*-darwin
*] }
7879 #
Return 1 if all vector types are naturally aligned
(aligned to their
7880 # type
-size
), 0 otherwise.
7882 proc check_effective_target_vect_natural_alignment
{ } {
7883 set et_vect_natural_alignment
1
7884 if { [check_effective_target_arm_eabi
]
7885 ||
[istarget nvptx
-*-*]
7886 ||
[istarget s390
*-*-*]
7887 ||
[istarget amdgcn
-*-*] } {
7888 set et_vect_natural_alignment
0
7890 verbose
"check_effective_target_vect_natural_alignment:\
7891 returning $et_vect_natural_alignment
" 2
7892 return $et_vect_natural_alignment
7895 #
Return true
if the target supports the check_raw_ptrs and check_war_ptrs
7896 # optabs
on vectors.
7898 proc check_effective_target_vect_check_ptrs
{ } {
7899 return [check_effective_target_aarch64_sve2
]
7902 #
Return true
if fully
-masked loops are supported.
7904 proc check_effective_target_vect_fully_masked
{ } {
7905 return [expr
{ [check_effective_target_aarch64_sve
]
7906 ||
[istarget amdgcn
*-*-*] }]
7909 #
Return true
if the target supports the @code
{len_load
} and
7910 # @code
{len_store
} optabs.
7912 proc check_effective_target_vect_len_load_store
{ } {
7913 return [expr
{ [check_effective_target_has_arch_pwr9
]
7914 ||
[check_effective_target_s390_vx
] }]
7917 #
Return the value of parameter vect
-partial
-vector
-usage specified
for
7918 # target by checking the output of
"-Q --help=params". Return zero if
7919 # the desirable pattern isn
't found.
7921 proc check_vect_partial_vector_usage { } {
7924 return [check_cached_effective_target vect_partial_vector_usage {
7925 set result [check_compile vect_partial_vector_usage assembly {
7927 } "-Q --help=params" ]
7929 # Get compiler emitted messages and delete generated file.
7930 set lines [lindex $result 0]
7931 set output [lindex $result 1]
7932 remote_file build delete $output
7934 set pattern {=vect-partial-vector-usage=<0,2>\s+([0-2])}
7935 # Capture the usage value to val, set it to zero if not found.
7936 if { ![regexp $pattern $lines whole val] } then {
7944 # Return true if the target supports loop vectorization with partial vectors
7945 # and @code{vect-partial-vector-usage} is set to 1.
7947 proc check_effective_target_vect_partial_vectors_usage_1 { } {
7948 return [expr { ([check_effective_target_vect_fully_masked]
7949 || [check_effective_target_vect_len_load_store])
7950 && [check_vect_partial_vector_usage] == 1 }]
7953 # Return true if the target supports loop vectorization with partial vectors
7954 # and @code{vect-partial-vector-usage} is set to 2.
7956 proc check_effective_target_vect_partial_vectors_usage_2 { } {
7957 return [expr { ([check_effective_target_vect_fully_masked]
7958 || [check_effective_target_vect_len_load_store])
7959 && [check_vect_partial_vector_usage] == 2 }]
7962 # Return true if the target supports loop vectorization with partial vectors
7963 # and @code{vect-partial-vector-usage} is nonzero.
7965 proc check_effective_target_vect_partial_vectors { } {
7966 return [expr { ([check_effective_target_vect_fully_masked]
7967 || [check_effective_target_vect_len_load_store])
7968 && [check_vect_partial_vector_usage] != 0 }]
7971 # Return 1 if the target doesn't prefer
any alignment beyond element
7972 # alignment during vectorization.
7974 proc check_effective_target_vect_element_align_preferred
{ } {
7975 return [expr
{ [check_effective_target_aarch64_sve
]
7976 && [check_effective_target_vect_variable_length
] }]
7979 #
Return true
if vectorization of v2qi
/v4qi
/v8qi
/v16qi
/v2hi store is enabed.
7980 #
Return zero
if the desirable pattern isn
't found.
7981 # It's used by Warray
-bounds
/Wstringop
-overflow testcases which are
7982 # regressed by O2 vectorization
, refer to PR102697
/PR102462
/PR102706
7983 proc check_vect_slp_store_usage
{ pattern macro
} {
7986 set result
[check_compile slp_aligned_store_usage assembly
{
7987 extern void sink
(void
* );
7988 #
define Ac8
(AC8
){ 0, 1, 2, 3, 4, 5, 6, 7 }
7989 #
define Ac16
(AC16
){ 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 }
7991 typedef struct AC16
{ char a
[16]; } AC16
;
7992 extern char a16
[16];
7999 typedef struct AC8
{ char a
[8]; } AC8
;
8013 extern void sink
(void
*);
8017 struct A1 a
= { 0, { } };
8034 #
define Ac4
(AC4
){ 0, 1, 2, 3 }
8035 typedef struct AC4
{ char a
[4]; } AC4
;
8083 *(short
*) (b
+ 2) = 1;
8092 foo4_2
(struct Ax
*p
)
8098 struct A
{ int i
; };
8099 struct B
{ int j
; struct A a
[4]; };
8106 char cbuf2
[2 * sizeof
(struct C
)] = { };
8110 struct C
*p
= (struct C
*)&cbuf2
;
8117 struct A
{ int i
; };
8118 struct B
{ int j
; struct A a
[2]; };
8125 char cbuf2
[2 * sizeof
(struct C
)] = { };
8129 struct C
*p
= (struct C
*)&cbuf2
;
8135 } "-O2 -fopt-info-all -D$macro" ]
8137 #
Get compiler emitted messages and
delete generated file.
8138 set lines
[lindex $result
0]
8139 set output
[lindex $result
1]
8140 remote_file build
delete $output
8142 # Check pattern exits in lines
, set it to zero
if not found.
8143 if { [regexp $pattern $lines
] } then {
8150 #
Return the true
if target support vectorization of
2-byte char stores
8151 # with
2-byte aligned address at plain O2.
8152 # NB
: This target should be removed after real issues are fixed
for
8153 #
-Wstringop
-overflow with O2 vect. Be careful
if you want to reuse
8154 # this target since tests in check_vect_slp_store_usage
8155 # is the exact match of relative testcases
8156 proc check_effective_target_vect_slp_v2qi_store_align
{ } {
8157 set pattern
{add new stmt
: MEM
<vector\
(2\
) char
>}
8158 set macro
"TEST_V2QI"
8159 return [check_cached_effective_target vect_slp_v2qi_store_align
{
8160 expr
[check_vect_slp_store_usage $pattern $macro
] }]
8163 #
Return the true
if target support vectorization of
2-byte char stores
8164 # with unaligned address at plain O2.
8165 proc check_effective_target_vect_slp_v2qi_store_unalign
{ } {
8166 set pattern
{add new stmt
: MEM
<vector\
(2\
) char
>}
8167 set macro
"TEST_V2QI_2"
8168 return [check_cached_effective_target vect_slp_v2qi_store_unalign
{
8169 expr
[check_vect_slp_store_usage $pattern $macro
] }]
8172 #
Return the true
if target support vectorization of
4-byte char stores
8173 # with
4-byte aligned address at plain O2.
8174 # NB
: This target should be removed after real issues are fixed
for
8175 #
-Wstringop
-overflow with O2 vect. Be careful
if you want to reuse
8176 # this target since tests in check_vect_slp_store_usage
8177 # is the exact match of relative testcases
8178 proc check_effective_target_vect_slp_v4qi_store_align
{ } {
8179 set pattern
{add new stmt
: MEM
<vector\
(4\
) char
>}
8180 set macro
"TEST_V4QI"
8181 return [check_cached_effective_target vect_slp_v4qi_store_align
{
8182 expr
[check_vect_slp_store_usage $pattern $macro
] }]
8185 #
Return the true
if target support vectorization of
4-byte char stores
8186 # with unaligned address at plain O2.
8187 proc check_effective_target_vect_slp_v4qi_store_unalign
{ } {
8188 set pattern
{add new stmt
: MEM
<vector\
(4\
) char
>}
8189 set macro
"TEST_V4QI_2"
8190 return [check_cached_effective_target vect_slp_v4qi_store_unalign
{
8191 expr
[check_vect_slp_store_usage $pattern $macro
] }]
8194 #
Return the true
if target support block
move for
8195 #
8-byte aligned
4-byte size struct initialization.
8196 proc check_effective_target_struct_4char_block_move
{ } {
8197 set pattern
{not vectorized
: more than one data ref in stmt
:}
8198 set macro
"TEST_V4QI_3"
8199 return [check_cached_effective_target struct_4char_block_move
{
8200 expr
[check_vect_slp_store_usage $pattern $macro
] }]
8203 #
Return the true
if target support vectorization of
4-byte char stores
8204 # with unaligned address or store them with a constant pool at plain O2.
8205 proc check_effective_target_vect_slp_v4qi_store_unalign_1
{ } {
8206 set pattern
{add new stmt
: MEM
<vector\
(4\
) char
>}
8207 set macro
"TEST_V4QI_3"
8208 return [check_cached_effective_target vect_slp_v4qi_store_unalign_1
{
8209 expr
{ [check_vect_slp_store_usage $pattern $macro
]
8210 ||
[check_effective_target_struct_4char_block_move
] } }]
8213 #
Return the true
if target support block
move for
8214 #
8-byte aligned
8-byte size struct initialization.
8215 proc check_effective_target_struct_8char_block_move
{ } {
8216 set pattern
{not vectorized
: more than one data ref in stmt
:}
8217 set macro
"TEST_V8QI"
8218 return [check_cached_effective_target struct_8char_block_move
{
8219 expr
[check_vect_slp_store_usage $pattern $macro
] }]
8222 #
Return the true
if target support vectorization of
8-byte char stores
8223 # with unaligned address or store them with a constant pool at plain O2.
8224 # NB
: This target should be removed after real issues are fixed
for
8225 #
-Wstringop
-overflow with O2 vect. Be careful
if you want to reuse
8226 # this target since tests in check_vect_slp_store_usage
8227 # is the exact match of relative testcases
8228 proc check_effective_target_vect_slp_v8qi_store_unalign_1
{ } {
8229 set pattern
{add new stmt
: MEM
<vector\
(8\
) char
>}
8230 set macro
"TEST_V8QI"
8231 return [check_cached_effective_target vect_slp_v8qi_store_unalign_1
{
8232 expr
{ [check_vect_slp_store_usage $pattern $macro
]
8233 ||
[check_effective_target_struct_8char_block_move
] } }]
8236 #
Return the true
if target support block
move for
8237 #
8-byte aligned
16-byte size struct initialization.
8238 proc check_effective_target_struct_16char_block_move
{ } {
8239 set pattern
{not vectorized
: more than one data ref in stmt
:}
8240 set macro
"TEST_V16QI"
8241 return [check_cached_effective_target struct_16char_block_move
{
8242 expr
[check_vect_slp_store_usage $pattern $macro
] }]
8245 #
Return the true
if target support vectorization of
16-byte char stores
8246 # with unaligned address or store them with a constant pool at plain O2.
8247 # NB
: This target should be removed after real issues are fixed
for
8248 #
-Wstringop
-overflow with O2 vect. Be careful
if you want to reuse
8249 # this target since tests in check_vect_slp_store_usage
8250 # is the exact match of relative testcases
8251 proc check_effective_target_vect_slp_v16qi_store_unalign_1
{ } {
8252 set pattern
{add new stmt
: MEM
<vector\
(16\
) char
>}
8253 set macro
"TEST_V16QI"
8254 return [check_cached_effective_target vect_slp_v16qi_store_unalign_1
{
8255 expr
{ [check_vect_slp_store_usage $pattern $macro
]
8256 ||
[check_effective_target_struct_16char_block_move
] } }]
8259 #
Return the true
if target support vectorization of
4-byte short stores
8260 # with unaligned address at plain O2.
8261 # NB
: This target should be removed after real issues are fixed
for
8262 #
-Wstringop
-overflow with O2 vect. Be careful
if you want to reuse
8263 # this target since tests in check_vect_slp_store_usage
8264 # is the exact match of relative testcases
8265 proc check_effective_target_vect_slp_v2hi_store_unalign
{ } {
8266 set pattern
{add new stmt
: MEM
<vector\
(2\
) short
int>}
8267 set macro
"TEST_V2HI"
8268 return [check_cached_effective_target vect_slp_v2hi_store_unalign
{
8269 expr
[check_vect_slp_store_usage $pattern $macro
] }]
8272 #
Return the true
if target support vectorization of
4-byte short stores
8273 # with
4-byte aligned address at plain O2.
8274 proc check_effective_target_vect_slp_v2hi_store_align
{ } {
8275 set pattern
{add new stmt
: MEM
<vector\
(2\
) short
int>}
8276 set macro
"TEST_V2HI_2"
8277 return [check_cached_effective_target vect_slp_v2hi_store_align
{
8278 expr
[check_vect_slp_store_usage $pattern $macro
] }]
8281 #
Return the true
if target support vectorization of
8-byte short stores
8282 # with unaligned address at plain O2.
8283 # NB
: This target should be removed after real issues are fixed
for
8284 #
-Wstringop
-overflow with O2 vect. Be careful
if you want to reuse
8285 # this target since tests in check_vect_slp_store_usage
8286 # is the exact match of relative testcases
8287 proc check_effective_target_vect_slp_v4hi_store_unalign
{ } {
8288 set pattern
{add new stmt
: MEM
<vector\
(4\
) short
int>}
8289 set macro
"TEST_V4HI"
8290 return [check_cached_effective_target vect_slp_v4hi_store_unalign
{
8291 expr
[check_vect_slp_store_usage $pattern $macro
] }]
8294 #
Return the true
if target support vectorization of
8-byte
int stores
8295 # with
8-byte aligned address at plain O2.
8296 # NB
: This target should be removed after real issues are fixed
for
8297 #
-Wstringop
-overflow with O2 vect. Be careful
if you want to reuse
8298 # this target since tests in check_vect_slp_store_usage
8299 # is the exact match of relative testcases
8300 proc check_effective_target_vect_slp_v2si_store_align
{ } {
8301 set pattern
{add new stmt
: MEM
<vector\
(2\
) int>}
8302 set macro
"TEST_V2SI"
8303 return [check_cached_effective_target vect_slp_v2si_store_align
{
8304 expr
[check_vect_slp_store_usage $pattern $macro
] }]
8307 #
Return the true
if target support vectorization of
16-byte
int stores
8308 # with unaligned address at plain O2.
8309 # NB
: This target should be removed after real issues are fixed
for
8310 #
-Wstringop
-overflow with O2 vect. Be careful
if you want to reuse
8311 # this target since tests in check_vect_slp_store_usage
8312 # is the exact match of relative testcases
8313 proc check_effective_target_vect_slp_v4si_store_unalign
{ } {
8314 set pattern
{add new stmt
: MEM
<vector\
(4\
) int>}
8315 set macro
"TEST_V4SI"
8316 return [check_cached_effective_target vect_slp_v4si_store_unalign
{
8317 expr
[check_vect_slp_store_usage $pattern $macro
] }]
8320 #
Return 1 if we can align stack data to the preferred vector alignment.
8322 proc check_effective_target_vect_align_stack_vars
{ } {
8323 if { [check_effective_target_aarch64_sve
] } {
8324 return [check_effective_target_vect_variable_length
]
8329 #
Return 1 if vector alignment
(for types of size
32 bit or less
) is reachable
, 0 otherwise.
8331 proc check_effective_target_vector_alignment_reachable
{ } {
8332 set et_vector_alignment_reachable
0
8333 if { [check_effective_target_vect_aligned_arrays
]
8334 ||
[check_effective_target_natural_alignment_32
] } {
8335 set et_vector_alignment_reachable
1
8337 verbose
"check_effective_target_vector_alignment_reachable:\
8338 returning $et_vector_alignment_reachable
" 2
8339 return $et_vector_alignment_reachable
8342 #
Return 1 if vector alignment
for 64 bit is reachable
, 0 otherwise.
8344 proc check_effective_target_vector_alignment_reachable_for_64bit
{ } {
8345 set et_vector_alignment_reachable_for_64bit
0
8346 if { [check_effective_target_vect_aligned_arrays
]
8347 ||
[check_effective_target_natural_alignment_64
] } {
8348 set et_vector_alignment_reachable_for_64bit
1
8350 verbose
"check_effective_target_vector_alignment_reachable_for_64bit:\
8351 returning $et_vector_alignment_reachable_for_64bit
" 2
8352 return $et_vector_alignment_reachable_for_64bit
8355 #
Return 1 if the target only requires element alignment
for vector accesses
8357 proc check_effective_target_vect_element_align
{ } {
8358 return [check_cached_effective_target_indexed vect_element_align
{
8359 expr
{ ([istarget arm
*-*-*]
8360 && ![check_effective_target_arm_vect_no_misalign
])
8361 ||
[check_effective_target_vect_hw_misalign
]
8362 ||
[istarget amdgcn
-*-*] }}]
8365 #
Return 1 if we expect to see unaligned accesses in at least some
8368 proc check_effective_target_vect_unaligned_possible
{ } {
8369 return [expr
{ ![check_effective_target_vect_element_align_preferred
]
8370 && (![check_effective_target_vect_no_align
]
8371 ||
[check_effective_target_vect_hw_misalign
]) }]
8374 #
Return 1 if the target supports vector LOAD_LANES operations
, 0 otherwise.
8376 proc check_effective_target_vect_load_lanes
{ } {
8377 # We don
't support load_lanes correctly on big-endian arm.
8378 return [check_cached_effective_target vect_load_lanes {
8379 expr { ([check_effective_target_arm_little_endian]
8380 && [check_effective_target_arm_neon_ok])
8381 || [istarget aarch64*-*-*] }}]
8384 # Return 1 if the target supports vector masked loads.
8386 proc check_effective_target_vect_masked_load { } {
8387 return [expr { [check_avx_available]
8388 || [check_effective_target_aarch64_sve]
8389 || [istarget amdgcn*-*-*] } ]
8392 # Return 1 if the target supports vector masked stores.
8394 proc check_effective_target_vect_masked_store { } {
8395 return [expr { [check_effective_target_aarch64_sve]
8396 || [istarget amdgcn*-*-*] }]
8399 # Return 1 if the target supports vector gather loads via internal functions.
8401 proc check_effective_target_vect_gather_load_ifn { } {
8402 return [expr { [check_effective_target_aarch64_sve] }]
8405 # Return 1 if the target supports vector scatter stores.
8407 proc check_effective_target_vect_scatter_store { } {
8408 return [expr { [check_effective_target_aarch64_sve]
8409 || [istarget amdgcn*-*-*] }]
8412 # Return 1 if the target supports vector conditional operations, 0 otherwise.
8414 proc check_effective_target_vect_condition { } {
8415 return [check_cached_effective_target_indexed vect_condition {
8416 expr { [istarget aarch64*-*-*]
8417 || [istarget powerpc*-*-*]
8418 || [istarget ia64-*-*]
8419 || [istarget i?86-*-*] || [istarget x86_64-*-*]
8420 || ([istarget mips*-*-*]
8421 && [et-is-effective-target mips_msa])
8422 || ([istarget arm*-*-*]
8423 && [check_effective_target_arm_neon_ok])
8424 || ([istarget s390*-*-*]
8425 && [check_effective_target_s390_vx])
8426 || [istarget amdgcn-*-*] }}]
8429 # Return 1 if the target supports vector conditional operations where
8430 # the comparison has different type from the lhs, 0 otherwise.
8432 proc check_effective_target_vect_cond_mixed { } {
8433 return [check_cached_effective_target_indexed vect_cond_mixed {
8434 expr { [istarget i?86-*-*] || [istarget x86_64-*-*]
8435 || [istarget aarch64*-*-*]
8436 || [istarget powerpc*-*-*]
8437 || ([istarget arm*-*-*]
8438 && [check_effective_target_arm_neon_ok])
8439 || ([istarget mips*-*-*]
8440 && [et-is-effective-target mips_msa])
8441 || ([istarget s390*-*-*]
8442 && [check_effective_target_s390_vx])
8443 || [istarget amdgcn-*-*] }}]
8446 # Return 1 if the target supports vector char multiplication, 0 otherwise.
8448 proc check_effective_target_vect_char_mult { } {
8449 return [check_cached_effective_target_indexed vect_char_mult {
8450 expr { [istarget aarch64*-*-*]
8451 || [istarget ia64-*-*]
8452 || [istarget i?86-*-*] || [istarget x86_64-*-*]
8453 || [check_effective_target_arm32]
8454 || [check_effective_target_powerpc_altivec]
8455 || ([istarget mips*-*-*]
8456 && [et-is-effective-target mips_msa])
8457 || ([istarget s390*-*-*]
8458 && [check_effective_target_s390_vx])
8459 || [istarget amdgcn-*-*] }}]
8462 # Return 1 if the target supports vector short multiplication, 0 otherwise.
8464 proc check_effective_target_vect_short_mult { } {
8465 return [check_cached_effective_target_indexed vect_short_mult {
8466 expr { [istarget ia64-*-*]
8467 || [istarget i?86-*-*] || [istarget x86_64-*-*]
8468 || [istarget powerpc*-*-*]
8469 || [istarget aarch64*-*-*]
8470 || [check_effective_target_arm32]
8471 || ([istarget mips*-*-*]
8472 && ([et-is-effective-target mips_msa]
8473 || [et-is-effective-target mips_loongson_mmi]))
8474 || ([istarget s390*-*-*]
8475 && [check_effective_target_s390_vx])
8476 || [istarget amdgcn-*-*] }}]
8479 # Return 1 if the target supports vector int multiplication, 0 otherwise.
8481 proc check_effective_target_vect_int_mult { } {
8482 return [check_cached_effective_target_indexed vect_int_mult {
8483 expr { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
8484 || [istarget i?86-*-*] || [istarget x86_64-*-*]
8485 || [istarget ia64-*-*]
8486 || [istarget aarch64*-*-*]
8487 || ([istarget mips*-*-*]
8488 && [et-is-effective-target mips_msa])
8489 || [check_effective_target_arm32]
8490 || ([istarget s390*-*-*]
8491 && [check_effective_target_s390_vx])
8492 || [istarget amdgcn-*-*] }}]
8495 # Return 1 if the target supports 64 bit hardware vector
8496 # multiplication of long operands with a long result, 0 otherwise.
8498 # This can change for different subtargets so do not cache the result.
8500 proc check_effective_target_vect_long_mult { } {
8501 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
8502 || (([istarget powerpc*-*-*]
8503 && ![istarget powerpc-*-linux*paired*])
8504 && [check_effective_target_ilp32])
8505 || [is-effective-target arm_neon]
8506 || ([istarget sparc*-*-*] && [check_effective_target_ilp32])
8507 || [istarget aarch64*-*-*]
8508 || ([istarget mips*-*-*]
8509 && [et-is-effective-target mips_msa]) } {
8515 verbose "check_effective_target_vect_long_mult: returning $answer" 2
8519 # Return 1 if the target supports vector int modulus, 0 otherwise.
8521 proc check_effective_target_vect_int_mod { } {
8522 return [check_cached_effective_target_indexed vect_int_mod {
8523 expr { ([istarget powerpc*-*-*]
8524 && [check_effective_target_has_arch_pwr10])
8525 || [istarget amdgcn-*-*] }}]
8528 # Return 1 if the target supports vector even/odd elements extraction, 0 otherwise.
8530 proc check_effective_target_vect_extract_even_odd { } {
8531 return [check_cached_effective_target_indexed extract_even_odd {
8532 expr { [istarget aarch64*-*-*]
8533 || [istarget powerpc*-*-*]
8534 || [is-effective-target arm_neon]
8535 || [istarget i?86-*-*] || [istarget x86_64-*-*]
8536 || [istarget ia64-*-*]
8537 || ([istarget mips*-*-*]
8538 && ([et-is-effective-target mips_msa]
8539 || [et-is-effective-target mpaired_single]))
8540 || ([istarget s390*-*-*]
8541 && [check_effective_target_s390_vx]) }}]
8544 # Return 1 if the target supports vector interleaving, 0 otherwise.
8546 proc check_effective_target_vect_interleave { } {
8547 return [check_cached_effective_target_indexed vect_interleave {
8548 expr { [istarget aarch64*-*-*]
8549 || [istarget powerpc*-*-*]
8550 || [is-effective-target arm_neon]
8551 || [istarget i?86-*-*] || [istarget x86_64-*-*]
8552 || [istarget ia64-*-*]
8553 || ([istarget mips*-*-*]
8554 && ([et-is-effective-target mpaired_single]
8555 || [et-is-effective-target mips_msa]))
8556 || ([istarget s390*-*-*]
8557 && [check_effective_target_s390_vx]) }}]
8560 foreach N {2 3 4 8} {
8561 eval [string map [list N $N] {
8562 # Return 1 if the target supports 2-vector interleaving
8563 proc check_effective_target_vect_stridedN { } {
8564 return [check_cached_effective_target_indexed vect_stridedN {
8566 && [check_effective_target_vect_interleave]
8567 && [check_effective_target_vect_extract_even_odd] } {
8570 if { ([istarget arm*-*-*]
8571 || [istarget aarch64*-*-*]) && N >= 2 && N <= 4 } {
8574 if [check_effective_target_vect_fully_masked] {
8583 # Return the list of vector sizes (in bits) that each target supports.
8584 # A vector length of "0" indicates variable-length vectors.
8586 proc available_vector_sizes { } {
8588 if { [istarget aarch64*-*-*] } {
8589 if { [check_effective_target_aarch64_sve] } {
8590 lappend result [aarch64_sve_bits]
8592 lappend result 128 64
8593 } elseif { [istarget arm*-*-*]
8594 && [check_effective_target_arm_neon_ok] } {
8595 lappend result 128 64
8596 } elseif { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
8597 if { [check_avx_available] && ![check_prefer_avx128] } {
8601 if { ![is-effective-target ia32] } {
8605 } elseif { [istarget sparc*-*-*] } {
8607 } elseif { [istarget amdgcn*-*-*] } {
8608 # 6 different lane counts, and 4 element sizes
8609 lappend result 4096 2048 1024 512 256 128 64 32 16 8 4 2
8611 # The traditional default asumption.
8617 # Return 1 if the target supports multiple vector sizes
8619 proc check_effective_target_vect_multiple_sizes { } {
8620 return [expr { [llength [available_vector_sizes]] > 1 }]
8623 # Return true if variable-length vectors are supported.
8625 proc check_effective_target_vect_variable_length { } {
8626 return [expr { [lindex [available_vector_sizes] 0] == 0 }]
8629 # Return 1 if the target supports vectors of 64 bits.
8631 proc check_effective_target_vect64 { } {
8632 return [expr { [lsearch -exact [available_vector_sizes] 64] >= 0 }]
8635 # Return 1 if the target supports vectors of 32 bits.
8637 proc check_effective_target_vect32 { } {
8638 return [expr { [lsearch -exact [available_vector_sizes] 32] >= 0 }]
8641 # Return 1 if the target supports vector copysignf calls.
8643 proc check_effective_target_vect_call_copysignf { } {
8644 return [check_cached_effective_target_indexed vect_call_copysignf {
8645 expr { [istarget i?86-*-*] || [istarget x86_64-*-*]
8646 || [istarget powerpc*-*-*]
8647 || [istarget aarch64*-*-*]
8648 || [istarget amdgcn-*-*] }}]
8651 # Return 1 if the target supports hardware square root instructions.
8653 proc check_effective_target_sqrt_insn { } {
8654 return [check_cached_effective_target sqrt_insn {
8655 expr { [istarget i?86-*-*] || [istarget x86_64-*-*]
8656 || [check_effective_target_powerpc_sqrt]
8657 || [istarget aarch64*-*-*]
8658 || ([istarget arm*-*-*] && [check_effective_target_arm_vfp_ok])
8659 || ([istarget s390*-*-*]
8660 && [check_effective_target_s390_vx])
8661 || [istarget amdgcn-*-*] }}]
8664 # Return any additional options to enable square root intructions.
8666 proc add_options_for_sqrt_insn { flags } {
8667 if { [istarget amdgcn*-*-*] } {
8668 return "$flags -ffast-math"
8670 if { [istarget arm*-*-*] } {
8671 return [add_options_for_arm_vfp "$flags"]
8676 # Return 1 if the target supports vector sqrtf calls.
8678 proc check_effective_target_vect_call_sqrtf { } {
8679 return [check_cached_effective_target_indexed vect_call_sqrtf {
8680 expr { [istarget aarch64*-*-*]
8681 || [istarget i?86-*-*] || [istarget x86_64-*-*]
8682 || ([istarget powerpc*-*-*] && [check_vsx_hw_available])
8683 || ([istarget s390*-*-*]
8684 && [check_effective_target_s390_vx])
8685 || [istarget amdgcn-*-*] }}]
8688 # Return 1 if the target supports vector lrint calls.
8690 proc check_effective_target_vect_call_lrint { } {
8691 set et_vect_call_lrint 0
8692 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
8693 && [check_effective_target_ilp32])
8694 || [istarget amdgcn-*-*] } {
8695 set et_vect_call_lrint 1
8698 verbose "check_effective_target_vect_call_lrint: returning $et_vect_call_lrint" 2
8699 return $et_vect_call_lrint
8702 # Return 1 if the target supports vector btrunc calls.
8704 proc check_effective_target_vect_call_btrunc { } {
8705 return [check_cached_effective_target_indexed vect_call_btrunc {
8706 expr { [istarget aarch64*-*-*]
8707 || [istarget amdgcn-*-*] }}]
8710 # Return 1 if the target supports vector btruncf calls.
8712 proc check_effective_target_vect_call_btruncf { } {
8713 return [check_cached_effective_target_indexed vect_call_btruncf {
8714 expr { [istarget aarch64*-*-*]
8715 || [istarget amdgcn-*-*] }}]
8718 # Return 1 if the target supports vector ceil calls.
8720 proc check_effective_target_vect_call_ceil { } {
8721 return [check_cached_effective_target_indexed vect_call_ceil {
8722 expr { [istarget aarch64*-*-*]
8723 || [istarget amdgcn-*-*] }}]
8726 # Return 1 if the target supports vector ceilf calls.
8728 proc check_effective_target_vect_call_ceilf { } {
8729 return [check_cached_effective_target_indexed vect_call_ceilf {
8730 expr { [istarget aarch64*-*-*]
8731 || [istarget amdgcn-*-*] }}]
8734 # Return 1 if the target supports vector floor calls.
8736 proc check_effective_target_vect_call_floor { } {
8737 return [check_cached_effective_target_indexed vect_call_floor {
8738 expr { [istarget aarch64*-*-*]
8739 || [istarget amdgcn-*-*] }}]
8742 # Return 1 if the target supports vector floorf calls.
8744 proc check_effective_target_vect_call_floorf { } {
8745 return [check_cached_effective_target_indexed vect_call_floorf {
8746 expr { [istarget aarch64*-*-*]
8747 || [istarget amdgcn-*-*] }}]
8750 # Return 1 if the target supports vector lceil calls.
8752 proc check_effective_target_vect_call_lceil { } {
8753 return [check_cached_effective_target_indexed vect_call_lceil {
8754 expr { [istarget aarch64*-*-*] }}]
8757 # Return 1 if the target supports vector lfloor calls.
8759 proc check_effective_target_vect_call_lfloor { } {
8760 return [check_cached_effective_target_indexed vect_call_lfloor {
8761 expr { [istarget aarch64*-*-*] }}]
8764 # Return 1 if the target supports vector nearbyint calls.
8766 proc check_effective_target_vect_call_nearbyint { } {
8767 return [check_cached_effective_target_indexed vect_call_nearbyint {
8768 expr { [istarget aarch64*-*-*] }}]
8771 # Return 1 if the target supports vector nearbyintf calls.
8773 proc check_effective_target_vect_call_nearbyintf { } {
8774 return [check_cached_effective_target_indexed vect_call_nearbyintf {
8775 expr { [istarget aarch64*-*-*] }}]
8778 # Return 1 if the target supports vector round calls.
8780 proc check_effective_target_vect_call_round { } {
8781 return [check_cached_effective_target_indexed vect_call_round {
8782 expr { [istarget aarch64*-*-*] }}]
8785 # Return 1 if the target supports vector roundf calls.
8787 proc check_effective_target_vect_call_roundf { } {
8788 return [check_cached_effective_target_indexed vect_call_roundf {
8789 expr { [istarget aarch64*-*-*] }}]
8792 # Return 1 if the target supports AND, OR and XOR reduction.
8794 proc check_effective_target_vect_logical_reduc { } {
8795 return [expr { [check_effective_target_aarch64_sve]
8796 || [istarget amdgcn-*-*] }]
8799 # Return 1 if the target supports the fold_extract_last optab.
8801 proc check_effective_target_vect_fold_extract_last { } {
8802 return [expr { [check_effective_target_aarch64_sve]
8803 || [istarget amdgcn*-*-*] }]
8806 # Return 1 if the target supports section-anchors
8808 proc check_effective_target_section_anchors { } {
8809 return [check_cached_effective_target section_anchors {
8810 expr { [istarget powerpc*-*-*]
8811 || [istarget arm*-*-*]
8812 || [istarget aarch64*-*-*] }}]
8815 # Return 1 if the target supports atomic operations on "int_128" values.
8817 proc check_effective_target_sync_int_128 { } {
8821 # Return 1 if the target supports atomic operations on "int_128" values
8822 # and can execute them.
8823 # This requires support for both compare-and-swap and true atomic loads.
8825 proc check_effective_target_sync_int_128_runtime { } {
8829 # Return 1 if the target supports atomic operations on "long long".
8831 # Note: 32bit x86 targets require -march=pentium in dg-options.
8832 # Note: 32bit s390 targets require -mzarch in dg-options.
8834 proc check_effective_target_sync_long_long { } {
8835 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
8836 || [istarget aarch64*-*-*]
8837 || [istarget arm*-*-*]
8838 || [istarget alpha*-*-*]
8839 || ([istarget sparc*-*-*] && [check_effective_target_lp64])
8840 || [istarget s390*-*-*] } {
8847 # Return 1 if the target supports popcount on long.
8849 proc check_effective_target_popcountl { } {
8850 return [check_no_messages_and_pattern popcountl "!\\(call" rtl-expand {
8853 return __builtin_popcountl (b);
8858 # Return 1 if the target supports popcount on long long.
8860 proc check_effective_target_popcountll { } {
8861 return [check_no_messages_and_pattern popcountll "!\\(call" rtl-expand {
8862 int foo (long long b)
8864 return __builtin_popcountll (b);
8870 # Return 1 if the target supports popcount on int.
8872 proc check_effective_target_popcount { } {
8873 return [check_no_messages_and_pattern popcount "!\\(call" rtl-expand {
8876 return __builtin_popcount (b);
8881 # Return 1 if the target supports clz on int.
8883 proc check_effective_target_clz { } {
8884 return [check_no_messages_and_pattern clz "!\\(call" rtl-expand {
8887 return __builtin_clz (b);
8892 # Return 1 if the target supports clz on long.
8894 proc check_effective_target_clzl { } {
8895 return [check_no_messages_and_pattern clzl "!\\(call" rtl-expand {
8898 return __builtin_clzl (b);
8903 # Return 1 if the target supports clz on long long.
8905 proc check_effective_target_clzll { } {
8906 return [check_no_messages_and_pattern clzll "!\\(call" rtl-expand {
8907 int foo (long long b)
8909 return __builtin_clzll (b);
8914 # Return 1 if the target supports ctz on int.
8916 proc check_effective_target_ctz { } {
8917 return [check_no_messages_and_pattern ctz "!\\(call" rtl-expand {
8920 return __builtin_ctz (b);
8925 # Return 1 if the target supports ctz on long.
8927 proc check_effective_target_ctzl { } {
8928 return [check_no_messages_and_pattern ctzl "!\\(call" rtl-expand {
8931 return __builtin_ctzl (b);
8936 # Return 1 if the target supports ctz on long long.
8938 proc check_effective_target_ctzll { } {
8939 return [check_no_messages_and_pattern ctzll "!\\(call" rtl-expand {
8940 int foo (long long b)
8942 return __builtin_ctzll (b);
8947 # Return 1 if the target supports atomic operations on "long long"
8948 # and can execute them.
8950 # Note: 32bit x86 targets require -march=pentium in dg-options.
8952 proc check_effective_target_sync_long_long_runtime { } {
8953 if { (([istarget x86_64-*-*] || [istarget i?86-*-*])
8954 && [check_cached_effective_target sync_long_long_available {
8955 check_runtime_nocache sync_long_long_available {
8959 unsigned int eax, ebx, ecx, edx;
8960 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
8961 return !(edx & bit_CMPXCHG8B);
8966 || [istarget aarch64*-*-*]
8967 || [istarget arm*-*-uclinuxfdpiceabi]
8968 || ([istarget arm*-*-linux-*]
8969 && [check_runtime sync_longlong_runtime {
8975 if (sizeof (long long) != 8)
8978 /* Just check for native;
8979 checking for kernel fallback is tricky. */
8980 asm volatile ("ldrexd r0,r1, [%0]"
8981 : : "r" (&l1) : "r0", "r1");
8985 || [istarget alpha*-*-*]
8986 || ([istarget sparc*-*-*]
8987 && [check_effective_target_lp64]
8988 && [check_effective_target_ultrasparc_hw])
8989 || ([istarget powerpc*-*-*] && [check_effective_target_lp64]) } {
8996 # Return 1 if the target supports byte swap instructions.
8998 proc check_effective_target_bswap { } {
8999 return [check_cached_effective_target bswap {
9000 expr { [istarget aarch64*-*-*]
9001 || [istarget alpha*-*-*]
9002 || [istarget i?86-*-*] || [istarget x86_64-*-*]
9003 || [istarget m68k-*-*]
9004 || [istarget powerpc*-*-*]
9005 || [istarget rs6000-*-*]
9006 || [istarget s390*-*-*]
9007 || ([istarget riscv*-*-*]
9008 && [check_no_compiler_messages_nocache riscv_zbb object {
9009 #if __riscv_zbb <= 0
9010 #error ZBB is not enabled
9014 || ([istarget arm*-*-*]
9015 && [check_no_compiler_messages_nocache arm_v6_or_later object {
9017 #error not armv6 or later
9023 # Return 1 if the target supports atomic operations on "int" and "long".
9025 proc check_effective_target_sync_int_long { } {
9026 # This is intentionally powerpc but not rs6000, rs6000 doesn't have the
9027 #
load-reserved/store
-conditional instructions.
9028 return [check_cached_effective_target sync_int_long
{
9029 expr
{ [istarget ia64
-*-*]
9030 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
9031 ||
[istarget aarch64
*-*-*]
9032 ||
[istarget alpha
*-*-*]
9033 ||
[istarget arm
*-*-linux
-*]
9034 ||
[istarget arm
*-*-uclinuxfdpiceabi
]
9035 ||
([istarget arm
*-*-*]
9036 && [check_effective_target_arm_acq_rel
])
9037 ||
[istarget bfin
*-*linux
*]
9038 ||
[istarget hppa
*-*linux
*]
9039 ||
[istarget s390
*-*-*]
9040 ||
[istarget powerpc
*-*-*]
9041 ||
[istarget cris
-*-*]
9042 ||
([istarget sparc
*-*-*] && [check_effective_target_sparc_v9
])
9043 ||
([istarget arc
*-*-*] && [check_effective_target_arc_atomic
])
9044 ||
[check_effective_target_mips_llsc
]
9045 ||
[istarget nvptx
*-*-*]
9049 #
Return 1 if the target supports atomic operations
on "int" and "long" on
9052 proc check_effective_target_sync_int_long_stack
{ } {
9053 return [check_cached_effective_target sync_int_long_stack
{
9054 expr
{ ![istarget nvptx
*-*-*]
9055 && [check_effective_target_sync_int_long
]
9059 #
Return 1 if the target supports atomic operations
on "char" and "short".
9061 proc check_effective_target_sync_char_short
{ } {
9062 # This is intentionally powerpc but not rs6000
, rs6000 doesn
't have the
9063 # load-reserved/store-conditional instructions.
9064 return [check_cached_effective_target sync_char_short {
9065 expr { [istarget aarch64*-*-*]
9066 || [istarget ia64-*-*]
9067 || [istarget i?86-*-*] || [istarget x86_64-*-*]
9068 || [istarget alpha*-*-*]
9069 || [istarget arm*-*-linux-*]
9070 || [istarget arm*-*-uclinuxfdpiceabi]
9071 || ([istarget arm*-*-*]
9072 && [check_effective_target_arm_acq_rel])
9073 || [istarget hppa*-*linux*]
9074 || [istarget s390*-*-*]
9075 || [istarget powerpc*-*-*]
9076 || [istarget cris-*-*]
9077 || ([istarget sparc*-*-*] && [check_effective_target_sparc_v9])
9078 || ([istarget arc*-*-*] && [check_effective_target_arc_atomic])
9079 || [istarget loongarch*-*-*]
9080 || [check_effective_target_mips_llsc] }}]
9083 # Return 1 if the target uses a ColdFire FPU.
9085 proc check_effective_target_coldfire_fpu { } {
9086 return [check_no_compiler_messages coldfire_fpu assembly {
9093 # Return true if this is a uClibc target.
9095 proc check_effective_target_uclibc {} {
9096 return [check_no_compiler_messages uclibc object {
9097 #include <features.h>
9098 #if !defined (__UCLIBC__)
9104 # Return true if this is a uclibc target and if the uclibc feature
9105 # described by __$feature__ is not present.
9107 proc check_missing_uclibc_feature {feature} {
9108 return [check_no_compiler_messages $feature object "
9109 #include <features.h>
9110 #if !defined (__UCLIBC) || defined (__${feature}__)
9116 # Return true if this is a Newlib target.
9118 proc check_effective_target_newlib {} {
9119 return [check_no_compiler_messages newlib object {
9124 # Return true if GCC was configured with --enable-newlib-nano-formatted-io
9125 proc check_effective_target_newlib_nano_io { } {
9126 return [check_configured_with "--enable-newlib-nano-formatted-io"]
9129 # Some newlib versions don't provide a frexpl and instead depend
9130 #
on frexp to implement long double conversions in their printf
-like
9131 # functions. This leads to broken results. Detect such versions here.
9133 proc check_effective_target_newlib_broken_long_double_io
{} {
9134 if { [is
-effective
-target newlib
] && ![is
-effective
-target frexpl
] } {
9140 #
Return true
if this is NOT a Bionic target.
9142 proc check_effective_target_non_bionic
{} {
9143 return [check_no_compiler_messages non_bionic object
{
9145 #
if defined
(__BIONIC__
)
9151 #
Return true
if this target has error.h header.
9153 proc check_effective_target_error_h
{} {
9154 return [check_no_compiler_messages error_h object
{
9159 #
Return true
if this target has tgmath.h header.
9161 proc check_effective_target_tgmath_h
{} {
9162 return [check_no_compiler_messages tgmath_h object
{
9167 #
Return true
if target
's libc supports complex functions.
9169 proc check_effective_target_libc_has_complex_functions {} {
9170 return [check_no_compiler_messages libc_has_complex_functions object {
9171 #include <complex.h>
9176 # (a) an error of a few ULP is expected in string to floating-point
9177 # conversion functions; and
9178 # (b) overflow is not always detected correctly by those functions.
9180 proc check_effective_target_lax_strtofp {} {
9181 # By default, assume that all uClibc targets suffer from this.
9182 return [check_effective_target_uclibc]
9185 # Return 1 if this is a target for which wcsftime is a dummy
9186 # function that always returns 0.
9188 proc check_effective_target_dummy_wcsftime {} {
9189 # By default, assume that all uClibc targets suffer from this.
9190 return [check_effective_target_uclibc]
9193 # Return 1 if constructors with initialization priority arguments are
9194 # supposed on this target.
9196 proc check_effective_target_init_priority {} {
9197 return [check_no_compiler_messages init_priority assembly "
9198 void f() __attribute__((constructor (1000)));
9203 # Return 1 if the target matches the effective target 'arg', 0 otherwise.
9204 # This can be used with any check_* proc that takes no argument and
9205 # returns only 1 or 0. It could be used with check_* procs that take
9206 # arguments with keywords that pass particular arguments.
9208 proc is-effective-target { arg } {
9211 if { ![info exists et_index] } {
9212 # Initialize the effective target index that is used in some
9213 # check_effective_target_* procs.
9216 if { [info procs check_effective_target_${arg}] != [list] } {
9217 set selected [check_effective_target_${arg}]
9220 "vmx_hw" { set selected [check_vmx_hw_available] }
9221 "vsx_hw" { set selected [check_vsx_hw_available] }
9222 "p8vector_hw" { set selected [check_p8vector_hw_available] }
9223 "p9vector_hw" { set selected [check_p9vector_hw_available] }
9224 "p9modulo_hw" { set selected [check_p9modulo_hw_available] }
9225 "power10_hw" { set selected [check_power10_hw_available] }
9226 "ppc_float128_sw" { set selected [check_ppc_float128_sw_available] }
9227 "ppc_float128_hw" { set selected [check_ppc_float128_hw_available] }
9228 "ppc_recip_hw" { set selected [check_ppc_recip_hw_available] }
9229 "ppc_cpu_supports_hw" { set selected [check_ppc_cpu_supports_hw_available] }
9230 "ppc_mma_hw" { set selected [check_ppc_mma_hw_available] }
9231 "dfp_hw" { set selected [check_dfp_hw_available] }
9232 "htm_hw" { set selected [check_htm_hw_available] }
9233 "named_sections" { set selected [check_named_sections_available] }
9234 "gc_sections" { set selected [check_gc_sections_available] }
9235 "cxa_atexit" { set selected [check_cxa_atexit_available] }
9236 default { error "unknown effective target keyword `$arg'" }
9240 verbose
"is-effective-target: $arg $selected" 2
9244 #
Return 1 if the
argument is an effective
-target keyword
, 0 otherwise.
9246 proc is
-effective
-target
-keyword
{ arg } {
9247 if { [info procs check_effective_target_$
{arg}] != [list
] } {
9250 # These have different names
for their check_
* procs.
9252 "vmx_hw" { return 1 }
9253 "vsx_hw" { return 1 }
9254 "p8vector_hw" { return 1 }
9255 "p9vector_hw" { return 1 }
9256 "p9modulo_hw" { return 1 }
9257 "power10_hw" { return 1 }
9258 "ppc_float128_sw" { return 1 }
9259 "ppc_float128_hw" { return 1 }
9260 "ppc_recip_hw" { return 1 }
9261 "ppc_mma_hw" { return 1 }
9262 "dfp_hw" { return 1 }
9263 "htm_hw" { return 1 }
9264 "named_sections" { return 1 }
9265 "gc_sections" { return 1 }
9266 "cxa_atexit" { return 1 }
9267 "ppc_cpu_supports_hw" { return 1 }
9268 default
{ return 0 }
9273 #
Execute tests
for all targets in EFFECTIVE_TARGETS list.
Set et_index to
9274 # indicate what target is currently being processed. This is
for
9275 # the vectorizer tests
, e.g. vect_int
, to keep track what target supports
9278 proc et
-dg
-runtest
{ runtest testcases flags default
-extra
-flags
} {
9279 global dg
-do-what
-default
9280 global EFFECTIVE_TARGETS
9283 if { [llength $EFFECTIVE_TARGETS
] > 0 } {
9284 foreach target $EFFECTIVE_TARGETS
{
9285 set target_flags $flags
9286 set dg
-do-what
-default
compile
9287 set et_index
[lsearch
-exact $EFFECTIVE_TARGETS $target
]
9288 if { [info procs add_options_for_$
{target
}] != [list
] } {
9289 set target_flags
[add_options_for_$
{target
} "$flags"]
9291 if { [info procs check_effective_target_$
{target
}_runtime
]
9292 != [list
] && [check_effective_target_$
{target
}_runtime
] } {
9293 set dg
-do-what
-default run
9295 $runtest $testcases $target_flags $
{default
-extra
-flags
}
9299 $runtest $testcases $flags $
{default
-extra
-flags
}
9303 #
Return 1 if a target matches the target in EFFECTIVE_TARGETS at index
9304 # et_index
, 0 otherwise.
9306 proc et
-is
-effective
-target
{ target
} {
9307 global EFFECTIVE_TARGETS
9310 if { [info exists EFFECTIVE_TARGETS
] } {
9311 if { [llength $EFFECTIVE_TARGETS
] > $et_index
9312 && [lindex $EFFECTIVE_TARGETS $et_index
] == $target
} {
9318 return [check_effective_target_$
{target
}]
9322 #
Return 1 if target default to short enums
9324 proc check_effective_target_short_enums
{ } {
9325 return [check_no_compiler_messages short_enums assembly
{
9327 int s
[sizeof
(enum foo
) == 1 ?
1 : -1];
9331 #
Return 1 if target supports merging string constants at link time.
9333 proc check_effective_target_string_merging
{ } {
9334 return [check_no_messages_and_pattern string_merging \
9335 "rodata\\.str" assembly {
9336 const char
*var
= "String";
9340 #
Return 1 if target has the basic signed and unsigned types in
9341 #
<stdint.h
>, 0 otherwise. This will be obsolete when GCC ensures a
9342 # working
<stdint.h
> for all targets.
9344 proc check_effective_target_stdint_types
{ } {
9345 return [check_no_compiler_messages stdint_types assembly
{
9347 int8_t a
; int16_t b
; int32_t c
; int64_t d
;
9348 uint8_t e
; uint16_t f
; uint32_t g
; uint64_t h
;
9352 # Like check_effective_target_stdint_types
, but test what happens when
9353 #
-mbig
-endian is passed. This test only makes sense
on targets that
9354 # support
-mbig
-endian
; it will fail elsewhere.
9356 proc check_effective_target_stdint_types_mbig_endian
{ } {
9357 return [check_no_compiler_messages stdint_types_mbig_endian assembly
{
9359 int8_t a
; int16_t b
; int32_t c
; int64_t d
;
9360 uint8_t e
; uint16_t f
; uint32_t g
; uint64_t h
;
9364 #
Return 1 if target has the basic signed and unsigned types in
9365 #
<inttypes.h
>, 0 otherwise. This is
for tests that GCC
's notions of
9366 # these types agree with those in the header, as some systems have
9367 # only <inttypes.h>.
9369 proc check_effective_target_inttypes_types { } {
9370 return [check_no_compiler_messages inttypes_types assembly {
9371 #include <inttypes.h>
9372 int8_t a; int16_t b; int32_t c; int64_t d;
9373 uint8_t e; uint16_t f; uint32_t g; uint64_t h;
9377 # Return 1 if programs are intended to be run on a simulator
9378 # (i.e. slowly) rather than hardware (i.e. fast).
9380 proc check_effective_target_simulator { } {
9382 # All "src/sim" simulators set this one.
9383 if [board_info target exists is_simulator] {
9384 return [board_info target is_simulator]
9387 # The "sid" simulators don't
set that one
, but at least they
set
9389 if [board_info target
exists slow_simulator
] {
9390 return [board_info target slow_simulator
]
9396 #
Return 1 if programs are intended to be run
on hardware rather than
9399 proc check_effective_target_hw
{ } {
9401 # All
"src/sim" simulators set this one.
9402 if [board_info target
exists is_simulator
] {
9403 if [board_info target is_simulator
] {
9410 # The
"sid" simulators don't set that one, but at least they set
9412 if [board_info target
exists slow_simulator
] {
9413 if [board_info target slow_simulator
] {
9423 #
Return 1 if the target is a VxWorks kernel.
9425 proc check_effective_target_vxworks_kernel
{ } {
9426 return [check_no_compiler_messages vxworks_kernel assembly
{
9427 #
if !defined __vxworks || defined __RTP__
9433 #
Return 1 if the target is a VxWorks RTP.
9435 proc check_effective_target_vxworks_rtp
{ } {
9436 return [check_no_compiler_messages vxworks_rtp assembly
{
9437 #
if !defined __vxworks ||
!defined __RTP__
9443 #
Return 1 if the target is expected to provide wide character support.
9445 proc check_effective_target_wchar
{ } {
9446 if {[check_missing_uclibc_feature UCLIBC_HAS_WCHAR
]} {
9449 return [check_no_compiler_messages wchar assembly
{
9454 #
Return 1 if the target has
<pthread.h
>.
9456 proc check_effective_target_pthread_h
{ } {
9457 return [check_no_compiler_messages pthread_h assembly
{
9458 #
include <pthread.h
>
9462 #
Return 1 if the target can truncate a file from a file
-descriptor
,
9463 # as used by libgfortran
/io
/unix.c
:fd_truncate
; i.e. ftruncate or
9464 # chsize. We test
for a trivially functional truncation
; no stubs.
9465 # As libgfortran uses _FILE_OFFSET_BITS
64, we
do too
; it
'll cause a
9466 # different function to be used.
9468 proc check_effective_target_fd_truncate { } {
9470 #define _FILE_OFFSET_BITS 64
9477 FILE *f = fopen ("tst.tmp", "wb");
9479 const char t[] = "test writing more than ten characters";
9483 write (fd, t, sizeof (t) - 1);
9485 if (ftruncate (fd, 10) != 0)
9494 f = fopen ("tst.tmp", "rb");
9495 if (fread (s, 1, sizeof (s), f) != 10 || strncmp (s, t, 10) != 0)
9503 if { [check_runtime ftruncate $prog] } {
9507 regsub "ftruncate" $prog "chsize" prog
9508 return [check_runtime chsize $prog]
9511 # Add to FLAGS all the target-specific flags needed to enable
9512 # full IEEE compliance mode.
9514 proc add_options_for_ieee { flags } {
9515 if { [istarget alpha*-*-*]
9516 || [istarget sh*-*-*] } {
9517 return "$flags -mieee"
9519 if { [istarget rx-*-*] } {
9520 return "$flags -mnofpu"
9525 if {![info exists flags_to_postpone]} {
9526 set flags_to_postpone ""
9529 # Add to FLAGS the flags needed to enable functions to bind locally
9530 # when using pic/PIC passes in the testsuite.
9531 proc add_options_for_bind_pic_locally { flags } {
9532 global flags_to_postpone
9534 # Instead of returning 'flags
' with the -fPIE or -fpie appended, we save it
9535 # in 'flags_to_postpone
' and append it later in gcc_target_compile procedure in
9536 # order to make sure that the multilib_flags doesn't override this.
9538 if {[check_no_compiler_messages using_pic2 assembly
{
9543 set flags_to_postpone
"-fPIE"
9546 if {[check_no_compiler_messages using_pic1 assembly
{
9551 set flags_to_postpone
"-fpie"
9557 # Add to FLAGS the flags needed to enable
64-bit vectors.
9559 proc add_options_for_double_vectors
{ flags
} {
9560 if [is
-effective
-target arm_neon_ok
] {
9561 return "$flags -mvectorize-with-neon-double"
9567 # Add to FLAGS the flags needed to
define the STACK_SIZE macro.
9569 proc add_options_for_stack_size
{ flags
} {
9570 if [is
-effective
-target stack_size
] {
9571 set stack_size
[dg
-effective
-target
-value stack_size
]
9572 return "$flags -DSTACK_SIZE=$stack_size"
9578 #
Return 1 if the target provides a full C99 runtime.
9580 proc check_effective_target_c99_runtime
{ } {
9581 return [check_cached_effective_target c99_runtime
{
9584 set file
[open
"$srcdir/gcc.dg/builtins-config.h"]
9585 set contents
[read $file
]
9588 #ifndef HAVE_C99_RUNTIME
9589 #error
!HAVE_C99_RUNTIME
9592 check_no_compiler_messages_nocache c99_runtime assembly $contents
9596 #
Return 1 if the target provides the D runtime.
9598 proc check_effective_target_d_runtime
{ } {
9599 return [check_no_compiler_messages d_runtime executable
{
9603 extern
(C
) int main
() {
9609 #
Return 1 if the target provides the D standard library.
9611 proc check_effective_target_d_runtime_has_std_library
{ } {
9612 return [check_no_compiler_messages d_runtime_has_std_library executable
{
9616 extern
(C
) int main
() {
9618 real function
(real
) pcos
= &cos;
9624 #
Return 1 if target wchar_t is at least
4 bytes.
9626 proc check_effective_target_4byte_wchar_t
{ } {
9627 return [check_no_compiler_messages
4byte_wchar_t object
{
9628 int dummy
[sizeof
(__WCHAR_TYPE__
) >= 4 ?
1 : -1];
9632 #
Return 1 if the target supports automatic stack alignment.
9634 proc check_effective_target_automatic_stack_alignment
{ } {
9635 # Ordinarily x86 supports automatic stack alignment ...
9636 if { [istarget i?
86*-*-*] ||
[istarget x86_64
-*-*] } then {
9637 if { [istarget
*-*-mingw
*] ||
[istarget
*-*-cygwin
*] } {
9638 # ... except Win64 SEH doesn
't. Succeed for Win32 though.
9639 return [check_effective_target_ilp32];
9646 # Return true if we are compiling for AVX target.
9648 proc check_avx_available { } {
9649 if { [check_no_compiler_messages avx_available assembly {
9659 # Return true if we are compiling for AVX2 target.
9661 proc check_avx2_available { } {
9662 if { [check_no_compiler_messages avx2_available assembly {
9672 # Return true if we are compiling for SSSE3 target.
9674 proc check_ssse3_available { } {
9675 if { [check_no_compiler_messages sse3a_available assembly {
9685 # Return true if 32- and 16-bytes vectors are available.
9687 proc check_effective_target_vect_sizes_32B_16B { } {
9688 return [expr { [available_vector_sizes] == [list 256 128] }]
9691 # Return true if 16- and 8-bytes vectors are available.
9693 proc check_effective_target_vect_sizes_16B_8B { } {
9694 if { [check_avx_available]
9695 || [is-effective-target arm_neon]
9696 || [istarget aarch64*-*-*] } {
9704 # Return true if 128-bits vectors are preferred even if 256-bits vectors
9707 proc check_prefer_avx128 { } {
9708 if ![check_avx_available] {
9711 return [check_no_messages_and_pattern avx_explicit "xmm" assembly {
9712 float a[1024],b[1024],c[1024];
9713 void foo (void) { int i; for (i = 0; i < 1024; i++) a[i]=b[i]+c[i];}
9714 } "-O2 -ftree-vectorize"]
9718 # Return 1 if avx512fp16 instructions can be compiled.
9720 proc check_effective_target_avx512fp16 { } {
9721 return [check_no_compiler_messages avx512fp16 object {
9724 asm volatile ("vmovw %edi, %xmm0");
9726 } "-O2 -mavx512fp16" ]
9729 # Return 1 if avx512f instructions can be compiled.
9731 proc check_effective_target_avx512f { } {
9732 return [check_no_compiler_messages avx512f object {
9733 typedef double __m512d __attribute__ ((__vector_size__ (64)));
9734 typedef double __m128d __attribute__ ((__vector_size__ (16)));
9736 __m512d _mm512_add (__m512d a)
9738 return __builtin_ia32_addpd512_mask (a, a, a, 1, 4);
9741 __m128d _mm128_add (__m128d a)
9743 return __builtin_ia32_addsd_round (a, a, 8);
9746 __m128d _mm128_getmant (__m128d a)
9748 return __builtin_ia32_getmantsd_round (a, a, 0, 8);
9753 # Return 1 if avx instructions can be compiled.
9755 proc check_effective_target_avx { } {
9756 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
9759 return [check_no_compiler_messages avx object {
9760 void _mm256_zeroall (void)
9762 __builtin_ia32_vzeroall ();
9767 # Return 1 if avx2 instructions can be compiled.
9768 proc check_effective_target_avx2 { } {
9769 return [check_no_compiler_messages avx2 object {
9770 typedef long long __v4di __attribute__ ((__vector_size__ (32)));
9772 mm256_is32_andnotsi256 (__v4di __X, __v4di __Y)
9774 return __builtin_ia32_andnotsi256 (__X, __Y);
9779 # Return 1 if avxvnni instructions can be compiled.
9780 proc check_effective_target_avxvnni { } {
9781 return [check_no_compiler_messages avxvnni object {
9782 typedef int __v8si __attribute__ ((__vector_size__ (32)));
9784 _mm256_dpbusd_epi32 (__v8si __A, __v8si __B, __v8si __C)
9786 return __builtin_ia32_vpdpbusd_v8si (__A, __B, __C);
9791 # Return 1 if avxifma instructions can be compiled.
9792 proc check_effective_target_avxifma { } {
9793 return [check_no_compiler_messages avxifma object {
9794 typedef long long __v4di __attribute__ ((__vector_size__ (32)));
9796 _mm256_maddlo_epu64 (__v4di __A, __v4di __B, __v4di __C)
9798 return __builtin_ia32_vpmadd52luq256 (__A, __B, __C);
9803 # Return 1 if avxvnniint8 instructions can be compiled.
9804 proc check_effective_target_avxvnniint8 { } {
9805 return [check_no_compiler_messages avxvnniint8 object {
9806 typedef int __v8si __attribute__ ((__vector_size__ (32)));
9808 _mm256_dpbssd_epi32 (__v8si __A, __v8si __B, __v8si __C)
9810 return __builtin_ia32_vpdpbssd256 (__A, __B, __C);
9812 } "-O0 -mavxvnniint8" ]
9815 # Return 1 if avxneconvert instructions can be compiled.
9816 proc check_effective_target_avxneconvert { } {
9817 return [check_no_compiler_messages avxneconvert object {
9818 typedef float __m128 __attribute__ ((__vector_size__ (16), __may_alias__));
9820 _mm_bcstnebf16_ps (const void *__P)
9822 return (__m128) __builtin_ia32_vbcstnebf162ps128 ((const __bf16 *) __P);
9824 } "-O0 -mavxneconvert" ]
9827 # Return 1 if cmpccxadd instructions can be compiled.
9828 proc check_effective_target_cmpccxadd { } {
9829 return [check_no_compiler_messages cmpccxadd object {
9830 int _cmpccxadd_epi32 (int *__A, int __B, int __C, const int __D)
9832 return (int)__builtin_ia32_cmpccxadd (__A, __B, __C, 1);
9837 # Return 1 if raoint instructions can be compiled.
9838 proc check_effective_target_raoint { } {
9839 return [check_no_compiler_messages raoint object {
9841 _aadd_si32 (int *__A, int __B)
9843 return __builtin_ia32_aadd32((int *)__A, __B);
9848 # Return 1 if amx-complex instructions can be compiled.
9849 proc check_effective_target_amx_complex { } {
9850 return [check_no_compiler_messages amx_complex object {
9854 __asm__ volatile ("tcmmimfp16ps\t%%tmm1, %%tmm2, %%tmm3" ::);
9859 # Return 1 if avxvnniint16 instructions can be compiled.
9860 proc check_effective_target_avxvnniint16 { } {
9861 return [check_no_compiler_messages avxvnniint16 object {
9862 typedef int __v8si __attribute__ ((__vector_size__ (32)));
9864 _mm256_dpwsud_avx_epi32 (__v8si __A, __v8si __B, __v8si __C)
9866 return __builtin_ia32_vpdpwsud256 (__A, __B, __C);
9868 } "-O0 -mavxvnniint16" ]
9871 # Return 1 if sm3 instructions can be compiled.
9872 proc check_effective_target_sm3 { } {
9873 return [check_no_compiler_messages sm3 object {
9874 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
9875 typedef int __v4si __attribute__ ((__vector_size__ (16)));
9877 _mm_sm3msg1_epi32 (__m128i __A, __m128i __B, __m128i __C)
9879 return (__m128i) __builtin_ia32_vsm3msg1 ((__v4si) __A,
9886 # Return 1 if sse instructions can be compiled.
9887 proc check_effective_target_sse { } {
9888 return [check_no_compiler_messages sse object {
9891 __builtin_ia32_stmxcsr ();
9897 # Return 1 if sse2 instructions can be compiled.
9898 proc check_effective_target_sse2 { } {
9899 return [check_no_compiler_messages sse2 object {
9900 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
9902 __m128i _mm_srli_si128 (__m128i __A, int __N)
9904 return (__m128i)__builtin_ia32_psrldqi128 (__A, 8);
9909 # Return 1 if sse4.1 instructions can be compiled.
9910 proc check_effective_target_sse4 { } {
9911 return [check_no_compiler_messages sse4.1 object {
9912 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
9913 typedef int __v4si __attribute__ ((__vector_size__ (16)));
9915 __m128i _mm_mullo_epi32 (__m128i __X, __m128i __Y)
9917 return (__m128i) __builtin_ia32_pmulld128 ((__v4si)__X,
9923 # Return 1 if F16C instructions can be compiled.
9925 proc check_effective_target_f16c { } {
9926 return [check_no_compiler_messages f16c object {
9927 #include "immintrin.h"
9929 foo (unsigned short val)
9931 return _cvtsh_ss (val);
9936 proc check_effective_target_ms_hook_prologue { } {
9937 if { [check_no_compiler_messages ms_hook_prologue object {
9938 void __attribute__ ((__ms_hook_prologue__)) foo ();
9946 # Return 1 if 3dnow instructions can be compiled.
9947 proc check_effective_target_3dnow { } {
9948 return [check_no_compiler_messages 3dnow object {
9949 typedef int __m64 __attribute__ ((__vector_size__ (8)));
9950 typedef float __v2sf __attribute__ ((__vector_size__ (8)));
9952 __m64 _m_pfadd (__m64 __A, __m64 __B)
9954 return (__m64) __builtin_ia32_pfadd ((__v2sf)__A, (__v2sf)__B);
9959 # Return 1 if sse3 instructions can be compiled.
9960 proc check_effective_target_sse3 { } {
9961 return [check_no_compiler_messages sse3 object {
9962 typedef double __m128d __attribute__ ((__vector_size__ (16)));
9963 typedef double __v2df __attribute__ ((__vector_size__ (16)));
9965 __m128d _mm_addsub_pd (__m128d __X, __m128d __Y)
9967 return (__m128d) __builtin_ia32_addsubpd ((__v2df)__X, (__v2df)__Y);
9972 # Return 1 if ssse3 instructions can be compiled.
9973 proc check_effective_target_ssse3 { } {
9974 return [check_no_compiler_messages ssse3 object {
9975 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
9976 typedef int __v4si __attribute__ ((__vector_size__ (16)));
9978 __m128i _mm_abs_epi32 (__m128i __X)
9980 return (__m128i) __builtin_ia32_pabsd128 ((__v4si)__X);
9985 # Return 1 if aes instructions can be compiled.
9986 proc check_effective_target_aes { } {
9987 return [check_no_compiler_messages aes object {
9988 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
9989 typedef long long __v2di __attribute__ ((__vector_size__ (16)));
9991 __m128i _mm_aesimc_si128 (__m128i __X)
9993 return (__m128i) __builtin_ia32_aesimc128 ((__v2di)__X);
9998 # Return 1 if vaes instructions can be compiled.
9999 proc check_effective_target_vaes { } {
10000 return [check_no_compiler_messages vaes object {
10001 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
10002 typedef long long __v2di __attribute__ ((__vector_size__ (16)));
10004 __m128i _mm_aesimc_si128 (__m128i __X)
10006 return (__m128i) __builtin_ia32_aesimc128 ((__v2di)__X);
10008 } "-O2 -maes -mavx" ]
10011 # Return 1 if pclmul instructions can be compiled.
10012 proc check_effective_target_pclmul { } {
10013 return [check_no_compiler_messages pclmul object {
10014 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
10015 typedef long long __v2di __attribute__ ((__vector_size__ (16)));
10017 __m128i pclmulqdq_test (__m128i __X, __m128i __Y)
10019 return (__m128i) __builtin_ia32_pclmulqdq128 ((__v2di)__X,
10026 # Return 1 if vpclmul instructions can be compiled.
10027 proc check_effective_target_vpclmul { } {
10028 return [check_no_compiler_messages vpclmul object {
10029 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
10030 typedef long long __v2di __attribute__ ((__vector_size__ (16)));
10032 __m128i pclmulqdq_test (__m128i __X, __m128i __Y)
10034 return (__m128i) __builtin_ia32_pclmulqdq128 ((__v2di)__X,
10038 } "-O2 -mpclmul -mavx" ]
10041 # Return 1 if sse4a instructions can be compiled.
10042 proc check_effective_target_sse4a { } {
10043 return [check_no_compiler_messages sse4a object {
10044 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
10045 typedef long long __v2di __attribute__ ((__vector_size__ (16)));
10047 __m128i _mm_insert_si64 (__m128i __X,__m128i __Y)
10049 return (__m128i) __builtin_ia32_insertq ((__v2di)__X, (__v2di)__Y);
10054 # Return 1 if fma4 instructions can be compiled.
10055 proc check_effective_target_fma4 { } {
10056 return [check_no_compiler_messages fma4 object {
10057 typedef float __m128 __attribute__ ((__vector_size__ (16)));
10058 typedef float __v4sf __attribute__ ((__vector_size__ (16)));
10059 __m128 _mm_macc_ps(__m128 __A, __m128 __B, __m128 __C)
10061 return (__m128) __builtin_ia32_vfmaddps ((__v4sf)__A,
10068 # Return 1 if fma instructions can be compiled.
10069 proc check_effective_target_fma { } {
10070 return [check_no_compiler_messages fma object {
10071 typedef float __m128 __attribute__ ((__vector_size__ (16)));
10072 typedef float __v4sf __attribute__ ((__vector_size__ (16)));
10073 __m128 _mm_macc_ps(__m128 __A, __m128 __B, __m128 __C)
10075 return (__m128) __builtin_ia32_vfmaddps ((__v4sf)__A,
10082 # Return 1 if xop instructions can be compiled.
10083 proc check_effective_target_xop { } {
10084 return [check_no_compiler_messages xop object {
10085 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
10086 typedef short __v8hi __attribute__ ((__vector_size__ (16)));
10087 __m128i _mm_maccs_epi16(__m128i __A, __m128i __B, __m128i __C)
10089 return (__m128i) __builtin_ia32_vpmacssww ((__v8hi)__A,
10096 # Return 1 if lzcnt instruction can be compiled.
10097 proc check_effective_target_lzcnt { } {
10098 return [check_no_compiler_messages lzcnt object {
10099 unsigned short _lzcnt (unsigned short __X)
10101 return __builtin_clzs (__X);
10106 # Return 1 if bmi instructions can be compiled.
10107 proc check_effective_target_bmi { } {
10108 return [check_no_compiler_messages bmi object {
10109 unsigned int __bextr_u32 (unsigned int __X, unsigned int __Y)
10111 return __builtin_ia32_bextr_u32 (__X, __Y);
10116 # Return 1 if ADX instructions can be compiled.
10117 proc check_effective_target_adx { } {
10118 return [check_no_compiler_messages adx object {
10120 _adxcarry_u32 (unsigned char __CF, unsigned int __X,
10121 unsigned int __Y, unsigned int *__P)
10123 return __builtin_ia32_addcarryx_u32 (__CF, __X, __Y, __P);
10128 # Return 1 if rtm instructions can be compiled.
10129 proc check_effective_target_rtm { } {
10130 return [check_no_compiler_messages rtm object {
10134 return __builtin_ia32_xend ();
10139 # Return 1 if avx512vl instructions can be compiled.
10140 proc check_effective_target_avx512vl { } {
10141 return [check_no_compiler_messages avx512vl object {
10142 typedef long long __v4di __attribute__ ((__vector_size__ (32)));
10144 mm256_and_epi64 (__v4di __X, __v4di __Y)
10147 return __builtin_ia32_pandq256_mask (__X, __Y, __W, -1);
10152 # Return 1 if avx512cd instructions can be compiled.
10153 proc check_effective_target_avx512cd { } {
10154 return [check_no_compiler_messages avx512cd_trans object {
10155 typedef long long __v8di __attribute__ ((__vector_size__ (64)));
10157 _mm512_conflict_epi64 (__v8di __W, __v8di __A)
10159 return (__v8di) __builtin_ia32_vpconflictdi_512_mask ((__v8di) __A,
10163 } "-Wno-psabi -mavx512cd" ]
10166 # Return 1 if avx512er instructions can be compiled.
10167 proc check_effective_target_avx512er { } {
10168 return [check_no_compiler_messages avx512er_trans object {
10169 typedef float __v16sf __attribute__ ((__vector_size__ (64)));
10171 mm512_exp2a23_ps (__v16sf __X)
10173 return __builtin_ia32_exp2ps_mask (__X, __X, -1, 4);
10175 } "-Wno-psabi -mavx512er" ]
10178 # Return 1 if sha instructions can be compiled.
10179 proc check_effective_target_sha { } {
10180 return [check_no_compiler_messages sha object {
10181 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
10182 typedef int __v4si __attribute__ ((__vector_size__ (16)));
10184 __m128i _mm_sha1msg1_epu32 (__m128i __X, __m128i __Y)
10186 return (__m128i) __builtin_ia32_sha1msg1 ((__v4si)__X,
10192 # Return 1 if avx512dq instructions can be compiled.
10193 proc check_effective_target_avx512dq { } {
10194 return [check_no_compiler_messages avx512dq object {
10195 typedef long long __v8di __attribute__ ((__vector_size__ (64)));
10197 _mm512_mask_mullo_epi64 (__v8di __W, __v8di __A, __v8di __B)
10199 return (__v8di) __builtin_ia32_pmullq512_mask ((__v8di) __A,
10207 # Return 1 if avx512bw instructions can be compiled.
10208 proc check_effective_target_avx512bw { } {
10209 return [check_no_compiler_messages avx512bw object {
10210 typedef short __v32hi __attribute__ ((__vector_size__ (64)));
10212 _mm512_mask_mulhrs_epi16 (__v32hi __W, __v32hi __A, __v32hi __B)
10214 return (__v32hi) __builtin_ia32_pmulhrsw512_mask ((__v32hi) __A,
10222 # Return 1 if -Wa,-march=+noavx512bw is supported.
10223 proc check_effective_target_assembler_march_noavx512bw {} {
10224 if { [istarget i?86*-*-*] || [istarget x86_64*-*-*] } {
10225 return [check_no_compiler_messages assembler_march_noavx512bw object {
10227 } "-mno-avx512bw -Wa,-march=+noavx512bw"]
10232 # Return 1 if avx512vp2intersect instructions can be compiled.
10233 proc check_effective_target_avx512vp2intersect { } {
10234 return [check_no_compiler_messages avx512vp2intersect object {
10235 typedef int __v16si __attribute__ ((__vector_size__ (64)));
10236 typedef short __mmask16;
10238 _mm512_2intersect_epi32 (__v16si __A, __v16si __B, __mmask16 *__U,
10241 __builtin_ia32_2intersectd512 (__U, __M, (__v16si) __A, (__v16si) __B);
10243 } "-mavx512vp2intersect" ]
10246 # Return 1 if avx512ifma instructions can be compiled.
10247 proc check_effective_target_avx512ifma { } {
10248 return [check_no_compiler_messages avx512ifma object {
10249 typedef long long __v8di __attribute__ ((__vector_size__ (64)));
10251 _mm512_madd52lo_epu64 (__v8di __X, __v8di __Y, __v8di __Z)
10253 return (__v8di) __builtin_ia32_vpmadd52luq512_mask ((__v8di) __X,
10261 # Return 1 if avx512vbmi instructions can be compiled.
10262 proc check_effective_target_avx512vbmi { } {
10263 return [check_no_compiler_messages avx512vbmi object {
10264 typedef char __v64qi __attribute__ ((__vector_size__ (64)));
10266 _mm512_multishift_epi64_epi8 (__v64qi __X, __v64qi __Y)
10268 return (__v64qi) __builtin_ia32_vpmultishiftqb512_mask ((__v64qi) __X,
10276 # Return 1 if avx512_4fmaps instructions can be compiled.
10277 proc check_effective_target_avx5124fmaps { } {
10278 return [check_no_compiler_messages avx5124fmaps object {
10279 typedef float __v16sf __attribute__ ((__vector_size__ (64)));
10280 typedef float __v4sf __attribute__ ((__vector_size__ (16)));
10283 _mm512_mask_4fmadd_ps (__v16sf __DEST, __v16sf __A, __v16sf __B, __v16sf __C,
10284 __v16sf __D, __v16sf __E, __v4sf *__F)
10286 return (__v16sf) __builtin_ia32_4fmaddps_mask ((__v16sf) __A,
10291 (const __v4sf *) __F,
10295 } "-mavx5124fmaps" ]
10298 # Return 1 if avx512_4vnniw instructions can be compiled.
10299 proc check_effective_target_avx5124vnniw { } {
10300 return [check_no_compiler_messages avx5124vnniw object {
10301 typedef int __v16si __attribute__ ((__vector_size__ (64)));
10302 typedef int __v4si __attribute__ ((__vector_size__ (16)));
10305 _mm512_4dpwssd_epi32 (__v16si __A, __v16si __B, __v16si __C,
10306 __v16si __D, __v16si __E, __v4si *__F)
10308 return (__v16si) __builtin_ia32_vp4dpwssd ((__v16si) __B,
10313 (const __v4si *) __F);
10315 } "-mavx5124vnniw" ]
10318 # Return 1 if avx512_vpopcntdq instructions can be compiled.
10319 proc check_effective_target_avx512vpopcntdq { } {
10320 return [check_no_compiler_messages avx512vpopcntdq object {
10321 typedef int __v16si __attribute__ ((__vector_size__ (64)));
10324 _mm512_popcnt_epi32 (__v16si __A)
10326 return (__v16si) __builtin_ia32_vpopcountd_v16si ((__v16si) __A);
10328 } "-mavx512vpopcntdq" ]
10331 # Return 1 if 128 or 256-bit avx512_vpopcntdq instructions can be compiled.
10332 proc check_effective_target_avx512vpopcntdqvl { } {
10333 return [check_no_compiler_messages avx512vpopcntdqvl object {
10334 typedef int __v8si __attribute__ ((__vector_size__ (32)));
10337 _mm256_popcnt_epi32 (__v8si __A)
10339 return (__v8si) __builtin_ia32_vpopcountd_v8si ((__v8si) __A);
10341 } "-mavx512vpopcntdq -mavx512vl" ]
10344 # Return 1 if gfni instructions can be compiled.
10345 proc check_effective_target_gfni { } {
10346 return [check_no_compiler_messages gfni object {
10347 typedef char __v16qi __attribute__ ((__vector_size__ (16)));
10350 _mm_gf2p8affineinv_epi64_epi8 (__v16qi __A, __v16qi __B, const int __C)
10352 return (__v16qi) __builtin_ia32_vgf2p8affineinvqb_v16qi ((__v16qi) __A,
10359 # Return 1 if avx512vbmi2 instructions can be compiled.
10360 proc check_effective_target_avx512vbmi2 { } {
10361 return [check_no_compiler_messages avx512vbmi2 object {
10362 typedef char __v16qi __attribute__ ((__vector_size__ (16)));
10363 typedef unsigned long long __mmask16;
10366 _mm_mask_compress_epi8 (__v16qi __A, __mmask16 __B, __v16qi __C)
10368 return (__v16qi) __builtin_ia32_compressqi128_mask((__v16qi)__C,
10372 } "-mavx512vbmi2 -mavx512vl" ]
10375 # Return 1 if avx512vbmi2 instructions can be compiled.
10376 proc check_effective_target_avx512vnni { } {
10377 return [check_no_compiler_messages avx512vnni object {
10378 typedef int __v16si __attribute__ ((__vector_size__ (64)));
10381 _mm_mask_compress_epi8 (__v16si __A, __v16si __B, __v16si __C)
10383 return (__v16si) __builtin_ia32_vpdpbusd_v16si ((__v16si)__A,
10387 } "-mavx512vnni -mavx512f" ]
10390 # Return 1 if vaes instructions can be compiled.
10391 proc check_effective_target_avx512vaes { } {
10392 return [check_no_compiler_messages avx512vaes object {
10394 typedef int __v16si __attribute__ ((__vector_size__ (64)));
10397 _mm256_aesdec_epi128 (__v32qi __A, __v32qi __B)
10399 return (__v32qi)__builtin_ia32_vaesdec_v32qi ((__v32qi) __A, (__v32qi) __B);
10404 # Return 1 if amx-tile instructions can be compiled.
10405 proc check_effective_target_amx_tile { } {
10406 return [check_no_compiler_messages amx_tile object {
10410 __asm__ volatile ("tilerelease" ::);
10415 # Return 1 if amx-int8 instructions can be compiled.
10416 proc check_effective_target_amx_int8 { } {
10417 return [check_no_compiler_messages amx_int8 object {
10421 __asm__ volatile ("tdpbssd\t%%tmm1, %%tmm2, %%tmm3" ::);
10426 # Return 1 if amx-bf16 instructions can be compiled.
10427 proc check_effective_target_amx_bf16 { } {
10428 return [check_no_compiler_messages amx_bf16 object {
10432 __asm__ volatile ("tdpbf16ps\t%%tmm1, %%tmm2, %%tmm3" ::);
10437 # Return 1 if amx-fp16 instructions can be compiled.
10438 proc check_effective_target_amx_fp16 { } {
10439 return [check_no_compiler_messages amx_fp16 object {
10443 __asm__ volatile ("tdpfp16ps\t%%tmm1, %%tmm2, %%tmm3" ::);
10448 # Return 1 if vpclmulqdq instructions can be compiled.
10449 proc check_effective_target_vpclmulqdq { } {
10450 return [check_no_compiler_messages vpclmulqdq object {
10451 typedef long long __v4di __attribute__ ((__vector_size__ (32)));
10454 _mm256_clmulepi64_epi128 (__v4di __A, __v4di __B)
10456 return (__v4di) __builtin_ia32_vpclmulqdq_v4di (__A, __B, 0);
10458 } "-mvpclmulqdq -mavx512vl" ]
10461 # Return 1 if avx512_bitalg instructions can be compiled.
10462 proc check_effective_target_avx512bitalg { } {
10463 return [check_no_compiler_messages avx512bitalg object {
10464 typedef short int __v32hi __attribute__ ((__vector_size__ (64)));
10467 _mm512_popcnt_epi16 (__v32hi __A)
10469 return (__v32hi) __builtin_ia32_vpopcountw_v32hi ((__v32hi) __A);
10471 } "-mavx512bitalg" ]
10474 # Return 1 if C wchar_t type is compatible with char16_t.
10476 proc check_effective_target_wchar_t_char16_t_compatible { } {
10477 return [check_no_compiler_messages wchar_t_char16_t object {
10479 __CHAR16_TYPE__ *p16 = &wc;
10480 char t[(((__CHAR16_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
10484 # Return 1 if C wchar_t type is compatible with char32_t.
10486 proc check_effective_target_wchar_t_char32_t_compatible { } {
10487 return [check_no_compiler_messages wchar_t_char32_t object {
10489 __CHAR32_TYPE__ *p32 = &wc;
10490 char t[(((__CHAR32_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
10494 # Return 1 if pow10 function exists.
10496 proc check_effective_target_pow10 { } {
10497 return [check_runtime pow10 {
10507 # Return 1 if frexpl function exists.
10509 proc check_effective_target_frexpl { } {
10510 return [check_runtime frexpl {
10515 x = frexpl (5.0, &y);
10522 # Return 1 if issignaling function exists.
10523 proc check_effective_target_issignaling {} {
10524 return [check_runtime issignaling {
10525 #define _GNU_SOURCE
10529 return issignaling (0.0);
10534 # Return 1 if current options generate DFP instructions, 0 otherwise.
10535 proc check_effective_target_hard_dfp {} {
10536 return [check_no_messages_and_pattern hard_dfp "!adddd3" assembly {
10537 typedef float d64 __attribute__((mode(DD)));
10539 void foo (void) { z = x + y; }
10543 # Return 1 if string.h and wchar.h headers provide C++ requires overloads
10544 # for strchr etc. functions.
10546 proc check_effective_target_correct_iso_cpp_string_wchar_protos { } {
10547 return [check_no_compiler_messages correct_iso_cpp_string_wchar_protos assembly {
10548 #include <string.h>
10550 #if !defined(__cplusplus) \
10551 || !defined(__CORRECT_ISO_CPP_STRING_H_PROTO) \
10552 || !defined(__CORRECT_ISO_CPP_WCHAR_H_PROTO)
10553 ISO C++ correct string.h and wchar.h protos not supported.
10560 # Return 1 if GNU as is used.
10562 proc check_effective_target_gas { } {
10563 global use_gas_saved
10566 if {![info exists use_gas_saved]} {
10567 # Check if the as used by gcc is GNU as.
10568 set options [list "additional_flags=-print-prog-name=as"]
10569 set gcc_as [lindex [${tool}_target_compile "" "" "none" $options] 0]
10570 # Provide /dev/null as input, otherwise gas times out reading from
10572 set status [remote_exec host "$gcc_as" "-v /dev/null"]
10573 set as_output [lindex $status 1]
10574 if { [ string first "GNU" $as_output ] >= 0 } {
10575 # Some Darwin versions have an assembler which is based on an old
10576 # version of GAS (and reports GNU assembler in its -v output) but
10577 #Â but doesn't support many of the modern GAS features.
10578 if { [ string first
"cctools" $as_output ] >= 0 } {
10579 set use_gas_saved
0
10581 set use_gas_saved
1
10584 set use_gas_saved
0
10587 return $use_gas_saved
10590 #
Return 1 if GNU
ld is used.
10592 proc check_effective_target_gld
{ } {
10593 global use_gld_saved
10596 if {![info exists use_gld_saved
]} {
10597 # Check
if the
ld used by gcc is GNU
ld.
10598 set options
[list
"additional_flags=-print-prog-name=ld"]
10599 set gcc_ld
[lindex
[$
{tool
}_target_compile
"" "" "none" $options] 0]
10600 set status [remote_exec host
"$gcc_ld" "--version"]
10601 set ld_output
[lindex $
status 1]
10602 if { [ string first
"GNU" $ld_output ] >= 0 } {
10603 set use_gld_saved
1
10605 set use_gld_saved
0
10608 return $use_gld_saved
10611 #
Return 1 if the compiler has been configure with link
-time optimization
10614 proc check_effective_target_lto
{ } {
10615 if { [istarget
*-*-vxworks
*] } {
10616 # No LTO
on VxWorks
, with kernel modules
10617 # built with partial links
10620 if { [istarget nvptx
-*-*]
10621 ||
[istarget amdgcn
-*-*] } {
10624 return [check_no_compiler_messages lto object
{
10625 void foo
(void
) { }
10629 #
Return 1 if the compiler and linker support incremental link
-time
10632 proc check_effective_target_lto_incremental
{ } {
10633 if ![check_effective_target_lto
] {
10636 return [check_no_compiler_messages lto_incremental executable
{
10637 int main
() { return 0; }
10638 } "-flto -r -nostdlib"]
10641 #
Return 1 if the compiler has been configured with analyzer support.
10643 proc check_effective_target_analyzer
{ } {
10644 return [check_no_compiler_messages analyzer object
{
10645 void foo
(void
) { }
10649 #
Return 1 if -mx32
-maddress
-mode=short can
compile, 0 otherwise.
10651 proc check_effective_target_maybe_x32
{ } {
10652 return [check_no_compiler_messages maybe_x32 object
{
10654 } "-mx32 -maddress-mode=short"]
10657 #
Return 1 if this target supports the
-fsplit
-stack option
, 0
10660 proc check_effective_target_split_stack
{} {
10661 return [check_no_compiler_messages split_stack object
{
10662 void foo
(void
) { }
10666 #
Return 1 if this target supports the
-masm
=intel option
, 0
10669 proc check_effective_target_masm_intel
{} {
10670 return [check_no_compiler_messages masm_intel object
{
10671 extern void abort
(void
);
10675 #
Return 1 if the language
for the compiler under test is C.
10677 proc check_effective_target_c
{ } {
10679 if [string match $tool
"gcc"] {
10685 #
Return 1 if the language
for the compiler under test is C
++.
10687 proc check_effective_target_c
++ { } {
10689 if { [string match $tool
"g++"] || [string match $tool "libstdc++"] } {
10695 set cxx_default
"c++17"
10696 # Check whether the current active language standard supports the features
10697 # of C
++11/C
++14 by checking
for the presence of one of the
-std flags.
10698 # This assumes that the default
for the compiler is $cxx_default
, and that
10699 # there will never be multiple
-std
= arguments
on the command line.
10700 proc check_effective_target_c
++11_only
{ } {
10702 if ![check_effective_target_c
++] {
10705 if [check
-flags
{ { } { } { -std
=c
++0x
-std
=gnu
++0x
-std
=c
++11 -std
=gnu
++11 } }] {
10708 if { $cxx_default
== "c++11" && [check-flags { { } { } { } { -std=* } }] } {
10713 proc check_effective_target_c
++11 { } {
10714 if [check_effective_target_c
++11_only
] {
10717 return [check_effective_target_c
++14]
10719 proc check_effective_target_c
++11_down
{ } {
10720 if ![check_effective_target_c
++] {
10723 return [expr
![check_effective_target_c
++14] ]
10726 proc check_effective_target_c
++14_only
{ } {
10728 if ![check_effective_target_c
++] {
10731 if [check
-flags
{ { } { } { -std
=c
++14 -std
=gnu
++14 -std
=c
++14 -std
=gnu
++14 } }] {
10734 if { $cxx_default
== "c++14" && [check-flags { { } { } { } { -std=* } }] } {
10740 proc check_effective_target_c
++14 { } {
10741 if [check_effective_target_c
++14_only
] {
10744 return [check_effective_target_c
++17]
10746 proc check_effective_target_c
++14_down
{ } {
10747 if ![check_effective_target_c
++] {
10750 return [expr
![check_effective_target_c
++17] ]
10753 proc check_effective_target_c
++98_only
{ } {
10755 if ![check_effective_target_c
++] {
10758 if [check
-flags
{ { } { } { -std
=c
++98 -std
=gnu
++98 -std
=c
++03 -std
=gnu
++03 } }] {
10761 if { $cxx_default
== "c++98" && [check-flags { { } { } { } { -std=* } }] } {
10767 proc check_effective_target_c
++17_only
{ } {
10769 if ![check_effective_target_c
++] {
10772 if [check
-flags
{ { } { } { -std
=c
++17 -std
=gnu
++17 -std
=c
++1z
-std
=gnu
++1z
} }] {
10775 if { $cxx_default
== "c++17" && [check-flags { { } { } { } { -std=* } }] } {
10781 proc check_effective_target_c
++17 { } {
10782 if [check_effective_target_c
++17_only
] {
10785 return [check_effective_target_c
++2a
]
10787 proc check_effective_target_c
++17_down
{ } {
10788 if ![check_effective_target_c
++] {
10791 return [expr
![check_effective_target_c
++2a
] ]
10794 proc check_effective_target_c
++2a_only
{ } {
10796 if ![check_effective_target_c
++] {
10799 if [check
-flags
{ { } { } { -std
=c
++2a
-std
=gnu
++2a
-std
=c
++20 -std
=gnu
++20 } }] {
10802 if { $cxx_default
== "c++20" && [check-flags { { } { } { } { -std=* } }] } {
10807 proc check_effective_target_c
++2a
{ } {
10808 if [check_effective_target_c
++2a_only
] {
10811 return [check_effective_target_c
++23]
10814 proc check_effective_target_c
++20_only
{ } {
10815 return [check_effective_target_c
++2a_only
]
10818 proc check_effective_target_c
++20 { } {
10819 return [check_effective_target_c
++2a
]
10821 proc check_effective_target_c
++20_down
{ } {
10822 if ![check_effective_target_c
++] {
10825 return [expr
![check_effective_target_c
++23] ]
10828 proc check_effective_target_c
++23_only
{ } {
10830 if ![check_effective_target_c
++] {
10833 if [check
-flags
{ { } { } { -std
=c
++23 -std
=gnu
++23 -std
=c
++2b
-std
=gnu
++2b
} }] {
10836 if { $cxx_default
== "c++23" && [check-flags { { } { } { } { -std=* } }] } {
10841 proc check_effective_target_c
++23 { } {
10842 if [check_effective_target_c
++23_only
] {
10845 return [check_effective_target_c
++26]
10848 proc check_effective_target_c
++23_down
{ } {
10849 if ![check_effective_target_c
++] {
10852 return [expr
![check_effective_target_c
++26] ]
10855 proc check_effective_target_c
++26_only
{ } {
10857 if ![check_effective_target_c
++] {
10860 if [check
-flags
{ { } { } { -std
=c
++26 -std
=gnu
++26 -std
=c
++2c
-std
=gnu
++2c
} }] {
10863 if { $cxx_default
== "c++26" && [check-flags { { } { } { } { -std=* } }] } {
10869 proc check_effective_target_c
++26 { } {
10870 return [check_effective_target_c
++26_only
]
10873 # Check
for C
++ Concepts support
, i.e.
-fconcepts flag.
10874 proc check_effective_target_concepts
{ } {
10875 if [check_effective_target_c
++2a
] {
10878 return [check
-flags
{ "" { } { -fconcepts } }]
10881 proc check_effective_target_implicit_constexpr
{ } {
10882 return [check
-flags
{ "" { } { -fimplicit-constexpr } }]
10885 #
Return 1 if expensive testcases should be run.
10887 proc check_effective_target_run_expensive_tests
{ } {
10888 if { [getenv GCC_TEST_RUN_EXPENSIVE
] != "" } {
10894 # Returns
1 if "mempcpy" is available on the target system.
10896 proc check_effective_target_mempcpy
{} {
10897 if { [istarget
*-*-vxworks
*] } {
10898 # VxWorks doesn
't have mempcpy but our way to test fails
10899 # to detect as we're doing partial links
for kernel modules.
10902 return [check_function_available
"mempcpy"]
10905 # Returns
1 if "stpcpy" is available on the target system.
10907 proc check_effective_target_stpcpy
{} {
10908 return [check_function_available
"stpcpy"]
10911 # Returns
1 if "sigsetjmp" is available on the target system.
10912 # Also check
if "__sigsetjmp" is defined since that's what glibc
10915 proc check_effective_target_sigsetjmp
{} {
10916 if { [check_function_available
"sigsetjmp"]
10917 ||
[check_function_available
"__sigsetjmp"] } {
10923 # Check whether the vectorizer tests are supported by the target and
10924 # append additional target
-dependent
compile flags to DEFAULT_VECTCFLAGS.
10925 #
If a port wants to
execute the tests more than once it should append
10926 # the supported target to EFFECTIVE_TARGETS instead
, and the
compile flags
10927 # will be added by a
call to add_options_for_
<target
>.
10928 #
Set dg
-do-what
-default to either
compile or run
, depending
on target
10929 # capabilities.
Do not
set this
if the supported target is appended to
10930 # EFFECTIVE_TARGETS. Flags and this
variable will be
set by et
-dg
-runtest
10931 # automatically.
Return the number of effective targets
if vectorizer tests
10932 # are supported
, 0 otherwise.
10934 proc check_vect_support_and_set_flags
{ } {
10935 global DEFAULT_VECTCFLAGS
10936 global dg
-do-what
-default
10937 global EFFECTIVE_TARGETS
10939 if [istarget powerpc
-*paired
*] {
10940 lappend DEFAULT_VECTCFLAGS
"-mpaired"
10941 if [check_750cl_hw_available
] {
10942 set dg
-do-what
-default run
10944 set dg
-do-what
-default
compile
10946 } elseif
[istarget powerpc
*-*-*] {
10947 # Skip targets not supporting
-maltivec.
10948 if ![is
-effective
-target powerpc_altivec_ok
] {
10952 lappend DEFAULT_VECTCFLAGS
"-maltivec"
10953 if [check_p9vector_hw_available
] {
10954 lappend DEFAULT_VECTCFLAGS
"-mpower9-vector"
10955 } elseif
[check_p8vector_hw_available
] {
10956 lappend DEFAULT_VECTCFLAGS
"-mpower8-vector"
10957 } elseif
[check_vsx_hw_available
] {
10958 lappend DEFAULT_VECTCFLAGS
"-mvsx" "-mno-allow-movmisalign"
10961 if [check_vmx_hw_available
] {
10962 set dg
-do-what
-default run
10964 if [is
-effective
-target ilp32
] {
10965 # Specify a cpu that supports VMX
for compile-only tests.
10966 lappend DEFAULT_VECTCFLAGS
"-mcpu=970"
10968 set dg
-do-what
-default
compile
10970 } elseif
{ [istarget i?
86-*-*] ||
[istarget x86_64
-*-*] } {
10971 lappend DEFAULT_VECTCFLAGS
"-msse2"
10972 if { [check_effective_target_sse2_runtime
] } {
10973 set dg
-do-what
-default run
10975 set dg
-do-what
-default
compile
10977 } elseif
{ [istarget mips
*-*-*]
10978 && [check_effective_target_nomips16
] } {
10979 if { [check_effective_target_mpaired_single
"-mpaired-single"] } {
10980 lappend EFFECTIVE_TARGETS mpaired_single
10982 if { [check_effective_target_mips_loongson_mmi
"-mloongson-mmi"] } {
10983 lappend EFFECTIVE_TARGETS mips_loongson_mmi
10985 if { [check_effective_target_mips_msa
"-mmsa"] } {
10986 lappend EFFECTIVE_TARGETS mips_msa
10988 return [llength $EFFECTIVE_TARGETS
]
10989 } elseif
[istarget sparc
*-*-*] {
10990 lappend DEFAULT_VECTCFLAGS
"-mcpu=ultrasparc" "-mvis"
10991 if [check_effective_target_ultrasparc_hw
] {
10992 set dg
-do-what
-default run
10994 set dg
-do-what
-default
compile
10996 } elseif
[istarget alpha
*-*-*] {
10997 # Alpha
's vectorization capabilities are extremely limited.
10998 # It's more effort than its worth disabling all of the tests
10999 # that it cannot pass. But
if you actually want to see what
11000 # does work
, command out the
return.
11003 lappend DEFAULT_VECTCFLAGS
"-mmax"
11004 if [check_alpha_max_hw_available
] {
11005 set dg
-do-what
-default run
11007 set dg
-do-what
-default
compile
11009 } elseif
[istarget ia64
-*-*] {
11010 set dg
-do-what
-default run
11011 } elseif
[is
-effective
-target arm_neon_ok
] {
11012 eval lappend DEFAULT_VECTCFLAGS
[add_options_for_arm_neon
""]
11013 # NEON does not support denormals
, so is not used
for vectorization by
11014 # default to avoid loss of precision. We must pass
-ffast
-math to test
11015 # vectorization of float operations.
11016 lappend DEFAULT_VECTCFLAGS
"-ffast-math"
11017 if [is
-effective
-target arm_neon_hw
] {
11018 set dg
-do-what
-default run
11020 set dg
-do-what
-default
compile
11022 } elseif
[istarget aarch64
*-*-*] {
11023 set dg
-do-what
-default run
11024 } elseif
[istarget s390
*-*-*] {
11025 # The S
/390 backend
set a default of
2 for that value.
11026 # Override it to have the same situation as with other
11028 lappend DEFAULT_VECTCFLAGS
"--param" "min-vect-loop-bound=1"
11029 lappend DEFAULT_VECTCFLAGS
"--param" "max-unrolled-insns=200"
11030 lappend DEFAULT_VECTCFLAGS
"--param" "max-unroll-times=8"
11031 lappend DEFAULT_VECTCFLAGS
"--param" "max-completely-peeled-insns=200"
11032 lappend DEFAULT_VECTCFLAGS
"--param" "max-completely-peel-times=16"
11033 if [check_effective_target_s390_vxe2
] {
11034 lappend DEFAULT_VECTCFLAGS
"-march=z15" "-mzarch"
11035 set dg
-do-what
-default run
11036 } elseif
[check_effective_target_s390_vxe
] {
11037 lappend DEFAULT_VECTCFLAGS
"-march=z14" "-mzarch"
11038 set dg
-do-what
-default run
11039 } elseif
[check_effective_target_s390_vx
] {
11040 lappend DEFAULT_VECTCFLAGS
"-march=z13" "-mzarch"
11041 set dg
-do-what
-default run
11043 lappend DEFAULT_VECTCFLAGS
"-march=z14" "-mzarch"
11044 set dg
-do-what
-default
compile
11046 } elseif
[istarget amdgcn
-*-*] {
11047 set dg
-do-what
-default run
11055 #
Return 1 if the target does
*not
* require strict alignment.
11057 proc check_effective_target_non_strict_align
{} {
11059 #
On ARM
, the default is to use STRICT_ALIGNMENT
, but there
11060 # are interfaces defined
for misaligned access and thus
11061 # depending
on the architecture levels unaligned access is
11063 if [istarget
"arm*-*-*"] {
11064 return [check_effective_target_arm_unaligned
]
11067 return [check_no_compiler_messages non_strict_align assembly
{
11069 typedef char __attribute__
((__aligned__
(__BIGGEST_ALIGNMENT__
))) c
;
11071 void foo
(void
) { z
= (c
*) y
; }
11075 #
Return 1 if the target has
<ucontext.h
>.
11077 proc check_effective_target_ucontext_h
{ } {
11078 return [check_no_compiler_messages ucontext_h assembly
{
11079 #
include <ucontext.h
>
11083 proc check_effective_target_aarch64_tiny
{ } {
11084 if { [istarget aarch64
*-*-*] } {
11085 return [check_no_compiler_messages aarch64_tiny object
{
11086 #ifdef __AARCH64_CMODEL_TINY__
11089 #error target not AArch64 tiny code
model
11097 # Create functions to check that the AArch64 assembler supports the
11098 # various architecture extensions via the .arch_extension pseudo
-op.
11100 foreach
{ aarch64_ext
} { "fp" "simd" "crypto" "crc" "lse" "dotprod" "sve"
11101 "i8mm" "f32mm" "f64mm" "bf16" "sb" "sve2" "ls64" } {
11102 eval
[string map
[list FUNC $aarch64_ext
] {
11103 proc check_effective_target_aarch64_asm_FUNC_ok
{ } {
11104 if { [istarget aarch64
*-*-*] } {
11105 return [check_no_compiler_messages aarch64_FUNC_assembler object
{
11106 __asm__
(".arch_extension FUNC");
11107 } "-march=armv8-a+FUNC"]
11115 proc check_effective_target_aarch64_small
{ } {
11116 if { [istarget aarch64
*-*-*] } {
11117 return [check_no_compiler_messages aarch64_small object
{
11118 #ifdef __AARCH64_CMODEL_SMALL__
11121 #error target not AArch64 small code
model
11129 proc check_effective_target_aarch64_large
{ } {
11130 if { [istarget aarch64
*-*-*] } {
11131 return [check_no_compiler_messages aarch64_large object
{
11132 #ifdef __AARCH64_CMODEL_LARGE__
11135 #error target not AArch64 large code
model
11143 #
Return 1 if the assembler accepts the aarch64 .variant_pcs directive.
11145 proc check_effective_target_aarch64_variant_pcs
{ } {
11146 if { [istarget aarch64
*-*-*] } {
11147 return [check_no_compiler_messages aarch64_variant_pcs object
{
11148 __asm__
(".variant_pcs foo");
11155 #
Return 1 if this is a reduced AVR Tiny core. Such cores have different
11156 # register
set, instruction
set, addressing capabilities and ABI.
11158 proc check_effective_target_avr_tiny
{ } {
11159 if { [istarget avr
*-*-*] } {
11160 return [check_no_compiler_messages avr_tiny object
{
11161 #ifdef __AVR_TINY__
11164 #error target not a reduced AVR Tiny core
11172 #
Return 1 if <fenv.h
> is available.
11174 proc check_effective_target_fenv
{} {
11175 return [check_no_compiler_messages fenv object
{
11177 } [add_options_for_ieee
"-std=gnu99"]]
11180 #
Return 1 if <fenv.h
> is available with all the standard IEEE
11181 # exceptions and floating
-point exceptions are raised by arithmetic
11182 # operations.
(If the target requires special options
for "inexact"
11183 # exceptions
, those need to be specified in the testcases.
)
11185 proc check_effective_target_fenv_exceptions
{} {
11186 return [check_runtime fenv_exceptions
{
11188 #
include <stdlib.h
>
11189 #ifndef FE_DIVBYZERO
11190 # error Missing FE_DIVBYZERO
11193 # error Missing FE_INEXACT
11196 # error Missing FE_INVALID
11198 #ifndef FE_OVERFLOW
11199 # error Missing FE_OVERFLOW
11201 #ifndef FE_UNDERFLOW
11202 # error Missing FE_UNDERFLOW
11204 volatile float a
= 0.0f
, r
;
11209 if (fetestexcept
(FE_INVALID
))
11214 } [add_options_for_ieee
"-std=gnu99"]]
11217 #
Return 1 if <fenv.h
> is available with all the standard IEEE
11218 # exceptions and floating
-point exceptions are raised by arithmetic
11219 # operations
for decimal floating point.
(If the target requires
11220 # special options
for "inexact" exceptions, those need to be specified
11221 # in the testcases.
)
11223 proc check_effective_target_fenv_exceptions_dfp
{} {
11224 return [check_runtime fenv_exceptions_dfp
{
11226 #
include <stdlib.h
>
11227 #ifndef FE_DIVBYZERO
11228 # error Missing FE_DIVBYZERO
11231 # error Missing FE_INEXACT
11234 # error Missing FE_INVALID
11236 #ifndef FE_OVERFLOW
11237 # error Missing FE_OVERFLOW
11239 #ifndef FE_UNDERFLOW
11240 # error Missing FE_UNDERFLOW
11242 volatile _Decimal64 a
= 0.0DD
, r
;
11247 if (fetestexcept
(FE_INVALID
))
11252 } [add_options_for_ieee
"-std=gnu99"]]
11255 #
Return 1 if <fenv.h
> is available with all the standard IEEE
11256 # exceptions and floating
-point exceptions are raised by arithmetic
11257 # operations.
(If the target requires special options
for "inexact"
11258 # exceptions
, those need to be specified in the testcases.
)
11260 proc check_effective_target_fenv_exceptions_double
{} {
11261 return [check_runtime fenv_exceptions_double
{
11263 #
include <stdlib.h
>
11264 #ifndef FE_DIVBYZERO
11265 # error Missing FE_DIVBYZERO
11268 # error Missing FE_INEXACT
11271 # error Missing FE_INVALID
11273 #ifndef FE_OVERFLOW
11274 # error Missing FE_OVERFLOW
11276 #ifndef FE_UNDERFLOW
11277 # error Missing FE_UNDERFLOW
11279 volatile double a
= 0.0f
, r
;
11284 if (fetestexcept
(FE_INVALID
))
11289 } [add_options_for_ieee
"-std=gnu99"]]
11292 #
Return 1 if <fenv.h
> is available with all the standard IEEE
11293 # exceptions and floating
-point exceptions are raised by arithmetic
11294 # operations.
(If the target requires special options
for "inexact"
11295 # exceptions
, those need to be specified in the testcases.
)
11297 proc check_effective_target_fenv_exceptions_long_double
{} {
11298 return [check_runtime fenv_exceptions_long_double
{
11300 #
include <stdlib.h
>
11301 #ifndef FE_DIVBYZERO
11302 # error Missing FE_DIVBYZERO
11305 # error Missing FE_INEXACT
11308 # error Missing FE_INVALID
11310 #ifndef FE_OVERFLOW
11311 # error Missing FE_OVERFLOW
11313 #ifndef FE_UNDERFLOW
11314 # error Missing FE_UNDERFLOW
11316 volatile long double a
= 0.0f
, r
;
11321 if (fetestexcept
(FE_INVALID
))
11326 } [add_options_for_ieee
"-std=gnu99"]]
11329 #
Return 1 if -fexceptions is supported.
11331 proc check_effective_target_exceptions
{} {
11332 if { [istarget amdgcn
*-*-*] } {
11338 # Used to check
if the testing configuration supports exceptions.
11339 # Returns
0 if exceptions are unsupported or disabled
(e.g. by passing
11340 #
-fno
-exceptions
). Returns
1 if exceptions are enabled.
11341 proc check_effective_target_exceptions_enabled
{} {
11342 return [check_cached_effective_target exceptions_enabled
{
11343 if { [check_effective_target_exceptions
] } {
11344 return [check_no_compiler_messages exceptions_enabled assembly
{
11352 #
If exceptions aren
't supported, then they're not enabled.
11358 proc check_effective_target_tiny
{} {
11359 return [check_cached_effective_target tiny
{
11360 if { [istarget aarch64
*-*-*]
11361 && [check_effective_target_aarch64_tiny
] } {
11364 if { [istarget avr
-*-*]
11365 && [check_effective_target_avr_tiny
] } {
11368 # PRU
Program Counter is
16-bits
, and trampolines are not supported.
11369 # Hence directly declare as a tiny target.
11370 if [istarget pru
-*-*] {
11377 #
Return 1 if the target supports
-mbranch
-cost
=N option.
11379 proc check_effective_target_branch_cost
{} {
11380 if { [ istarget arm
*-*-*]
11381 ||
[istarget avr
*-*-*]
11382 ||
[istarget csky
*-*-*]
11383 ||
[istarget epiphany
*-*-*]
11384 ||
[istarget frv
*-*-*]
11385 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
11386 ||
[istarget loongarch
*-*-*]
11387 ||
[istarget mips
*-*-*]
11388 ||
[istarget s390
*-*-*]
11389 ||
[istarget riscv
*-*-*]
11390 ||
[istarget sh
*-*-*] } {
11396 # Record that dg
-final test TEST requires convential compilation.
11398 proc set_required_options_for
{ test
} {
11399 if { [info proc $test
] == "" } {
11400 perror
"$test does not exist"
11403 proc $
{test
}_required_options
{} {
11404 global gcc_set_required_options
11405 upvar
1 extra_tool_flags extra_tool_flags
11406 if {[regexp
-- "^scan-assembler" [info level 0]]
11407 && ![string match
"*-fident*" $extra_tool_flags]} {
11408 #
Do not let .ident confuse assembler scan tests
11409 return [list $gcc_set_required_options
"-fno-ident"]
11411 return $gcc_set_required_options
11415 # Record that dg
-final test scan
-ltrans
-tree
-dump
* requires
-flto
-partition
=one
11416 # in order to force a single partition
, allowing scan
-ltrans
-tree
-dump
* to scan
11417 # a dump file
*.exe.ltrans0.
*.
11419 proc scan
-ltrans
-tree
-dump_required_options
{} {
11420 return "-flto-partition=one"
11422 proc scan
-ltrans
-tree
-dump
-times_required_options
{} {
11423 return "-flto-partition=one"
11425 proc scan
-ltrans
-tree
-dump
-not_required_options
{} {
11426 return "-flto-partition=one"
11428 proc scan
-ltrans
-tree
-dump
-dem_required_options
{} {
11429 return "-flto-partition=one"
11431 proc scan
-ltrans
-tree
-dump
-dem
-not_required_options
{} {
11432 return "-flto-partition=one"
11435 #
Return 1 if the x86
-64 target supports PIE with copy reloc
, 0
11436 # otherwise.
Cache the result.
11438 proc check_effective_target_pie_copyreloc
{ } {
11440 global GCC_UNDER_TEST
11442 if { !([istarget i?
86-*-*] ||
[istarget x86_64
-*-*]) } {
11446 # Need auto
-host.h to check linker support.
11447 if { ![file
exists ..
/..
/auto
-host.h
] } {
11451 return [check_cached_effective_target pie_copyreloc
{
11452 #
Set up and
compile to see
if linker supports PIE with copy
11453 # reloc.
Include the current process ID in the file names to
11454 # prevent conflicts with invocations
for multiple testsuites.
11459 set f
[open $src
"w"]
11460 puts $f
"#include \"../../auto-host.h\""
11461 puts $f
"#if HAVE_LD_PIE_COPYRELOC == 0"
11462 puts $f
"# error Linker does not support PIE with copy reloc."
11466 verbose
"check_effective_target_pie_copyreloc compiling testfile $src" 2
11467 set lines
[$
{tool
}_target_compile $src $
obj object
""]
11472 if [string match
"" $lines] then {
11473 verbose
"check_effective_target_pie_copyreloc testfile compilation passed" 2
11476 verbose
"check_effective_target_pie_copyreloc testfile compilation failed" 2
11482 #
Return 1 if the x86 target supports R_386_GOT32X relocation
, 0
11483 # otherwise.
Cache the result.
11485 proc check_effective_target_got32x_reloc
{ } {
11487 global GCC_UNDER_TEST
11489 if { !([istarget i?
86-*-*] ||
[istarget x86_64
-*-*]) } {
11493 # Need auto
-host.h to check linker support.
11494 if { ![file
exists ..
/..
/auto
-host.h
] } {
11498 return [check_cached_effective_target got32x_reloc
{
11499 #
Include the current process ID in the file names to prevent
11500 # conflicts with invocations
for multiple testsuites.
11502 set src got32x
[pid
].c
11503 set obj got32x
[pid
].o
11505 set f
[open $src
"w"]
11506 puts $f
"#include \"../../auto-host.h\""
11507 puts $f
"#if HAVE_AS_IX86_GOT32X == 0"
11508 puts $f
"# error Assembler does not support R_386_GOT32X."
11512 verbose
"check_effective_target_got32x_reloc compiling testfile $src" 2
11513 set lines
[$
{tool
}_target_compile $src $
obj object
""]
11518 if [string match
"" $lines] then {
11519 verbose
"check_effective_target_got32x_reloc testfile compilation passed" 2
11522 verbose
"check_effective_target_got32x_reloc testfile compilation failed" 2
11527 return $got32x_reloc_available_saved
11530 #
Return 1 if the x86 target supports calling ___tls_get_addr via GOT
,
11531 #
0 otherwise.
Cache the result.
11533 proc check_effective_target_tls_get_addr_via_got
{ } {
11535 global GCC_UNDER_TEST
11537 if { !([istarget i?
86-*-*] ||
[istarget x86_64
-*-*]) } {
11541 # Need auto
-host.h to check linker support.
11542 if { ![file
exists ..
/..
/auto
-host.h
] } {
11546 return [check_cached_effective_target tls_get_addr_via_got
{
11547 #
Include the current process ID in the file names to prevent
11548 # conflicts with invocations
for multiple testsuites.
11550 set src tls_get_addr_via_got
[pid
].c
11551 set obj tls_get_addr_via_got
[pid
].o
11553 set f
[open $src
"w"]
11554 puts $f
"#include \"../../auto-host.h\""
11555 puts $f
"#if HAVE_AS_IX86_TLS_GET_ADDR_GOT == 0"
11556 puts $f
"# error Assembler/linker do not support calling ___tls_get_addr via GOT."
11560 verbose
"check_effective_target_tls_get_addr_via_got compiling testfile $src" 2
11561 set lines
[$
{tool
}_target_compile $src $
obj object
""]
11566 if [string match
"" $lines] then {
11567 verbose
"check_effective_target_tls_get_addr_via_got testfile compilation passed" 2
11570 verbose
"check_effective_target_tls_get_addr_via_got testfile compilation failed" 2
11576 #
Return 1 if the target uses comdat groups.
11578 proc check_effective_target_comdat_group
{} {
11579 return [check_no_messages_and_pattern comdat_group
"\.section\[^\n\r]*,comdat|\.group\[^\n\r]*,#comdat" assembly {
11581 inline
int foo
() { return 1; }
11582 int (*fn
) () = foo
;
11586 #
Return 1 if target supports __builtin_eh_return
11587 proc check_effective_target_builtin_eh_return
{ } {
11588 return [check_no_compiler_messages builtin_eh_return object
{
11589 void test
(long l
, void
*p
)
11591 __builtin_eh_return
(l
, p
);
11596 #
Return 1 if the target supports
max reduction
for vectors.
11598 proc check_effective_target_vect_max_reduc
{ } {
11599 if { [istarget aarch64
*-*-*] ||
[is
-effective
-target arm_neon
] } {
11605 #
Return 1 if the compiler has been configured with nvptx offloading.
11607 proc check_effective_target_offload_nvptx
{ } {
11608 return [check_no_compiler_messages offload_nvptx assembly
{
11609 int main
() {return 0;}
11610 } "-foffload=nvptx-none" ]
11613 #
Return 1 if the compiler has been configured with gcn offloading.
11615 proc check_effective_target_offload_gcn
{ } {
11616 return [check_no_compiler_messages offload_gcn assembly
{
11617 int main
() {return 0;}
11618 } "-foffload=amdgcn-amdhsa" ]
11621 #
Return 1 if the target support
-fprofile
-update=atomic
11622 proc check_effective_target_profile_update_atomic
{} {
11623 return [check_no_compiler_messages profile_update_atomic assembly
{
11624 int main
(void
) { return 0; }
11625 } "-fprofile-update=atomic -fprofile-generate"]
11628 #
Return 1 if vector
(va
- vector add
) instructions are understood by
11629 # the assembler and can be executed. This also covers checking
for
11630 # the VX kernel feature. A kernel without that feature does not
11631 # enable the vector facility and the following check will die with a
11633 proc check_effective_target_s390_vx
{ } {
11634 if ![istarget s390
*-*-*] then {
11638 return [check_runtime s390_check_vx
{
11641 asm
("va %%v24, %%v26, %%v28, 3" : : : "v24", "v26", "v28");
11644 } "-march=z13 -mzarch" ]
11647 # Same as above but
for the z14 vector enhancement facility. Test
11648 # is performed with the vector nand instruction.
11649 proc check_effective_target_s390_vxe
{ } {
11650 if ![istarget s390
*-*-*] then {
11654 return [check_runtime s390_check_vxe
{
11657 asm
("vnn %%v24, %%v26, %%v28" : : : "v24", "v26", "v28");
11660 } "-march=z14 -mzarch" ]
11663 # Same as above but
for the arch13 vector enhancement facility. Test
11664 # is performed with the vector shift left double by bit instruction.
11665 proc check_effective_target_s390_vxe2
{ } {
11666 if ![istarget s390
*-*-*] then {
11670 return [check_runtime s390_check_vxe2
{
11673 asm
("vsld %%v24, %%v26, %%v28, 3" : : : "v24", "v26", "v28");
11676 } "-march=arch13 -mzarch" ]
11679 # Same as above but
for the arch14 NNPA facility.
11680 proc check_effective_target_s390_nnpa
{ } {
11681 if ![istarget s390
*-*-*] then {
11685 return [check_runtime s390_check_nnpa
{
11688 asm
("vzero %%v24\n\t"
11689 "vcrnf %%v24,%%v24,%%v24,0,2" : : : "v24");
11692 } "-march=arch14 -mzarch" ]
11695 #
For versions of ARM architectures that have hardware div insn
,
11696 #disable the divmod transform
11698 proc check_effective_target_arm_divmod_simode
{ } {
11699 return [check_no_compiler_messages arm_divmod assembly
{
11700 #ifdef __ARM_ARCH_EXT_IDIV__
11701 #error has div insn
11707 #
Return 1 if target supports divmod hardware insn or divmod libcall.
11709 proc check_effective_target_divmod
{ } {
11710 #TODO
: Add checks
for all targets that have either hardware divmod insn
11711 # or
define libfunc
for divmod.
11712 if { [istarget arm
*-*-*]
11713 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
11714 ||
[istarget amdgcn
-*-*] } {
11720 #
Return 1 if target supports divmod
for SImode. The reason
for
11721 # separating this from check_effective_target_divmod is that
11722 # some versions of ARM architecture
define div instruction
11723 # only
for simode
, and
for these archs
, we
do not want to enable
11724 # divmod transform
for simode.
11726 proc check_effective_target_divmod_simode
{ } {
11727 if { [istarget arm
*-*-*] } {
11728 return [check_effective_target_arm_divmod_simode
]
11731 return [check_effective_target_divmod
]
11734 #
Return 1 if store merging optimization is applicable
for target.
11735 # Store merging is not profitable
for targets like the avr which
11736 # can
load/store only one byte at a time. Use
int size as a proxy
11737 #
for the number of bytes the target can write
, and skip
for targets
11738 # with a smallish
(< 32) size.
11740 proc check_effective_target_store_merge
{ } {
11741 if { [is
-effective
-target non_strict_align
] && [is
-effective
-target int32plus
] } {
11748 #
Return 1 if we
're able to assemble rdrand
11750 proc check_effective_target_rdrand { } {
11751 return [check_no_compiler_messages_nocache rdrand object {
11756 __builtin_ia32_rdrand32_step(&val);
11762 # Return 1 if the target supports coprocessor instructions: cdp, ldc, ldcl,
11763 # stc, stcl, mcr and mrc.
11764 proc check_effective_target_arm_coproc1_ok_nocache { } {
11765 if { ![istarget arm*-*-*] } {
11768 return [check_no_compiler_messages_nocache arm_coproc1_ok assembly {
11769 #if (__thumb__ && !__thumb2__) || __ARM_ARCH < 4
11772 #include <arm_acle.h>
11776 proc check_effective_target_arm_coproc1_ok { } {
11777 return [check_cached_effective_target arm_coproc1_ok \
11778 check_effective_target_arm_coproc1_ok_nocache]
11781 # Return 1 if the target supports all coprocessor instructions checked by
11782 # check_effective_target_arm_coproc1_ok in addition to the following: cdp2,
11783 # ldc2, ldc2l, stc2, stc2l, mcr2 and mrc2.
11784 proc check_effective_target_arm_coproc2_ok_nocache { } {
11785 if { ![check_effective_target_arm_coproc1_ok] } {
11788 return [check_no_compiler_messages_nocache arm_coproc2_ok assembly {
11789 #if (__thumb__ && !__thumb2__) || __ARM_ARCH < 5
11792 #include <arm_acle.h>
11796 proc check_effective_target_arm_coproc2_ok { } {
11797 return [check_cached_effective_target arm_coproc2_ok \
11798 check_effective_target_arm_coproc2_ok_nocache]
11801 # Return 1 if the target supports all coprocessor instructions checked by
11802 # check_effective_target_arm_coproc2_ok in addition the following: mcrr and
11804 proc check_effective_target_arm_coproc3_ok_nocache { } {
11805 if { ![check_effective_target_arm_coproc2_ok] } {
11808 return [check_no_compiler_messages_nocache arm_coproc3_ok assembly {
11809 #if (__thumb__ && !__thumb2__) \
11810 || (__ARM_ARCH < 6 && !defined (__ARM_ARCH_5TE__))
11813 #include <arm_acle.h>
11817 proc check_effective_target_arm_coproc3_ok { } {
11818 return [check_cached_effective_target arm_coproc3_ok \
11819 check_effective_target_arm_coproc3_ok_nocache]
11822 # Return 1 if the target supports all coprocessor instructions checked by
11823 # check_effective_target_arm_coproc3_ok in addition the following: mcrr2 and
11825 proc check_effective_target_arm_coproc4_ok_nocache { } {
11826 if { ![check_effective_target_arm_coproc3_ok] } {
11829 return [check_no_compiler_messages_nocache arm_coproc4_ok assembly {
11830 #if (__thumb__ && !__thumb2__) || __ARM_ARCH < 6
11833 #include <arm_acle.h>
11837 proc check_effective_target_arm_coproc4_ok { } {
11838 return [check_cached_effective_target arm_coproc4_ok \
11839 check_effective_target_arm_coproc4_ok_nocache]
11842 # Return 1 if the target supports the auto_inc_dec optimization pass.
11843 proc check_effective_target_autoincdec { } {
11844 if { ![check_no_compiler_messages auto_incdec assembly { void f () { }
11845 } "-O2 -fdump-rtl-auto_inc_dec" ] } {
11849 set dumpfile [glob -nocomplain "auto_incdec[pid].c.\[0-9\]\[0-9\]\[0-9\]r.auto_inc_dec"]
11850 if { [file exists $dumpfile ] } {
11851 file delete $dumpfile
11857 # Return 1 if the target has support for stack probing designed
11858 # to avoid stack-clash style attacks.
11860 # This is used to restrict the stack-clash mitigation tests to
11861 # just those targets that have been explicitly supported.
11863 # In addition to the prologue work on those targets, each target's
11864 # properties should be described in the functions below so that
11865 # tests
do not become a mess of unreadable target conditions.
11867 proc check_effective_target_supports_stack_clash_protection
{ } {
11869 if { [istarget x86_64
-*-*] ||
[istarget i?
86-*-*]
11870 ||
[istarget powerpc
*-*-*] ||
[istarget rs6000
*-*-*]
11871 ||
[istarget aarch64
*-**] ||
[istarget s390
*-*-*]
11872 ||
[istarget loongarch64
*-**] } {
11878 #
Return 1 if the target creates a frame pointer
for non
-leaf functions
11879 # Note we ignore cases where we apply tail
call optimization here.
11880 proc check_effective_target_frame_pointer_for_non_leaf
{ } {
11881 # Solaris
/x86 defaults to
-fno
-omit
-frame
-pointer.
11882 if { [istarget i?
86-*-solaris
*] ||
[istarget x86_64
-*-solaris
*] } {
11889 #
Return 1 if the target can perform tail
-call optimizations of the
11890 # most trivial type.
11891 proc check_effective_target_tail_call
{ } {
11892 return [check_no_messages_and_pattern tail_call
",SIBCALL" rtl-expand {
11893 __attribute__
((__noipa__
)) void foo
(void
) { }
11894 __attribute__
((__noipa__
)) void bar
(void
) { foo
(); }
11895 } {-O2
-fdump
-rtl
-expand
-all
}] ;# The
"SIBCALL" note requires a detailed dump.
11898 #
Return 1 if the target
's calling sequence or its ABI
11899 # create implicit stack probes at or prior to function entry.
11900 proc check_effective_target_caller_implicit_probes { } {
11902 # On x86/x86_64 the call instruction itself pushes the return
11903 # address onto the stack. That is an implicit probe of *sp.
11904 if { [istarget x86_64-*-*] || [istarget i?86-*-*] } {
11908 # On PPC, the ABI mandates that the address of the outer
11909 # frame be stored at *sp. Thus each allocation of stack
11910 # space is itself an implicit probe of *sp.
11911 if { [istarget powerpc*-*-*] || [istarget rs6000*-*-*] } {
11915 # s390's ABI has a register save area allocated by the
11916 # caller
for use by the callee. The mere existence does
11917 # not constitute a probe by the caller
, but when the slots
11918 # used by the callee those stores are implicit probes.
11919 if { [istarget s390
*-*-*] } {
11923 # Not strictly true
on aarch64
, but we have agreed that we will
11924 #
consider any function that pushes SP more than
3kbytes into
11925 # the guard
page as broken. This essentially means that we can
11926 #
consider the aarch64 as having a caller implicit probe at
11928 if { [istarget aarch64
*-*-*] } {
11932 if { [istarget loongarch64
*-*-*] } {
11939 # Targets that potentially realign the stack pointer often cause residual
11940 # stack allocations and make it difficult to elimination loops or residual
11941 # allocations
for dynamic stack allocations
11942 proc check_effective_target_callee_realigns_stack
{ } {
11943 if { [istarget x86_64
-*-*] ||
[istarget i?
86-*-*] } {
11949 #
Return 1 if CET instructions can be compiled.
11950 proc check_effective_target_cet
{ } {
11951 if { !([istarget i?
86-*-*] ||
[istarget x86_64
-*-*]) } {
11954 return [check_no_compiler_messages cet object
{
11959 } "-O2 -fcf-protection" ]
11962 #
Return 1 if target supports floating point
"infinite"
11963 proc check_effective_target_inf
{ } {
11964 return [check_no_compiler_messages supports_inf assembly
{
11965 const double pinf
= __builtin_inf
();
11969 #
Return 1 if target supports floating point
"infinite" for float.
11970 proc check_effective_target_inff
{ } {
11971 return [check_no_compiler_messages supports_inff assembly
{
11972 const float pinf
= __builtin_inff
();
11976 #
Return 1 if the target supports ARMv8.3 Adv.SIMD Complex instructions
11977 # instructions
, 0 otherwise. The test is valid
for ARM and
for AArch64.
11978 # Record the command line options needed.
11980 proc check_effective_target_arm_v8_3a_complex_neon_ok_nocache
{ } {
11981 global et_arm_v8_3a_complex_neon_flags
11982 set et_arm_v8_3a_complex_neon_flags
""
11984 if { ![istarget arm
*-*-*] && ![istarget aarch64
*-*-*] } {
11988 # Iterate through sets of options to find the compiler flags that
11989 # need to be added to the
-march option.
11990 foreach flags
{"" "-mfloat-abi=softfp -mfpu=auto" "-mfloat-abi=hard -mfpu=auto"} {
11991 if { [check_no_compiler_messages_nocache \
11992 arm_v8_3a_complex_neon_ok assembly
{
11993 #
if !defined
(__ARM_FEATURE_COMPLEX
)
11994 #error
"__ARM_FEATURE_COMPLEX not defined"
11996 } "$flags -march=armv8.3-a"] } {
11997 set et_arm_v8_3a_complex_neon_flags
"$flags -march=armv8.3-a"
12005 proc check_effective_target_arm_v8_3a_complex_neon_ok
{ } {
12006 return [check_cached_effective_target arm_v8_3a_complex_neon_ok \
12007 check_effective_target_arm_v8_3a_complex_neon_ok_nocache
]
12010 proc add_options_for_arm_v8_3a_complex_neon
{ flags
} {
12011 if { ! [check_effective_target_arm_v8_3a_complex_neon_ok
] } {
12014 global et_arm_v8_3a_complex_neon_flags
12015 return "$flags $et_arm_v8_3a_complex_neon_flags"
12018 #
Return 1 if the target supports ARMv8.3 Adv.SIMD
+ FP16 Complex instructions
12019 # instructions
, 0 otherwise. The test is valid
for ARM and
for AArch64.
12020 # Record the command line options needed.
12022 proc check_effective_target_arm_v8_3a_fp16_complex_neon_ok_nocache
{ } {
12023 global et_arm_v8_3a_fp16_complex_neon_flags
12024 set et_arm_v8_3a_fp16_complex_neon_flags
""
12026 if { ![istarget arm
*-*-*] && ![istarget aarch64
*-*-*] } {
12030 # Iterate through sets of options to find the compiler flags that
12031 # need to be added to the
-march option.
12032 foreach flags
{"" "-mfloat-abi=softfp -mfpu=auto" "-mfloat-abi=hard -mfpu=auto"} {
12033 if { [check_no_compiler_messages_nocache \
12034 arm_v8_3a_fp16_complex_neon_ok assembly
{
12035 #
if !defined
(__ARM_FEATURE_COMPLEX
)
12036 #error
"__ARM_FEATURE_COMPLEX not defined"
12038 } "$flags -march=armv8.3-a+fp16"] } {
12039 set et_arm_v8_3a_fp16_complex_neon_flags \
12040 "$flags -march=armv8.3-a+fp16"
12048 proc check_effective_target_arm_v8_3a_fp16_complex_neon_ok
{ } {
12049 return [check_cached_effective_target arm_v8_3a_fp16_complex_neon_ok \
12050 check_effective_target_arm_v8_3a_fp16_complex_neon_ok_nocache
]
12053 proc add_options_for_arm_v8_3a_fp16_complex_neon
{ flags
} {
12054 if { ! [check_effective_target_arm_v8_3a_fp16_complex_neon_ok
] } {
12057 global et_arm_v8_3a_fp16_complex_neon_flags
12058 return "$flags $et_arm_v8_3a_fp16_complex_neon_flags"
12062 #
Return 1 if the target supports executing AdvSIMD instructions from ARMv8.3
12063 # with the complex instruction extension
, 0 otherwise. The test is valid
for
12064 # ARM and
for AArch64.
12066 proc check_effective_target_arm_v8_3a_complex_neon_hw
{ } {
12067 if { ![check_effective_target_arm_v8_3a_complex_neon_ok
] } {
12070 return [check_runtime arm_v8_3a_complex_neon_hw_available
{
12071 #
include "arm_neon.h"
12076 float32x2_t results
= {-4.0,5.0};
12077 float32x2_t a
= {1.0,3.0};
12078 float32x2_t b
= {2.0,5.0};
12080 #ifdef __ARM_ARCH_ISA_A64
12081 asm
("fcadd %0.2s, %1.2s, %2.2s, #90"
12084 : /* No clobbers.
*/);
12087 asm
("vcadd.f32 %P0, %P1, %P2, #90"
12090 : /* No clobbers.
*/);
12093 return (results
[0] == 8 && results
[1] == 24) ?
0 : 1;
12095 } [add_options_for_arm_v8_3a_complex_neon
""]]
12098 #
Return 1 if the assembler supports assembling the Armv8.3 pointer authentication B
key directive
12099 proc check_effective_target_arm_v8_3a_bkey_directive
{ } {
12100 return [check_no_compiler_messages cet object
{
12102 asm
(".cfi_b_key_frame");
12108 #
Return 1 if the target supports executing the Armv8.1
-M Mainline Low
12109 # Overhead Loop
, 0 otherwise. The test is valid
for ARM.
12111 proc check_effective_target_arm_v8_1_lob_ok
{ } {
12112 if { ![check_effective_target_arm_cortex_m
] } {
12115 return [check_runtime arm_v8_1_lob_hw_available
{
12119 asm
("movw r3, #10\n\t" /* movs? */
12120 "dls lr, r3" : : : "r3", "lr");
12123 asm
goto ("le lr, %l0" : : : "lr" : loop);
12126 } "-march=armv8.1-m.main -mthumb" ]
12130 #
Return 1 if this is an ARM target where Thumb
-2 is used without
12131 # options added by the test and the target does not support executing
12132 # the Armv8.1
-M Mainline Low Overhead Loop
, 0 otherwise. The test is
12135 proc check_effective_target_arm_thumb2_no_arm_v8_1_lob
{ } {
12136 if { [check_effective_target_arm_thumb2
]
12137 && ![check_effective_target_arm_v8_1_lob_ok
] } {
12143 #
Return 1 if this is an ARM target where
-mthumb causes Thumb
-2 to be
12144 # used and the target does not support executing the Armv8.1
-M
12145 # Mainline Low Overhead Loop
, 0 otherwise. The test is valid
for ARM.
12147 proc check_effective_target_arm_thumb2_ok_no_arm_v8_1_lob
{ } {
12148 if { [check_effective_target_arm_thumb2_ok
]
12149 && ![check_effective_target_arm_v8_1_lob_ok
] } {
12155 # Returns
1 if the target is using glibc
, 0 otherwise.
12157 proc check_effective_target_glibc
{ } {
12158 return [check_no_compiler_messages glibc_object assembly
{
12159 #
include <stdlib.h
>
12160 #
if !defined
(__GLIBC__
)
12166 #
Return 1 if the target plus current options supports a vector
12167 # complex addition with rotate of half and single float modes
, 0 otherwise.
12169 # This won
't change for different subtargets so cache the result.
12171 foreach N {hf sf} {
12172 eval [string map [list N $N] {
12173 proc check_effective_target_vect_complex_rot_N { } {
12174 return [check_cached_effective_target_indexed vect_complex_rot_N {
12175 expr { [istarget aarch64*-*-*]
12176 || [istarget arm*-*-*] }}]
12181 # Return 1 if the target plus current options supports a vector
12182 # complex addition with rotate of double float modes, 0 otherwise.
12184 # This won't change
for different subtargets so
cache the result.
12187 eval
[string map
[list N $N
] {
12188 proc check_effective_target_vect_complex_rot_N
{ } {
12189 return [check_cached_effective_target_indexed vect_complex_rot_N
{
12190 expr
{ [istarget aarch64
*-*-*] }}]
12195 #
Return 1 if this target uses an LLVM assembler and
/or linker
12196 proc check_effective_target_llvm_binutils
{ } {
12197 return [check_cached_effective_target llvm_binutils
{
12198 expr
{ [istarget amdgcn
*-*-*]
12199 ||
[check_effective_target_offload_gcn
] }}]
12202 #
Return 1 if the compiler supports
'-mfentry'.
12204 proc check_effective_target_mfentry
{ } {
12205 if { !([istarget i?
86-*-*] ||
[istarget x86_64
-*-*]) } {
12208 return [check_no_compiler_messages mfentry object
{
12209 void foo
(void
) { }
12213 #
Return 1 if this target supports indirect calls
12214 proc check_effective_target_indirect_calls
{ } {
12215 if { [istarget bpf
-*-*] } {
12221 #
Return 1 if we can use the
-lgccjit option
, 0 otherwise.
12223 proc check_effective_target_lgccjit
{ } {
12224 if { [info procs jit_target_compile
] == "" } then {
12225 global GCC_UNDER_TEST
12226 if ![info exists GCC_UNDER_TEST
] {
12227 set GCC_UNDER_TEST
"[find_gcc]"
12229 proc jit_target_compile
{ source dest type options
} [info body gcc_target_compile
]
12231 return [check_no_compiler_messages lgccjit executable
{
12232 int main
() { return 0; }
12236 #
Return 1 if the MSP430 small memory
model is in use.
12237 proc check_effective_target_msp430_small
{} {
12238 return [check_no_compiler_messages msp430_small assembly
{
12239 #
if (!defined __MSP430__ || defined __MSP430X_LARGE__
)
12240 #error
!msp430 || __MSP430X_LARGE__
12245 #
Return 1 if the MSP430 large memory
model is in use.
12246 proc check_effective_target_msp430_large
{} {
12247 return [check_no_compiler_messages msp430_large assembly
{
12248 #ifndef __MSP430X_LARGE__
12249 #error __MSP430X_LARGE__
12254 #
Return 1 if GCC was configured with
--with
-tune
=cortex
-a76
12255 proc check_effective_target_tune_cortex_a76
{ } {
12256 return [check_configured_with
"with-tune=cortex-a76"]
12259 #
Return 1 if the target has an efficient means to encode large initializers
12262 proc check_effective_target_large_initializer
{ } {
12263 if { [istarget nvptx
*-*-*] } {
12270 #
Return 1 if the target allows function prototype mismatches
12273 proc check_effective_target_non_strict_prototype
{ } {
12274 if { [istarget nvptx
*-*-*] } {
12281 # Returns
1 if the target toolchain supports extended
12282 # syntax of .symver directive
, 0 otherwise.
12284 proc check_symver_available
{ } {
12285 return [check_no_compiler_messages symver_available object
{
12286 int foo
(void
) { return 0; }
12288 asm volatile
(".symver foo,foo@VER_1, local");
12294 #
Return 1 if emitted assembly contains .ident directive.
12296 proc check_effective_target_ident_directive
{} {
12297 return [check_no_messages_and_pattern ident_directive \
12298 "(?n)^\[\t\]+\\.ident" assembly {
12303 #
Return 1 if we
're able to assemble movdiri and movdir64b
12305 proc check_effective_target_movdir { } {
12306 return [check_no_compiler_messages movdir object {
12308 foo (unsigned int *d, unsigned int s)
12310 __builtin_ia32_directstoreu_u32 (d, s);
12313 bar (void *d, const void *s)
12315 __builtin_ia32_movdir64b (d, s);
12317 } "-mmovdiri -mmovdir64b" ]
12320 # Return 1 if the target does not support address sanitizer, 0 otherwise
12322 proc check_effective_target_no_fsanitize_address {} {
12323 if ![check_no_compiler_messages fsanitize_address executable {
12324 int main (void) { return 0; }
12325 } "-fsanitize=address" ] {
12332 # Return 1 if this target supports 'R
' flag in .section directive, 0
12333 # otherwise. Cache the result.
12335 proc check_effective_target_R_flag_in_section { } {
12337 global GCC_UNDER_TEST
12339 # Need auto-host.h to check linker support.
12340 if { ![file exists ../../auto-host.h ] } {
12344 return [check_cached_effective_target R_flag_in_section {
12349 set f [open $src "w"]
12350 puts $f "#include \"../../auto-host.h\""
12351 puts $f "#if HAVE_GAS_SHF_GNU_RETAIN == 0 || HAVE_INITFINI_ARRAY_SUPPORT == 0"
12352 puts $f "# error Assembler does not support 'R
' flag in .section directive."
12356 verbose "check_effective_target_R_flag_in_section compiling testfile $src" 2
12357 set lines [${tool}_target_compile $src $obj assembly ""]
12362 if [string match "" $lines] then {
12363 verbose "check_effective_target_R_flag_in_section testfile compilation passed" 2
12366 verbose "check_effective_target_R_flag_in_section testfile compilation failed" 2
12372 # Return 1 if this target supports 'o
' flag in .section directive, 0
12373 # otherwise. Cache the result.
12375 proc check_effective_target_o_flag_in_section { } {
12377 global GCC_UNDER_TEST
12379 # Need auto-host.h to check linker support.
12380 if { ![file exists ../../auto-host.h ] } {
12384 return [check_cached_effective_target o_flag_in_section {
12389 set f [open $src "w"]
12390 puts $f "#include \"../../auto-host.h\""
12391 puts $f "#if HAVE_GAS_SECTION_LINK_ORDER == 0"
12392 puts $f "# error Assembler does not support 'o
' flag in .section directive."
12396 verbose "check_effective_target_o_flag_in_section compiling testfile $src" 2
12397 set lines [${tool}_target_compile $src $obj object ""]
12402 if [string match "" $lines] then {
12403 verbose "check_effective_target_o_flag_in_section testfile compilation passed" 2
12406 verbose "check_effective_target_o_flag_in_section testfile compilation failed" 2
12412 # return 1 if LRA is supported.
12414 proc check_effective_target_lra { } {
12415 if { [istarget hppa*-*-*] || [istarget avr-*-*] } {
12421 # Test whether optimizations are enabled ('__OPTIMIZE__
') per the
12422 # 'current_compiler_flags
' (thus don't
cache).
12424 proc check_effective_target___OPTIMIZE__
{} {
12425 return [check_no_compiler_messages_nocache __OPTIMIZE__ assembly
{
12426 #ifndef __OPTIMIZE__
12429 /* Avoid pedwarn about empty TU.
*/
12431 } [current_compiler_flags
]]
12434 #
Return 1 if python3
(>= 3.6) is available.
12436 proc check_effective_target_recent_python3
{ } {
12437 set result
[remote_exec host
"python3 -c \"import sys; assert sys.version_info >= (3, 6)\""]
12438 set status [lindex $result
0]
12439 if { $
status == 0 } then {
12446 #
Return 1 if python3 contains a module
12448 proc check_effective_target_python3_module
{ module
} {
12449 set result
[remote_exec host
"python3 -c \"import $module\""]
12450 set status [lindex $result
0]
12451 if { $
status == 0 } then {
12458 #
Return 1 if pytest module is available
for python3.
12460 proc check_effective_target_pytest3
{ } {
12461 set result
[remote_exec host
"python3 -m pytest --color=no -rap -s --tb=no --version"]
12462 set status [lindex $result
0]
12463 if { $
status == 0 } then {
12470 proc check_effective_target_property_1_needed
{ } {
12471 return [check_no_compiler_messages property_1_needed executable
{
12472 /* Assembly code
*/
12474 #
define __PROPERTY_ALIGN
3
12476 #
define __PROPERTY_ALIGN
2
12479 .section
".note.gnu.property", "a"
12480 .p2align __PROPERTY_ALIGN
12481 .long
1f
- 0f
/* name length.
*/
12482 .long
4f
- 1f
/* data length.
*/
12483 /* NT_GNU_PROPERTY_TYPE_0.
*/
12484 .long
5 /* note type.
*/
12486 .asciz
"GNU" /* vendor name. */
12488 .p2align __PROPERTY_ALIGN
12489 /* GNU_PROPERTY_1_NEEDED.
*/
12490 .long
0xb0008000 /* pr_type.
*/
12491 .long
3f
- 2f
/* pr_datasz.
*/
12493 /* GNU_PROPERTY_1_NEEDED_INDIRECT_EXTERN_ACCESS.
*/
12496 .p2align __PROPERTY_ALIGN
12505 #
Return 1 if this target has prog named
"$prog", 0 otherwise.
12507 proc check_is_prog_name_available
{ prog
} {
12510 set options
[list
"additional_flags=-print-prog-name=$prog"]
12511 set output
[lindex
[$
{tool
}_target_compile
"" "" "none" $options] 0]
12513 if { $output
== $prog
} {
12520 # returns
1 if target does selects a readonly section
for const volatile variables.
12521 proc check_effective_target_const_volatile_readonly_section
{ } {
12523 if { [istarget powerpc
-*-*]
12524 ||
[check
-flags
{ "" { powerpc64-*-* } { -m32 } }] } {