1 # Copyright
(C
) 1999-2018 Free Software Foundation
, Inc.
3 # This
program is free software
; you can redistribute it and
/or modify
4 # it under the terms of the GNU General Public License as published by
5 # the Free Software Foundation
; either version
3 of the License
, or
6 #
(at your option
) any later version.
8 # This
program is distributed in the hope that it will be useful
,
9 # but WITHOUT
ANY WARRANTY
; without even the implied warranty of
10 # MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. See the
11 # GNU General Public License
for more details.
13 # You should have received a copy of the GNU General Public License
14 # along with GCC
; see the file COPYING3.
If not see
15 #
<http
://www.gnu.org
/licenses
/>.
17 # Please email
any bugs
, comments
, and
/or additions to this file to
:
18 # gcc
-patches@gcc.gnu.org
20 # This file defines procs
for determining features supported by the target.
22 # Try to
compile the code given by CONTENTS into an output file of
23 # type TYPE
, where TYPE is as
for target_compile.
Return a list
24 # whose first element contains the compiler messages and whose
25 # second element is the
name of the output file.
27 # BASENAME is a prefix to use
for source and output files.
28 #
If ARGS is not empty
, its first element is a string that
29 # should be added to the command line.
31 # Assume by default that CONTENTS is C code.
32 # Otherwise
, code should contain
:
34 #
"! Fortran" for Fortran code,
36 #
"// ObjC++" for ObjC++
38 #
If the tool is ObjC
/ObjC
++ then we overide the extension to .m
/.mm to
39 # allow
for ObjC
/ObjC
++ specific flags.
40 proc check_compile
{basename type contents
args} {
42 verbose
"check_compile tool: $tool for $basename"
44 # Save additional_sources to avoid compiling testsuite
's sources
45 # against check_compile's source.
46 global additional_sources
47 if [info exists additional_sources
] {
48 set tmp_additional_sources
"$additional_sources"
49 set additional_sources
""
52 if { [llength $
args] > 0 } {
53 set options
[list
"additional_flags=[lindex $args 0]"]
57 switch -glob
-- $contents
{
58 "*! Fortran*" { set src ${basename}[pid].f90 }
59 "*// C++*" { set src ${basename}[pid].cc }
60 "*// ObjC++*" { set src ${basename}[pid].mm }
61 "*/* ObjC*" { set src ${basename}[pid].m }
62 "*// Go*" { set src ${basename}[pid].go }
65 "objc" { set src ${basename}[pid].m }
66 "obj-c++" { set src ${basename}[pid].mm }
67 default
{ set src $
{basename
}[pid
].c
}
72 set compile_type $type
74 assembly
{ set output $
{basename
}[pid
].s
}
75 object
{ set output $
{basename
}[pid
].o
}
76 executable
{ set output $
{basename
}[pid
].exe
}
78 set output $
{basename
}[pid
].s
79 lappend options
"additional_flags=-fdump-$type"
80 set compile_type assembly
86 set lines
[$
{tool
}_target_compile $src $output $compile_type
"$options"]
89 set scan_output $output
90 # Don
't try folding this into the switch above; calling "glob" before the
91 # file is created won't work.
92 if [regexp
"rtl-(.*)" $type dummy rtl_type] {
93 set scan_output
"[glob $src.\[0-9\]\[0-9\]\[0-9\]r.$rtl_type]"
97 # Restore additional_sources.
98 if [info exists additional_sources
] {
99 set additional_sources
"$tmp_additional_sources"
102 return [list $lines $scan_output
]
105 proc current_target_name
{ } {
107 if [info exists target_info
(target
,name)] {
108 set answer $target_info
(target
,name)
115 # Implement an effective
-target check
for property PROP by invoking
116 # the Tcl command
ARGS and seeing
if it returns true.
118 proc check_cached_effective_target
{ prop
args } {
122 set target
[current_target_name
]
123 if {![info exists et_cache
($prop
,target
)]
124 || $et_cache
($prop
,target
) != $target
} {
125 verbose
"check_cached_effective_target $prop: checking $target" 2
126 set et_cache
($prop
,target
) $target
127 set et_cache
($prop
,value
) [uplevel eval $
args]
128 if {![info exists et_prop_list
]
129 ||
[lsearch $et_prop_list $prop
] < 0} {
130 lappend et_prop_list $prop
132 verbose
"check_cached_effective_target cached list is now: $et_prop_list" 2
134 set value $et_cache
($prop
,value
)
135 verbose
"check_cached_effective_target $prop: returning $value for $target" 2
139 # Clear effective
-target
cache. This is useful after testing
140 # effective
-target features and overriding TEST_ALWAYS_FLAGS and
/or
142 #
If one changes ALWAYS_CXXFLAGS or TEST_ALWAYS_FLAGS
then they should
143 #
do a clear_effective_target_cache at the end as the target
cache can
144 # make decisions based upon the flags
, and those decisions need to be
145 # redone when the flags change. An example of this is the
146 # asan_init
/asan_finish pair.
148 proc clear_effective_target_cache
{ } {
152 if {[info exists et_prop_list
]} {
153 verbose
"clear_effective_target_cache: $et_prop_list" 2
154 foreach prop $et_prop_list
{
155 unset et_cache
($prop
,value
)
156 unset et_cache
($prop
,target
)
162 # Like check_compile
, but
delete the output file and
return true
if the
163 # compiler printed no messages.
164 proc check_no_compiler_messages_nocache
{args} {
165 set result
[eval check_compile $
args]
166 set lines
[lindex $result
0]
167 set output
[lindex $result
1]
168 remote_file build
delete $output
169 return [string match
"" $lines]
172 # Like check_no_compiler_messages_nocache
, but
cache the result.
173 # PROP is the
property we
're checking, and doubles as a prefix for
174 # temporary filenames.
175 proc check_no_compiler_messages {prop args} {
176 return [check_cached_effective_target $prop {
177 eval [list check_no_compiler_messages_nocache $prop] $args
181 # Like check_compile, but return true if the compiler printed no
182 # messages and if the contents of the output file satisfy PATTERN.
183 # If PATTERN has the form "!REGEXP", the contents satisfy it if they
184 # don't match regular expression REGEXP
, otherwise they satisfy it
185 #
if they
do match regular expression PATTERN.
(PATTERN can start
186 # with something like
"[!]" if the regular expression needs to match
187 #
"!" as the first character.)
189 #
Delete the output file before returning. The other arguments are
190 # as
for check_compile.
191 proc check_no_messages_and_pattern_nocache
{basename pattern
args} {
194 set result
[eval
[list check_compile $basename
] $
args]
195 set lines
[lindex $result
0]
196 set output
[lindex $result
1]
199 if { [string match
"" $lines] } {
200 set chan
[open
"$output"]
201 set invert
[regexp
{^
!(.
*)} $pattern dummy pattern
]
202 set ok
[expr
{ [regexp $pattern
[read $chan
]] != $invert
}]
206 remote_file build
delete $output
210 # Like check_no_messages_and_pattern_nocache
, but
cache the result.
211 # PROP is the
property we
're checking, and doubles as a prefix for
212 # temporary filenames.
213 proc check_no_messages_and_pattern {prop pattern args} {
214 return [check_cached_effective_target $prop {
215 eval [list check_no_messages_and_pattern_nocache $prop $pattern] $args
219 # Try to compile and run an executable from code CONTENTS. Return true
220 # if the compiler reports no messages and if execution "passes" in the
221 # usual DejaGNU sense. The arguments are as for check_compile, with
222 # TYPE implicitly being "executable".
223 proc check_runtime_nocache {basename contents args} {
226 set result [eval [list check_compile $basename executable $contents] $args]
227 set lines [lindex $result 0]
228 set output [lindex $result 1]
231 if { [string match "" $lines] } {
232 # No error messages, everything is OK.
233 set result [remote_load target "./$output" "" ""]
234 set status [lindex $result 0]
235 verbose "check_runtime_nocache $basename: status is <$status>" 2
236 if { $status == "pass" } {
240 remote_file build delete $output
244 # Like check_runtime_nocache, but cache the result. PROP is the
245 # property we're checking
, and doubles as a prefix
for temporary
247 proc check_runtime
{prop
args} {
250 return [check_cached_effective_target $prop
{
251 eval
[list check_runtime_nocache $prop
] $
args
255 #
Return 1 if GCC was configured with $pattern.
256 proc check_configured_with
{ pattern
} {
259 set gcc_output
[$
{tool
}_target_compile
"-v" "" "none" ""]
260 if { [ regexp
"Configured with: \[^\n\]*$pattern" $gcc_output ] } {
261 verbose
"Matched: $pattern" 2
265 verbose
"Failed to match: $pattern" 2
269 ###############################
270 # proc check_weak_available
{ }
271 ###############################
273 # weak symbols are only supported in some configs
/object formats
274 # this proc returns
1 if they
're supported, 0 if they're not
, or
-1 if unsure
276 proc check_weak_available
{ } {
279 # All mips targets should support it
281 if { [ string first
"mips" $target_cpu ] >= 0 } {
285 # All AIX targets should support it
287 if { [istarget
*-*-aix
*] } {
291 # All solaris2 targets should support it
293 if { [istarget
*-*-solaris2
*] } {
297 # Windows targets Cygwin and MingW32 support it
299 if { [istarget
*-*-cygwin
*] ||
[istarget
*-*-mingw
*] } {
303 # HP
-UX
10.X doesn
't support it
305 if { [istarget hppa*-*-hpux10*] } {
309 # nvptx (nearly) supports it
311 if { [istarget nvptx-*-*] } {
315 # ELF and ECOFF support it. a.out does with gas/gld but may also with
316 # other linkers, so we should try it
318 set objformat [gcc_target_object_format]
326 unknown { return -1 }
331 # return 1 if weak undefined symbols are supported.
333 proc check_effective_target_weak_undefined { } {
334 return [check_runtime weak_undefined {
335 extern void foo () __attribute__((weak));
336 int main (void) { if (foo) return 1; return 0; }
340 ###############################
341 # proc check_weak_override_available { }
342 ###############################
344 # Like check_weak_available, but return 0 if weak symbol definitions
345 # cannot be overridden.
347 proc check_weak_override_available { } {
348 if { [istarget *-*-mingw*] } {
351 return [check_weak_available]
354 ###############################
355 # proc check_visibility_available { what_kind }
356 ###############################
358 # The visibility attribute is only support in some object formats
359 # This proc returns 1 if it is supported, 0 if not.
360 # The argument is the kind of visibility, default/protected/hidden/internal.
362 proc check_visibility_available { what_kind } {
363 if [string match "" $what_kind] { set what_kind "hidden" }
365 return [check_no_compiler_messages visibility_available_$what_kind object "
366 void f() __attribute__((visibility(\"$what_kind\")));
371 ###############################
372 # proc check_alias_available { }
373 ###############################
375 # Determine if the target toolchain supports the alias attribute.
377 # Returns 2 if the target supports aliases. Returns 1 if the target
378 # only supports weak aliased. Returns 0 if the target does not
379 # support aliases at all. Returns -1 if support for aliases could not
382 proc check_alias_available { } {
383 global alias_available_saved
386 if [info exists alias_available_saved] {
387 verbose "check_alias_available returning saved $alias_available_saved" 2
391 verbose "check_alias_available compiling testfile $src" 2
392 set f [open $src "w"]
393 # Compile a small test program. The definition of "g" is
394 # necessary to keep the Solaris assembler from complaining
396 puts $f "#ifdef __cplusplus\nextern \"C\"\n#endif\n"
397 puts $f "void g() {} void f() __attribute__((alias(\"g\")));"
399 set lines [${tool}_target_compile $src $obj object ""]
401 remote_file build delete $obj
403 if [string match "" $lines] then {
404 # No error messages, everything is OK.
405 set alias_available_saved 2
407 if [regexp "alias definitions not supported" $lines] {
408 verbose "check_alias_available target does not support aliases" 2
410 set objformat [gcc_target_object_format]
412 if { $objformat == "elf" } {
413 verbose "check_alias_available but target uses ELF format, so it ought to" 2
414 set alias_available_saved -1
416 set alias_available_saved 0
419 if [regexp "only weak aliases are supported" $lines] {
420 verbose "check_alias_available target supports only weak aliases" 2
421 set alias_available_saved 1
423 set alias_available_saved -1
428 verbose "check_alias_available returning $alias_available_saved" 2
431 return $alias_available_saved
434 # Returns 1 if the target toolchain supports strong aliases, 0 otherwise.
436 proc check_effective_target_alias { } {
437 if { [check_alias_available] < 2 } {
444 # Returns 1 if the target toolchain supports ifunc, 0 otherwise.
446 proc check_ifunc_available { } {
447 return [check_no_compiler_messages ifunc_available object {
452 typedef void F (void);
453 F* g (void) { return &f_; }
454 void f () __attribute__ ((ifunc ("g")));
461 # Returns true if --gc-sections is supported on the target.
463 proc check_gc_sections_available { } {
464 global gc_sections_available_saved
467 if {![info exists gc_sections_available_saved]} {
468 # Some targets don't support gc
-sections despite whatever
's
469 # advertised by ld's options.
470 if { [istarget alpha
*-*-*]
471 ||
[istarget ia64
-*-*] } {
472 set gc_sections_available_saved
0
476 # elf2flt uses
-q
(--emit
-relocs
), which is incompatible with
478 if { [board_info target
exists ldflags
]
479 && [regexp
" -elf2flt\[ =\]" " [board_info target ldflags] "] } {
480 set gc_sections_available_saved
0
484 # VxWorks kernel modules are relocatable objects linked with
-r
,
485 #
while RTP executables are linked with
-q
(--emit
-relocs
).
486 # Both of these options are incompatible with
--gc
-sections.
487 if { [istarget
*-*-vxworks
*] } {
488 set gc_sections_available_saved
0
492 # Check
if the
ld used by gcc supports
--gc
-sections.
493 set gcc_ld
[lindex
[$
{tool
}_target_compile
"-print-prog-name=ld" "" "none" ""] 0]
494 set ld_output
[remote_exec host
"$gcc_ld" "--help"]
495 if { [ string first
"--gc-sections" $ld_output ] >= 0 } {
496 set gc_sections_available_saved
1
498 set gc_sections_available_saved
0
501 return $gc_sections_available_saved
504 #
Return 1 if according to target_info struct and explicit target list
505 # target is supposed to support trampolines.
507 proc check_effective_target_trampolines
{ } {
508 if [target_info
exists gcc
,no_trampolines
] {
511 if { [istarget avr
-*-*]
512 ||
[istarget msp430
-*-*]
513 ||
[istarget nvptx
-*-*]
514 ||
[istarget hppa2.0w
-hp
-hpux11.23
]
515 ||
[istarget hppa64
-hp
-hpux11.23
] } {
521 #
Return 1 if target has limited stack size.
523 proc check_effective_target_stack_size
{ } {
524 if [target_info
exists gcc
,stack_size
] {
530 #
Return the value attribute of an effective target
, otherwise
return 0.
532 proc dg
-effective
-target
-value
{ effective_target
} {
533 if { "$effective_target" == "stack_size" } {
534 if [check_effective_target_stack_size
] {
535 return [target_info gcc
,stack_size
]
542 #
Return 1 if signal.h is supported.
544 proc check_effective_target_signal
{ } {
545 if [target_info
exists gcc
,signal_suppress
] {
551 #
Return 1 if according to target_info struct and explicit target list
552 # target disables
-fdelete
-null
-pointer
-checks. Targets should
return 0
553 #
if they simply default to
-fno
-delete-null
-pointer
-checks but obey
554 #
-fdelete
-null
-pointer
-checks when passed explicitly
(and tests that
555 # depend
on this option should
do that
).
557 proc check_effective_target_keeps_null_pointer_checks
{ } {
558 if [target_info
exists keeps_null_pointer_checks
] {
561 if { [istarget msp430
-*-*] } {
567 #
Return the autofdo profile wrapper
569 # Linux by default allows
516KB of perf event buffers
570 # in
/proc
/sys
/kernel
/perf_event_mlock_kb
571 # Each individual perf tries to grab it
572 # This causes problems with parallel test suite runs. Instead
573 #
limit us to
8 pages
(32K
), which should be good enough
574 #
for the small test programs. With the default settings
575 # this allows parallelism of
16 and higher of parallel gcc
-auto
-profile
576 proc profopt
-perf
-wrapper
{ } {
578 return "$srcdir/../config/i386/gcc-auto-profile -o perf.data -m8 "
581 #
Return true
if profiling is supported
on the target.
583 proc check_profiling_available
{ test_what
} {
584 global profiling_available_saved
586 verbose
"Profiling argument is <$test_what>" 1
588 # These conditions depend
on the
argument so examine them before
589 # looking at the
cache variable.
591 # Tree profiling requires TLS runtime support.
592 if { $test_what
== "-fprofile-generate" } {
593 if { ![check_effective_target_tls_runtime
] } {
598 if { $test_what
== "-fauto-profile" } {
599 if { !([istarget i?
86-*-linux
*] ||
[istarget x86_64
-*-linux
*]) } {
600 verbose
"autofdo only supported on linux"
603 # not cross compiling?
605 verbose
"autofdo not supported for non native builds"
608 set event
[profopt
-perf
-wrapper
]
610 verbose
"autofdo not supported"
614 set status [remote_exec host
"$srcdir/../config/i386/gcc-auto-profile" "true -v >/dev/null"]
615 if { [lindex $
status 0] != 0 } {
616 verbose
"autofdo not supported because perf does not work"
620 # no good way to check this in advance
-- check later instead.
621 #
set status [remote_exec host
"create_gcov" "2>/dev/null"]
622 #
if { [lindex $
status 0] != 255 } {
623 # verbose
"autofdo not supported due to missing create_gcov"
628 # Support
for -p
on solaris2 relies
on mcrt1.o which comes with the
629 # vendor compiler. We cannot reliably predict the directory where the
630 # vendor compiler
(and thus mcrt1.o
) is installed so we can
't
631 # necessarily find mcrt1.o even if we have it.
632 if { [istarget *-*-solaris2*] && $test_what == "-p" } {
636 # We don't yet support profiling
for MIPS16.
637 if { [istarget mips
*-*-*]
638 && ![check_effective_target_nomips16
]
639 && ($test_what
== "-p" || $test_what == "-pg") } {
643 # MinGW does not support
-p.
644 if { [istarget
*-*-mingw
*] && $test_what
== "-p" } {
648 # cygwin does not support
-p.
649 if { [istarget
*-*-cygwin
*] && $test_what
== "-p" } {
653 # uClibc does not have gcrt1.o.
654 if { [check_effective_target_uclibc
]
655 && ($test_what
== "-p" || $test_what == "-pg") } {
659 # Now examine the
cache variable.
660 if {![info exists profiling_available_saved
]} {
661 # Some targets don
't have any implementation of __bb_init_func or are
662 # missing other needed machinery.
663 if {[istarget aarch64*-*-elf]
664 || [istarget am3*-*-linux*]
665 || [istarget arm*-*-eabi*]
666 || [istarget arm*-*-elf]
667 || [istarget arm*-*-symbianelf*]
668 || [istarget avr-*-*]
669 || [istarget bfin-*-*]
670 || [istarget cris-*-*]
671 || [istarget crisv32-*-*]
672 || [istarget csky-*-elf]
673 || [istarget fido-*-elf]
674 || [istarget h8300-*-*]
675 || [istarget lm32-*-*]
676 || [istarget m32c-*-elf]
677 || [istarget m68k-*-elf]
678 || [istarget m68k-*-uclinux*]
679 || [istarget mips*-*-elf*]
680 || [istarget mmix-*-*]
681 || [istarget mn10300-*-elf*]
682 || [istarget moxie-*-elf*]
683 || [istarget msp430-*-*]
684 || [istarget nds32*-*-elf]
685 || [istarget nios2-*-elf]
686 || [istarget nvptx-*-*]
687 || [istarget powerpc-*-eabi*]
688 || [istarget powerpc-*-elf]
690 || [istarget tic6x-*-elf]
691 || [istarget visium-*-*]
692 || [istarget xstormy16-*]
693 || [istarget xtensa*-*-elf]
694 || [istarget *-*-rtems*]
695 || [istarget *-*-vxworks*] } {
696 set profiling_available_saved 0
698 set profiling_available_saved 1
702 # -pg link test result can't be cached since it may change between
704 set profiling_working $profiling_available_saved
705 if { $profiling_available_saved
== 1
706 && ![check_no_compiler_messages_nocache profiling executable
{
707 int main
() { return 0; } } "-pg"] } {
708 set profiling_working
0
711 return $profiling_working
714 # Check to see
if a target is
"freestanding". This is as per the definition
715 # in Section
4 of C99 standard. Effectively
, it is a target which supports no
716 # extra headers or libraries other than what is considered essential.
717 proc check_effective_target_freestanding
{ } {
718 if { [istarget nvptx
-*-*] } {
724 #
Return 1 if target has packed layout of structure members by
725 # default
, 0 otherwise. Note that this is slightly different than
726 # whether the target has
"natural alignment": both attributes may be
729 proc check_effective_target_default_packed
{ } {
730 return [check_no_compiler_messages default_packed assembly
{
731 struct x
{ char a
; long b
; } c
;
732 int s
[sizeof
(c
) == sizeof
(char
) + sizeof
(long
) ?
1 : -1];
736 #
Return 1 if target has PCC_BITFIELD_TYPE_MATTERS defined. See
737 # documentation
, where the test also comes from.
739 proc check_effective_target_pcc_bitfield_type_matters
{ } {
740 # PCC_BITFIELD_TYPE_MATTERS isn
't just about unnamed or empty
741 # bitfields, but let's stick to the example code from the docs.
742 return [check_no_compiler_messages pcc_bitfield_type_matters assembly
{
743 struct foo1
{ char x
; char
:0; char y
; };
744 struct foo2
{ char x
; int :0; char y
; };
745 int s
[sizeof
(struct foo1
) != sizeof
(struct foo2
) ?
1 : -1];
749 # Add to FLAGS all the target
-specific flags needed to use thread
-local storage.
751 proc add_options_for_tls
{ flags
} {
752 #
On Solaris
9, __tls_get_addr
/___tls_get_addr only lives in
753 # libthread
, so always pass
-pthread
for native TLS. Same
for AIX.
754 # Need to duplicate native TLS check from
755 # check_effective_target_tls_native to avoid recursion.
756 if { ([istarget powerpc
-ibm
-aix
*]) &&
757 [check_no_messages_and_pattern tls_native
"!emutls" assembly {
759 int f
(void
) { return i
; }
760 void g
(int j
) { i
= j
; }
762 return "-pthread [g++_link_flags [get_multilibs "-pthread"] ] $flags "
767 #
Return 1 if indirect jumps are supported
, 0 otherwise.
769 proc check_effective_target_indirect_jumps
{} {
770 if { [istarget nvptx
-*-*] } {
776 #
Return 1 if nonlocal
goto is supported
, 0 otherwise.
778 proc check_effective_target_nonlocal_goto
{} {
779 if { [istarget nvptx
-*-*] } {
785 #
Return 1 if global constructors are supported
, 0 otherwise.
787 proc check_effective_target_global_constructor
{} {
788 if { [istarget nvptx
-*-*] } {
794 #
Return 1 if taking label
values is supported
, 0 otherwise.
796 proc check_effective_target_label_values
{} {
797 if { [istarget nvptx
-*-*] ||
[target_info
exists gcc
,no_label_values
] } {
804 #
Return 1 if builtin_return_address and builtin_frame_address are
805 # supported
, 0 otherwise.
807 proc check_effective_target_return_address
{} {
808 if { [istarget nvptx
-*-*] } {
814 #
Return 1 if the assembler does not verify function types against
815 # calls
, 0 otherwise. Such verification will typically
show up problems
816 # with K
&R C function declarations.
818 proc check_effective_target_untyped_assembly
{} {
819 if { [istarget nvptx
-*-*] } {
825 #
Return 1 if alloca is supported
, 0 otherwise.
827 proc check_effective_target_alloca
{} {
828 if { [istarget nvptx
-*-*] } {
829 return [check_no_compiler_messages alloca assembly
{
831 void g
(int n
) { f
(__builtin_alloca
(n
)); }
837 #
Return 1 if thread local storage
(TLS
) is supported
, 0 otherwise.
839 proc check_effective_target_tls
{} {
840 return [check_no_compiler_messages tls assembly
{
842 int f
(void
) { return i
; }
843 void g
(int j
) { i
= j
; }
847 #
Return 1 if *native
* thread local storage
(TLS
) is supported
, 0 otherwise.
849 proc check_effective_target_tls_native
{} {
850 # VxWorks uses emulated TLS machinery
, but with non
-standard helper
851 # functions
, so we fail to automatically detect it.
852 if { [istarget
*-*-vxworks
*] } {
856 return [check_no_messages_and_pattern tls_native
"!emutls" assembly {
858 int f
(void
) { return i
; }
859 void g
(int j
) { i
= j
; }
863 #
Return 1 if *emulated
* thread local storage
(TLS
) is supported
, 0 otherwise.
865 proc check_effective_target_tls_emulated
{} {
866 # VxWorks uses emulated TLS machinery
, but with non
-standard helper
867 # functions
, so we fail to automatically detect it.
868 if { [istarget
*-*-vxworks
*] } {
872 return [check_no_messages_and_pattern tls_emulated
"emutls" assembly {
874 int f
(void
) { return i
; }
875 void g
(int j
) { i
= j
; }
879 #
Return 1 if TLS executables can run correctly
, 0 otherwise.
881 proc check_effective_target_tls_runtime
{} {
882 # The runtime does not have TLS support
, but just
883 # running the test below is insufficient to
show this.
884 if { [istarget msp430
-*-*] ||
[istarget visium
-*-*] } {
887 return [check_runtime tls_runtime
{
888 __thread
int thr
= 0;
889 int main
(void
) { return thr
; }
890 } [add_options_for_tls
""]]
893 #
Return 1 if atomic compare
-and
-swap is supported
on 'int'
895 proc check_effective_target_cas_char
{} {
896 return [check_no_compiler_messages cas_char assembly
{
897 #ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1
903 proc check_effective_target_cas_int
{} {
904 return [check_no_compiler_messages cas_int assembly
{
905 #
if __INT_MAX__
== 0x7fff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_2
907 #elif __INT_MAX__
== 0x7fffffff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
915 #
Return 1 if -ffunction
-sections is supported
, 0 otherwise.
917 proc check_effective_target_function_sections
{} {
918 # Darwin has its own scheme and silently accepts
-ffunction
-sections.
919 if { [istarget
*-*-darwin
*] } {
923 return [check_no_compiler_messages functionsections assembly
{
925 } "-ffunction-sections"]
928 #
Return 1 if instruction scheduling is available
, 0 otherwise.
930 proc check_effective_target_scheduling
{} {
931 return [check_no_compiler_messages scheduling object
{
933 } "-fschedule-insns"]
936 #
Return 1 if trapping arithmetic is available
, 0 otherwise.
938 proc check_effective_target_trapping
{} {
939 return [check_no_compiler_messages trapping object
{
940 int add
(int a
, int b
) { return a
+ b
; }
944 #
Return 1 if compilation with
-fgraphite is error
-free
for trivial
947 proc check_effective_target_fgraphite
{} {
948 return [check_no_compiler_messages fgraphite object
{
953 #
Return 1 if compilation with
-fopenacc is error
-free
for trivial
956 proc check_effective_target_fopenacc
{} {
957 # nvptx can be built with the device
-side bits of openacc
, but it
958 # does not make sense to test it as an openacc host.
959 if [istarget nvptx
-*-*] { return 0 }
961 return [check_no_compiler_messages fopenacc object
{
966 #
Return 1 if compilation with
-fopenmp is error
-free
for trivial
969 proc check_effective_target_fopenmp
{} {
970 # nvptx can be built with the device
-side bits of libgomp
, but it
971 # does not make sense to test it as an openmp host.
972 if [istarget nvptx
-*-*] { return 0 }
974 return [check_no_compiler_messages fopenmp object
{
979 #
Return 1 if compilation with
-fgnu
-tm is error
-free
for trivial
982 proc check_effective_target_fgnu_tm
{} {
983 return [check_no_compiler_messages fgnu_tm object
{
988 #
Return 1 if the target supports mmap
, 0 otherwise.
990 proc check_effective_target_mmap
{} {
991 return [check_function_available
"mmap"]
994 #
Return 1 if the target supports dlopen
, 0 otherwise.
995 proc check_effective_target_dlopen
{} {
996 return [check_no_compiler_messages dlopen executable
{
998 int main
(void
) { dlopen
("dummy.so", RTLD_NOW); }
999 } [add_options_for_dlopen
""]]
1002 proc add_options_for_dlopen
{ flags
} {
1003 return "$flags -ldl"
1006 #
Return 1 if the target supports clone
, 0 otherwise.
1007 proc check_effective_target_clone
{} {
1008 return [check_function_available
"clone"]
1011 #
Return 1 if the target supports setrlimit
, 0 otherwise.
1012 proc check_effective_target_setrlimit
{} {
1013 # Darwin has non
-posix compliant RLIMIT_AS
1014 if { [istarget
*-*-darwin
*] } {
1017 return [check_function_available
"setrlimit"]
1020 #
Return 1 if the target supports gettimeofday
, 0 otherwise.
1021 proc check_effective_target_gettimeofday
{} {
1022 return [check_function_available
"gettimeofday"]
1025 #
Return 1 if the target supports swapcontext
, 0 otherwise.
1026 proc check_effective_target_swapcontext
{} {
1027 return [check_no_compiler_messages swapcontext executable
{
1028 #
include <ucontext.h
>
1031 ucontext_t orig_context
,child_context
;
1032 if (swapcontext
(&child_context
, &orig_context
) < 0) { }
1037 #
Return 1 if compilation with
-pthread is error
-free
for trivial
1038 # code
, 0 otherwise.
1040 proc check_effective_target_pthread
{} {
1041 return [check_no_compiler_messages pthread object
{
1046 #
Return 1 if compilation with
-gstabs is error
-free
for trivial
1047 # code
, 0 otherwise.
1049 proc check_effective_target_stabs
{} {
1050 return [check_no_compiler_messages stabs object
{
1055 #
Return 1 if compilation with
-mpe
-aligned
-commons is error
-free
1056 #
for trivial code
, 0 otherwise.
1058 proc check_effective_target_pe_aligned_commons
{} {
1059 if { [istarget
*-*-cygwin
*] ||
[istarget
*-*-mingw
*] } {
1060 return [check_no_compiler_messages pe_aligned_commons object
{
1062 } "-mpe-aligned-commons"]
1067 #
Return 1 if the target supports
-static
1068 proc check_effective_target_static
{} {
1069 return [check_no_compiler_messages static executable
{
1070 int main
(void
) { return 0; }
1074 #
Return 1 if the target supports
-fstack
-protector
1075 proc check_effective_target_fstack_protector
{} {
1076 return [check_runtime fstack_protector
{
1078 int main
(int argc
, char
*argv
[]) {
1080 return !strcpy
(buf
, strrchr
(argv
[0], '/'));
1082 } "-fstack-protector"]
1085 #
Return 1 if the target supports
-fstack
-check or
-fstack
-check
=$stack_kind
1086 proc check_stack_check_available
{ stack_kind
} {
1087 if [string match
"" $stack_kind] then {
1088 set stack_opt
"-fstack-check"
1089 } else { set stack_opt
"-fstack-check=$stack_kind" }
1091 return [check_no_compiler_messages stack_check_$stack_kind executable
{
1092 int main
(void
) { return 0; }
1096 #
Return 1 if compilation with
-freorder
-blocks
-and
-partition is error
-free
1097 #
for trivial code
, 0 otherwise. As some targets
(ARM
for example
) only
1098 # warn when
-fprofile
-use is also supplied we test that combination too.
1100 proc check_effective_target_freorder
{} {
1101 if { [check_no_compiler_messages freorder object
{
1103 } "-freorder-blocks-and-partition"]
1104 && [check_no_compiler_messages fprofile_use_freorder object
{
1106 } "-fprofile-use -freorder-blocks-and-partition"] } {
1112 #
Return 1 if -fpic and
-fPIC are supported
, as in no warnings or errors
1113 # emitted
, 0 otherwise. Whether a shared library can actually be built is
1114 # out of scope
for this test.
1116 proc check_effective_target_fpic
{ } {
1117 # Note that M68K has a multilib that supports
-fpic but not
1118 #
-fPIC
, so we need to check both. We test with a
program that
1119 # requires GOT references.
1120 foreach
arg {fpic fPIC
} {
1121 if [check_no_compiler_messages $
arg object
{
1122 extern
int foo
(void
); extern
int bar
;
1123 int baz
(void
) { return foo
() + bar
; }
1131 #
On AArch64
, if -fpic is not supported
, then we will fall
back to
-fPIC
1132 # silently. So
, we can
't rely on above "check_effective_target_fpic" as it
1133 # assumes compiler will give warning if -fpic not supported. Here we check
1134 # whether binutils supports those new -fpic relocation modifiers, and assume
1135 # -fpic is supported if there is binutils support. GCC configuration will
1136 # enable -fpic for AArch64 in this case.
1138 # "check_effective_target_aarch64_small_fpic" is dedicated for checking small
1139 # memory model -fpic relocation types.
1141 proc check_effective_target_aarch64_small_fpic { } {
1142 if { [istarget aarch64*-*-*] } {
1143 return [check_no_compiler_messages aarch64_small_fpic object {
1144 void foo (void) { asm ("ldr x0, [x2, #:gotpage_lo15:globalsym]"); }
1151 # On AArch64, instruction sequence for TLS LE under -mtls-size=32 will utilize
1152 # the relocation modifier "tprel_g0_nc" together with MOVK, it's only supported
1153 # in binutils since
2015-03-04 as PR gas
/17843.
1155 # This test directive make sure binutils support all features needed by TLS LE
1156 # under
-mtls
-size
=32 on AArch64.
1158 proc check_effective_target_aarch64_tlsle32
{ } {
1159 if { [istarget aarch64
*-*-*] } {
1160 return [check_no_compiler_messages aarch64_tlsle32 object
{
1161 void foo
(void
) { asm
("movk x1,#:tprel_g0_nc:t1"); }
1168 #
Return 1 if -shared is supported
, as in no warnings or errors
1169 # emitted
, 0 otherwise.
1171 proc check_effective_target_shared
{ } {
1172 # Note that M68K has a multilib that supports
-fpic but not
1173 #
-fPIC
, so we need to check both. We test with a
program that
1174 # requires GOT references.
1175 return [check_no_compiler_messages shared executable
{
1176 extern
int foo
(void
); extern
int bar
;
1177 int baz
(void
) { return foo
() + bar
; }
1181 #
Return 1 if -pie
, -fpie and
-fPIE are supported
, 0 otherwise.
1183 proc check_effective_target_pie
{ } {
1184 if { [istarget
*-*-darwin\
[912\
]*]
1185 ||
[istarget
*-*-dragonfly
*]
1186 ||
[istarget
*-*-freebsd
*]
1187 ||
[istarget
*-*-linux
*]
1188 ||
[istarget
*-*-gnu
*] } {
1191 if { [istarget
*-*-solaris2.1\
[1-9\
]*] } {
1192 # Full PIE support was added in Solaris
11.3, but gcc errors out
1193 #
if missing
, so check
for that.
1194 return [check_no_compiler_messages pie executable
{
1195 int main
(void
) { return 0; }
1201 #
Return true
if the target supports
-mpaired
-single
(as used
on MIPS
).
1203 proc check_effective_target_mpaired_single
{ } {
1204 return [check_no_compiler_messages mpaired_single object
{
1206 } "-mpaired-single"]
1209 #
Return true
if the target has access to FPU instructions.
1211 proc check_effective_target_hard_float
{ } {
1212 if { [istarget mips
*-*-*] } {
1213 return [check_no_compiler_messages hard_float assembly
{
1214 #
if (defined __mips_soft_float || defined __mips16
)
1215 #error __mips_soft_float || __mips16
1220 # This proc is actually checking the availabilty of FPU
1221 # support
for doubles
, so
on the RX we must fail
if the
1222 #
64-bit double multilib has been selected.
1223 if { [istarget rx
-*-*] } {
1225 #
return [check_no_compiler_messages hard_float assembly
{
1226 #
if defined __RX_64_BIT_DOUBLES__
1227 #error __RX_64_BIT_DOUBLES__
1232 # The generic test doesn
't work for C-SKY because some cores have
1233 # hard float for single precision only.
1234 if { [istarget csky*-*-*] } {
1235 return [check_no_compiler_messages hard_float assembly {
1236 #if defined __csky_soft_float__
1237 #error __csky_soft_float__
1242 # The generic test equates hard_float with "no call for adding doubles".
1243 return [check_no_messages_and_pattern hard_float "!\\(call" rtl-expand {
1244 double a (double b, double c) { return b + c; }
1248 # Return true if the target is a 64-bit MIPS target.
1250 proc check_effective_target_mips64 { } {
1251 return [check_no_compiler_messages mips64 assembly {
1258 # Return true if the target is a MIPS target that does not produce
1261 proc check_effective_target_nomips16 { } {
1262 return [check_no_compiler_messages nomips16 object {
1266 /* A cheap way of testing for -mflip-mips16. */
1267 void foo (void) { asm ("addiu $20,$20,1"); }
1268 void bar (void) { asm ("addiu $20,$20,1"); }
1273 # Add the options needed for MIPS16 function attributes. At the moment,
1274 # we don't support MIPS16 PIC.
1276 proc add_options_for_mips16_attribute
{ flags
} {
1277 return "$flags -mno-abicalls -fno-pic -DMIPS16=__attribute__((mips16))"
1280 #
Return true
if we can force a
mode that allows MIPS16 code generation.
1281 # We don
't support MIPS16 PIC, and only support MIPS16 -mhard-float
1284 proc check_effective_target_mips16_attribute { } {
1285 return [check_no_compiler_messages mips16_attribute assembly {
1289 #if defined __mips_hard_float \
1290 && (!defined _ABIO32 || _MIPS_SIM != _ABIO32) \
1291 && (!defined _ABIO64 || _MIPS_SIM != _ABIO64)
1292 #error __mips_hard_float && (!_ABIO32 || !_ABIO64)
1294 } [add_options_for_mips16_attribute ""]]
1297 # Return 1 if the target supports long double larger than double when
1298 # using the new ABI, 0 otherwise.
1300 proc check_effective_target_mips_newabi_large_long_double { } {
1301 return [check_no_compiler_messages mips_newabi_large_long_double object {
1302 int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
1306 # Return true if the target is a MIPS target that has access
1307 # to the LL and SC instructions.
1309 proc check_effective_target_mips_llsc { } {
1310 if { ![istarget mips*-*-*] } {
1313 # Assume that these instructions are always implemented for
1314 # non-elf* targets, via emulation if necessary.
1315 if { ![istarget *-*-elf*] } {
1318 # Otherwise assume LL/SC support for everything but MIPS I.
1319 return [check_no_compiler_messages mips_llsc assembly {
1326 # Return true if the target is a MIPS target that uses in-place relocations.
1328 proc check_effective_target_mips_rel { } {
1329 if { ![istarget mips*-*-*] } {
1332 return [check_no_compiler_messages mips_rel object {
1333 #if (defined _ABIN32 && _MIPS_SIM == _ABIN32) \
1334 || (defined _ABI64 && _MIPS_SIM == _ABI64)
1335 #error _ABIN32 && (_ABIN32 || _ABI64)
1340 # Return true if the target is a MIPS target that uses the EABI.
1342 proc check_effective_target_mips_eabi { } {
1343 if { ![istarget mips*-*-*] } {
1346 return [check_no_compiler_messages mips_eabi object {
1353 # Return 1 if the current multilib does not generate PIC by default.
1355 proc check_effective_target_nonpic { } {
1356 return [check_no_compiler_messages nonpic assembly {
1363 # Return 1 if the current multilib generates PIE by default.
1365 proc check_effective_target_pie_enabled { } {
1366 return [check_no_compiler_messages pie_enabled assembly {
1373 # Return 1 if the target generates -fstack-protector by default.
1375 proc check_effective_target_fstack_protector_enabled {} {
1376 return [ check_no_compiler_messages fstack_protector_enabled assembly {
1377 #if !defined(__SSP__) && !defined(__SSP_ALL__) && \
1378 !defined(__SSP_STRONG__) && !defined(__SSP_EXPICIT__)
1384 # Return 1 if the target does not use a status wrapper.
1386 proc check_effective_target_unwrapped { } {
1387 if { [target_info needs_status_wrapper] != "" \
1388 && [target_info needs_status_wrapper] != "0" } {
1394 # Return true if iconv is supported on the target. In particular IBM1047.
1396 proc check_iconv_available { test_what } {
1399 # If the tool configuration file has not set libiconv, try "-liconv"
1400 if { ![info exists libiconv] } {
1401 set libiconv "-liconv"
1403 set test_what [lindex $test_what 1]
1404 return [check_runtime_nocache $test_what [subst {
1410 cd = iconv_open ("$test_what", "UTF-8");
1411 if (cd == (iconv_t) -1)
1418 # Return true if the atomic library is supported on the target.
1419 proc check_effective_target_libatomic_available { } {
1420 return [check_no_compiler_messages libatomic_available executable {
1421 int main (void) { return 0; }
1425 # Return 1 if an ASCII locale is supported on this host, 0 otherwise.
1427 proc check_ascii_locale_available { } {
1431 # Return true if named sections are supported on this target.
1433 proc check_named_sections_available { } {
1434 return [check_no_compiler_messages named_sections assembly {
1435 int __attribute__ ((section("whatever"))) foo;
1439 # Return true if the "naked" function attribute is supported on this target.
1441 proc check_effective_target_naked_functions { } {
1442 return [check_no_compiler_messages naked_functions assembly {
1443 void f() __attribute__((naked));
1447 # Return 1 if the target supports Fortran real kinds larger than real(8),
1450 # When the target name changes, replace the cached result.
1452 proc check_effective_target_fortran_large_real { } {
1453 return [check_no_compiler_messages fortran_large_real executable {
1455 integer,parameter :: k = selected_real_kind (precision (0.0_8) + 1)
1462 # Return 1 if the target supports Fortran real kind real(16),
1463 # 0 otherwise. Contrary to check_effective_target_fortran_large_real
1464 # this checks for Real(16) only; the other returned real(10) if
1465 # both real(10) and real(16) are available.
1467 # When the target name changes, replace the cached result.
1469 proc check_effective_target_fortran_real_16 { } {
1470 return [check_no_compiler_messages fortran_real_16 executable {
1478 # Return 1 if the target supports Fortran real kind 10,
1479 # 0 otherwise. Contrary to check_effective_target_fortran_large_real
1480 # this checks for real(10) only.
1482 # When the target name changes, replace the cached result.
1484 proc check_effective_target_fortran_real_10 { } {
1485 return [check_no_compiler_messages fortran_real_10 executable {
1493 # Return 1 if the target supports Fortran's IEEE modules
,
1496 # When the target
name changes
, replace the cached result.
1498 proc check_effective_target_fortran_ieee
{ flags
} {
1499 return [check_no_compiler_messages fortran_ieee executable
{
1501 use
, intrinsic
:: ieee_features
1507 #
Return 1 if the target supports
SQRT for the
largest floating
-point
1508 # type.
(Some targets lack the libm support
for this FP type.
)
1509 #
On most targets
, this check effectively checks either whether sqrtl is
1510 # available or
on __float128 systems whether libquadmath is installed
,
1511 # which provides sqrtq.
1513 # When the target
name changes
, replace the cached result.
1515 proc check_effective_target_fortran_largest_fp_has_sqrt
{ } {
1516 return [check_no_compiler_messages fortran_largest_fp_has_sqrt executable
{
1518 use iso_fortran_env
, only
: real_kinds
1519 integer,parameter
:: maxFP
= real_kinds
(ubound
(real_kinds
,dim
=1))
1520 real
(kind
=maxFP
), volatile
:: x
1528 #
Return 1 if the target supports Fortran
integer kinds larger than
1529 #
integer(8), 0 otherwise.
1531 # When the target
name changes
, replace the cached result.
1533 proc check_effective_target_fortran_large_int
{ } {
1534 return [check_no_compiler_messages fortran_large_int executable
{
1536 integer,parameter
:: k
= selected_int_kind
(range
(0_8
) + 1)
1537 integer(kind
=k
) :: i
1542 #
Return 1 if the target supports Fortran
integer(16), 0 otherwise.
1544 # When the target
name changes
, replace the cached result.
1546 proc check_effective_target_fortran_integer_16
{ } {
1547 return [check_no_compiler_messages fortran_integer_16 executable
{
1554 #
Return 1 if we can statically link libgfortran
, 0 otherwise.
1556 # When the target
name changes
, replace the cached result.
1558 proc check_effective_target_static_libgfortran
{ } {
1559 return [check_no_compiler_messages static_libgfortran executable
{
1566 #
Return 1 if we can use the
-rdynamic option
, 0 otherwise.
1568 proc check_effective_target_rdynamic
{ } {
1569 return [check_no_compiler_messages rdynamic executable
{
1570 int main
() { return 0; }
1574 proc check_linker_plugin_available
{ } {
1575 return [check_no_compiler_messages_nocache linker_plugin executable
{
1576 int main
() { return 0; }
1577 } "-flto -fuse-linker-plugin"]
1580 #
Return 1 if the target OS supports running SSE executables
, 0
1581 # otherwise.
Cache the result.
1583 proc check_sse_os_support_available
{ } {
1584 return [check_cached_effective_target sse_os_support_available
{
1585 #
If this is not the right target
then we can skip the test.
1586 if { !([istarget i?
86-*-*] ||
[istarget x86_64
-*-*]) } {
1588 } elseif
{ [istarget i?
86-*-solaris2
*] } {
1589 # The Solaris
2 kernel doesn
't save and restore SSE registers
1590 # before Solaris 9 4/04. Before that, executables die with SIGILL.
1591 check_runtime_nocache sse_os_support_available {
1594 asm volatile ("movaps %xmm0,%xmm0");
1604 # Return 1 if the target OS supports running AVX executables, 0
1605 # otherwise. Cache the result.
1607 proc check_avx_os_support_available { } {
1608 return [check_cached_effective_target avx_os_support_available {
1609 # If this is not the right target then we can skip the test.
1610 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1613 # Check that OS has AVX and SSE saving enabled.
1614 check_runtime_nocache avx_os_support_available {
1617 unsigned int eax, edx;
1619 asm ("xgetbv" : "=a" (eax), "=d" (edx) : "c" (0));
1620 return (eax & 0x06) != 0x06;
1627 # Return 1 if the target OS supports running AVX executables, 0
1628 # otherwise. Cache the result.
1630 proc check_avx512_os_support_available { } {
1631 return [check_cached_effective_target avx512_os_support_available {
1632 # If this is not the right target then we can skip the test.
1633 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1636 # Check that OS has AVX512, AVX and SSE saving enabled.
1637 check_runtime_nocache avx512_os_support_available {
1640 unsigned int eax, edx;
1642 asm ("xgetbv" : "=a" (eax), "=d" (edx) : "c" (0));
1643 return (eax & 0xe6) != 0xe6;
1650 # Return 1 if the target supports executing SSE instructions, 0
1651 # otherwise. Cache the result.
1653 proc check_sse_hw_available { } {
1654 return [check_cached_effective_target sse_hw_available {
1655 # If this is not the right target then we can skip the test.
1656 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1659 check_runtime_nocache sse_hw_available {
1663 unsigned int eax, ebx, ecx, edx;
1664 if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1667 return !(edx & bit_SSE);
1674 # Return 1 if the target supports executing SSE2 instructions, 0
1675 # otherwise. Cache the result.
1677 proc check_sse2_hw_available { } {
1678 return [check_cached_effective_target sse2_hw_available {
1679 # If this is not the right target then we can skip the test.
1680 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1683 check_runtime_nocache sse2_hw_available {
1687 unsigned int eax, ebx, ecx, edx;
1688 if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1691 return !(edx & bit_SSE2);
1698 # Return 1 if the target supports executing SSE4 instructions, 0
1699 # otherwise. Cache the result.
1701 proc check_sse4_hw_available { } {
1702 return [check_cached_effective_target sse4_hw_available {
1703 # If this is not the right target then we can skip the test.
1704 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1707 check_runtime_nocache sse4_hw_available {
1711 unsigned int eax, ebx, ecx, edx;
1712 if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1715 return !(ecx & bit_SSE4_2);
1722 # Return 1 if the target supports executing AVX instructions, 0
1723 # otherwise. Cache the result.
1725 proc check_avx_hw_available { } {
1726 return [check_cached_effective_target avx_hw_available {
1727 # If this is not the right target then we can skip the test.
1728 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1731 check_runtime_nocache avx_hw_available {
1735 unsigned int eax, ebx, ecx, edx;
1736 if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1739 return ((ecx & (bit_AVX | bit_OSXSAVE))
1740 != (bit_AVX | bit_OSXSAVE));
1747 # Return 1 if the target supports executing AVX2 instructions, 0
1748 # otherwise. Cache the result.
1750 proc check_avx2_hw_available { } {
1751 return [check_cached_effective_target avx2_hw_available {
1752 # If this is not the right target then we can skip the test.
1753 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1756 check_runtime_nocache avx2_hw_available {
1761 unsigned int eax, ebx, ecx, edx;
1763 if (__get_cpuid_max (0, NULL) < 7)
1766 __cpuid (1, eax, ebx, ecx, edx);
1768 if (!(ecx & bit_OSXSAVE))
1771 __cpuid_count (7, 0, eax, ebx, ecx, edx);
1773 return !(ebx & bit_AVX2);
1780 # Return 1 if the target supports executing AVX512 foundation instructions, 0
1781 # otherwise. Cache the result.
1783 proc check_avx512f_hw_available { } {
1784 return [check_cached_effective_target avx512f_hw_available {
1785 # If this is not the right target then we can skip the test.
1786 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1789 check_runtime_nocache avx512f_hw_available {
1794 unsigned int eax, ebx, ecx, edx;
1796 if (__get_cpuid_max (0, NULL) < 7)
1799 __cpuid (1, eax, ebx, ecx, edx);
1801 if (!(ecx & bit_OSXSAVE))
1804 __cpuid_count (7, 0, eax, ebx, ecx, edx);
1806 return !(ebx & bit_AVX512F);
1813 # Return 1 if the target supports running SSE executables, 0 otherwise.
1815 proc check_effective_target_sse_runtime { } {
1816 if { [check_effective_target_sse]
1817 && [check_sse_hw_available]
1818 && [check_sse_os_support_available] } {
1824 # Return 1 if the target supports running SSE2 executables, 0 otherwise.
1826 proc check_effective_target_sse2_runtime { } {
1827 if { [check_effective_target_sse2]
1828 && [check_sse2_hw_available]
1829 && [check_sse_os_support_available] } {
1835 # Return 1 if the target supports running SSE4 executables, 0 otherwise.
1837 proc check_effective_target_sse4_runtime { } {
1838 if { [check_effective_target_sse4]
1839 && [check_sse4_hw_available]
1840 && [check_sse_os_support_available] } {
1846 # Return 1 if the target supports running AVX executables, 0 otherwise.
1848 proc check_effective_target_avx_runtime { } {
1849 if { [check_effective_target_avx]
1850 && [check_avx_hw_available]
1851 && [check_avx_os_support_available] } {
1857 # Return 1 if the target supports running AVX2 executables, 0 otherwise.
1859 proc check_effective_target_avx2_runtime { } {
1860 if { [check_effective_target_avx2]
1861 && [check_avx2_hw_available]
1862 && [check_avx_os_support_available] } {
1868 # Return 1 if the target supports running AVX512f executables, 0 otherwise.
1870 proc check_effective_target_avx512f_runtime { } {
1871 if { [check_effective_target_avx512f]
1872 && [check_avx512f_hw_available]
1873 && [check_avx512_os_support_available] } {
1879 # Return 1 if bmi2 instructions can be compiled.
1880 proc check_effective_target_bmi2 { } {
1881 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1884 return [check_no_compiler_messages bmi2 object {
1886 _bzhi_u32 (unsigned int __X, unsigned int __Y)
1888 return __builtin_ia32_bzhi_si (__X, __Y);
1893 # Return 1 if the target supports executing MIPS Paired-Single instructions,
1894 # 0 otherwise. Cache the result.
1896 proc check_mpaired_single_hw_available { } {
1897 return [check_cached_effective_target mpaired_single_hw_available {
1898 # If this is not the right target then we can skip the test.
1899 if { !([istarget mips*-*-*]) } {
1902 check_runtime_nocache mpaired_single_hw_available {
1905 asm volatile ("pll.ps $f2,$f4,$f6");
1913 # Return 1 if the target supports executing Loongson vector instructions,
1914 # 0 otherwise. Cache the result.
1916 proc check_mips_loongson_hw_available { } {
1917 return [check_cached_effective_target mips_loongson_hw_available {
1918 # If this is not the right target then we can skip the test.
1919 if { !([istarget mips*-*-*]) } {
1922 check_runtime_nocache mips_loongson_hw_available {
1923 #include <loongson.h>
1926 asm volatile ("paddw $f2,$f4,$f6");
1934 # Return 1 if the target supports executing MIPS MSA instructions, 0
1935 # otherwise. Cache the result.
1937 proc check_mips_msa_hw_available { } {
1938 return [check_cached_effective_target mips_msa_hw_available {
1939 # If this is not the right target then we can skip the test.
1940 if { !([istarget mips*-*-*]) } {
1943 check_runtime_nocache mips_msa_hw_available {
1944 #if !defined(__mips_msa)
1945 #error "MSA NOT AVAIL"
1947 #if !(((__mips == 64) || (__mips == 32)) && (__mips_isa_rev >= 2))
1948 #error "MSA NOT AVAIL FOR ISA REV < 2"
1950 #if !defined(__mips_hard_float)
1951 #error "MSA HARD_FLOAT REQUIRED"
1953 #if __mips_fpr != 64
1954 #error "MSA 64-bit FPR REQUIRED"
1960 v8i16 v = __builtin_msa_ldi_h (0);
1970 # Return 1 if the target supports running MIPS Paired-Single
1971 # executables, 0 otherwise.
1973 proc check_effective_target_mpaired_single_runtime { } {
1974 if { [check_effective_target_mpaired_single]
1975 && [check_mpaired_single_hw_available] } {
1981 # Return 1 if the target supports running Loongson executables, 0 otherwise.
1983 proc check_effective_target_mips_loongson_runtime { } {
1984 if { [check_effective_target_mips_loongson]
1985 && [check_mips_loongson_hw_available] } {
1991 # Return 1 if the target supports running MIPS MSA executables, 0 otherwise.
1993 proc check_effective_target_mips_msa_runtime { } {
1994 if { [check_effective_target_mips_msa]
1995 && [check_mips_msa_hw_available] } {
2001 # Return 1 if we are compiling for 64-bit PowerPC but we do not use direct
2002 # move instructions for moves from GPR to FPR.
2004 proc check_effective_target_powerpc64_no_dm { } {
2005 # The "mulld" checks if we are generating PowerPC64 code. The "lfd"
2006 # checks if we do not use direct moves, but use the old-fashioned
2007 # slower move-via-the-stack.
2008 return [check_no_messages_and_pattern powerpc64_no_dm \
2009 {\mmulld\M.*\mlfd} assembly {
2010 double f(long long x) { return x*x; }
2014 # Return 1 if the target supports the __builtin_cpu_supports built-in,
2015 # including having a new enough library to support the test. Cache the result.
2016 # Require at least a power7 to run on.
2018 proc check_ppc_cpu_supports_hw_available { } {
2019 return [check_cached_effective_target ppc_cpu_supports_hw_available {
2020 # Some simulators are known to not support VSX/power8 instructions.
2021 # For now, disable on Darwin
2022 if { [istarget powerpc-*-eabi]
2023 || [istarget powerpc*-*-eabispe]
2024 || [istarget *-*-darwin*]} {
2028 check_runtime_nocache ppc_cpu_supports_hw_available {
2032 asm volatile ("xxlor vs0,vs0,vs0");
2034 asm volatile ("xxlor 0,0,0");
2036 if (!__builtin_cpu_supports ("vsx"))
2045 # Return 1 if the target supports executing 750CL paired-single instructions, 0
2046 # otherwise. Cache the result.
2048 proc check_750cl_hw_available { } {
2049 return [check_cached_effective_target 750cl_hw_available {
2050 # If this is not the right target then we can skip the test.
2051 if { ![istarget powerpc-*paired*] } {
2054 check_runtime_nocache 750cl_hw_available {
2058 asm volatile ("ps_mul v0,v0,v0");
2060 asm volatile ("ps_mul 0,0,0");
2069 # Return 1 if the target supports executing power8 vector instructions, 0
2070 # otherwise. Cache the result.
2072 proc check_p8vector_hw_available { } {
2073 return [check_cached_effective_target p8vector_hw_available {
2074 # Some simulators are known to not support VSX/power8 instructions.
2075 # For now, disable on Darwin
2076 if { [istarget powerpc-*-eabi]
2077 || [istarget powerpc*-*-eabispe]
2078 || [istarget *-*-darwin*]} {
2081 set options "-mpower8-vector"
2082 check_runtime_nocache p8vector_hw_available {
2086 asm volatile ("xxlorc vs0,vs0,vs0");
2088 asm volatile ("xxlorc 0,0,0");
2097 # Return 1 if the target supports executing power9 vector instructions, 0
2098 # otherwise. Cache the result.
2100 proc check_p9vector_hw_available { } {
2101 return [check_cached_effective_target p9vector_hw_available {
2102 # Some simulators are known to not support VSX/power8/power9
2103 # instructions. For now, disable on Darwin.
2104 if { [istarget powerpc-*-eabi]
2105 || [istarget powerpc*-*-eabispe]
2106 || [istarget *-*-darwin*]} {
2109 set options "-mpower9-vector"
2110 check_runtime_nocache p9vector_hw_available {
2114 vector double v = (vector double) { 0.0, 0.0 };
2115 asm ("xsxexpdp %0,%1" : "+r" (e) : "wa" (v));
2123 # Return 1 if the target supports executing power9 modulo instructions, 0
2124 # otherwise. Cache the result.
2126 proc check_p9modulo_hw_available { } {
2127 return [check_cached_effective_target p9modulo_hw_available {
2128 # Some simulators are known to not support VSX/power8/power9
2129 # instructions. For now, disable on Darwin.
2130 if { [istarget powerpc-*-eabi]
2131 || [istarget powerpc*-*-eabispe]
2132 || [istarget *-*-darwin*]} {
2135 set options "-mmodulo"
2136 check_runtime_nocache p9modulo_hw_available {
2139 int i = 5, j = 3, r = -1;
2140 asm ("modsw %0,%1,%2" : "+r" (r) : "r" (i), "r" (j));
2148 # Return 1 if the target supports executing __float128 on PowerPC via software
2149 # emulation, 0 otherwise. Cache the result.
2151 proc check_ppc_float128_sw_available { } {
2152 return [check_cached_effective_target ppc_float128_sw_available {
2153 # Some simulators are known to not support VSX/power8/power9
2154 # instructions. For now, disable on Darwin.
2155 if { [istarget powerpc-*-eabi]
2156 || [istarget powerpc*-*-eabispe]
2157 || [istarget *-*-darwin*]} {
2160 set options "-mfloat128 -mvsx"
2161 check_runtime_nocache ppc_float128_sw_available {
2162 volatile __float128 x = 1.0q;
2163 volatile __float128 y = 2.0q;
2166 __float128 z = x + y;
2174 # Return 1 if the target supports executing __float128 on PowerPC via power9
2175 # hardware instructions, 0 otherwise. Cache the result.
2177 proc check_ppc_float128_hw_available { } {
2178 return [check_cached_effective_target ppc_float128_hw_available {
2179 # Some simulators are known to not support VSX/power8/power9
2180 # instructions. For now, disable on Darwin.
2181 if { [istarget powerpc-*-eabi]
2182 || [istarget powerpc*-*-eabispe]
2183 || [istarget *-*-darwin*]} {
2186 set options "-mfloat128 -mvsx -mfloat128-hardware -mpower9-vector"
2187 check_runtime_nocache ppc_float128_hw_available {
2188 volatile __float128 x = 1.0q;
2189 volatile __float128 y = 2.0q;
2192 __float128 z = x + y;
2193 __float128 w = -1.0q;
2195 __asm__ ("xsaddqp %0,%1,%2" : "+v" (w) : "v" (x), "v" (y));
2196 return ((z != 3.0q) || (z != w));
2203 # Return 1 if the target supports executing VSX instructions, 0
2204 # otherwise. Cache the result.
2206 proc check_vsx_hw_available { } {
2207 return [check_cached_effective_target vsx_hw_available {
2208 # Some simulators are known to not support VSX instructions.
2209 # For now, disable on Darwin
2210 if { [istarget powerpc-*-eabi]
2211 || [istarget powerpc*-*-eabispe]
2212 || [istarget *-*-darwin*]} {
2216 check_runtime_nocache vsx_hw_available {
2220 asm volatile ("xxlor vs0,vs0,vs0");
2222 asm volatile ("xxlor 0,0,0");
2231 # Return 1 if the target supports executing AltiVec instructions, 0
2232 # otherwise. Cache the result.
2234 proc check_vmx_hw_available { } {
2235 return [check_cached_effective_target vmx_hw_available {
2236 # Some simulators are known to not support VMX instructions.
2237 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] } {
2240 # Most targets don't require special flags
for this test case
, but
2241 # Darwin does. Just to be sure
, make sure VSX is not enabled
for
2242 # the altivec tests.
2243 if { [istarget
*-*-darwin
*]
2244 ||
[istarget
*-*-aix
*] } {
2245 set options
"-maltivec -mno-vsx"
2247 set options
"-mno-vsx"
2249 check_runtime_nocache vmx_hw_available
{
2253 asm volatile
("vor v0,v0,v0");
2255 asm volatile
("vor 0,0,0");
2264 proc check_ppc_recip_hw_available
{ } {
2265 return [check_cached_effective_target ppc_recip_hw_available
{
2266 # Some simulators may not support FRE
/FRES
/FRSQRTE
/FRSQRTES
2267 #
For now
, disable
on Darwin
2268 if { [istarget powerpc
-*-eabi
] ||
[istarget powerpc
*-*-eabispe
] ||
[istarget
*-*-darwin
*]} {
2271 set options
"-mpowerpc-gfxopt -mpowerpc-gpopt -mpopcntb"
2272 check_runtime_nocache ppc_recip_hw_available
{
2273 volatile double d_recip
, d_rsqrt
, d_four
= 4.0;
2274 volatile float f_recip
, f_rsqrt
, f_four
= 4.0f
;
2277 asm volatile
("fres %0,%1" : "=f" (f_recip) : "f" (f_four));
2278 asm volatile
("fre %0,%1" : "=d" (d_recip) : "d" (d_four));
2279 asm volatile
("frsqrtes %0,%1" : "=f" (f_rsqrt) : "f" (f_four));
2280 asm volatile
("frsqrte %0,%1" : "=f" (d_rsqrt) : "d" (d_four));
2288 #
Return 1 if the target supports executing AltiVec and Cell PPU
2289 # instructions
, 0 otherwise.
Cache the result.
2291 proc check_effective_target_cell_hw
{ } {
2292 return [check_cached_effective_target cell_hw_available
{
2293 # Some simulators are known to not support VMX and PPU instructions.
2294 if { [istarget powerpc
-*-eabi
*] } {
2297 # Most targets don
't require special flags for this test
2298 # case, but Darwin and AIX do.
2299 if { [istarget *-*-darwin*]
2300 || [istarget *-*-aix*] } {
2301 set options "-maltivec -mcpu=cell"
2303 set options "-mcpu=cell"
2305 check_runtime_nocache cell_hw_available {
2309 asm volatile ("vor v0,v0,v0");
2310 asm volatile ("lvlx v0,r0,r0");
2312 asm volatile ("vor 0,0,0");
2313 asm volatile ("lvlx 0,0,0");
2322 # Return 1 if the target supports executing 64-bit instructions, 0
2323 # otherwise. Cache the result.
2325 proc check_effective_target_powerpc64 { } {
2326 global powerpc64_available_saved
2329 if [info exists powerpc64_available_saved] {
2330 verbose "check_effective_target_powerpc64 returning saved $powerpc64_available_saved" 2
2332 set powerpc64_available_saved 0
2334 # Some simulators are known to not support powerpc64 instructions.
2335 if { [istarget powerpc-*-eabi*] || [istarget powerpc-ibm-aix*] } {
2336 verbose "check_effective_target_powerpc64 returning 0" 2
2337 return $powerpc64_available_saved
2340 # Set up, compile, and execute a test program containing a 64-bit
2341 # instruction. Include the current process ID in the file
2342 # names to prevent conflicts with invocations for multiple
2347 set f [open $src "w"]
2348 puts $f "int main() {"
2349 puts $f "#ifdef __MACH__"
2350 puts $f " asm volatile (\"extsw r0,r0\");"
2352 puts $f " asm volatile (\"extsw 0,0\");"
2354 puts $f " return 0; }"
2357 set opts "additional_flags=-mcpu=G5"
2359 verbose "check_effective_target_powerpc64 compiling testfile $src" 2
2360 set lines [${tool}_target_compile $src $exe executable "$opts"]
2363 if [string match "" $lines] then {
2364 # No error message, compilation succeeded.
2365 set result [${tool}_load "./$exe" "" ""]
2366 set status [lindex $result 0]
2367 remote_file build delete $exe
2368 verbose "check_effective_target_powerpc64 testfile status is <$status>" 2
2370 if { $status == "pass" } then {
2371 set powerpc64_available_saved 1
2374 verbose "check_effective_target_powerpc64 testfile compilation failed" 2
2378 return $powerpc64_available_saved
2381 # GCC 3.4.0 for powerpc64-*-linux* included an ABI fix for passing
2382 # complex float arguments. This affects gfortran tests that call cabsf
2383 # in libm built by an earlier compiler. Return 0 if libm uses the same
2384 # argument passing as the compiler under test, 1 otherwise.
2386 proc check_effective_target_broken_cplxf_arg { } {
2387 # Skip the work for targets known not to be affected.
2388 if { ![istarget powerpc*-*-linux*] || ![is-effective-target lp64] } {
2392 return [check_cached_effective_target broken_cplxf_arg {
2393 check_runtime_nocache broken_cplxf_arg {
2394 #include <complex.h>
2395 extern void abort (void);
2396 float fabsf (float);
2397 float cabsf (_Complex float);
2404 if (fabsf (f - 5.0) > 0.0001)
2405 /* Yes, it's broken.
*/
2407 /* All fine
, not broken.
*/
2414 #
Return 1 is this is a TI C6X target supporting C67X instructions
2415 proc check_effective_target_ti_c67x
{ } {
2416 return [check_no_compiler_messages ti_c67x assembly
{
2417 #
if !defined
(_TMS320C6700
)
2418 #error
!_TMS320C6700
2423 #
Return 1 is this is a TI C6X target supporting C64X
+ instructions
2424 proc check_effective_target_ti_c64xp
{ } {
2425 return [check_no_compiler_messages ti_c64xp assembly
{
2426 #
if !defined
(_TMS320C6400_PLUS
)
2427 #error
!_TMS320C6400_PLUS
2433 proc check_alpha_max_hw_available
{ } {
2434 return [check_runtime alpha_max_hw_available
{
2435 int main
() { return __builtin_alpha_amask
(1<<8) != 0; }
2439 # Returns true iff the FUNCTION is available
on the target
system.
2440 #
(This is essentially a Tcl implementation of Autoconf
's
2443 proc check_function_available { function } {
2444 return [check_no_compiler_messages ${function}_available \
2450 int main () { $function (); }
2454 # Returns true iff "fork" is available on the target system.
2456 proc check_fork_available {} {
2457 return [check_function_available "fork"]
2460 # Returns true iff "mkfifo" is available on the target system.
2462 proc check_mkfifo_available {} {
2463 if { [istarget *-*-cygwin*] } {
2464 # Cygwin has mkfifo, but support is incomplete.
2468 return [check_function_available "mkfifo"]
2471 # Returns true iff "__cxa_atexit" is used on the target system.
2473 proc check_cxa_atexit_available { } {
2474 return [check_cached_effective_target cxa_atexit_available {
2475 if { [istarget hppa*-*-hpux10*] } {
2476 # HP-UX 10 doesn't have __cxa_atexit but subsequent test passes.
2478 } elseif
{ [istarget
*-*-vxworks
] } {
2479 # vxworks doesn
't have __cxa_atexit but subsequent test passes.
2482 check_runtime_nocache cxa_atexit_available {
2485 static unsigned int count;
2502 Y() { f(); count = 2; }
2511 int main() { return 0; }
2517 proc check_effective_target_objc2 { } {
2518 return [check_no_compiler_messages objc2 object {
2527 proc check_effective_target_next_runtime { } {
2528 return [check_no_compiler_messages objc2 object {
2529 #ifdef __NEXT_RUNTIME__
2532 #error !__NEXT_RUNTIME__
2537 # Return 1 if we're generating code
for big
-endian memory order.
2539 proc check_effective_target_be
{ } {
2540 return [check_no_compiler_messages be object
{
2541 int dummy
[__BYTE_ORDER__
== __ORDER_BIG_ENDIAN__ ?
1 : -1];
2545 #
Return 1 if we
're generating code for little-endian memory order.
2547 proc check_effective_target_le { } {
2548 return [check_no_compiler_messages le object {
2549 int dummy[__BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ ? 1 : -1];
2553 # Return 1 if we're generating
32-bit code using default options
, 0
2556 proc check_effective_target_ilp32
{ } {
2557 return [check_no_compiler_messages ilp32 object
{
2558 int dummy
[sizeof
(int) == 4
2559 && sizeof
(void
*) == 4
2560 && sizeof
(long
) == 4 ?
1 : -1];
2564 #
Return 1 if we
're generating ia32 code using default options, 0
2567 proc check_effective_target_ia32 { } {
2568 return [check_no_compiler_messages ia32 object {
2569 int dummy[sizeof (int) == 4
2570 && sizeof (void *) == 4
2571 && sizeof (long) == 4 ? 1 : -1] = { __i386__ };
2575 # Return 1 if we're generating x32 code using default options
, 0
2578 proc check_effective_target_x32
{ } {
2579 return [check_no_compiler_messages x32 object
{
2580 int dummy
[sizeof
(int) == 4
2581 && sizeof
(void
*) == 4
2582 && sizeof
(long
) == 4 ?
1 : -1] = { __x86_64__
};
2586 #
Return 1 if we
're generating 32-bit integers using default
2587 # options, 0 otherwise.
2589 proc check_effective_target_int32 { } {
2590 return [check_no_compiler_messages int32 object {
2591 int dummy[sizeof (int) == 4 ? 1 : -1];
2595 # Return 1 if we're generating
32-bit or larger integers using default
2596 # options
, 0 otherwise.
2598 proc check_effective_target_int32plus
{ } {
2599 return [check_no_compiler_messages int32plus object
{
2600 int dummy
[sizeof
(int) >= 4 ?
1 : -1];
2604 #
Return 1 if we
're generating 32-bit or larger pointers using default
2605 # options, 0 otherwise.
2607 proc check_effective_target_ptr32plus { } {
2608 # The msp430 has 16-bit or 20-bit pointers. The 20-bit pointer is stored
2609 # in a 32-bit slot when in memory, so sizeof(void *) returns 4, but it
2610 # cannot really hold a 32-bit address, so we always return false here.
2611 if { [istarget msp430-*-*] } {
2615 return [check_no_compiler_messages ptr32plus object {
2616 int dummy[sizeof (void *) >= 4 ? 1 : -1];
2620 # Return 1 if we support 32-bit or larger array and structure sizes
2621 # using default options, 0 otherwise. Avoid false positive on
2622 # targets with 20 or 24 bit address spaces.
2624 proc check_effective_target_size32plus { } {
2625 return [check_no_compiler_messages size32plus object {
2626 char dummy[16777217L];
2630 # Returns 1 if we're generating
16-bit or smaller integers with the
2631 # default options
, 0 otherwise.
2633 proc check_effective_target_int16
{ } {
2634 return [check_no_compiler_messages int16 object
{
2635 int dummy
[sizeof
(int) < 4 ?
1 : -1];
2639 #
Return 1 if we
're generating 64-bit code using default options, 0
2642 proc check_effective_target_lp64 { } {
2643 return [check_no_compiler_messages lp64 object {
2644 int dummy[sizeof (int) == 4
2645 && sizeof (void *) == 8
2646 && sizeof (long) == 8 ? 1 : -1];
2650 # Return 1 if we're generating
64-bit code using default llp64 options
,
2653 proc check_effective_target_llp64
{ } {
2654 return [check_no_compiler_messages llp64 object
{
2655 int dummy
[sizeof
(int) == 4
2656 && sizeof
(void
*) == 8
2657 && sizeof
(long long
) == 8
2658 && sizeof
(long
) == 4 ?
1 : -1];
2662 #
Return 1 if long and
int have different sizes
,
2665 proc check_effective_target_long_neq_int
{ } {
2666 return [check_no_compiler_messages long_ne_int object
{
2667 int dummy
[sizeof
(int) != sizeof
(long
) ?
1 : -1];
2671 #
Return 1 if the target supports long double larger than double
,
2674 proc check_effective_target_large_long_double
{ } {
2675 return [check_no_compiler_messages large_long_double object
{
2676 int dummy
[sizeof
(long double
) > sizeof
(double
) ?
1 : -1];
2680 #
Return 1 if the target supports double larger than float
,
2683 proc check_effective_target_large_double
{ } {
2684 return [check_no_compiler_messages large_double object
{
2685 int dummy
[sizeof
(double
) > sizeof
(float
) ?
1 : -1];
2689 #
Return 1 if the target supports long double of
128 bits
,
2692 proc check_effective_target_longdouble128
{ } {
2693 return [check_no_compiler_messages longdouble128 object
{
2694 int dummy
[sizeof
(long double
) == 16 ?
1 : -1];
2698 #
Return 1 if the target supports long double of
64 bits
,
2701 proc check_effective_target_longdouble64
{ } {
2702 return [check_no_compiler_messages longdouble64 object
{
2703 int dummy
[sizeof
(long double
) == 8 ?
1 : -1];
2707 #
Return 1 if the target supports double of
64 bits
,
2710 proc check_effective_target_double64
{ } {
2711 return [check_no_compiler_messages double64 object
{
2712 int dummy
[sizeof
(double
) == 8 ?
1 : -1];
2716 #
Return 1 if the target supports double of at least
64 bits
,
2719 proc check_effective_target_double64plus
{ } {
2720 return [check_no_compiler_messages double64plus object
{
2721 int dummy
[sizeof
(double
) >= 8 ?
1 : -1];
2725 #
Return 1 if the target supports
'w' suffix
on floating constant
2728 proc check_effective_target_has_w_floating_suffix
{ } {
2730 if [check_effective_target_c
++] {
2731 append opts
"-std=gnu++03"
2733 return [check_no_compiler_messages w_fp_suffix object
{
2738 #
Return 1 if the target supports
'q' suffix
on floating constant
2741 proc check_effective_target_has_q_floating_suffix
{ } {
2743 if [check_effective_target_c
++] {
2744 append opts
"-std=gnu++03"
2746 return [check_no_compiler_messages q_fp_suffix object
{
2751 #
Return 1 if the target supports the _FloatN
/ _FloatNx type
2752 # indicated in the function
name, 0 otherwise.
2754 proc check_effective_target_float16
{} {
2755 return [check_no_compiler_messages_nocache float16 object
{
2757 } [add_options_for_float16
""]]
2760 proc check_effective_target_float32
{} {
2761 return [check_no_compiler_messages_nocache float32 object
{
2763 } [add_options_for_float32
""]]
2766 proc check_effective_target_float64
{} {
2767 return [check_no_compiler_messages_nocache float64 object
{
2769 } [add_options_for_float64
""]]
2772 proc check_effective_target_float128
{} {
2773 return [check_no_compiler_messages_nocache float128 object
{
2775 } [add_options_for_float128
""]]
2778 proc check_effective_target_float32x
{} {
2779 return [check_no_compiler_messages_nocache float32x object
{
2781 } [add_options_for_float32x
""]]
2784 proc check_effective_target_float64x
{} {
2785 return [check_no_compiler_messages_nocache float64x object
{
2787 } [add_options_for_float64x
""]]
2790 proc check_effective_target_float128x
{} {
2791 return [check_no_compiler_messages_nocache float128x object
{
2793 } [add_options_for_float128x
""]]
2796 # Likewise
, but runtime support
for any special options used as well
2797 # as
compile-time support is required.
2799 proc check_effective_target_float16_runtime
{} {
2800 return [check_effective_target_float16
]
2803 proc check_effective_target_float32_runtime
{} {
2804 return [check_effective_target_float32
]
2807 proc check_effective_target_float64_runtime
{} {
2808 return [check_effective_target_float64
]
2811 proc check_effective_target_float128_runtime
{} {
2812 if { ![check_effective_target_float128
] } {
2815 if { [istarget powerpc
*-*-*] } {
2816 return [check_effective_target_base_quadfloat_support
]
2821 proc check_effective_target_float32x_runtime
{} {
2822 return [check_effective_target_float32x
]
2825 proc check_effective_target_float64x_runtime
{} {
2826 if { ![check_effective_target_float64x
] } {
2829 if { [istarget powerpc
*-*-*] } {
2830 return [check_effective_target_base_quadfloat_support
]
2835 proc check_effective_target_float128x_runtime
{} {
2836 return [check_effective_target_float128x
]
2839 #
Return 1 if the target hardware supports
any options added
for
2840 # _FloatN and _FloatNx types
, 0 otherwise.
2842 proc check_effective_target_floatn_nx_runtime
{} {
2843 if { [istarget powerpc
*-*-aix
*] } {
2846 if { [istarget powerpc
*-*-*] } {
2847 return [check_effective_target_base_quadfloat_support
]
2852 # Add options needed to use the _FloatN
/ _FloatNx type indicated in
2853 # the function
name.
2855 proc add_options_for_float16
{ flags
} {
2856 if { [istarget arm
*-*-*] } {
2857 return "$flags -mfp16-format=ieee"
2862 proc add_options_for_float32
{ flags
} {
2866 proc add_options_for_float64
{ flags
} {
2870 proc add_options_for_float128
{ flags
} {
2871 return [add_options_for___float128
"$flags"]
2874 proc add_options_for_float32x
{ flags
} {
2878 proc add_options_for_float64x
{ flags
} {
2879 return [add_options_for___float128
"$flags"]
2882 proc add_options_for_float128x
{ flags
} {
2886 #
Return 1 if the target supports __float128
,
2889 proc check_effective_target___float128
{ } {
2890 if { [istarget powerpc
*-*-*] } {
2891 return [check_ppc_float128_sw_available
]
2893 if { [istarget ia64
-*-*]
2894 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*] } {
2900 proc add_options_for___float128
{ flags
} {
2901 if { [istarget powerpc
*-*-*] } {
2902 return "$flags -mfloat128 -mvsx"
2907 #
Return 1 if the target supports
any special run
-time requirements
2908 #
for __float128 or _Float128
,
2911 proc check_effective_target_base_quadfloat_support
{ } {
2912 if { [istarget powerpc
*-*-*] } {
2913 return [check_vsx_hw_available
]
2918 #
Return 1 if the target supports all four forms of fused multiply
-add
2919 #
(fma
, fms
, fnma
, and fnms
) for both float and double.
2921 proc check_effective_target_scalar_all_fma
{ } {
2922 return [istarget aarch64
*-*-*]
2925 #
Return 1 if the target supports compiling fixed
-point
,
2928 proc check_effective_target_fixed_point
{ } {
2929 return [check_no_compiler_messages fixed_point object
{
2930 _Sat _Fract x
; _Sat _Accum y
;
2934 #
Return 1 if the target supports compiling decimal floating point
,
2937 proc check_effective_target_dfp_nocache
{ } {
2938 verbose
"check_effective_target_dfp_nocache: compiling source" 2
2939 set ret
[check_no_compiler_messages_nocache dfp object
{
2940 float x __attribute__
((mode(DD
)));
2942 verbose
"check_effective_target_dfp_nocache: returning $ret" 2
2946 proc check_effective_target_dfprt_nocache
{ } {
2947 return [check_runtime_nocache dfprt
{
2948 typedef float d64 __attribute__
((mode(DD
)));
2949 d64 x
= 1.2df
, y
= 2.3dd
, z
;
2950 int main
() { z
= x
+ y
; return 0; }
2954 #
Return 1 if the target supports compiling Decimal Floating Point
,
2957 # This won
't change for different subtargets so cache the result.
2959 proc check_effective_target_dfp { } {
2960 return [check_cached_effective_target dfp {
2961 check_effective_target_dfp_nocache
2965 # Return 1 if the target supports linking and executing Decimal Floating
2966 # Point, 0 otherwise.
2968 # This won't change
for different subtargets so
cache the result.
2970 proc check_effective_target_dfprt
{ } {
2971 return [check_cached_effective_target dfprt
{
2972 check_effective_target_dfprt_nocache
2976 proc check_effective_target_powerpc_popcntb_ok
{ } {
2977 return [check_cached_effective_target powerpc_popcntb_ok
{
2979 # Disable
on Darwin.
2980 if { [istarget powerpc
-*-eabi
] ||
[istarget powerpc
*-*-eabispe
] ||
[istarget
*-*-darwin
*]} {
2983 check_runtime_nocache powerpc_popcntb_ok
{
2985 volatile
int a
= 0x12345678;
2988 asm volatile
("popcntb %0,%1" : "=r" (r) : "r" (a));
2996 #
Return 1 if the target supports executing DFP hardware instructions
,
2997 #
0 otherwise.
Cache the result.
2999 proc check_dfp_hw_available
{ } {
3000 return [check_cached_effective_target dfp_hw_available
{
3001 #
For now
, disable
on Darwin
3002 if { [istarget powerpc
-*-eabi
] ||
[istarget powerpc
*-*-eabispe
] ||
[istarget
*-*-darwin
*]} {
3005 check_runtime_nocache dfp_hw_available
{
3006 volatile _Decimal64 r
;
3007 volatile _Decimal64 a
= 4.0DD
;
3008 volatile _Decimal64 b
= 2.0DD
;
3011 asm volatile
("dadd %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
3012 asm volatile
("dsub %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
3013 asm volatile
("dmul %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
3014 asm volatile
("ddiv %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
3017 } "-mcpu=power6 -mhard-float"
3022 #
Return 1 if the target supports compiling and assembling UCN
, 0 otherwise.
3024 proc check_effective_target_ucn_nocache
{ } {
3025 #
-std
=c99 is only valid
for C
3026 if [check_effective_target_c
] {
3027 set ucnopts
"-std=c99"
3031 verbose
"check_effective_target_ucn_nocache: compiling source" 2
3032 set ret
[check_no_compiler_messages_nocache ucn object
{
3035 verbose
"check_effective_target_ucn_nocache: returning $ret" 2
3039 #
Return 1 if the target supports compiling and assembling UCN
, 0 otherwise.
3041 # This won
't change for different subtargets, so cache the result.
3043 proc check_effective_target_ucn { } {
3044 return [check_cached_effective_target ucn {
3045 check_effective_target_ucn_nocache
3049 # Return 1 if the target needs a command line argument to enable a SIMD
3052 proc check_effective_target_vect_cmdline_needed { } {
3053 global et_vect_cmdline_needed_saved
3054 global et_vect_cmdline_needed_target_name
3056 if { ![info exists et_vect_cmdline_needed_target_name] } {
3057 set et_vect_cmdline_needed_target_name ""
3060 # If the target has changed since we set the cached value, clear it.
3061 set current_target [current_target_name]
3062 if { $current_target != $et_vect_cmdline_needed_target_name } {
3063 verbose "check_effective_target_vect_cmdline_needed: `$et_vect_cmdline_needed_target_name' `$current_target
'" 2
3064 set et_vect_cmdline_needed_target_name $current_target
3065 if { [info exists et_vect_cmdline_needed_saved] } {
3066 verbose "check_effective_target_vect_cmdline_needed: removing cached result" 2
3067 unset et_vect_cmdline_needed_saved
3071 if [info exists et_vect_cmdline_needed_saved] {
3072 verbose "check_effective_target_vect_cmdline_needed: using cached result" 2
3074 set et_vect_cmdline_needed_saved 1
3075 if { [istarget alpha*-*-*]
3076 || [istarget ia64-*-*]
3077 || (([istarget i?86-*-*] || [istarget x86_64-*-*])
3078 && ![is-effective-target ia32])
3079 || ([istarget powerpc*-*-*]
3080 && ([check_effective_target_powerpc_spe]
3081 || [check_effective_target_powerpc_altivec]))
3082 || ([istarget sparc*-*-*] && [check_effective_target_sparc_vis])
3083 || [istarget spu-*-*]
3084 || ([istarget arm*-*-*] && [check_effective_target_arm_neon])
3085 || [istarget aarch64*-*-*] } {
3086 set et_vect_cmdline_needed_saved 0
3090 verbose "check_effective_target_vect_cmdline_needed: returning $et_vect_cmdline_needed_saved" 2
3091 return $et_vect_cmdline_needed_saved
3094 # Return 1 if the target supports hardware vectors of int, 0 otherwise.
3096 # This won't change
for different subtargets so
cache the result.
3098 proc check_effective_target_vect_int
{ } {
3099 global et_vect_int_saved
3102 if [info exists et_vect_int_saved
($et_index
)] {
3103 verbose
"check_effective_target_vect_int: using cached result" 2
3105 set et_vect_int_saved
($et_index
) 0
3106 if { [istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
3107 ||
([istarget powerpc
*-*-*]
3108 && ![istarget powerpc
-*-linux
*paired
*])
3109 ||
[istarget spu
-*-*]
3110 ||
[istarget sparc
*-*-*]
3111 ||
[istarget alpha
*-*-*]
3112 ||
[istarget ia64
-*-*]
3113 ||
[istarget aarch64
*-*-*]
3114 ||
[is
-effective
-target arm_neon
]
3115 ||
([istarget mips
*-*-*]
3116 && ([et
-is
-effective
-target mips_loongson
]
3117 ||
[et
-is
-effective
-target mips_msa
]))
3118 ||
([istarget s390
*-*-*]
3119 && [check_effective_target_s390_vx
]) } {
3120 set et_vect_int_saved
($et_index
) 1
3124 verbose
"check_effective_target_vect_int:\
3125 returning $et_vect_int_saved
($et_index
)" 2
3126 return $et_vect_int_saved
($et_index
)
3129 #
Return 1 if the target supports signed
int->float conversion
3132 proc check_effective_target_vect_intfloat_cvt
{ } {
3133 global et_vect_intfloat_cvt_saved
3136 if [info exists et_vect_intfloat_cvt_saved
($et_index
)] {
3137 verbose
"check_effective_target_vect_intfloat_cvt:\
3138 using cached result
" 2
3140 set et_vect_intfloat_cvt_saved
($et_index
) 0
3141 if { [istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
3142 ||
([istarget powerpc
*-*-*]
3143 && ![istarget powerpc
-*-linux
*paired
*])
3144 ||
[is
-effective
-target arm_neon
]
3145 ||
([istarget mips
*-*-*]
3146 && [et
-is
-effective
-target mips_msa
]) } {
3147 set et_vect_intfloat_cvt_saved
($et_index
) 1
3151 verbose
"check_effective_target_vect_intfloat_cvt:\
3152 returning $et_vect_intfloat_cvt_saved
($et_index
)" 2
3153 return $et_vect_intfloat_cvt_saved
($et_index
)
3156 #
Return 1 if the target supports signed double
->int conversion
3159 proc check_effective_target_vect_doubleint_cvt
{ } {
3160 global et_vect_doubleint_cvt_saved
3163 if [info exists et_vect_doubleint_cvt_saved
($et_index
)] {
3164 verbose
"check_effective_target_vect_doubleint_cvt: using cached result" 2
3166 set et_vect_doubleint_cvt_saved
($et_index
) 0
3167 if { (([istarget i?
86-*-*] ||
[istarget x86_64
-*-*])
3168 && [check_no_compiler_messages vect_doubleint_cvt assembly
{
3169 #ifdef __tune_atom__
3170 # error No double vectorizer support.
3173 ||
[istarget aarch64
*-*-*]
3174 ||
[istarget spu
-*-*]
3175 ||
([istarget powerpc
*-*-*] && [check_vsx_hw_available
])
3176 ||
([istarget mips
*-*-*]
3177 && [et
-is
-effective
-target mips_msa
]) } {
3178 set et_vect_doubleint_cvt_saved
($et_index
) 1
3182 verbose
"check_effective_target_vect_doubleint_cvt:\
3183 returning $et_vect_doubleint_cvt_saved
($et_index
)" 2
3184 return $et_vect_doubleint_cvt_saved
($et_index
)
3187 #
Return 1 if the target supports signed
int->double conversion
3190 proc check_effective_target_vect_intdouble_cvt
{ } {
3191 global et_vect_intdouble_cvt_saved
3194 if [info exists et_vect_intdouble_cvt_saved
($et_index
)] {
3195 verbose
"check_effective_target_vect_intdouble_cvt: using cached result" 2
3197 set et_vect_intdouble_cvt_saved
($et_index
) 0
3198 if { (([istarget i?
86-*-*] ||
[istarget x86_64
-*-*])
3199 && [check_no_compiler_messages vect_intdouble_cvt assembly
{
3200 #ifdef __tune_atom__
3201 # error No double vectorizer support.
3204 ||
[istarget aarch64
*-*-*]
3205 ||
[istarget spu
-*-*]
3206 ||
([istarget powerpc
*-*-*] && [check_vsx_hw_available
])
3207 ||
([istarget mips
*-*-*]
3208 && [et
-is
-effective
-target mips_msa
]) } {
3209 set et_vect_intdouble_cvt_saved
($et_index
) 1
3213 verbose
"check_effective_target_vect_intdouble_cvt:\
3214 returning $et_vect_intdouble_cvt_saved
($et_index
)" 2
3215 return $et_vect_intdouble_cvt_saved
($et_index
)
3218 #
Return 1 if we
're supporting __int128 for target, 0 otherwise.
3220 proc check_effective_target_int128 { } {
3221 return [check_no_compiler_messages int128 object {
3223 #ifndef __SIZEOF_INT128__
3232 # Return 1 if the target supports unsigned int->float conversion
3235 proc check_effective_target_vect_uintfloat_cvt { } {
3236 global et_vect_uintfloat_cvt_saved
3239 if [info exists et_vect_uintfloat_cvt_saved($et_index)] {
3240 verbose "check_effective_target_vect_uintfloat_cvt:\
3241 using cached result" 2
3243 set et_vect_uintfloat_cvt_saved($et_index) 0
3244 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
3245 || ([istarget powerpc*-*-*]
3246 && ![istarget powerpc-*-linux*paired*])
3247 || [istarget aarch64*-*-*]
3248 || [is-effective-target arm_neon]
3249 || ([istarget mips*-*-*]
3250 && [et-is-effective-target mips_msa]) } {
3251 set et_vect_uintfloat_cvt_saved($et_index) 1
3255 verbose "check_effective_target_vect_uintfloat_cvt:\
3256 returning $et_vect_uintfloat_cvt_saved($et_index)" 2
3257 return $et_vect_uintfloat_cvt_saved($et_index)
3261 # Return 1 if the target supports signed float->int conversion
3264 proc check_effective_target_vect_floatint_cvt { } {
3265 global et_vect_floatint_cvt_saved
3268 if [info exists et_vect_floatint_cvt_saved($et_index)] {
3269 verbose "check_effective_target_vect_floatint_cvt:\
3270 using cached result" 2
3272 set et_vect_floatint_cvt_saved($et_index) 0
3273 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
3274 || ([istarget powerpc*-*-*]
3275 && ![istarget powerpc-*-linux*paired*])
3276 || [is-effective-target arm_neon]
3277 || ([istarget mips*-*-*]
3278 && [et-is-effective-target mips_msa]) } {
3279 set et_vect_floatint_cvt_saved($et_index) 1
3283 verbose "check_effective_target_vect_floatint_cvt:\
3284 returning $et_vect_floatint_cvt_saved($et_index)" 2
3285 return $et_vect_floatint_cvt_saved($et_index)
3288 # Return 1 if the target supports unsigned float->int conversion
3291 proc check_effective_target_vect_floatuint_cvt { } {
3292 global et_vect_floatuint_cvt_saved
3295 if [info exists et_vect_floatuint_cvt_saved($et_index)] {
3296 verbose "check_effective_target_vect_floatuint_cvt:\
3297 using cached result" 2
3299 set et_vect_floatuint_cvt_saved($et_index) 0
3300 if { ([istarget powerpc*-*-*]
3301 && ![istarget powerpc-*-linux*paired*])
3302 || [is-effective-target arm_neon]
3303 || ([istarget mips*-*-*]
3304 && [et-is-effective-target mips_msa]) } {
3305 set et_vect_floatuint_cvt_saved($et_index) 1
3309 verbose "check_effective_target_vect_floatuint_cvt:\
3310 returning $et_vect_floatuint_cvt_saved($et_index)" 2
3311 return $et_vect_floatuint_cvt_saved($et_index)
3314 # Return 1 if peeling for alignment might be profitable on the target
3317 proc check_effective_target_vect_peeling_profitable { } {
3318 global et_vect_peeling_profitable_saved
3321 if [info exists et_vect_peeling_profitable_saved($et_index)] {
3322 verbose "check_effective_target_vect_peeling_profitable: using cached result" 2
3324 set et_vect_peeling_profitable_saved($et_index) 1
3325 if { ([istarget s390*-*-*]
3326 && [check_effective_target_s390_vx])
3327 || [check_effective_target_vect_element_align_preferred] } {
3328 set et_vect_peeling_profitable_saved($et_index) 0
3332 verbose "check_effective_target_vect_peeling_profitable:\
3333 returning $et_vect_peeling_profitable_saved($et_index)" 2
3334 return $et_vect_peeling_profitable_saved($et_index)
3337 # Return 1 if the target supports #pragma omp declare simd, 0 otherwise.
3339 # This won't change
for different subtargets so
cache the result.
3341 proc check_effective_target_vect_simd_clones
{ } {
3342 global et_vect_simd_clones_saved
3345 if [info exists et_vect_simd_clones_saved
($et_index
)] {
3346 verbose
"check_effective_target_vect_simd_clones: using cached result" 2
3348 set et_vect_simd_clones_saved
($et_index
) 0
3349 #
On i?
86/x86_64 #pragma omp declare simd builds a sse2
, avx
,
3350 # avx2 and avx512f clone. Only the right clone
for the
3351 # specified arch will be chosen
, but still we need to at least
3352 # be able to assemble avx512f.
3353 if { (([istarget i?
86-*-*] ||
[istarget x86_64
-*-*])
3354 && [check_effective_target_avx512f
]) } {
3355 set et_vect_simd_clones_saved
($et_index
) 1
3359 verbose
"check_effective_target_vect_simd_clones:\
3360 returning $et_vect_simd_clones_saved
($et_index
)" 2
3361 return $et_vect_simd_clones_saved
($et_index
)
3364 #
Return 1 if this is a AArch64 target supporting big endian
3365 proc check_effective_target_aarch64_big_endian
{ } {
3366 return [check_no_compiler_messages aarch64_big_endian assembly
{
3367 #
if !defined
(__aarch64__
) ||
!defined
(__AARCH64EB__
)
3368 #error
!__aarch64__ ||
!__AARCH64EB__
3373 #
Return 1 if this is a AArch64 target supporting little endian
3374 proc check_effective_target_aarch64_little_endian
{ } {
3375 if { ![istarget aarch64
*-*-*] } {
3379 return [check_no_compiler_messages aarch64_little_endian assembly
{
3380 #
if !defined
(__aarch64__
) || defined
(__AARCH64EB__
)
3386 #
Return 1 if this is an AArch64 target supporting SVE.
3387 proc check_effective_target_aarch64_sve
{ } {
3388 if { ![istarget aarch64
*-*-*] } {
3391 return [check_no_compiler_messages aarch64_sve assembly
{
3392 #
if !defined
(__ARM_FEATURE_SVE
)
3398 #
Return the size in bits of an SVE vector
, or
0 if the size is
variable.
3399 proc aarch64_sve_bits
{ } {
3400 return [check_cached_effective_target aarch64_sve_bits
{
3403 set src dummy
[pid
].c
3404 set f
[open $src
"w"]
3405 puts $f
"int bits = __ARM_FEATURE_SVE_BITS;"
3407 set output
[$
{tool
}_target_compile $src
"" preprocess ""]
3410 regsub
{.
*bits
= ([^
;]*);.
*} $output
{\
1} bits
3415 #
Return 1 if this is a compiler supporting ARC atomic operations
3416 proc check_effective_target_arc_atomic
{ } {
3417 return [check_no_compiler_messages arc_atomic assembly
{
3418 #
if !defined
(__ARC_ATOMIC__
)
3424 #
Return 1 if this is an arm target using
32-bit instructions
3425 proc check_effective_target_arm32
{ } {
3426 if { ![istarget arm
*-*-*] } {
3430 return [check_no_compiler_messages arm32 assembly
{
3431 #
if !defined
(__arm__
) ||
(defined
(__thumb__
) && !defined
(__thumb2__
))
3432 #error
!__arm || __thumb__
&& !__thumb2__
3437 #
Return 1 if this is an arm target not using Thumb
3438 proc check_effective_target_arm_nothumb
{ } {
3439 if { ![istarget arm
*-*-*] } {
3443 return [check_no_compiler_messages arm_nothumb assembly
{
3444 #
if !defined
(__arm__
) ||
(defined
(__thumb__
) || defined
(__thumb2__
))
3445 #error
!__arm__ || __thumb || __thumb2__
3450 #
Return 1 if this is a little
-endian ARM target
3451 proc check_effective_target_arm_little_endian
{ } {
3452 if { ![istarget arm
*-*-*] } {
3456 return [check_no_compiler_messages arm_little_endian assembly
{
3457 #
if !defined
(__arm__
) ||
!defined
(__ARMEL__
)
3458 #error
!__arm__ ||
!__ARMEL__
3463 #
Return 1 if this is an ARM target that only supports aligned vector accesses
3464 proc check_effective_target_arm_vect_no_misalign
{ } {
3465 if { ![istarget arm
*-*-*] } {
3469 return [check_no_compiler_messages arm_vect_no_misalign assembly
{
3470 #
if !defined
(__arm__
) \
3471 ||
(defined
(__ARM_FEATURE_UNALIGNED
) \
3472 && defined
(__ARMEL__
))
3473 #error
!__arm__ ||
(__ARMEL__
&& __ARM_FEATURE_UNALIGNED
)
3479 #
Return 1 if this is an ARM target supporting
-mfloat
-abi
=soft. Some
3480 # multilibs may be incompatible with this option.
3482 proc check_effective_target_arm_soft_ok
{ } {
3483 if { [check_effective_target_arm32
] } {
3484 return [check_no_compiler_messages arm_soft_ok executable
{
3485 int main
() { return 0;}
3486 } "-mfloat-abi=soft"]
3492 #
Return 1 if this is an ARM target supporting
-mfpu
=vfp
3493 #
-mfloat
-abi
=softfp. Some multilibs may be incompatible with these
3496 proc check_effective_target_arm_vfp_ok
{ } {
3497 if { [check_effective_target_arm32
] } {
3498 return [check_no_compiler_messages arm_vfp_ok object
{
3500 } "-mfpu=vfp -mfloat-abi=softfp"]
3506 #
Return 1 if this is an ARM target supporting
-mfpu
=vfp3
3507 #
-mfloat
-abi
=softfp.
3509 proc check_effective_target_arm_vfp3_ok
{ } {
3510 if { [check_effective_target_arm32
] } {
3511 return [check_no_compiler_messages arm_vfp3_ok object
{
3513 } "-mfpu=vfp3 -mfloat-abi=softfp"]
3519 #
Return 1 if this is an ARM target supporting
-mfpu
=fp
-armv8
3520 #
-mfloat
-abi
=softfp.
3521 proc check_effective_target_arm_v8_vfp_ok
{} {
3522 if { [check_effective_target_arm32
] } {
3523 return [check_no_compiler_messages arm_v8_vfp_ok object
{
3526 __asm__ volatile
("vrinta.f32.f32 s0, s0");
3529 } "-mfpu=fp-armv8 -mfloat-abi=softfp"]
3535 #
Return 1 if this is an ARM target supporting
-mfpu
=vfp
3536 #
-mfloat
-abi
=hard. Some multilibs may be incompatible with these
3539 proc check_effective_target_arm_hard_vfp_ok
{ } {
3540 if { [check_effective_target_arm32
]
3541 && ! [check
-flags
[list
"" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=hard" }]] } {
3542 return [check_no_compiler_messages arm_hard_vfp_ok executable
{
3543 int main
() { return 0;}
3544 } "-mfpu=vfp -mfloat-abi=hard"]
3550 #
Return 1 if this is an ARM target defining __ARM_FP. We may need
3551 #
-mfloat
-abi
=softfp or equivalent options. Some multilibs may be
3552 # incompatible with these options. Also
set et_arm_fp_flags to the
3553 # best options to add.
3555 proc check_effective_target_arm_fp_ok_nocache
{ } {
3556 global et_arm_fp_flags
3557 set et_arm_fp_flags
""
3558 if { [check_effective_target_arm32
] } {
3559 foreach flags
{"" "-mfloat-abi=softfp" "-mfloat-abi=hard"} {
3560 if { [check_no_compiler_messages_nocache arm_fp_ok object
{
3562 #error __ARM_FP not defined
3565 set et_arm_fp_flags $flags
3574 proc check_effective_target_arm_fp_ok
{ } {
3575 return [check_cached_effective_target arm_fp_ok \
3576 check_effective_target_arm_fp_ok_nocache
]
3579 # Add the options needed to
define __ARM_FP. We need either
3580 #
-mfloat
-abi
=softfp or
-mfloat
-abi
=hard
, but
if one is already
3581 # specified by the multilib
, use it.
3583 proc add_options_for_arm_fp
{ flags
} {
3584 if { ! [check_effective_target_arm_fp_ok
] } {
3587 global et_arm_fp_flags
3588 return "$flags $et_arm_fp_flags"
3591 #
Return 1 if this is an ARM target that supports DSP multiply with
3592 # current multilib flags.
3594 proc check_effective_target_arm_dsp
{ } {
3595 return [check_no_compiler_messages arm_dsp assembly
{
3596 #ifndef __ARM_FEATURE_DSP
3603 #
Return 1 if this is an ARM target that supports unaligned word
/halfword
3604 #
load/store instructions.
3606 proc check_effective_target_arm_unaligned
{ } {
3607 return [check_no_compiler_messages arm_unaligned assembly
{
3608 #ifndef __ARM_FEATURE_UNALIGNED
3609 #error no unaligned support
3615 #
Return 1 if this is an ARM target supporting
-mfpu
=crypto
-neon
-fp
-armv8
3616 #
-mfloat
-abi
=softfp or equivalent options. Some multilibs may be
3617 # incompatible with these options. Also
set et_arm_crypto_flags to the
3618 # best options to add.
3620 proc check_effective_target_arm_crypto_ok_nocache
{ } {
3621 global et_arm_crypto_flags
3622 set et_arm_crypto_flags
""
3623 if { [check_effective_target_arm_v8_neon_ok
] } {
3624 foreach flags
{"" "-mfloat-abi=softfp" "-mfpu=crypto-neon-fp-armv8" "-mfpu=crypto-neon-fp-armv8 -mfloat-abi=softfp"} {
3625 if { [check_no_compiler_messages_nocache arm_crypto_ok object
{
3626 #
include "arm_neon.h"
3628 foo
(uint8x16_t a
, uint8x16_t b
)
3630 return vaeseq_u8
(a
, b
);
3633 set et_arm_crypto_flags $flags
3642 #
Return 1 if this is an ARM target supporting
-mfpu
=crypto
-neon
-fp
-armv8
3644 proc check_effective_target_arm_crypto_ok
{ } {
3645 return [check_cached_effective_target arm_crypto_ok \
3646 check_effective_target_arm_crypto_ok_nocache
]
3649 # Add options
for crypto extensions.
3650 proc add_options_for_arm_crypto
{ flags
} {
3651 if { ! [check_effective_target_arm_crypto_ok
] } {
3654 global et_arm_crypto_flags
3655 return "$flags $et_arm_crypto_flags"
3658 # Add the options needed
for NEON. We need either
-mfloat
-abi
=softfp
3659 # or
-mfloat
-abi
=hard
, but
if one is already specified by the
3660 # multilib
, use it. Similarly
, if a
-mfpu option already enables
3661 # NEON
, do not add
-mfpu
=neon.
3663 proc add_options_for_arm_neon
{ flags
} {
3664 if { ! [check_effective_target_arm_neon_ok
] } {
3667 global et_arm_neon_flags
3668 return "$flags $et_arm_neon_flags"
3671 proc add_options_for_arm_v8_vfp
{ flags
} {
3672 if { ! [check_effective_target_arm_v8_vfp_ok
] } {
3675 return "$flags -mfpu=fp-armv8 -mfloat-abi=softfp"
3678 proc add_options_for_arm_v8_neon
{ flags
} {
3679 if { ! [check_effective_target_arm_v8_neon_ok
] } {
3682 global et_arm_v8_neon_flags
3683 return "$flags $et_arm_v8_neon_flags -march=armv8-a"
3686 # Add the options needed
for ARMv8.1 Adv.SIMD. Also adds the ARMv8 NEON
3687 # options
for AArch64 and
for ARM.
3689 proc add_options_for_arm_v8_1a_neon
{ flags
} {
3690 if { ! [check_effective_target_arm_v8_1a_neon_ok
] } {
3693 global et_arm_v8_1a_neon_flags
3694 return "$flags $et_arm_v8_1a_neon_flags"
3697 # Add the options needed
for ARMv8.2 with the scalar FP16 extension.
3698 # Also adds the ARMv8 FP options
for ARM and
for AArch64.
3700 proc add_options_for_arm_v8_2a_fp16_scalar
{ flags
} {
3701 if { ! [check_effective_target_arm_v8_2a_fp16_scalar_ok
] } {
3704 global et_arm_v8_2a_fp16_scalar_flags
3705 return "$flags $et_arm_v8_2a_fp16_scalar_flags"
3708 # Add the options needed
for ARMv8.2 with the FP16 extension. Also adds
3709 # the ARMv8 NEON options
for ARM and
for AArch64.
3711 proc add_options_for_arm_v8_2a_fp16_neon
{ flags
} {
3712 if { ! [check_effective_target_arm_v8_2a_fp16_neon_ok
] } {
3715 global et_arm_v8_2a_fp16_neon_flags
3716 return "$flags $et_arm_v8_2a_fp16_neon_flags"
3719 proc add_options_for_arm_crc
{ flags
} {
3720 if { ! [check_effective_target_arm_crc_ok
] } {
3723 global et_arm_crc_flags
3724 return "$flags $et_arm_crc_flags"
3727 # Add the options needed
for NEON. We need either
-mfloat
-abi
=softfp
3728 # or
-mfloat
-abi
=hard
, but
if one is already specified by the
3729 # multilib
, use it. Similarly
, if a
-mfpu option already enables
3730 # NEON
, do not add
-mfpu
=neon.
3732 proc add_options_for_arm_neonv2
{ flags
} {
3733 if { ! [check_effective_target_arm_neonv2_ok
] } {
3736 global et_arm_neonv2_flags
3737 return "$flags $et_arm_neonv2_flags"
3740 # Add the options needed
for vfp3.
3741 proc add_options_for_arm_vfp3
{ flags
} {
3742 if { ! [check_effective_target_arm_vfp3_ok
] } {
3745 return "$flags -mfpu=vfp3 -mfloat-abi=softfp"
3748 #
Return 1 if this is an ARM target supporting
-mfpu
=neon
3749 #
-mfloat
-abi
=softfp or equivalent options. Some multilibs may be
3750 # incompatible with these options. Also
set et_arm_neon_flags to the
3751 # best options to add.
3753 proc check_effective_target_arm_neon_ok_nocache
{ } {
3754 global et_arm_neon_flags
3755 set et_arm_neon_flags
""
3756 if { [check_effective_target_arm32
] } {
3757 foreach flags
{"" "-mfloat-abi=softfp" "-mfpu=neon" "-mfpu=neon -mfloat-abi=softfp" "-mfpu=neon -mfloat-abi=softfp -march=armv7-a" "-mfloat-abi=hard" "-mfpu=neon -mfloat-abi=hard" "-mfpu=neon -mfloat-abi=hard -march=armv7-a"} {
3758 if { [check_no_compiler_messages_nocache arm_neon_ok object
{
3759 #
include <arm_neon.h
>
3761 #ifndef __ARM_NEON__
3764 /* Avoid the case where a test adds
-mfpu
=neon
, but the toolchain is
3765 configured
for -mcpu
=arm926ej
-s
, for example.
*/
3766 #
if __ARM_ARCH
< 7 || __ARM_ARCH_PROFILE
== 'M'
3767 #error Architecture does not support NEON.
3770 set et_arm_neon_flags $flags
3779 proc check_effective_target_arm_neon_ok
{ } {
3780 return [check_cached_effective_target arm_neon_ok \
3781 check_effective_target_arm_neon_ok_nocache
]
3784 #
Return 1 if this is an ARM target supporting
-mfpu
=neon without
any
3785 #
-mfloat
-abi
= option. Useful in tests where add_options is not
3786 # supported
(such as lto tests
).
3788 proc check_effective_target_arm_neon_ok_no_float_abi_nocache
{ } {
3789 if { [check_effective_target_arm32
] } {
3790 foreach flags
{"-mfpu=neon"} {
3791 if { [check_no_compiler_messages_nocache arm_neon_ok_no_float_abi object
{
3792 #
include <arm_neon.h
>
3794 #ifndef __ARM_NEON__
3797 /* Avoid the case where a test adds
-mfpu
=neon
, but the toolchain is
3798 configured
for -mcpu
=arm926ej
-s
, for example.
*/
3799 #
if __ARM_ARCH
< 7 || __ARM_ARCH_PROFILE
== 'M'
3800 #error Architecture does not support NEON.
3811 proc check_effective_target_arm_neon_ok_no_float_abi
{ } {
3812 return [check_cached_effective_target arm_neon_ok_no_float_abi \
3813 check_effective_target_arm_neon_ok_no_float_abi_nocache
]
3816 proc check_effective_target_arm_crc_ok_nocache
{ } {
3817 global et_arm_crc_flags
3818 set et_arm_crc_flags
"-march=armv8-a+crc"
3819 return [check_no_compiler_messages_nocache arm_crc_ok object
{
3820 #
if !defined
(__ARM_FEATURE_CRC32
)
3823 } "$et_arm_crc_flags"]
3826 proc check_effective_target_arm_crc_ok
{ } {
3827 return [check_cached_effective_target arm_crc_ok \
3828 check_effective_target_arm_crc_ok_nocache
]
3831 #
Return 1 if this is an ARM target supporting
-mfpu
=neon
-fp16
3832 #
-mfloat
-abi
=softfp or equivalent options. Some multilibs may be
3833 # incompatible with these options. Also
set et_arm_neon_fp16_flags to
3834 # the best options to add.
3836 proc check_effective_target_arm_neon_fp16_ok_nocache
{ } {
3837 global et_arm_neon_fp16_flags
3838 global et_arm_neon_flags
3839 set et_arm_neon_fp16_flags
""
3840 if { [check_effective_target_arm32
]
3841 && [check_effective_target_arm_neon_ok
] } {
3842 foreach flags
{"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
3843 "-mfpu=neon-fp16 -mfloat-abi=softfp"
3844 "-mfp16-format=ieee"
3845 "-mfloat-abi=softfp -mfp16-format=ieee"
3846 "-mfpu=neon-fp16 -mfp16-format=ieee"
3847 "-mfpu=neon-fp16 -mfloat-abi=softfp -mfp16-format=ieee"} {
3848 if { [check_no_compiler_messages_nocache arm_neon_fp16_ok object
{
3849 #
include "arm_neon.h"
3851 foo
(float32x4_t
arg)
3853 return vcvt_f16_f32
(arg);
3855 } "$et_arm_neon_flags $flags"] } {
3856 set et_arm_neon_fp16_flags
[concat $et_arm_neon_flags $flags
]
3865 proc check_effective_target_arm_neon_fp16_ok
{ } {
3866 return [check_cached_effective_target arm_neon_fp16_ok \
3867 check_effective_target_arm_neon_fp16_ok_nocache
]
3870 proc check_effective_target_arm_neon_fp16_hw
{ } {
3871 if {! [check_effective_target_arm_neon_fp16_ok
] } {
3874 global et_arm_neon_fp16_flags
3875 check_runtime_nocache arm_neon_fp16_hw
{
3877 main
(int argc
, char
**argv
)
3879 asm
("vcvt.f32.f16 q1, d0");
3882 } $et_arm_neon_fp16_flags
3885 proc add_options_for_arm_neon_fp16
{ flags
} {
3886 if { ! [check_effective_target_arm_neon_fp16_ok
] } {
3889 global et_arm_neon_fp16_flags
3890 return "$flags $et_arm_neon_fp16_flags"
3893 #
Return 1 if this is an ARM target supporting the FP16 alternative
3894 # format. Some multilibs may be incompatible with the options needed. Also
3895 #
set et_arm_neon_fp16_flags to the best options to add.
3897 proc check_effective_target_arm_fp16_alternative_ok_nocache
{ } {
3898 global et_arm_neon_fp16_flags
3899 set et_arm_neon_fp16_flags
""
3900 if { [check_effective_target_arm32
] } {
3901 foreach flags
{"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
3902 "-mfpu=neon-fp16 -mfloat-abi=softfp"} {
3903 if { [check_no_compiler_messages_nocache \
3904 arm_fp16_alternative_ok object
{
3905 #
if !defined
(__ARM_FP16_FORMAT_ALTERNATIVE
)
3906 #error __ARM_FP16_FORMAT_ALTERNATIVE not defined
3908 } "$flags -mfp16-format=alternative"] } {
3909 set et_arm_neon_fp16_flags
"$flags -mfp16-format=alternative"
3918 proc check_effective_target_arm_fp16_alternative_ok
{ } {
3919 return [check_cached_effective_target arm_fp16_alternative_ok \
3920 check_effective_target_arm_fp16_alternative_ok_nocache
]
3923 #
Return 1 if this is an ARM target supports specifying the FP16
none
3924 # format. Some multilibs may be incompatible with the options needed.
3926 proc check_effective_target_arm_fp16_none_ok_nocache
{ } {
3927 if { [check_effective_target_arm32
] } {
3928 foreach flags
{"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
3929 "-mfpu=neon-fp16 -mfloat-abi=softfp"} {
3930 if { [check_no_compiler_messages_nocache \
3931 arm_fp16_none_ok object
{
3932 #
if defined
(__ARM_FP16_FORMAT_ALTERNATIVE
)
3933 #error __ARM_FP16_FORMAT_ALTERNATIVE defined
3935 #
if defined
(__ARM_FP16_FORMAT_IEEE
)
3936 #error __ARM_FP16_FORMAT_IEEE defined
3938 } "$flags -mfp16-format=none"] } {
3947 proc check_effective_target_arm_fp16_none_ok
{ } {
3948 return [check_cached_effective_target arm_fp16_none_ok \
3949 check_effective_target_arm_fp16_none_ok_nocache
]
3952 #
Return 1 if this is an ARM target supporting
-mfpu
=neon
-fp
-armv8
3953 #
-mfloat
-abi
=softfp or equivalent options. Some multilibs may be
3954 # incompatible with these options. Also
set et_arm_v8_neon_flags to the
3955 # best options to add.
3957 proc check_effective_target_arm_v8_neon_ok_nocache
{ } {
3958 global et_arm_v8_neon_flags
3959 set et_arm_v8_neon_flags
""
3960 if { [check_effective_target_arm32
] } {
3961 foreach flags
{"" "-mfloat-abi=softfp" "-mfpu=neon-fp-armv8" "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
3962 if { [check_no_compiler_messages_nocache arm_v8_neon_ok object
{
3964 #error not armv8 or later
3966 #
include "arm_neon.h"
3970 __asm__ volatile
("vrintn.f32 q0, q0");
3972 } "$flags -march=armv8-a"] } {
3973 set et_arm_v8_neon_flags $flags
3982 proc check_effective_target_arm_v8_neon_ok
{ } {
3983 return [check_cached_effective_target arm_v8_neon_ok \
3984 check_effective_target_arm_v8_neon_ok_nocache
]
3987 #
Return 1 if this is an ARM target supporting
-mfpu
=neon
-vfpv4
3988 #
-mfloat
-abi
=softfp or equivalent options. Some multilibs may be
3989 # incompatible with these options. Also
set et_arm_neonv2_flags to the
3990 # best options to add.
3992 proc check_effective_target_arm_neonv2_ok_nocache
{ } {
3993 global et_arm_neonv2_flags
3994 global et_arm_neon_flags
3995 set et_arm_neonv2_flags
""
3996 if { [check_effective_target_arm32
]
3997 && [check_effective_target_arm_neon_ok
] } {
3998 foreach flags
{"" "-mfloat-abi=softfp" "-mfpu=neon-vfpv4" "-mfpu=neon-vfpv4 -mfloat-abi=softfp"} {
3999 if { [check_no_compiler_messages_nocache arm_neonv2_ok object
{
4000 #
include "arm_neon.h"
4002 foo
(float32x2_t a
, float32x2_t b
, float32x2_t c
)
4004 return vfma_f32
(a
, b
, c
);
4006 } "$et_arm_neon_flags $flags"] } {
4007 set et_arm_neonv2_flags
[concat $et_arm_neon_flags $flags
]
4016 proc check_effective_target_arm_neonv2_ok
{ } {
4017 return [check_cached_effective_target arm_neonv2_ok \
4018 check_effective_target_arm_neonv2_ok_nocache
]
4021 # Add the options needed
for VFP FP16 support. We need either
4022 #
-mfloat
-abi
=softfp or
-mfloat
-abi
=hard.
If one is already specified by
4023 # the multilib
, use it.
4025 proc add_options_for_arm_fp16
{ flags
} {
4026 if { ! [check_effective_target_arm_fp16_ok
] } {
4029 global et_arm_fp16_flags
4030 return "$flags $et_arm_fp16_flags"
4033 # Add the options needed to enable support
for IEEE format
4034 # half
-precision support. This is valid
for ARM targets.
4036 proc add_options_for_arm_fp16_ieee
{ flags
} {
4037 if { ! [check_effective_target_arm_fp16_ok
] } {
4040 global et_arm_fp16_flags
4041 return "$flags $et_arm_fp16_flags -mfp16-format=ieee"
4044 # Add the options needed to enable support
for ARM Alternative format
4045 # half
-precision support. This is valid
for ARM targets.
4047 proc add_options_for_arm_fp16_alternative
{ flags
} {
4048 if { ! [check_effective_target_arm_fp16_ok
] } {
4051 global et_arm_fp16_flags
4052 return "$flags $et_arm_fp16_flags -mfp16-format=alternative"
4055 #
Return 1 if this is an ARM target that can support a VFP fp16 variant.
4056 # Skip multilibs that are incompatible with these options and
set
4057 # et_arm_fp16_flags to the best options to add. This test is valid
for
4060 proc check_effective_target_arm_fp16_ok_nocache
{ } {
4061 global et_arm_fp16_flags
4062 set et_arm_fp16_flags
""
4063 if { ! [check_effective_target_arm32
] } {
4067 [list
"" { *-*-* } { "-mfpu=*" } \
4068 { "-mfpu=*fp16*" "-mfpu=*fpv[4-9]*" \
4069 "-mfpu=*fpv[1-9][0-9]*" "-mfpu=*fp-armv8*" } ]] {
4070 # Multilib flags would override
-mfpu.
4073 if [check
-flags
[list
"" { *-*-* } { "-mfloat-abi=soft" } { "" } ]] {
4074 # Must generate floating
-point instructions.
4077 if [check_effective_target_arm_hf_eabi
] {
4078 # Use existing float
-abi and force an fpu which supports fp16
4079 set et_arm_fp16_flags
"-mfpu=vfpv4"
4082 if [check
-flags
[list
"" { *-*-* } { "-mfpu=*" } { "" } ]] {
4083 # The existing
-mfpu value is OK
; use it
, but add softfp.
4084 set et_arm_fp16_flags
"-mfloat-abi=softfp"
4087 # Add
-mfpu
for a VFP fp16 variant since there is no preprocessor
4088 # macro to check
for this support.
4089 set flags
"-mfpu=vfpv4 -mfloat-abi=softfp"
4090 if { [check_no_compiler_messages_nocache arm_fp16_ok assembly
{
4093 set et_arm_fp16_flags
"$flags"
4100 proc check_effective_target_arm_fp16_ok
{ } {
4101 return [check_cached_effective_target arm_fp16_ok \
4102 check_effective_target_arm_fp16_ok_nocache
]
4105 #
Return 1 if the target supports executing VFP FP16 instructions
, 0
4106 # otherwise. This test is valid
for ARM only.
4108 proc check_effective_target_arm_fp16_hw
{ } {
4109 if {! [check_effective_target_arm_fp16_ok
] } {
4112 global et_arm_fp16_flags
4113 check_runtime_nocache arm_fp16_hw
{
4115 main
(int argc
, char
**argv
)
4119 asm
("vcvtb.f32.f16 %0, %1"
4120 : "=w" (r) : "w" (a)
4121 : /* No clobbers.
*/);
4122 return (r
== 1.0) ?
0 : 1;
4124 } "$et_arm_fp16_flags -mfp16-format=ieee"
4127 # Creates a series of routines that
return 1 if the given architecture
4128 # can be selected and a routine to give the flags to select that architecture
4129 # Note
: Extra flags may be added to disable options from newer compilers
4130 #
(Thumb in particular
- but others may be added in the future
).
4131 # Warning
: Do not use check_effective_target_arm_arch_
*_ok
for architecture
4132 # extension
(eg. ARMv8.1
-A
) since there is no macro defined
for them. See
4133 # how only __ARM_ARCH_8A__ is checked
for ARMv8.1
-A.
4134 # Usage
: /* { dg
-require
-effective
-target arm_arch_v5_ok
} */
4135 #
/* { dg
-add
-options arm_arch_v5t
} */
4136 #
/* { dg
-require
-effective
-target arm_arch_v5t_multilib
} */
4137 foreach
{ armfunc armflag armdefs
} {
4138 v4
"-march=armv4 -marm" __ARM_ARCH_4__
4139 v4t
"-march=armv4t" __ARM_ARCH_4T__
4140 v5t
"-march=armv5t" __ARM_ARCH_5T__
4141 v5te
"-march=armv5te" __ARM_ARCH_5TE__
4142 v6
"-march=armv6" __ARM_ARCH_6__
4143 v6k
"-march=armv6k" __ARM_ARCH_6K__
4144 v6t2
"-march=armv6t2" __ARM_ARCH_6T2__
4145 v6z
"-march=armv6z" __ARM_ARCH_6Z__
4146 v6m
"-march=armv6-m -mthumb -mfloat-abi=soft" __ARM_ARCH_6M__
4147 v7a
"-march=armv7-a" __ARM_ARCH_7A__
4148 v7r
"-march=armv7-r" __ARM_ARCH_7R__
4149 v7m
"-march=armv7-m -mthumb" __ARM_ARCH_7M__
4150 v7em
"-march=armv7e-m -mthumb" __ARM_ARCH_7EM__
4151 v7ve
"-march=armv7ve -marm"
4152 "__ARM_ARCH_7A__ && __ARM_FEATURE_IDIV"
4153 v8a
"-march=armv8-a" __ARM_ARCH_8A__
4154 v8_1a
"-march=armv8.1-a" __ARM_ARCH_8A__
4155 v8_2a
"-march=armv8.2-a" __ARM_ARCH_8A__
4156 v8m_base
"-march=armv8-m.base -mthumb -mfloat-abi=soft"
4157 __ARM_ARCH_8M_BASE__
4158 v8m_main
"-march=armv8-m.main -mthumb" __ARM_ARCH_8M_MAIN__
4159 v8r
"-march=armv8-r" __ARM_ARCH_8R__ } {
4160 eval
[string map
[list FUNC $armfunc FLAG $armflag DEFS $armdefs
] {
4161 proc check_effective_target_arm_arch_FUNC_ok
{ } {
4162 if { [ string match
"*-marm*" "FLAG" ] &&
4163 ![check_effective_target_arm_arm_ok
] } {
4166 return [check_no_compiler_messages arm_arch_FUNC_ok assembly
{
4178 proc add_options_for_arm_arch_FUNC
{ flags
} {
4179 return "$flags FLAG"
4182 proc check_effective_target_arm_arch_FUNC_multilib
{ } {
4183 return [check_runtime arm_arch_FUNC_multilib
{
4189 } [add_options_for_arm_arch_FUNC
""]]
4194 #
Return 1 if GCC was configured with
--with
-mode=
4195 proc check_effective_target_default_mode
{ } {
4197 return [check_configured_with
"with-mode="]
4200 #
Return 1 if this is an ARM target where
-marm causes ARM to be
4203 proc check_effective_target_arm_arm_ok
{ } {
4204 return [check_no_compiler_messages arm_arm_ok assembly
{
4205 #
if !defined
(__arm__
) || defined
(__thumb__
) || defined
(__thumb2__
)
4206 #error
!__arm__ || __thumb__ || __thumb2__
4212 #
Return 1 is this is an ARM target where
-mthumb causes Thumb
-1 to be
4215 proc check_effective_target_arm_thumb1_ok
{ } {
4216 return [check_no_compiler_messages arm_thumb1_ok assembly
{
4217 #
if !defined
(__arm__
) ||
!defined
(__thumb__
) || defined
(__thumb2__
)
4218 #error
!__arm__ ||
!__thumb__ || __thumb2__
4220 int foo
(int i
) { return i
; }
4224 #
Return 1 is this is an ARM target where
-mthumb causes Thumb
-2 to be
4227 proc check_effective_target_arm_thumb2_ok
{ } {
4228 return [check_no_compiler_messages arm_thumb2_ok assembly
{
4229 #
if !defined
(__thumb2__
)
4232 int foo
(int i
) { return i
; }
4236 #
Return 1 if this is an ARM target where Thumb
-1 is used without options
4237 # added by the test.
4239 proc check_effective_target_arm_thumb1
{ } {
4240 return [check_no_compiler_messages arm_thumb1 assembly
{
4241 #
if !defined
(__arm__
) ||
!defined
(__thumb__
) || defined
(__thumb2__
)
4242 #error
!__arm__ ||
!__thumb__ || __thumb2__
4248 #
Return 1 if this is an ARM target where Thumb
-2 is used without options
4249 # added by the test.
4251 proc check_effective_target_arm_thumb2
{ } {
4252 return [check_no_compiler_messages arm_thumb2 assembly
{
4253 #
if !defined
(__thumb2__
)
4260 #
Return 1 if this is an ARM target where conditional execution is available.
4262 proc check_effective_target_arm_cond_exec
{ } {
4263 return [check_no_compiler_messages arm_cond_exec assembly
{
4264 #
if defined
(__arm__
) && defined
(__thumb__
) && !defined
(__thumb2__
)
4271 #
Return 1 if this is an ARM cortex
-M profile cpu
4273 proc check_effective_target_arm_cortex_m
{ } {
4274 if { ![istarget arm
*-*-*] } {
4277 return [check_no_compiler_messages arm_cortex_m assembly
{
4278 #
if defined
(__ARM_ARCH_ISA_ARM
)
4279 #error __ARM_ARCH_ISA_ARM is defined
4285 #
Return 1 if this is an ARM target where
-mthumb causes Thumb
-1 to be
4286 # used and MOVT
/MOVW instructions to be available.
4288 proc check_effective_target_arm_thumb1_movt_ok
{} {
4289 if [check_effective_target_arm_thumb1_ok
] {
4290 return [check_no_compiler_messages arm_movt object
{
4294 asm
("movt r0, #42");
4302 #
Return 1 if this is an ARM target where
-mthumb causes Thumb
-1 to be
4303 # used and CBZ and CBNZ instructions are available.
4305 proc check_effective_target_arm_thumb1_cbz_ok
{} {
4306 if [check_effective_target_arm_thumb1_ok
] {
4307 return [check_no_compiler_messages arm_movt object
{
4311 asm
("cbz r0, 2f\n2:");
4319 #
Return 1 if this is an ARM target where ARMv8
-M Security Extensions is
4322 proc check_effective_target_arm_cmse_ok
{} {
4323 return [check_no_compiler_messages arm_cmse object
{
4332 #
Return 1 if this compilation turns
on string_ops_prefer_neon
on.
4334 proc check_effective_target_arm_tune_string_ops_prefer_neon
{ } {
4335 return [check_no_messages_and_pattern arm_tune_string_ops_prefer_neon
"@string_ops_prefer_neon:\t1" assembly {
4336 int foo
(void
) { return 0; }
4337 } "-O2 -mprint-tune-info" ]
4340 #
Return 1 if the target supports executing NEON instructions
, 0
4341 # otherwise.
Cache the result.
4343 proc check_effective_target_arm_neon_hw
{ } {
4344 return [check_runtime arm_neon_hw_available
{
4348 long long a
= 0, b
= 1;
4349 asm
("vorr %P0, %P1, %P2"
4351 : "0" (a), "w" (b));
4354 } [add_options_for_arm_neon
""]]
4357 #
Return true
if this is an AArch64 target that can run SVE code.
4359 proc check_effective_target_aarch64_sve_hw
{ } {
4360 if { ![istarget aarch64
*-*-*] } {
4363 return [check_runtime aarch64_sve_hw_available
{
4367 asm volatile
("ptrue p0.b");
4373 #
Return true
if this is an AArch64 target that can run SVE code and
4374 #
if its SVE vectors have exactly BITS bits.
4376 proc aarch64_sve_hw_bits
{ bits
} {
4377 if { ![check_effective_target_aarch64_sve_hw
] } {
4380 return [check_runtime aarch64_sve$
{bits
}_hw
[subst
{
4385 asm volatile
("cntd %0" : "=r" (res));
4386 if (res
* 64 != $bits
)
4393 #
Return true
if this is an AArch64 target that can run SVE code and
4394 #
if its SVE vectors have exactly
256 bits.
4396 proc check_effective_target_aarch64_sve256_hw
{ } {
4397 return [aarch64_sve_hw_bits
256]
4400 proc check_effective_target_arm_neonv2_hw
{ } {
4401 return [check_runtime arm_neon_hwv2_available
{
4402 #
include "arm_neon.h"
4406 float32x2_t a
, b
, c
;
4407 asm
("vfma.f32 %P0, %P1, %P2"
4409 : "w" (b), "w" (c));
4412 } [add_options_for_arm_neonv2
""]]
4415 #
Return 1 if the target supports the ARMv8.1 Adv.SIMD extension
, 0
4416 # otherwise. The test is valid
for AArch64 and ARM. Record the command
4417 # line options needed.
4419 proc check_effective_target_arm_v8_1a_neon_ok_nocache
{ } {
4420 global et_arm_v8_1a_neon_flags
4421 set et_arm_v8_1a_neon_flags
""
4423 if { ![istarget arm
*-*-*] && ![istarget aarch64
*-*-*] } {
4427 # Iterate through sets of options to find the compiler flags that
4428 # need to be added to the
-march option. Start with the empty
set
4429 # since AArch64 only needs the
-march setting.
4430 foreach flags
{"" "-mfpu=neon-fp-armv8" "-mfloat-abi=softfp" \
4431 "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
4432 foreach arches
{ "-march=armv8-a+rdma" "-march=armv8.1-a" } {
4433 if { [check_no_compiler_messages_nocache arm_v8_1a_neon_ok object
{
4434 #
if !defined
(__ARM_FEATURE_QRDMX
)
4435 #error
"__ARM_FEATURE_QRDMX not defined"
4437 } "$flags $arches"] } {
4438 set et_arm_v8_1a_neon_flags
"$flags $arches"
4447 proc check_effective_target_arm_v8_1a_neon_ok
{ } {
4448 return [check_cached_effective_target arm_v8_1a_neon_ok \
4449 check_effective_target_arm_v8_1a_neon_ok_nocache
]
4452 #
Return 1 if the target supports ARMv8.2 scalar FP16 arithmetic
4453 # instructions
, 0 otherwise. The test is valid
for ARM and
for AArch64.
4454 # Record the command line options needed.
4456 proc check_effective_target_arm_v8_2a_fp16_scalar_ok_nocache
{ } {
4457 global et_arm_v8_2a_fp16_scalar_flags
4458 set et_arm_v8_2a_fp16_scalar_flags
""
4460 if { ![istarget arm
*-*-*] && ![istarget aarch64
*-*-*] } {
4464 # Iterate through sets of options to find the compiler flags that
4465 # need to be added to the
-march option.
4466 foreach flags
{"" "-mfpu=fp-armv8" "-mfloat-abi=softfp" \
4467 "-mfpu=fp-armv8 -mfloat-abi=softfp"} {
4468 if { [check_no_compiler_messages_nocache \
4469 arm_v8_2a_fp16_scalar_ok object
{
4470 #
if !defined
(__ARM_FEATURE_FP16_SCALAR_ARITHMETIC
)
4471 #error
"__ARM_FEATURE_FP16_SCALAR_ARITHMETIC not defined"
4473 } "$flags -march=armv8.2-a+fp16"] } {
4474 set et_arm_v8_2a_fp16_scalar_flags
"$flags -march=armv8.2-a+fp16"
4482 proc check_effective_target_arm_v8_2a_fp16_scalar_ok
{ } {
4483 return [check_cached_effective_target arm_v8_2a_fp16_scalar_ok \
4484 check_effective_target_arm_v8_2a_fp16_scalar_ok_nocache
]
4487 #
Return 1 if the target supports ARMv8.2 Adv.SIMD FP16 arithmetic
4488 # instructions
, 0 otherwise. The test is valid
for ARM and
for AArch64.
4489 # Record the command line options needed.
4491 proc check_effective_target_arm_v8_2a_fp16_neon_ok_nocache
{ } {
4492 global et_arm_v8_2a_fp16_neon_flags
4493 set et_arm_v8_2a_fp16_neon_flags
""
4495 if { ![istarget arm
*-*-*] && ![istarget aarch64
*-*-*] } {
4499 # Iterate through sets of options to find the compiler flags that
4500 # need to be added to the
-march option.
4501 foreach flags
{"" "-mfpu=neon-fp-armv8" "-mfloat-abi=softfp" \
4502 "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
4503 if { [check_no_compiler_messages_nocache \
4504 arm_v8_2a_fp16_neon_ok object
{
4505 #
if !defined
(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC
)
4506 #error
"__ARM_FEATURE_FP16_VECTOR_ARITHMETIC not defined"
4508 } "$flags -march=armv8.2-a+fp16"] } {
4509 set et_arm_v8_2a_fp16_neon_flags
"$flags -march=armv8.2-a+fp16"
4517 proc check_effective_target_arm_v8_2a_fp16_neon_ok
{ } {
4518 return [check_cached_effective_target arm_v8_2a_fp16_neon_ok \
4519 check_effective_target_arm_v8_2a_fp16_neon_ok_nocache
]
4522 #
Return 1 if the target supports ARMv8.2 Adv.SIMD Dot Product
4523 # instructions
, 0 otherwise. The test is valid
for ARM and
for AArch64.
4524 # Record the command line options needed.
4526 proc check_effective_target_arm_v8_2a_dotprod_neon_ok_nocache
{ } {
4527 global et_arm_v8_2a_dotprod_neon_flags
4528 set et_arm_v8_2a_dotprod_neon_flags
""
4530 if { ![istarget arm
*-*-*] && ![istarget aarch64
*-*-*] } {
4534 # Iterate through sets of options to find the compiler flags that
4535 # need to be added to the
-march option.
4536 foreach flags
{"" "-mfloat-abi=softfp -mfpu=neon-fp-armv8" "-mfloat-abi=hard -mfpu=neon-fp-armv8"} {
4537 if { [check_no_compiler_messages_nocache \
4538 arm_v8_2a_dotprod_neon_ok object
{
4539 #
if !defined
(__ARM_FEATURE_DOTPROD
)
4540 #error
"__ARM_FEATURE_DOTPROD not defined"
4542 } "$flags -march=armv8.2-a+dotprod"] } {
4543 set et_arm_v8_2a_dotprod_neon_flags
"$flags -march=armv8.2-a+dotprod"
4551 proc check_effective_target_arm_v8_2a_dotprod_neon_ok
{ } {
4552 return [check_cached_effective_target arm_v8_2a_dotprod_neon_ok \
4553 check_effective_target_arm_v8_2a_dotprod_neon_ok_nocache
]
4556 proc add_options_for_arm_v8_2a_dotprod_neon
{ flags
} {
4557 if { ! [check_effective_target_arm_v8_2a_dotprod_neon_ok
] } {
4560 global et_arm_v8_2a_dotprod_neon_flags
4561 return "$flags $et_arm_v8_2a_dotprod_neon_flags"
4564 #
Return 1 if the target supports FP16 VFMAL and VFMSL
4565 # instructions
, 0 otherwise.
4566 # Record the command line options needed.
4568 proc check_effective_target_arm_fp16fml_neon_ok_nocache
{ } {
4569 global et_arm_fp16fml_neon_flags
4570 set et_arm_fp16fml_neon_flags
""
4572 if { ![istarget arm
*-*-*] } {
4576 # Iterate through sets of options to find the compiler flags that
4577 # need to be added to the
-march option.
4578 foreach flags
{"" "-mfloat-abi=softfp -mfpu=neon-fp-armv8" "-mfloat-abi=hard -mfpu=neon-fp-armv8"} {
4579 if { [check_no_compiler_messages_nocache \
4580 arm_fp16fml_neon_ok assembly
{
4581 #
include <arm_neon.h
>
4583 foo
(float32x2_t r
, float16x4_t a
, float16x4_t b
)
4585 return vfmlal_high_u32
(r
, a
, b
);
4587 } "$flags -march=armv8.2-a+fp16fml"] } {
4588 set et_arm_fp16fml_neon_flags
"$flags -march=armv8.2-a+fp16fml"
4596 proc check_effective_target_arm_fp16fml_neon_ok
{ } {
4597 return [check_cached_effective_target arm_fp16fml_neon_ok \
4598 check_effective_target_arm_fp16fml_neon_ok_nocache
]
4601 proc add_options_for_arm_fp16fml_neon
{ flags
} {
4602 if { ! [check_effective_target_arm_fp16fml_neon_ok
] } {
4605 global et_arm_fp16fml_neon_flags
4606 return "$flags $et_arm_fp16fml_neon_flags"
4609 #
Return 1 if the target supports executing ARMv8 NEON instructions
, 0
4612 proc check_effective_target_arm_v8_neon_hw
{ } {
4613 return [check_runtime arm_v8_neon_hw_available
{
4614 #
include "arm_neon.h"
4618 float32x2_t a
= { 1.0f
, 2.0f
};
4619 #ifdef __ARM_ARCH_ISA_A64
4620 asm
("frinta %0.2s, %1.2s"
4624 asm
("vrinta.f32 %P0, %P1"
4628 return a
[0] == 2.0f
;
4630 } [add_options_for_arm_v8_neon
""]]
4633 #
Return 1 if the target supports executing the ARMv8.1 Adv.SIMD extension
, 0
4634 # otherwise. The test is valid
for AArch64 and ARM.
4636 proc check_effective_target_arm_v8_1a_neon_hw
{ } {
4637 if { ![check_effective_target_arm_v8_1a_neon_ok
] } {
4640 return [check_runtime arm_v8_1a_neon_hw_available
{
4644 #ifdef __ARM_ARCH_ISA_A64
4645 __Int32x2_t a
= {0, 1};
4646 __Int32x2_t b
= {0, 2};
4649 asm
("sqrdmlah %0.2s, %1.2s, %2.2s"
4652 : /* No clobbers.
*/);
4656 __simd64_int32_t a
= {0, 1};
4657 __simd64_int32_t b
= {0, 2};
4658 __simd64_int32_t result
;
4660 asm
("vqrdmlah.s32 %P0, %P1, %P2"
4663 : /* No clobbers.
*/);
4668 } [add_options_for_arm_v8_1a_neon
""]]
4671 #
Return 1 if the target supports executing floating point instructions from
4672 # ARMv8.2 with the FP16 extension
, 0 otherwise. The test is valid
for ARM and
4675 proc check_effective_target_arm_v8_2a_fp16_scalar_hw
{ } {
4676 if { ![check_effective_target_arm_v8_2a_fp16_scalar_ok
] } {
4679 return [check_runtime arm_v8_2a_fp16_scalar_hw_available
{
4686 #ifdef __ARM_ARCH_ISA_A64
4688 asm
("fabs %h0, %h1"
4691 : /* No clobbers.
*/);
4695 asm
("vabs.f16 %0, %1"
4698 : /* No clobbers.
*/);
4702 return (result
== 1.0) ?
0 : 1;
4704 } [add_options_for_arm_v8_2a_fp16_scalar
""]]
4707 #
Return 1 if the target supports executing Adv.SIMD instructions from ARMv8.2
4708 # with the FP16 extension
, 0 otherwise. The test is valid
for ARM and
for
4711 proc check_effective_target_arm_v8_2a_fp16_neon_hw
{ } {
4712 if { ![check_effective_target_arm_v8_2a_fp16_neon_ok
] } {
4715 return [check_runtime arm_v8_2a_fp16_neon_hw_available
{
4719 #ifdef __ARM_ARCH_ISA_A64
4721 __Float16x4_t a
= {1.0, -1.0, 1.0, -1.0};
4722 __Float16x4_t result
;
4724 asm
("fabs %0.4h, %1.4h"
4727 : /* No clobbers.
*/);
4731 __simd64_float16_t a
= {1.0, -1.0, 1.0, -1.0};
4732 __simd64_float16_t result
;
4734 asm
("vabs.f16 %P0, %P1"
4737 : /* No clobbers.
*/);
4741 return (result
[0] == 1.0) ?
0 : 1;
4743 } [add_options_for_arm_v8_2a_fp16_neon
""]]
4746 #
Return 1 if the target supports executing AdvSIMD instructions from ARMv8.2
4747 # with the Dot Product extension
, 0 otherwise. The test is valid
for ARM and
for
4750 proc check_effective_target_arm_v8_2a_dotprod_neon_hw
{ } {
4751 if { ![check_effective_target_arm_v8_2a_dotprod_neon_ok
] } {
4754 return [check_runtime arm_v8_2a_dotprod_neon_hw_available
{
4755 #
include "arm_neon.h"
4760 uint32x2_t results
= {0,0};
4761 uint8x8_t a
= {1,1,1,1,2,2,2,2};
4762 uint8x8_t b
= {2,2,2,2,3,3,3,3};
4764 #ifdef __ARM_ARCH_ISA_A64
4765 asm
("udot %0.2s, %1.8b, %2.8b"
4768 : /* No clobbers.
*/);
4771 asm
("vudot.u8 %P0, %P1, %P2"
4774 : /* No clobbers.
*/);
4777 return (results
[0] == 8 && results
[1] == 24) ?
1 : 0;
4779 } [add_options_for_arm_v8_2a_dotprod_neon
""]]
4782 #
Return 1 if this is a ARM target with NEON enabled.
4784 proc check_effective_target_arm_neon
{ } {
4785 if { [check_effective_target_arm32
] } {
4786 return [check_no_compiler_messages arm_neon object
{
4787 #ifndef __ARM_NEON__
4798 proc check_effective_target_arm_neonv2
{ } {
4799 if { [check_effective_target_arm32
] } {
4800 return [check_no_compiler_messages arm_neon object
{
4801 #ifndef __ARM_NEON__
4804 #ifndef __ARM_FEATURE_FMA
4816 #
Return 1 if this is an ARM target with
load acquire and store release
4817 # instructions
for 8-, 16- and
32-bit types.
4819 proc check_effective_target_arm_acq_rel
{ } {
4820 return [check_no_compiler_messages arm_acq_rel object
{
4822 load_acquire_store_release
(void
)
4824 asm
("lda r0, [r1]\n\t"
4830 : : : "r0", "memory");
4835 # Add the options needed
for MIPS Paired
-Single.
4837 proc add_options_for_mpaired_single
{ flags
} {
4838 if { ! [check_effective_target_mpaired_single
] } {
4841 return "$flags -mpaired-single"
4844 # Add the options needed
for MIPS SIMD Architecture.
4846 proc add_options_for_mips_msa
{ flags
} {
4847 if { ! [check_effective_target_mips_msa
] } {
4850 return "$flags -mmsa"
4853 #
Return 1 if this a Loongson
-2E or
-2F target using an ABI that supports
4854 # the Loongson vector modes.
4856 proc check_effective_target_mips_loongson
{ } {
4857 return [check_no_compiler_messages loongson assembly
{
4858 #
if !defined
(__mips_loongson_vector_rev
)
4859 #error
!__mips_loongson_vector_rev
4864 #
Return 1 if this is a MIPS target that supports the legacy NAN.
4866 proc check_effective_target_mips_nanlegacy
{ } {
4867 return [check_no_compiler_messages nanlegacy assembly
{
4869 int main
() { return 0; }
4873 #
Return 1 if an MSA
program can be compiled to object
4875 proc check_effective_target_mips_msa
{ } {
4876 if ![check_effective_target_nomips16
] {
4879 return [check_no_compiler_messages msa object
{
4880 #
if !defined
(__mips_msa
)
4881 #error
"MSA NOT AVAIL"
4883 #
if !(((__mips
== 64) ||
(__mips
== 32)) && (__mips_isa_rev
>= 2))
4884 #error
"MSA NOT AVAIL FOR ISA REV < 2"
4886 #
if !defined
(__mips_hard_float
)
4887 #error
"MSA HARD_FLOAT REQUIRED"
4889 #
if __mips_fpr
!= 64
4890 #error
"MSA 64-bit FPR REQUIRED"
4896 v8i16 v
= __builtin_msa_ldi_h
(1);
4904 #
Return 1 if this is an ARM target that adheres to the ABI
for the ARM
4907 proc check_effective_target_arm_eabi
{ } {
4908 return [check_no_compiler_messages arm_eabi object
{
4909 #ifndef __ARM_EABI__
4917 #
Return 1 if this is an ARM target that adheres to the hard
-float variant of
4918 # the ABI
for the ARM Architecture
(e.g.
-mfloat
-abi
=hard
).
4920 proc check_effective_target_arm_hf_eabi
{ } {
4921 return [check_no_compiler_messages arm_hf_eabi object
{
4922 #
if !defined
(__ARM_EABI__
) ||
!defined
(__ARM_PCS_VFP
)
4923 #error not hard
-float EABI
4930 #
Return 1 if this is an ARM target that uses the soft float ABI
4931 # with no floating
-point instructions at all
(e.g.
-mfloat
-abi
=soft
).
4933 proc check_effective_target_arm_softfloat
{ } {
4934 return [check_no_compiler_messages arm_softfloat object
{
4935 #
if !defined
(__SOFTFP__
)
4936 #error not soft
-float EABI
4943 #
Return 1 if this is an ARM target supporting
-mcpu
=iwmmxt.
4944 # Some multilibs may be incompatible with this option.
4946 proc check_effective_target_arm_iwmmxt_ok
{ } {
4947 if { [check_effective_target_arm32
] } {
4948 return [check_no_compiler_messages arm_iwmmxt_ok object
{
4956 #
Return true
if LDRD
/STRD instructions are prefered over LDM
/STM instructions
4957 #
for an ARM target.
4958 proc check_effective_target_arm_prefer_ldrd_strd
{ } {
4959 if { ![check_effective_target_arm32
] } {
4963 return [check_no_messages_and_pattern arm_prefer_ldrd_strd
"strd\tr" assembly {
4964 void foo
(void
) { __asm__
("" ::: "r4", "r5"); }
4968 #
Return 1 if this is a PowerPC target supporting
-meabi.
4970 proc check_effective_target_powerpc_eabi_ok
{ } {
4971 if { [istarget powerpc
*-*-*] } {
4972 return [check_no_compiler_messages powerpc_eabi_ok object
{
4980 #
Return 1 if this is a PowerPC target with floating
-point registers.
4982 proc check_effective_target_powerpc_fprs
{ } {
4983 if { [istarget powerpc
*-*-*]
4984 ||
[istarget rs6000
-*-*] } {
4985 return [check_no_compiler_messages powerpc_fprs object
{
4997 #
Return 1 if this is a PowerPC target with hardware double
-precision
5000 proc check_effective_target_powerpc_hard_double
{ } {
5001 if { [istarget powerpc
*-*-*]
5002 ||
[istarget rs6000
-*-*] } {
5003 return [check_no_compiler_messages powerpc_hard_double object
{
5015 #
Return 1 if this is a PowerPC target supporting
-maltivec.
5017 proc check_effective_target_powerpc_altivec_ok
{ } {
5018 if { ([istarget powerpc
*-*-*]
5019 && ![istarget powerpc
-*-linux
*paired
*])
5020 ||
[istarget rs6000
-*-*] } {
5021 # AltiVec is not supported
on AIX before
5.3.
5022 if { [istarget powerpc
*-*-aix4
*]
5023 ||
[istarget powerpc
*-*-aix5.1
*]
5024 ||
[istarget powerpc
*-*-aix5.2
*] } {
5027 return [check_no_compiler_messages powerpc_altivec_ok object
{
5035 #
Return 1 if this is a PowerPC target supporting
-mpower8
-vector
5037 proc check_effective_target_powerpc_p8vector_ok
{ } {
5038 if { ([istarget powerpc
*-*-*]
5039 && ![istarget powerpc
-*-linux
*paired
*])
5040 ||
[istarget rs6000
-*-*] } {
5041 # AltiVec is not supported
on AIX before
5.3.
5042 if { [istarget powerpc
*-*-aix4
*]
5043 ||
[istarget powerpc
*-*-aix5.1
*]
5044 ||
[istarget powerpc
*-*-aix5.2
*] } {
5047 return [check_no_compiler_messages powerpc_p8vector_ok object
{
5050 asm volatile
("xxlorc vs0,vs0,vs0");
5052 asm volatile
("xxlorc 0,0,0");
5056 } "-mpower8-vector"]
5062 #
Return 1 if this is a PowerPC target supporting
-mpower9
-vector
5064 proc check_effective_target_powerpc_p9vector_ok
{ } {
5065 if { ([istarget powerpc
*-*-*]
5066 && ![istarget powerpc
-*-linux
*paired
*])
5067 ||
[istarget rs6000
-*-*] } {
5068 # AltiVec is not supported
on AIX before
5.3.
5069 if { [istarget powerpc
*-*-aix4
*]
5070 ||
[istarget powerpc
*-*-aix5.1
*]
5071 ||
[istarget powerpc
*-*-aix5.2
*] } {
5074 return [check_no_compiler_messages powerpc_p9vector_ok object
{
5077 vector double v
= (vector double
) { 0.0, 0.0 };
5078 asm
("xsxexpdp %0,%1" : "+r" (e) : "wa" (v));
5081 } "-mpower9-vector"]
5087 #
Return 1 if this is a PowerPC target supporting
-mmodulo
5089 proc check_effective_target_powerpc_p9modulo_ok
{ } {
5090 if { ([istarget powerpc
*-*-*]
5091 && ![istarget powerpc
-*-linux
*paired
*])
5092 ||
[istarget rs6000
-*-*] } {
5093 # AltiVec is not supported
on AIX before
5.3.
5094 if { [istarget powerpc
*-*-aix4
*]
5095 ||
[istarget powerpc
*-*-aix5.1
*]
5096 ||
[istarget powerpc
*-*-aix5.2
*] } {
5099 return [check_no_compiler_messages powerpc_p9modulo_ok object
{
5101 int i
= 5, j
= 3, r
= -1;
5102 asm
("modsw %0,%1,%2" : "+r" (r) : "r" (i), "r" (j));
5111 #
Return 1 if this is a PowerPC target supporting
-mfloat128 via either
5112 # software emulation
on power7
/power8 systems or hardware support
on power9.
5114 proc check_effective_target_powerpc_float128_sw_ok
{ } {
5115 if { ([istarget powerpc
*-*-*]
5116 && ![istarget powerpc
-*-linux
*paired
*])
5117 ||
[istarget rs6000
-*-*] } {
5118 # AltiVec is not supported
on AIX before
5.3.
5119 if { [istarget powerpc
*-*-aix4
*]
5120 ||
[istarget powerpc
*-*-aix5.1
*]
5121 ||
[istarget powerpc
*-*-aix5.2
*] } {
5124 return [check_no_compiler_messages powerpc_float128_sw_ok object
{
5125 volatile __float128 x
= 1.0q
;
5126 volatile __float128 y
= 2.0q
;
5128 __float128 z
= x
+ y
;
5131 } "-mfloat128 -mvsx"]
5137 #
Return 1 if this is a PowerPC target supporting
-mfloat128 via hardware
5138 # support
on power9.
5140 proc check_effective_target_powerpc_float128_hw_ok
{ } {
5141 if { ([istarget powerpc
*-*-*]
5142 && ![istarget powerpc
-*-linux
*paired
*])
5143 ||
[istarget rs6000
-*-*] } {
5144 # AltiVec is not supported
on AIX before
5.3.
5145 if { [istarget powerpc
*-*-aix4
*]
5146 ||
[istarget powerpc
*-*-aix5.1
*]
5147 ||
[istarget powerpc
*-*-aix5.2
*] } {
5150 return [check_no_compiler_messages powerpc_float128_hw_ok object
{
5151 volatile __float128 x
= 1.0q
;
5152 volatile __float128 y
= 2.0q
;
5155 __asm__
("xsaddqp %0,%1,%2" : "=v" (z) : "v" (x), "v" (y));
5158 } "-mfloat128-hardware"]
5164 #
Return 1 if current options
define float128
, 0 otherwise.
5166 proc check_effective_target_ppc_float128
{ } {
5167 return [check_no_compiler_messages_nocache ppc_float128 object
{
5168 #ifndef __FLOAT128__
5174 #
Return 1 if current options generate float128 insns
, 0 otherwise.
5176 proc check_effective_target_ppc_float128_insns
{ } {
5177 return [check_no_compiler_messages_nocache ppc_float128 object
{
5178 #ifndef __FLOAT128_HARDWARE__
5184 #
Return 1 if current options generate VSX instructions
, 0 otherwise.
5186 proc check_effective_target_powerpc_vsx
{ } {
5187 return [check_no_compiler_messages_nocache powerpc_vsx object
{
5194 #
Return 1 if this is a PowerPC target supporting
-mvsx
5196 proc check_effective_target_powerpc_vsx_ok
{ } {
5197 if { ([istarget powerpc
*-*-*]
5198 && ![istarget powerpc
-*-linux
*paired
*])
5199 ||
[istarget rs6000
-*-*] } {
5200 # VSX is not supported
on AIX before
7.1.
5201 if { [istarget powerpc
*-*-aix4
*]
5202 ||
[istarget powerpc
*-*-aix5
*]
5203 ||
[istarget powerpc
*-*-aix6
*] } {
5206 return [check_no_compiler_messages powerpc_vsx_ok object
{
5209 asm volatile
("xxlor vs0,vs0,vs0");
5211 asm volatile
("xxlor 0,0,0");
5221 #
Return 1 if this is a PowerPC target supporting
-mhtm
5223 proc check_effective_target_powerpc_htm_ok
{ } {
5224 if { ([istarget powerpc
*-*-*]
5225 && ![istarget powerpc
-*-linux
*paired
*])
5226 ||
[istarget rs6000
-*-*] } {
5227 # HTM is not supported
on AIX yet.
5228 if { [istarget powerpc
*-*-aix
*] } {
5231 return [check_no_compiler_messages powerpc_htm_ok object
{
5233 asm volatile
("tbegin. 0");
5242 #
Return 1 if the target supports executing HTM hardware instructions
,
5243 #
0 otherwise.
Cache the result.
5245 proc check_htm_hw_available
{ } {
5246 return [check_cached_effective_target htm_hw_available
{
5247 #
For now
, disable
on Darwin
5248 if { [istarget powerpc
-*-eabi
] ||
[istarget powerpc
*-*-eabispe
] ||
[istarget
*-*-darwin
*]} {
5251 check_runtime_nocache htm_hw_available
{
5261 #
Return 1 if this is a PowerPC target supporting
-mcpu
=cell.
5263 proc check_effective_target_powerpc_ppu_ok
{ } {
5264 if [check_effective_target_powerpc_altivec_ok
] {
5265 return [check_no_compiler_messages cell_asm_available object
{
5268 asm volatile
("lvlx v0,v0,v0");
5270 asm volatile
("lvlx 0,0,0");
5280 #
Return 1 if this is a PowerPC target that supports SPU.
5282 proc check_effective_target_powerpc_spu
{ } {
5283 if { [istarget powerpc
*-*-linux
*] } {
5284 return [check_effective_target_powerpc_altivec_ok
]
5290 #
Return 1 if this is a PowerPC SPE target. The check includes options
5291 # specified by dg
-options
for this test
, so don
't cache the result.
5293 proc check_effective_target_powerpc_spe_nocache { } {
5294 if { [istarget powerpc*-*-*] } {
5295 return [check_no_compiler_messages_nocache powerpc_spe object {
5301 } [current_compiler_flags]]
5307 # Return 1 if this is a PowerPC target with SPE enabled.
5309 proc check_effective_target_powerpc_spe { } {
5310 if { [istarget powerpc*-*-*] } {
5311 return [check_no_compiler_messages powerpc_spe object {
5323 # Return 1 if this is a PowerPC target with Altivec enabled.
5325 proc check_effective_target_powerpc_altivec { } {
5326 if { [istarget powerpc*-*-*] } {
5327 return [check_no_compiler_messages powerpc_altivec object {
5339 # Return 1 if this is a PowerPC 405 target. The check includes options
5340 # specified by dg-options for this test, so don't
cache the result.
5342 proc check_effective_target_powerpc_405_nocache
{ } {
5343 if { [istarget powerpc
*-*-*] ||
[istarget rs6000
-*-*] } {
5344 return [check_no_compiler_messages_nocache powerpc_405 object
{
5350 } [current_compiler_flags
]]
5356 #
Return 1 if this is a PowerPC target using the ELFv2 ABI.
5358 proc check_effective_target_powerpc_elfv2
{ } {
5359 if { [istarget powerpc
*-*-*] } {
5360 return [check_no_compiler_messages powerpc_elfv2 object
{
5362 #error not ELF v2 ABI
5372 #
Return 1 if this is a SPU target with a toolchain that
5373 # supports automatic overlay generation.
5375 proc check_effective_target_spu_auto_overlay
{ } {
5376 if { [istarget spu
*-*-elf
*] } {
5377 return [check_no_compiler_messages spu_auto_overlay executable
{
5379 } "-Wl,--auto-overlay" ]
5385 # The VxWorks SPARC simulator accepts only EM_SPARC executables and
5386 # chokes
on EM_SPARC32PLUS or EM_SPARCV9 executables.
Return 1 if the
5387 # test environment appears to run executables
on such a simulator.
5389 proc check_effective_target_ultrasparc_hw
{ } {
5390 return [check_runtime ultrasparc_hw
{
5391 int main
() { return 0; }
5392 } "-mcpu=ultrasparc"]
5395 #
Return 1 if the test environment supports executing UltraSPARC VIS2
5396 # instructions. We check this by attempting
: "bmask %g0, %g0, %g0"
5398 proc check_effective_target_ultrasparc_vis2_hw
{ } {
5399 return [check_runtime ultrasparc_vis2_hw
{
5400 int main
() { __asm__
(".word 0x81b00320"); return 0; }
5401 } "-mcpu=ultrasparc3"]
5404 #
Return 1 if the test environment supports executing UltraSPARC VIS3
5405 # instructions. We check this by attempting
: "addxc %g0, %g0, %g0"
5407 proc check_effective_target_ultrasparc_vis3_hw
{ } {
5408 return [check_runtime ultrasparc_vis3_hw
{
5409 int main
() { __asm__
(".word 0x81b00220"); return 0; }
5413 #
Return 1 if this is a SPARC
-V9 target.
5415 proc check_effective_target_sparc_v9
{ } {
5416 if { [istarget sparc
*-*-*] } {
5417 return [check_no_compiler_messages sparc_v9 object
{
5419 asm volatile
("return %i7+8");
5428 #
Return 1 if this is a SPARC target with VIS enabled.
5430 proc check_effective_target_sparc_vis
{ } {
5431 if { [istarget sparc
*-*-*] } {
5432 return [check_no_compiler_messages sparc_vis object
{
5444 #
Return 1 if the target supports hardware vector shift operation.
5446 proc check_effective_target_vect_shift
{ } {
5447 global et_vect_shift_saved
5450 if [info exists et_vect_shift_saved
($et_index
)] {
5451 verbose
"check_effective_target_vect_shift: using cached result" 2
5453 set et_vect_shift_saved
($et_index
) 0
5454 if { ([istarget powerpc
*-*-*]
5455 && ![istarget powerpc
-*-linux
*paired
*])
5456 ||
[istarget ia64
-*-*]
5457 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
5458 ||
[istarget aarch64
*-*-*]
5459 ||
[is
-effective
-target arm_neon
]
5460 ||
([istarget mips
*-*-*]
5461 && ([et
-is
-effective
-target mips_msa
]
5462 ||
[et
-is
-effective
-target mips_loongson
]))
5463 ||
([istarget s390
*-*-*]
5464 && [check_effective_target_s390_vx
]) } {
5465 set et_vect_shift_saved
($et_index
) 1
5469 verbose
"check_effective_target_vect_shift:\
5470 returning $et_vect_shift_saved
($et_index
)" 2
5471 return $et_vect_shift_saved
($et_index
)
5474 proc check_effective_target_whole_vector_shift
{ } {
5475 if { [istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
5476 ||
[istarget ia64
-*-*]
5477 ||
[istarget aarch64
*-*-*]
5478 ||
[istarget powerpc64
*-*-*]
5479 ||
([is
-effective
-target arm_neon
]
5480 && [check_effective_target_arm_little_endian
])
5481 ||
([istarget mips
*-*-*]
5482 && [et
-is
-effective
-target mips_loongson
])
5483 ||
([istarget s390
*-*-*]
5484 && [check_effective_target_s390_vx
]) } {
5490 verbose
"check_effective_target_vect_long: returning $answer" 2
5494 #
Return 1 if the target supports vector bswap operations.
5496 proc check_effective_target_vect_bswap
{ } {
5497 global et_vect_bswap_saved
5500 if [info exists et_vect_bswap_saved
($et_index
)] {
5501 verbose
"check_effective_target_vect_bswap: using cached result" 2
5503 set et_vect_bswap_saved
($et_index
) 0
5504 if { [istarget aarch64
*-*-*]
5505 ||
[is
-effective
-target arm_neon
]
5507 set et_vect_bswap_saved
($et_index
) 1
5511 verbose
"check_effective_target_vect_bswap:\
5512 returning $et_vect_bswap_saved
($et_index
)" 2
5513 return $et_vect_bswap_saved
($et_index
)
5516 #
Return 1 if the target supports hardware vector shift operation
for char.
5518 proc check_effective_target_vect_shift_char
{ } {
5519 global et_vect_shift_char_saved
5522 if [info exists et_vect_shift_char_saved
($et_index
)] {
5523 verbose
"check_effective_target_vect_shift_char: using cached result" 2
5525 set et_vect_shift_char_saved
($et_index
) 0
5526 if { ([istarget powerpc
*-*-*]
5527 && ![istarget powerpc
-*-linux
*paired
*])
5528 ||
[is
-effective
-target arm_neon
]
5529 ||
([istarget mips
*-*-*]
5530 && [et
-is
-effective
-target mips_msa
])
5531 ||
([istarget s390
*-*-*]
5532 && [check_effective_target_s390_vx
]) } {
5533 set et_vect_shift_char_saved
($et_index
) 1
5537 verbose
"check_effective_target_vect_shift_char:\
5538 returning $et_vect_shift_char_saved
($et_index
)" 2
5539 return $et_vect_shift_char_saved
($et_index
)
5542 #
Return 1 if the target supports hardware vectors of long
, 0 otherwise.
5544 # This can change
for different subtargets so
do not
cache the result.
5546 proc check_effective_target_vect_long
{ } {
5547 if { [istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
5548 ||
(([istarget powerpc
*-*-*]
5549 && ![istarget powerpc
-*-linux
*paired
*])
5550 && [check_effective_target_ilp32
])
5551 ||
[is
-effective
-target arm_neon
]
5552 ||
([istarget sparc
*-*-*] && [check_effective_target_ilp32
])
5553 ||
[istarget aarch64
*-*-*]
5554 ||
([istarget mips
*-*-*]
5555 && [et
-is
-effective
-target mips_msa
])
5556 ||
([istarget s390
*-*-*]
5557 && [check_effective_target_s390_vx
]) } {
5563 verbose
"check_effective_target_vect_long: returning $answer" 2
5567 #
Return 1 if the target supports hardware vectors of float when
5568 #
-funsafe
-math
-optimizations is enabled
, 0 otherwise.
5570 # This won
't change for different subtargets so cache the result.
5572 proc check_effective_target_vect_float { } {
5573 global et_vect_float_saved
5576 if [info exists et_vect_float_saved($et_index)] {
5577 verbose "check_effective_target_vect_float: using cached result" 2
5579 set et_vect_float_saved($et_index) 0
5580 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
5581 || [istarget powerpc*-*-*]
5582 || [istarget spu-*-*]
5583 || [istarget mips-sde-elf]
5584 || [istarget mipsisa64*-*-*]
5585 || [istarget ia64-*-*]
5586 || [istarget aarch64*-*-*]
5587 || ([istarget mips*-*-*]
5588 && [et-is-effective-target mips_msa])
5589 || [is-effective-target arm_neon]
5590 || ([istarget s390*-*-*]
5591 && [check_effective_target_s390_vxe]) } {
5592 set et_vect_float_saved($et_index) 1
5596 verbose "check_effective_target_vect_float:\
5597 returning $et_vect_float_saved($et_index)" 2
5598 return $et_vect_float_saved($et_index)
5601 # Return 1 if the target supports hardware vectors of float without
5602 # -funsafe-math-optimizations being enabled, 0 otherwise.
5604 proc check_effective_target_vect_float_strict { } {
5605 return [expr { [check_effective_target_vect_float]
5606 && ![istarget arm*-*-*] }]
5609 # Return 1 if the target supports hardware vectors of double, 0 otherwise.
5611 # This won't change
for different subtargets so
cache the result.
5613 proc check_effective_target_vect_double
{ } {
5614 global et_vect_double_saved
5617 if [info exists et_vect_double_saved
($et_index
)] {
5618 verbose
"check_effective_target_vect_double: using cached result" 2
5620 set et_vect_double_saved
($et_index
) 0
5621 if { (([istarget i?
86-*-*] ||
[istarget x86_64
-*-*])
5622 && [check_no_compiler_messages vect_double assembly
{
5623 #ifdef __tune_atom__
5624 # error No double vectorizer support.
5627 ||
[istarget aarch64
*-*-*]
5628 ||
[istarget spu
-*-*]
5629 ||
([istarget powerpc
*-*-*] && [check_vsx_hw_available
])
5630 ||
([istarget mips
*-*-*]
5631 && [et
-is
-effective
-target mips_msa
])
5632 ||
([istarget s390
*-*-*]
5633 && [check_effective_target_s390_vx
]) } {
5634 set et_vect_double_saved
($et_index
) 1
5638 verbose
"check_effective_target_vect_double:\
5639 returning $et_vect_double_saved
($et_index
)" 2
5640 return $et_vect_double_saved
($et_index
)
5643 #
Return 1 if the target supports conditional addition
, subtraction
,
5644 # multiplication
, division
, minimum and maximum
on vectors of double
,
5645 # via the cond_ optabs.
Return 0 otherwise.
5647 proc check_effective_target_vect_double_cond_arith
{ } {
5648 return [check_effective_target_aarch64_sve
]
5651 #
Return 1 if the target supports hardware vectors of long long
, 0 otherwise.
5653 # This won
't change for different subtargets so cache the result.
5655 proc check_effective_target_vect_long_long { } {
5656 global et_vect_long_long_saved
5659 if [info exists et_vect_long_long_saved($et_index)] {
5660 verbose "check_effective_target_vect_long_long: using cached result" 2
5662 set et_vect_long_long_saved($et_index) 0
5663 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
5664 || ([istarget mips*-*-*]
5665 && [et-is-effective-target mips_msa])
5666 || ([istarget s390*-*-*]
5667 && [check_effective_target_s390_vx]) } {
5668 set et_vect_long_long_saved($et_index) 1
5672 verbose "check_effective_target_vect_long_long:\
5673 returning $et_vect_long_long_saved($et_index)" 2
5674 return $et_vect_long_long_saved($et_index)
5678 # Return 1 if the target plus current options does not support a vector
5679 # max instruction on "int", 0 otherwise.
5681 # This won't change
for different subtargets so
cache the result.
5683 proc check_effective_target_vect_no_int_min_max
{ } {
5684 global et_vect_no_int_min_max_saved
5687 if [info exists et_vect_no_int_min_max_saved
($et_index
)] {
5688 verbose
"check_effective_target_vect_no_int_min_max:\
5689 using cached result
" 2
5691 set et_vect_no_int_min_max_saved
($et_index
) 0
5692 if { [istarget sparc
*-*-*]
5693 ||
[istarget spu
-*-*]
5694 ||
[istarget alpha
*-*-*]
5695 ||
([istarget mips
*-*-*]
5696 && [et
-is
-effective
-target mips_loongson
]) } {
5697 set et_vect_no_int_min_max_saved
($et_index
) 1
5700 verbose
"check_effective_target_vect_no_int_min_max:\
5701 returning $et_vect_no_int_min_max_saved
($et_index
)" 2
5702 return $et_vect_no_int_min_max_saved
($et_index
)
5705 #
Return 1 if the target plus current options does not support a vector
5706 # add instruction
on "int", 0 otherwise.
5708 # This won
't change for different subtargets so cache the result.
5710 proc check_effective_target_vect_no_int_add { } {
5711 global et_vect_no_int_add_saved
5714 if [info exists et_vect_no_int_add_saved($et_index)] {
5715 verbose "check_effective_target_vect_no_int_add: using cached result" 2
5717 set et_vect_no_int_add_saved($et_index) 0
5718 # Alpha only supports vector add on V8QI and V4HI.
5719 if { [istarget alpha*-*-*] } {
5720 set et_vect_no_int_add_saved($et_index) 1
5723 verbose "check_effective_target_vect_no_int_add:\
5724 returning $et_vect_no_int_add_saved($et_index)" 2
5725 return $et_vect_no_int_add_saved($et_index)
5728 # Return 1 if the target plus current options does not support vector
5729 # bitwise instructions, 0 otherwise.
5731 # This won't change
for different subtargets so
cache the result.
5733 proc check_effective_target_vect_no_bitwise
{ } {
5734 global et_vect_no_bitwise_saved
5737 if [info exists et_vect_no_bitwise_saved
($et_index
)] {
5738 verbose
"check_effective_target_vect_no_bitwise: using cached result" 2
5740 set et_vect_no_bitwise_saved
($et_index
) 0
5742 verbose
"check_effective_target_vect_no_bitwise:\
5743 returning $et_vect_no_bitwise_saved
($et_index
)" 2
5744 return $et_vect_no_bitwise_saved
($et_index
)
5747 #
Return 1 if the target plus current options supports vector permutation
,
5750 # This won
't change for different subtargets so cache the result.
5752 proc check_effective_target_vect_perm { } {
5753 global et_vect_perm_saved
5756 if [info exists et_vect_perm_saved($et_index)] {
5757 verbose "check_effective_target_vect_perm: using cached result" 2
5759 set et_vect_perm_saved($et_index) 0
5760 if { [is-effective-target arm_neon]
5761 || [istarget aarch64*-*-*]
5762 || [istarget powerpc*-*-*]
5763 || [istarget spu-*-*]
5764 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5765 || ([istarget mips*-*-*]
5766 && ([et-is-effective-target mpaired_single]
5767 || [et-is-effective-target mips_msa]))
5768 || ([istarget s390*-*-*]
5769 && [check_effective_target_s390_vx]) } {
5770 set et_vect_perm_saved($et_index) 1
5773 verbose "check_effective_target_vect_perm:\
5774 returning $et_vect_perm_saved($et_index)" 2
5775 return $et_vect_perm_saved($et_index)
5778 # Return 1 if, for some VF:
5780 # - the target's default vector size is VF
* ELEMENT_BITS bits
5782 #
- it is possible to implement the equivalent of
:
5784 #
int<ELEMENT_BITS
>_t s1
[COUNT][COUNT * VF
], s2
[COUNT * VF
];
5785 #
for (int i
= 0; i
< COUNT; ++i
)
5786 #
for (int j
= 0; j
< COUNT * VF
; ++j
)
5787 # s1
[i
][j
] = s2
[j
- j
% COUNT + i
]
5789 # using only a single
2-vector permute
for each vector in s1.
5791 # E.g.
for COUNT == 3 and vector length
4, the two arrays would be
:
5793 # s2 | a0 a1 a2 a3 | b0 b1 b2 b3 | c0 c1 c2 c3
5794 #
------+-------------+-------------+------------
5795 # s1
[0] | a0 a0 a0 a3 | a3 a3 b2 b2 | b2 c1 c1 c1
5796 # s1
[1] | a1 a1 a1 b0 | b0 b0 b3 b3 | b3 c2 c2 c2
5797 # s1
[2] | a2 a2 a2 b1 | b1 b1 c0 c0 | c0 c3 c3 c3
5799 # Each s1 permute requires only two of a
, b and c.
5801 # The distance between the start of vector n in s1
[0] and the start
5802 # of vector n in s2 is
:
5804 # A
= (n
* VF
) % COUNT
5806 # The corresponding value
for the end of vector n is
:
5808 # B
= (n
* VF
+ VF
- 1) % COUNT
5810 # Subtracting i from each value gives the corresponding difference
5811 #
for s1
[i
]. The condition being tested by this function is false
5812 # iff A
- i
> 0 and B
- i
< 0 for some i and n
, such that the first
5813 # element
for s1
[i
] comes from vector n
- 1 of s2 and the last element
5814 # comes from vector n
+ 1 of s2. The condition is therefore true iff
5815 # A
<= B
for all n. This is turn means the condition is true iff
:
5817 #
(n
* VF
) % COUNT + (VF
- 1) % COUNT < COUNT
5819 #
for all n.
COUNT - (n
* VF
) % COUNT is bounded by gcd
(VF
, COUNT),
5820 # and will be that value
for at least one n in
[0, COUNT), so we want
:
5822 #
(VF
- 1) % COUNT < gcd
(VF
, COUNT)
5824 proc vect_perm_supported
{ count element_bits
} {
5825 set vector_bits
[lindex
[available_vector_sizes
] 0]
5826 # The number of vectors has to be a power of
2 when permuting
5827 #
variable-length vectors.
5828 if { $vector_bits
<= 0 && ($
count & -$
count) != $
count } {
5831 set vf
[expr
{ $vector_bits
/ $element_bits
}]
5833 # Compute gcd
(VF
, COUNT).
5836 while { $temp1
> 0 } {
5837 set temp2
[expr
{ $gcd
% $temp1
}]
5841 return [expr
{ ($vf
- 1) % $
count < $gcd
}]
5844 #
Return 1 if the target supports SLP permutation of
3 vectors when each
5845 # element has
32 bits.
5847 proc check_effective_target_vect_perm3_int
{ } {
5848 return [expr
{ [check_effective_target_vect_perm
]
5849 && [vect_perm_supported
3 32] }]
5852 #
Return 1 if the target plus current options supports vector permutation
5853 #
on byte
-sized elements
, 0 otherwise.
5855 # This won
't change for different subtargets so cache the result.
5857 proc check_effective_target_vect_perm_byte { } {
5858 global et_vect_perm_byte_saved
5861 if [info exists et_vect_perm_byte_saved($et_index)] {
5862 verbose "check_effective_target_vect_perm_byte: using cached result" 2
5864 set et_vect_perm_byte_saved($et_index) 0
5865 if { ([is-effective-target arm_neon]
5866 && [is-effective-target arm_little_endian])
5867 || ([istarget aarch64*-*-*]
5868 && [is-effective-target aarch64_little_endian])
5869 || [istarget powerpc*-*-*]
5870 || [istarget spu-*-*]
5871 || ([istarget mips-*.*]
5872 && [et-is-effective-target mips_msa])
5873 || ([istarget s390*-*-*]
5874 && [check_effective_target_s390_vx]) } {
5875 set et_vect_perm_byte_saved($et_index) 1
5878 verbose "check_effective_target_vect_perm_byte:\
5879 returning $et_vect_perm_byte_saved($et_index)" 2
5880 return $et_vect_perm_byte_saved($et_index)
5883 # Return 1 if the target supports SLP permutation of 3 vectors when each
5884 # element has 8 bits.
5886 proc check_effective_target_vect_perm3_byte { } {
5887 return [expr { [check_effective_target_vect_perm_byte]
5888 && [vect_perm_supported 3 8] }]
5891 # Return 1 if the target plus current options supports vector permutation
5892 # on short-sized elements, 0 otherwise.
5894 # This won't change
for different subtargets so
cache the result.
5896 proc check_effective_target_vect_perm_short
{ } {
5897 global et_vect_perm_short_saved
5900 if [info exists et_vect_perm_short_saved
($et_index
)] {
5901 verbose
"check_effective_target_vect_perm_short: using cached result" 2
5903 set et_vect_perm_short_saved
($et_index
) 0
5904 if { ([is
-effective
-target arm_neon
]
5905 && [is
-effective
-target arm_little_endian
])
5906 ||
([istarget aarch64
*-*-*]
5907 && [is
-effective
-target aarch64_little_endian
])
5908 ||
[istarget powerpc
*-*-*]
5909 ||
[istarget spu
-*-*]
5910 ||
(([istarget i?
86-*-*] ||
[istarget x86_64
-*-*])
5911 && [check_ssse3_available
])
5912 ||
([istarget mips
*-*-*]
5913 && [et
-is
-effective
-target mips_msa
])
5914 ||
([istarget s390
*-*-*]
5915 && [check_effective_target_s390_vx
]) } {
5916 set et_vect_perm_short_saved
($et_index
) 1
5919 verbose
"check_effective_target_vect_perm_short:\
5920 returning $et_vect_perm_short_saved
($et_index
)" 2
5921 return $et_vect_perm_short_saved
($et_index
)
5924 #
Return 1 if the target supports SLP permutation of
3 vectors when each
5925 # element has
16 bits.
5927 proc check_effective_target_vect_perm3_short
{ } {
5928 return [expr
{ [check_effective_target_vect_perm_short
]
5929 && [vect_perm_supported
3 16] }]
5932 #
Return 1 if the target plus current options supports folding of
5933 # copysign into XORSIGN.
5935 # This won
't change for different subtargets so cache the result.
5937 proc check_effective_target_xorsign { } {
5938 global et_xorsign_saved
5941 if [info exists et_xorsign_saved($et_index)] {
5942 verbose "check_effective_target_xorsign: using cached result" 2
5944 set et_xorsign_saved($et_index) 0
5945 if { [istarget aarch64*-*-*] || [istarget arm*-*-*] } {
5946 set et_xorsign_saved($et_index) 1
5949 verbose "check_effective_target_xorsign:\
5950 returning $et_xorsign_saved($et_index)" 2
5951 return $et_xorsign_saved($et_index)
5954 # Return 1 if the target plus current options supports a vector
5955 # widening summation of *short* args into *int* result, 0 otherwise.
5957 # This won't change
for different subtargets so
cache the result.
5959 proc check_effective_target_vect_widen_sum_hi_to_si_pattern
{ } {
5960 global et_vect_widen_sum_hi_to_si_pattern_saved
5963 if [info exists et_vect_widen_sum_hi_to_si_pattern_saved
($et_index
)] {
5964 verbose
"check_effective_target_vect_widen_sum_hi_to_si_pattern:\
5965 using cached result
" 2
5967 set et_vect_widen_sum_hi_to_si_pattern_saved
($et_index
) 0
5968 if { [istarget powerpc
*-*-*]
5969 ||
([istarget aarch64
*-*-*]
5970 && ![check_effective_target_aarch64_sve
])
5971 ||
[is
-effective
-target arm_neon
]
5972 ||
[istarget ia64
-*-*] } {
5973 set et_vect_widen_sum_hi_to_si_pattern_saved
($et_index
) 1
5976 verbose
"check_effective_target_vect_widen_sum_hi_to_si_pattern:\
5977 returning $et_vect_widen_sum_hi_to_si_pattern_saved
($et_index
)" 2
5978 return $et_vect_widen_sum_hi_to_si_pattern_saved
($et_index
)
5981 #
Return 1 if the target plus current options supports a vector
5982 # widening summation of
*short
* args into
*int* result
, 0 otherwise.
5983 # A target can also support this widening summation
if it can support
5984 # promotion
(unpacking
) from shorts to ints.
5986 # This won
't change for different subtargets so cache the result.
5988 proc check_effective_target_vect_widen_sum_hi_to_si { } {
5989 global et_vect_widen_sum_hi_to_si_saved
5992 if [info exists et_vect_widen_sum_hi_to_si_saved($et_index)] {
5993 verbose "check_effective_target_vect_widen_sum_hi_to_si:\
5994 using cached result" 2
5996 set et_vect_widen_sum_hi_to_si_saved($et_index) \
5997 [check_effective_target_vect_unpack]
5998 if { [istarget powerpc*-*-*]
5999 || [istarget ia64-*-*] } {
6000 set et_vect_widen_sum_hi_to_si_saved($et_index) 1
6003 verbose "check_effective_target_vect_widen_sum_hi_to_si:\
6004 returning $et_vect_widen_sum_hi_to_si_saved($et_index)" 2
6005 return $et_vect_widen_sum_hi_to_si_saved($et_index)
6008 # Return 1 if the target plus current options supports a vector
6009 # widening summation of *char* args into *short* result, 0 otherwise.
6010 # A target can also support this widening summation if it can support
6011 # promotion (unpacking) from chars to shorts.
6013 # This won't change
for different subtargets so
cache the result.
6015 proc check_effective_target_vect_widen_sum_qi_to_hi
{ } {
6016 global et_vect_widen_sum_qi_to_hi_saved
6019 if [info exists et_vect_widen_sum_qi_to_hi_saved
($et_index
)] {
6020 verbose
"check_effective_target_vect_widen_sum_qi_to_hi:\
6021 using cached result
" 2
6023 set et_vect_widen_sum_qi_to_hi_saved
($et_index
) 0
6024 if { [check_effective_target_vect_unpack
]
6025 ||
[is
-effective
-target arm_neon
]
6026 ||
[istarget ia64
-*-*] } {
6027 set et_vect_widen_sum_qi_to_hi_saved
($et_index
) 1
6030 verbose
"check_effective_target_vect_widen_sum_qi_to_hi:\
6031 returning $et_vect_widen_sum_qi_to_hi_saved
($et_index
)" 2
6032 return $et_vect_widen_sum_qi_to_hi_saved
($et_index
)
6035 #
Return 1 if the target plus current options supports a vector
6036 # widening summation of
*char
* args into
*int* result
, 0 otherwise.
6038 # This won
't change for different subtargets so cache the result.
6040 proc check_effective_target_vect_widen_sum_qi_to_si { } {
6041 global et_vect_widen_sum_qi_to_si_saved
6044 if [info exists et_vect_widen_sum_qi_to_si_saved($et_index)] {
6045 verbose "check_effective_target_vect_widen_sum_qi_to_si:\
6046 using cached result" 2
6048 set et_vect_widen_sum_qi_to_si_saved($et_index) 0
6049 if { [istarget powerpc*-*-*] } {
6050 set et_vect_widen_sum_qi_to_si_saved($et_index) 1
6053 verbose "check_effective_target_vect_widen_sum_qi_to_si:\
6054 returning $et_vect_widen_sum_qi_to_si_saved($et_index)" 2
6055 return $et_vect_widen_sum_qi_to_si_saved($et_index)
6058 # Return 1 if the target plus current options supports a vector
6059 # widening multiplication of *char* args into *short* result, 0 otherwise.
6060 # A target can also support this widening multplication if it can support
6061 # promotion (unpacking) from chars to shorts, and vect_short_mult (non-widening
6062 # multiplication of shorts).
6064 # This won't change
for different subtargets so
cache the result.
6067 proc check_effective_target_vect_widen_mult_qi_to_hi
{ } {
6068 global et_vect_widen_mult_qi_to_hi_saved
6071 if [info exists et_vect_widen_mult_qi_to_hi_saved
($et_index
)] {
6072 verbose
"check_effective_target_vect_widen_mult_qi_to_hi:\
6073 using cached result
" 2
6075 if { [check_effective_target_vect_unpack
]
6076 && [check_effective_target_vect_short_mult
] } {
6077 set et_vect_widen_mult_qi_to_hi_saved
($et_index
) 1
6079 set et_vect_widen_mult_qi_to_hi_saved
($et_index
) 0
6081 if { [istarget powerpc
*-*-*]
6082 ||
([istarget aarch64
*-*-*]
6083 && ![check_effective_target_aarch64_sve
])
6084 ||
[is
-effective
-target arm_neon
]
6085 ||
([istarget s390
*-*-*]
6086 && [check_effective_target_s390_vx
]) } {
6087 set et_vect_widen_mult_qi_to_hi_saved
($et_index
) 1
6090 verbose
"check_effective_target_vect_widen_mult_qi_to_hi:\
6091 returning $et_vect_widen_mult_qi_to_hi_saved
($et_index
)" 2
6092 return $et_vect_widen_mult_qi_to_hi_saved
($et_index
)
6095 #
Return 1 if the target plus current options supports a vector
6096 # widening multiplication of
*short
* args into
*int* result
, 0 otherwise.
6097 # A target can also support this widening multplication
if it can support
6098 # promotion
(unpacking
) from shorts to ints
, and vect_int_mult
(non
-widening
6099 # multiplication of ints
).
6101 # This won
't change for different subtargets so cache the result.
6104 proc check_effective_target_vect_widen_mult_hi_to_si { } {
6105 global et_vect_widen_mult_hi_to_si_saved
6108 if [info exists et_vect_widen_mult_hi_to_si_saved($et_index)] {
6109 verbose "check_effective_target_vect_widen_mult_hi_to_si:\
6110 using cached result" 2
6112 if { [check_effective_target_vect_unpack]
6113 && [check_effective_target_vect_int_mult] } {
6114 set et_vect_widen_mult_hi_to_si_saved($et_index) 1
6116 set et_vect_widen_mult_hi_to_si_saved($et_index) 0
6118 if { [istarget powerpc*-*-*]
6119 || [istarget spu-*-*]
6120 || [istarget ia64-*-*]
6121 || ([istarget aarch64*-*-*]
6122 && ![check_effective_target_aarch64_sve])
6123 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6124 || [is-effective-target arm_neon]
6125 || ([istarget s390*-*-*]
6126 && [check_effective_target_s390_vx]) } {
6127 set et_vect_widen_mult_hi_to_si_saved($et_index) 1
6130 verbose "check_effective_target_vect_widen_mult_hi_to_si:\
6131 returning $et_vect_widen_mult_hi_to_si_saved($et_index)" 2
6132 return $et_vect_widen_mult_hi_to_si_saved($et_index)
6135 # Return 1 if the target plus current options supports a vector
6136 # widening multiplication of *char* args into *short* result, 0 otherwise.
6138 # This won't change
for different subtargets so
cache the result.
6140 proc check_effective_target_vect_widen_mult_qi_to_hi_pattern
{ } {
6141 global et_vect_widen_mult_qi_to_hi_pattern_saved
6144 if [info exists et_vect_widen_mult_qi_to_hi_pattern_saved
($et_index
)] {
6145 verbose
"check_effective_target_vect_widen_mult_qi_to_hi_pattern:\
6146 using cached result
" 2
6148 set et_vect_widen_mult_qi_to_hi_pattern_saved
($et_index
) 0
6149 if { [istarget powerpc
*-*-*]
6150 ||
([is
-effective
-target arm_neon
]
6151 && [check_effective_target_arm_little_endian
])
6152 ||
([istarget s390
*-*-*]
6153 && [check_effective_target_s390_vx
]) } {
6154 set et_vect_widen_mult_qi_to_hi_pattern_saved
($et_index
) 1
6157 verbose
"check_effective_target_vect_widen_mult_qi_to_hi_pattern:\
6158 returning $et_vect_widen_mult_qi_to_hi_pattern_saved
($et_index
)" 2
6159 return $et_vect_widen_mult_qi_to_hi_pattern_saved
($et_index
)
6162 #
Return 1 if the target plus current options supports a vector
6163 # widening multiplication of
*short
* args into
*int* result
, 0 otherwise.
6165 # This won
't change for different subtargets so cache the result.
6167 proc check_effective_target_vect_widen_mult_hi_to_si_pattern { } {
6168 global et_vect_widen_mult_hi_to_si_pattern_saved
6171 if [info exists et_vect_widen_mult_hi_to_si_pattern_saved($et_index)] {
6172 verbose "check_effective_target_vect_widen_mult_hi_to_si_pattern:\
6173 using cached result" 2
6175 set et_vect_widen_mult_hi_to_si_pattern_saved($et_index) 0
6176 if { [istarget powerpc*-*-*]
6177 || [istarget spu-*-*]
6178 || [istarget ia64-*-*]
6179 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6180 || ([is-effective-target arm_neon]
6181 && [check_effective_target_arm_little_endian])
6182 || ([istarget s390*-*-*]
6183 && [check_effective_target_s390_vx]) } {
6184 set et_vect_widen_mult_hi_to_si_pattern_saved($et_index) 1
6187 verbose "check_effective_target_vect_widen_mult_hi_to_si_pattern:\
6188 returning $et_vect_widen_mult_hi_to_si_pattern_saved($et_index)" 2
6189 return $et_vect_widen_mult_hi_to_si_pattern_saved($et_index)
6192 # Return 1 if the target plus current options supports a vector
6193 # widening multiplication of *int* args into *long* result, 0 otherwise.
6195 # This won't change
for different subtargets so
cache the result.
6197 proc check_effective_target_vect_widen_mult_si_to_di_pattern
{ } {
6198 global et_vect_widen_mult_si_to_di_pattern_saved
6201 if [info exists et_vect_widen_mult_si_to_di_pattern_saved
($et_index
)] {
6202 verbose
"check_effective_target_vect_widen_mult_si_to_di_pattern:\
6203 using cached result
" 2
6205 set et_vect_widen_mult_si_to_di_pattern_saved
($et_index
) 0
6206 if {[istarget ia64
-*-*]
6207 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
6208 ||
([istarget s390
*-*-*]
6209 && [check_effective_target_s390_vx
]) } {
6210 set et_vect_widen_mult_si_to_di_pattern_saved
($et_index
) 1
6213 verbose
"check_effective_target_vect_widen_mult_si_to_di_pattern:\
6214 returning $et_vect_widen_mult_si_to_di_pattern_saved
($et_index
)" 2
6215 return $et_vect_widen_mult_si_to_di_pattern_saved
($et_index
)
6218 #
Return 1 if the target plus current options supports a vector
6219 # widening shift
, 0 otherwise.
6221 # This won
't change for different subtargets so cache the result.
6223 proc check_effective_target_vect_widen_shift { } {
6224 global et_vect_widen_shift_saved
6227 if [info exists et_vect_shift_saved($et_index)] {
6228 verbose "check_effective_target_vect_widen_shift: using cached result" 2
6230 set et_vect_widen_shift_saved($et_index) 0
6231 if { [is-effective-target arm_neon] } {
6232 set et_vect_widen_shift_saved($et_index) 1
6235 verbose "check_effective_target_vect_widen_shift:\
6236 returning $et_vect_widen_shift_saved($et_index)" 2
6237 return $et_vect_widen_shift_saved($et_index)
6240 # Return 1 if the target plus current options supports a vector
6241 # dot-product of signed chars, 0 otherwise.
6243 # This won't change
for different subtargets so
cache the result.
6245 proc check_effective_target_vect_sdot_qi
{ } {
6246 global et_vect_sdot_qi_saved
6249 if [info exists et_vect_sdot_qi_saved
($et_index
)] {
6250 verbose
"check_effective_target_vect_sdot_qi: using cached result" 2
6252 set et_vect_sdot_qi_saved
($et_index
) 0
6253 if { [istarget ia64
-*-*]
6254 ||
[istarget aarch64
*-*-*]
6255 ||
[istarget arm
*-*-*]
6256 ||
([istarget mips
*-*-*]
6257 && [et
-is
-effective
-target mips_msa
]) } {
6258 set et_vect_udot_qi_saved
1
6261 verbose
"check_effective_target_vect_sdot_qi:\
6262 returning $et_vect_sdot_qi_saved
($et_index
)" 2
6263 return $et_vect_sdot_qi_saved
($et_index
)
6266 #
Return 1 if the target plus current options supports a vector
6267 # dot
-product of unsigned chars
, 0 otherwise.
6269 # This won
't change for different subtargets so cache the result.
6271 proc check_effective_target_vect_udot_qi { } {
6272 global et_vect_udot_qi_saved
6275 if [info exists et_vect_udot_qi_saved($et_index)] {
6276 verbose "check_effective_target_vect_udot_qi: using cached result" 2
6278 set et_vect_udot_qi_saved($et_index) 0
6279 if { [istarget powerpc*-*-*]
6280 || [istarget aarch64*-*-*]
6281 || [istarget arm*-*-*]
6282 || [istarget ia64-*-*]
6283 || ([istarget mips*-*-*]
6284 && [et-is-effective-target mips_msa]) } {
6285 set et_vect_udot_qi_saved($et_index) 1
6288 verbose "check_effective_target_vect_udot_qi:\
6289 returning $et_vect_udot_qi_saved($et_index)" 2
6290 return $et_vect_udot_qi_saved($et_index)
6293 # Return 1 if the target plus current options supports a vector
6294 # dot-product of signed shorts, 0 otherwise.
6296 # This won't change
for different subtargets so
cache the result.
6298 proc check_effective_target_vect_sdot_hi
{ } {
6299 global et_vect_sdot_hi_saved
6302 if [info exists et_vect_sdot_hi_saved
($et_index
)] {
6303 verbose
"check_effective_target_vect_sdot_hi: using cached result" 2
6305 set et_vect_sdot_hi_saved
($et_index
) 0
6306 if { ([istarget powerpc
*-*-*] && ![istarget powerpc
-*-linux
*paired
*])
6307 ||
[istarget ia64
-*-*]
6308 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
6309 ||
([istarget mips
*-*-*]
6310 && [et
-is
-effective
-target mips_msa
]) } {
6311 set et_vect_sdot_hi_saved
($et_index
) 1
6314 verbose
"check_effective_target_vect_sdot_hi:\
6315 returning $et_vect_sdot_hi_saved
($et_index
)" 2
6316 return $et_vect_sdot_hi_saved
($et_index
)
6319 #
Return 1 if the target plus current options supports a vector
6320 # dot
-product of unsigned shorts
, 0 otherwise.
6322 # This won
't change for different subtargets so cache the result.
6324 proc check_effective_target_vect_udot_hi { } {
6325 global et_vect_udot_hi_saved
6328 if [info exists et_vect_udot_hi_saved($et_index)] {
6329 verbose "check_effective_target_vect_udot_hi: using cached result" 2
6331 set et_vect_udot_hi_saved($et_index) 0
6332 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
6333 || ([istarget mips*-*-*]
6334 && [et-is-effective-target mips_msa]) } {
6335 set et_vect_udot_hi_saved($et_index) 1
6338 verbose "check_effective_target_vect_udot_hi:\
6339 returning $et_vect_udot_hi_saved($et_index)" 2
6340 return $et_vect_udot_hi_saved($et_index)
6343 # Return 1 if the target plus current options supports a vector
6344 # sad operation of unsigned chars, 0 otherwise.
6346 # This won't change
for different subtargets so
cache the result.
6348 proc check_effective_target_vect_usad_char
{ } {
6349 global et_vect_usad_char_saved
6352 if [info exists et_vect_usad_char_saved
($et_index
)] {
6353 verbose
"check_effective_target_vect_usad_char: using cached result" 2
6355 set et_vect_usad_char_saved
($et_index
) 0
6356 if { [istarget i?
86-*-*] ||
[istarget x86_64
-*-*] } {
6357 set et_vect_usad_char_saved
($et_index
) 1
6360 verbose
"check_effective_target_vect_usad_char:\
6361 returning $et_vect_usad_char_saved
($et_index
)" 2
6362 return $et_vect_usad_char_saved
($et_index
)
6365 #
Return 1 if the target plus current options supports both signed
6366 # and unsigned
average operations
on vectors of bytes.
6368 proc check_effective_target_vect_avg_qi
{} {
6369 return [expr
{ [istarget aarch64
*-*-*]
6370 && ![check_effective_target_aarch64_sve
] }]
6373 #
Return 1 if the target plus current options supports a vector
6374 # demotion
(packing
) of shorts
(to chars
) and ints
(to shorts
)
6375 # using modulo arithmetic
, 0 otherwise.
6377 # This won
't change for different subtargets so cache the result.
6379 proc check_effective_target_vect_pack_trunc { } {
6380 global et_vect_pack_trunc_saved
6383 if [info exists et_vect_pack_trunc_saved($et_index)] {
6384 verbose "check_effective_target_vect_pack_trunc: using cached result" 2
6386 set et_vect_pack_trunc_saved($et_index) 0
6387 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
6388 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6389 || [istarget aarch64*-*-*]
6390 || [istarget spu-*-*]
6391 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]
6392 && [check_effective_target_arm_little_endian])
6393 || ([istarget mips*-*-*]
6394 && [et-is-effective-target mips_msa])
6395 || ([istarget s390*-*-*]
6396 && [check_effective_target_s390_vx]) } {
6397 set et_vect_pack_trunc_saved($et_index) 1
6400 verbose "check_effective_target_vect_pack_trunc:\
6401 returning $et_vect_pack_trunc_saved($et_index)" 2
6402 return $et_vect_pack_trunc_saved($et_index)
6405 # Return 1 if the target plus current options supports a vector
6406 # promotion (unpacking) of chars (to shorts) and shorts (to ints), 0 otherwise.
6408 # This won't change
for different subtargets so
cache the result.
6410 proc check_effective_target_vect_unpack
{ } {
6411 global et_vect_unpack_saved
6414 if [info exists et_vect_unpack_saved
($et_index
)] {
6415 verbose
"check_effective_target_vect_unpack: using cached result" 2
6417 set et_vect_unpack_saved
($et_index
) 0
6418 if { ([istarget powerpc
*-*-*] && ![istarget powerpc
-*paired
*])
6419 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
6420 ||
[istarget spu
-*-*]
6421 ||
[istarget ia64
-*-*]
6422 ||
[istarget aarch64
*-*-*]
6423 ||
([istarget mips
*-*-*]
6424 && [et
-is
-effective
-target mips_msa
])
6425 ||
([istarget arm
*-*-*] && [check_effective_target_arm_neon_ok
]
6426 && [check_effective_target_arm_little_endian
])
6427 ||
([istarget s390
*-*-*]
6428 && [check_effective_target_s390_vx
]) } {
6429 set et_vect_unpack_saved
($et_index
) 1
6432 verbose
"check_effective_target_vect_unpack:\
6433 returning $et_vect_unpack_saved
($et_index
)" 2
6434 return $et_vect_unpack_saved
($et_index
)
6437 #
Return 1 if the target plus current options does not guarantee
6438 # that its STACK_BOUNDARY is
>= the reguired vector alignment.
6440 # This won
't change for different subtargets so cache the result.
6442 proc check_effective_target_unaligned_stack { } {
6443 global et_unaligned_stack_saved
6445 if [info exists et_unaligned_stack_saved] {
6446 verbose "check_effective_target_unaligned_stack: using cached result" 2
6448 set et_unaligned_stack_saved 0
6450 verbose "check_effective_target_unaligned_stack: returning $et_unaligned_stack_saved" 2
6451 return $et_unaligned_stack_saved
6454 # Return 1 if the target plus current options does not support a vector
6455 # alignment mechanism, 0 otherwise.
6457 # This won't change
for different subtargets so
cache the result.
6459 proc check_effective_target_vect_no_align
{ } {
6460 global et_vect_no_align_saved
6463 if [info exists et_vect_no_align_saved
($et_index
)] {
6464 verbose
"check_effective_target_vect_no_align: using cached result" 2
6466 set et_vect_no_align_saved
($et_index
) 0
6467 if { [istarget mipsisa64
*-*-*]
6468 ||
[istarget mips
-sde
-elf
]
6469 ||
[istarget sparc
*-*-*]
6470 ||
[istarget ia64
-*-*]
6471 ||
[check_effective_target_arm_vect_no_misalign
]
6472 ||
([istarget powerpc
*-*-*] && [check_p8vector_hw_available
])
6473 ||
([istarget mips
*-*-*]
6474 && [et
-is
-effective
-target mips_loongson
]) } {
6475 set et_vect_no_align_saved
($et_index
) 1
6478 verbose
"check_effective_target_vect_no_align:\
6479 returning $et_vect_no_align_saved
($et_index
)" 2
6480 return $et_vect_no_align_saved
($et_index
)
6483 #
Return 1 if the target supports a vector misalign access
, 0 otherwise.
6485 # This won
't change for different subtargets so cache the result.
6487 proc check_effective_target_vect_hw_misalign { } {
6488 global et_vect_hw_misalign_saved
6491 if [info exists et_vect_hw_misalign_saved($et_index)] {
6492 verbose "check_effective_target_vect_hw_misalign: using cached result" 2
6494 set et_vect_hw_misalign_saved($et_index) 0
6495 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
6496 || ([istarget powerpc*-*-*] && [check_p8vector_hw_available])
6497 || [istarget aarch64*-*-*]
6498 || ([istarget mips*-*-*] && [et-is-effective-target mips_msa])
6499 || ([istarget s390*-*-*]
6500 && [check_effective_target_s390_vx]) } {
6501 set et_vect_hw_misalign_saved($et_index) 1
6503 if { [istarget arm*-*-*] } {
6504 set et_vect_hw_misalign_saved($et_index) [expr ![check_effective_target_arm_vect_no_misalign]]
6507 verbose "check_effective_target_vect_hw_misalign:\
6508 returning $et_vect_hw_misalign_saved($et_index)" 2
6509 return $et_vect_hw_misalign_saved($et_index)
6513 # Return 1 if arrays are aligned to the vector alignment
6514 # boundary, 0 otherwise.
6516 proc check_effective_target_vect_aligned_arrays { } {
6517 set et_vect_aligned_arrays 0
6518 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
6519 && !([is-effective-target ia32]
6520 || ([check_avx_available] && ![check_prefer_avx128])))
6521 || [istarget spu-*-*] } {
6522 set et_vect_aligned_arrays 1
6525 verbose "check_effective_target_vect_aligned_arrays:\
6526 returning $et_vect_aligned_arrays" 2
6527 return $et_vect_aligned_arrays
6530 # Return 1 if types of size 32 bit or less are naturally aligned
6531 # (aligned to their type-size), 0 otherwise.
6533 # This won't change
for different subtargets so
cache the result.
6535 proc check_effective_target_natural_alignment_32
{ } {
6536 global et_natural_alignment_32
6538 if [info exists et_natural_alignment_32_saved
] {
6539 verbose
"check_effective_target_natural_alignment_32: using cached result" 2
6541 # FIXME
: 32bit powerpc
: guaranteed only
if MASK_ALIGN_NATURAL
/POWER.
6542 set et_natural_alignment_32_saved
1
6543 if { ([istarget
*-*-darwin
*] && [is
-effective
-target lp64
])
6544 ||
[istarget avr
-*-*] } {
6545 set et_natural_alignment_32_saved
0
6548 verbose
"check_effective_target_natural_alignment_32: returning $et_natural_alignment_32_saved" 2
6549 return $et_natural_alignment_32_saved
6552 #
Return 1 if types of size
64 bit or less are naturally aligned
(aligned to their
6553 # type
-size
), 0 otherwise.
6555 # This won
't change for different subtargets so cache the result.
6557 proc check_effective_target_natural_alignment_64 { } {
6558 global et_natural_alignment_64
6560 if [info exists et_natural_alignment_64_saved] {
6561 verbose "check_effective_target_natural_alignment_64: using cached result" 2
6563 set et_natural_alignment_64_saved 0
6564 if { ([is-effective-target lp64] && ![istarget *-*-darwin*])
6565 || [istarget spu-*-*] } {
6566 set et_natural_alignment_64_saved 1
6569 verbose "check_effective_target_natural_alignment_64: returning $et_natural_alignment_64_saved" 2
6570 return $et_natural_alignment_64_saved
6573 # Return 1 if all vector types are naturally aligned (aligned to their
6574 # type-size), 0 otherwise.
6576 proc check_effective_target_vect_natural_alignment { } {
6577 set et_vect_natural_alignment 1
6578 if { [check_effective_target_arm_eabi]
6579 || [istarget nvptx-*-*]
6580 || [istarget s390*-*-*] } {
6581 set et_vect_natural_alignment 0
6583 verbose "check_effective_target_vect_natural_alignment:\
6584 returning $et_vect_natural_alignment" 2
6585 return $et_vect_natural_alignment
6588 # Return true if fully-masked loops are supported.
6590 proc check_effective_target_vect_fully_masked { } {
6591 return [check_effective_target_aarch64_sve]
6594 # Return 1 if the target doesn't prefer
any alignment beyond element
6595 # alignment during vectorization.
6597 proc check_effective_target_vect_element_align_preferred
{ } {
6598 return [expr
{ [check_effective_target_aarch64_sve
]
6599 && [check_effective_target_vect_variable_length
] }]
6602 #
Return 1 if we can align stack data to the preferred vector alignment.
6604 proc check_effective_target_vect_align_stack_vars
{ } {
6605 if { [check_effective_target_aarch64_sve
] } {
6606 return [check_effective_target_vect_variable_length
]
6611 #
Return 1 if vector alignment
(for types of size
32 bit or less
) is reachable
, 0 otherwise.
6613 proc check_effective_target_vector_alignment_reachable
{ } {
6614 set et_vector_alignment_reachable
0
6615 if { [check_effective_target_vect_aligned_arrays
]
6616 ||
[check_effective_target_natural_alignment_32
] } {
6617 set et_vector_alignment_reachable
1
6619 verbose
"check_effective_target_vector_alignment_reachable:\
6620 returning $et_vector_alignment_reachable
" 2
6621 return $et_vector_alignment_reachable
6624 #
Return 1 if vector alignment
for 64 bit is reachable
, 0 otherwise.
6626 proc check_effective_target_vector_alignment_reachable_for_64bit
{ } {
6627 set et_vector_alignment_reachable_for_64bit
0
6628 if { [check_effective_target_vect_aligned_arrays
]
6629 ||
[check_effective_target_natural_alignment_64
] } {
6630 set et_vector_alignment_reachable_for_64bit
1
6632 verbose
"check_effective_target_vector_alignment_reachable_for_64bit:\
6633 returning $et_vector_alignment_reachable_for_64bit
" 2
6634 return $et_vector_alignment_reachable_for_64bit
6637 #
Return 1 if the target only requires element alignment
for vector accesses
6639 proc check_effective_target_vect_element_align
{ } {
6640 global et_vect_element_align
6643 if [info exists et_vect_element_align
($et_index
)] {
6644 verbose
"check_effective_target_vect_element_align:\
6645 using cached result
" 2
6647 set et_vect_element_align
($et_index
) 0
6648 if { ([istarget arm
*-*-*]
6649 && ![check_effective_target_arm_vect_no_misalign
])
6650 ||
[check_effective_target_vect_hw_misalign
] } {
6651 set et_vect_element_align
($et_index
) 1
6655 verbose
"check_effective_target_vect_element_align:\
6656 returning $et_vect_element_align
($et_index
)" 2
6657 return $et_vect_element_align
($et_index
)
6660 #
Return 1 if we expect to see unaligned accesses in at least some
6663 proc check_effective_target_vect_unaligned_possible
{ } {
6664 return [expr
{ ![check_effective_target_vect_element_align_preferred
]
6665 && (![check_effective_target_vect_no_align
]
6666 ||
[check_effective_target_vect_hw_misalign
]) }]
6669 #
Return 1 if the target supports vector LOAD_LANES operations
, 0 otherwise.
6671 proc check_effective_target_vect_load_lanes
{ } {
6672 global et_vect_load_lanes
6674 if [info exists et_vect_load_lanes
] {
6675 verbose
"check_effective_target_vect_load_lanes: using cached result" 2
6677 set et_vect_load_lanes
0
6678 # We don
't support load_lanes correctly on big-endian arm.
6679 if { ([check_effective_target_arm_little_endian] && [check_effective_target_arm_neon_ok])
6680 || [istarget aarch64*-*-*] } {
6681 set et_vect_load_lanes 1
6685 verbose "check_effective_target_vect_load_lanes: returning $et_vect_load_lanes" 2
6686 return $et_vect_load_lanes
6689 # Return 1 if the target supports vector masked stores.
6691 proc check_effective_target_vect_masked_store { } {
6692 return [check_effective_target_aarch64_sve]
6695 # Return 1 if the target supports vector scatter stores.
6697 proc check_effective_target_vect_scatter_store { } {
6698 return [check_effective_target_aarch64_sve]
6701 # Return 1 if the target supports vector conditional operations, 0 otherwise.
6703 proc check_effective_target_vect_condition { } {
6704 global et_vect_cond_saved
6707 if [info exists et_vect_cond_saved($et_index)] {
6708 verbose "check_effective_target_vect_cond: using cached result" 2
6710 set et_vect_cond_saved($et_index) 0
6711 if { [istarget aarch64*-*-*]
6712 || [istarget powerpc*-*-*]
6713 || [istarget ia64-*-*]
6714 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6715 || [istarget spu-*-*]
6716 || ([istarget mips*-*-*]
6717 && [et-is-effective-target mips_msa])
6718 || ([istarget arm*-*-*]
6719 && [check_effective_target_arm_neon_ok])
6720 || ([istarget s390*-*-*]
6721 && [check_effective_target_s390_vx]) } {
6722 set et_vect_cond_saved($et_index) 1
6726 verbose "check_effective_target_vect_cond:\
6727 returning $et_vect_cond_saved($et_index)" 2
6728 return $et_vect_cond_saved($et_index)
6731 # Return 1 if the target supports vector conditional operations where
6732 # the comparison has different type from the lhs, 0 otherwise.
6734 proc check_effective_target_vect_cond_mixed { } {
6735 global et_vect_cond_mixed_saved
6738 if [info exists et_vect_cond_mixed_saved($et_index)] {
6739 verbose "check_effective_target_vect_cond_mixed: using cached result" 2
6741 set et_vect_cond_mixed_saved($et_index) 0
6742 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
6743 || [istarget aarch64*-*-*]
6744 || [istarget powerpc*-*-*]
6745 || ([istarget mips*-*-*]
6746 && [et-is-effective-target mips_msa])
6747 || ([istarget s390*-*-*]
6748 && [check_effective_target_s390_vx]) } {
6749 set et_vect_cond_mixed_saved($et_index) 1
6753 verbose "check_effective_target_vect_cond_mixed:\
6754 returning $et_vect_cond_mixed_saved($et_index)" 2
6755 return $et_vect_cond_mixed_saved($et_index)
6758 # Return 1 if the target supports vector char multiplication, 0 otherwise.
6760 proc check_effective_target_vect_char_mult { } {
6761 global et_vect_char_mult_saved
6764 if [info exists et_vect_char_mult_saved($et_index)] {
6765 verbose "check_effective_target_vect_char_mult: using cached result" 2
6767 set et_vect_char_mult_saved($et_index) 0
6768 if { [istarget aarch64*-*-*]
6769 || [istarget ia64-*-*]
6770 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6771 || [check_effective_target_arm32]
6772 || [check_effective_target_powerpc_altivec]
6773 || ([istarget mips*-*-*]
6774 && [et-is-effective-target mips_msa])
6775 || ([istarget s390*-*-*]
6776 && [check_effective_target_s390_vx]) } {
6777 set et_vect_char_mult_saved($et_index) 1
6781 verbose "check_effective_target_vect_char_mult:\
6782 returning $et_vect_char_mult_saved($et_index)" 2
6783 return $et_vect_char_mult_saved($et_index)
6786 # Return 1 if the target supports vector short multiplication, 0 otherwise.
6788 proc check_effective_target_vect_short_mult { } {
6789 global et_vect_short_mult_saved
6792 if [info exists et_vect_short_mult_saved($et_index)] {
6793 verbose "check_effective_target_vect_short_mult: using cached result" 2
6795 set et_vect_short_mult_saved($et_index) 0
6796 if { [istarget ia64-*-*]
6797 || [istarget spu-*-*]
6798 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6799 || [istarget powerpc*-*-*]
6800 || [istarget aarch64*-*-*]
6801 || [check_effective_target_arm32]
6802 || ([istarget mips*-*-*]
6803 && ([et-is-effective-target mips_msa]
6804 || [et-is-effective-target mips_loongson]))
6805 || ([istarget s390*-*-*]
6806 && [check_effective_target_s390_vx]) } {
6807 set et_vect_short_mult_saved($et_index) 1
6811 verbose "check_effective_target_vect_short_mult:\
6812 returning $et_vect_short_mult_saved($et_index)" 2
6813 return $et_vect_short_mult_saved($et_index)
6816 # Return 1 if the target supports vector int multiplication, 0 otherwise.
6818 proc check_effective_target_vect_int_mult { } {
6819 global et_vect_int_mult_saved
6822 if [info exists et_vect_int_mult_saved($et_index)] {
6823 verbose "check_effective_target_vect_int_mult: using cached result" 2
6825 set et_vect_int_mult_saved($et_index) 0
6826 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
6827 || [istarget spu-*-*]
6828 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6829 || [istarget ia64-*-*]
6830 || [istarget aarch64*-*-*]
6831 || ([istarget mips*-*-*]
6832 && [et-is-effective-target mips_msa])
6833 || [check_effective_target_arm32]
6834 || ([istarget s390*-*-*]
6835 && [check_effective_target_s390_vx]) } {
6836 set et_vect_int_mult_saved($et_index) 1
6840 verbose "check_effective_target_vect_int_mult:\
6841 returning $et_vect_int_mult_saved($et_index)" 2
6842 return $et_vect_int_mult_saved($et_index)
6845 # Return 1 if the target supports 64 bit hardware vector
6846 # multiplication of long operands with a long result, 0 otherwise.
6848 # This can change for different subtargets so do not cache the result.
6850 proc check_effective_target_vect_long_mult { } {
6851 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
6852 || (([istarget powerpc*-*-*]
6853 && ![istarget powerpc-*-linux*paired*])
6854 && [check_effective_target_ilp32])
6855 || [is-effective-target arm_neon]
6856 || ([istarget sparc*-*-*] && [check_effective_target_ilp32])
6857 || [istarget aarch64*-*-*]
6858 || ([istarget mips*-*-*]
6859 && [et-is-effective-target mips_msa]) } {
6865 verbose "check_effective_target_vect_long_mult: returning $answer" 2
6869 # Return 1 if the target supports vector even/odd elements extraction, 0 otherwise.
6871 proc check_effective_target_vect_extract_even_odd { } {
6872 global et_vect_extract_even_odd_saved
6875 if [info exists et_vect_extract_even_odd_saved($et_index)] {
6876 verbose "check_effective_target_vect_extract_even_odd:\
6877 using cached result" 2
6879 set et_vect_extract_even_odd_saved($et_index) 0
6880 if { [istarget aarch64*-*-*]
6881 || [istarget powerpc*-*-*]
6882 || [is-effective-target arm_neon]
6883 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6884 || [istarget ia64-*-*]
6885 || [istarget spu-*-*]
6886 || ([istarget mips*-*-*]
6887 && ([et-is-effective-target mips_msa]
6888 || [et-is-effective-target mpaired_single]))
6889 || ([istarget s390*-*-*]
6890 && [check_effective_target_s390_vx]) } {
6891 set et_vect_extract_even_odd_saved($et_index) 1
6895 verbose "check_effective_target_vect_extract_even_odd:\
6896 returning $et_vect_extract_even_odd_saved($et_index)" 2
6897 return $et_vect_extract_even_odd_saved($et_index)
6900 # Return 1 if the target supports vector interleaving, 0 otherwise.
6902 proc check_effective_target_vect_interleave { } {
6903 global et_vect_interleave_saved
6906 if [info exists et_vect_interleave_saved($et_index)] {
6907 verbose "check_effective_target_vect_interleave: using cached result" 2
6909 set et_vect_interleave_saved($et_index) 0
6910 if { [istarget aarch64*-*-*]
6911 || [istarget powerpc*-*-*]
6912 || [is-effective-target arm_neon]
6913 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6914 || [istarget ia64-*-*]
6915 || [istarget spu-*-*]
6916 || ([istarget mips*-*-*]
6917 && ([et-is-effective-target mpaired_single]
6918 || [et-is-effective-target mips_msa]))
6919 || ([istarget s390*-*-*]
6920 && [check_effective_target_s390_vx]) } {
6921 set et_vect_interleave_saved($et_index) 1
6925 verbose "check_effective_target_vect_interleave:\
6926 returning $et_vect_interleave_saved($et_index)" 2
6927 return $et_vect_interleave_saved($et_index)
6930 foreach N {2 3 4 8} {
6931 eval [string map [list N $N] {
6932 # Return 1 if the target supports 2-vector interleaving
6933 proc check_effective_target_vect_stridedN { } {
6934 global et_vect_stridedN_saved
6937 if [info exists et_vect_stridedN_saved($et_index)] {
6938 verbose "check_effective_target_vect_stridedN:\
6939 using cached result" 2
6941 set et_vect_stridedN_saved($et_index) 0
6943 && [check_effective_target_vect_interleave]
6944 && [check_effective_target_vect_extract_even_odd] } {
6945 set et_vect_stridedN_saved($et_index) 1
6947 if { ([istarget arm*-*-*]
6948 || [istarget aarch64*-*-*]) && N >= 2 && N <= 4 } {
6949 set et_vect_stridedN_saved($et_index) 1
6953 verbose "check_effective_target_vect_stridedN:\
6954 returning $et_vect_stridedN_saved($et_index)" 2
6955 return $et_vect_stridedN_saved($et_index)
6960 # Return the list of vector sizes (in bits) that each target supports.
6961 # A vector length of "0" indicates variable-length vectors.
6963 proc available_vector_sizes { } {
6965 if { [istarget aarch64*-*-*] } {
6966 if { [check_effective_target_aarch64_sve] } {
6967 lappend result [aarch64_sve_bits]
6969 lappend result 128 64
6970 } elseif { [istarget arm*-*-*]
6971 && [check_effective_target_arm_neon_ok] } {
6972 lappend result 128 64
6973 } elseif { (([istarget i?86-*-*] || [istarget x86_64-*-*])
6974 && ([check_avx_available] && ![check_prefer_avx128])) } {
6975 lappend result 256 128
6976 } elseif { [istarget sparc*-*-*] } {
6979 # The traditional default asumption.
6985 # Return 1 if the target supports multiple vector sizes
6987 proc check_effective_target_vect_multiple_sizes { } {
6988 return [expr { [llength [available_vector_sizes]] > 1 }]
6991 # Return true if variable-length vectors are supported.
6993 proc check_effective_target_vect_variable_length { } {
6994 return [expr { [lindex [available_vector_sizes] 0] == 0 }]
6997 # Return 1 if the target supports vectors of 64 bits.
6999 proc check_effective_target_vect64 { } {
7000 return [expr { [lsearch -exact [available_vector_sizes] 64] >= 0 }]
7003 # Return 1 if the target supports vector copysignf calls.
7005 proc check_effective_target_vect_call_copysignf { } {
7006 global et_vect_call_copysignf_saved
7009 if [info exists et_vect_call_copysignf_saved($et_index)] {
7010 verbose "check_effective_target_vect_call_copysignf:\
7011 using cached result" 2
7013 set et_vect_call_copysignf_saved($et_index) 0
7014 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
7015 || [istarget powerpc*-*-*]
7016 || [istarget aarch64*-*-*] } {
7017 set et_vect_call_copysignf_saved($et_index) 1
7021 verbose "check_effective_target_vect_call_copysignf:\
7022 returning $et_vect_call_copysignf_saved($et_index)" 2
7023 return $et_vect_call_copysignf_saved($et_index)
7026 # Return 1 if the target supports hardware square root instructions.
7028 proc check_effective_target_sqrt_insn { } {
7029 global et_sqrt_insn_saved
7031 if [info exists et_sqrt_insn_saved] {
7032 verbose "check_effective_target_hw_sqrt: using cached result" 2
7034 set et_sqrt_insn_saved 0
7035 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
7036 || [istarget powerpc*-*-*]
7037 || [istarget aarch64*-*-*]
7038 || ([istarget arm*-*-*] && [check_effective_target_arm_vfp_ok])
7039 || ([istarget s390*-*-*]
7040 && [check_effective_target_s390_vx]) } {
7041 set et_sqrt_insn_saved 1
7045 verbose "check_effective_target_hw_sqrt: returning et_sqrt_insn_saved" 2
7046 return $et_sqrt_insn_saved
7049 # Return 1 if the target supports vector sqrtf calls.
7051 proc check_effective_target_vect_call_sqrtf { } {
7052 global et_vect_call_sqrtf_saved
7055 if [info exists et_vect_call_sqrtf_saved($et_index)] {
7056 verbose "check_effective_target_vect_call_sqrtf: using cached result" 2
7058 set et_vect_call_sqrtf_saved($et_index) 0
7059 if { [istarget aarch64*-*-*]
7060 || [istarget i?86-*-*] || [istarget x86_64-*-*]
7061 || ([istarget powerpc*-*-*] && [check_vsx_hw_available])
7062 || ([istarget s390*-*-*]
7063 && [check_effective_target_s390_vx]) } {
7064 set et_vect_call_sqrtf_saved($et_index) 1
7068 verbose "check_effective_target_vect_call_sqrtf:\
7069 returning $et_vect_call_sqrtf_saved($et_index)" 2
7070 return $et_vect_call_sqrtf_saved($et_index)
7073 # Return 1 if the target supports vector lrint calls.
7075 proc check_effective_target_vect_call_lrint { } {
7076 set et_vect_call_lrint 0
7077 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
7078 && [check_effective_target_ilp32]) } {
7079 set et_vect_call_lrint 1
7082 verbose "check_effective_target_vect_call_lrint: returning $et_vect_call_lrint" 2
7083 return $et_vect_call_lrint
7086 # Return 1 if the target supports vector btrunc calls.
7088 proc check_effective_target_vect_call_btrunc { } {
7089 global et_vect_call_btrunc_saved
7092 if [info exists et_vect_call_btrunc_saved($et_index)] {
7093 verbose "check_effective_target_vect_call_btrunc:\
7094 using cached result" 2
7096 set et_vect_call_btrunc_saved($et_index) 0
7097 if { [istarget aarch64*-*-*] } {
7098 set et_vect_call_btrunc_saved($et_index) 1
7102 verbose "check_effective_target_vect_call_btrunc:\
7103 returning $et_vect_call_btrunc_saved($et_index)" 2
7104 return $et_vect_call_btrunc_saved($et_index)
7107 # Return 1 if the target supports vector btruncf calls.
7109 proc check_effective_target_vect_call_btruncf { } {
7110 global et_vect_call_btruncf_saved
7113 if [info exists et_vect_call_btruncf_saved($et_index)] {
7114 verbose "check_effective_target_vect_call_btruncf:\
7115 using cached result" 2
7117 set et_vect_call_btruncf_saved($et_index) 0
7118 if { [istarget aarch64*-*-*] } {
7119 set et_vect_call_btruncf_saved($et_index) 1
7123 verbose "check_effective_target_vect_call_btruncf:\
7124 returning $et_vect_call_btruncf_saved($et_index)" 2
7125 return $et_vect_call_btruncf_saved($et_index)
7128 # Return 1 if the target supports vector ceil calls.
7130 proc check_effective_target_vect_call_ceil { } {
7131 global et_vect_call_ceil_saved
7134 if [info exists et_vect_call_ceil_saved($et_index)] {
7135 verbose "check_effective_target_vect_call_ceil: using cached result" 2
7137 set et_vect_call_ceil_saved($et_index) 0
7138 if { [istarget aarch64*-*-*] } {
7139 set et_vect_call_ceil_saved($et_index) 1
7143 verbose "check_effective_target_vect_call_ceil:\
7144 returning $et_vect_call_ceil_saved($et_index)" 2
7145 return $et_vect_call_ceil_saved($et_index)
7148 # Return 1 if the target supports vector ceilf calls.
7150 proc check_effective_target_vect_call_ceilf { } {
7151 global et_vect_call_ceilf_saved
7154 if [info exists et_vect_call_ceilf_saved($et_index)] {
7155 verbose "check_effective_target_vect_call_ceilf: using cached result" 2
7157 set et_vect_call_ceilf_saved($et_index) 0
7158 if { [istarget aarch64*-*-*] } {
7159 set et_vect_call_ceilf_saved($et_index) 1
7163 verbose "check_effective_target_vect_call_ceilf:\
7164 returning $et_vect_call_ceilf_saved($et_index)" 2
7165 return $et_vect_call_ceilf_saved($et_index)
7168 # Return 1 if the target supports vector floor calls.
7170 proc check_effective_target_vect_call_floor { } {
7171 global et_vect_call_floor_saved
7174 if [info exists et_vect_call_floor_saved($et_index)] {
7175 verbose "check_effective_target_vect_call_floor: using cached result" 2
7177 set et_vect_call_floor_saved($et_index) 0
7178 if { [istarget aarch64*-*-*] } {
7179 set et_vect_call_floor_saved($et_index) 1
7183 verbose "check_effective_target_vect_call_floor:\
7184 returning $et_vect_call_floor_saved($et_index)" 2
7185 return $et_vect_call_floor_saved($et_index)
7188 # Return 1 if the target supports vector floorf calls.
7190 proc check_effective_target_vect_call_floorf { } {
7191 global et_vect_call_floorf_saved
7194 if [info exists et_vect_call_floorf_saved($et_index)] {
7195 verbose "check_effective_target_vect_call_floorf: using cached result" 2
7197 set et_vect_call_floorf_saved($et_index) 0
7198 if { [istarget aarch64*-*-*] } {
7199 set et_vect_call_floorf_saved($et_index) 1
7203 verbose "check_effective_target_vect_call_floorf:\
7204 returning $et_vect_call_floorf_saved($et_index)" 2
7205 return $et_vect_call_floorf_saved($et_index)
7208 # Return 1 if the target supports vector lceil calls.
7210 proc check_effective_target_vect_call_lceil { } {
7211 global et_vect_call_lceil_saved
7214 if [info exists et_vect_call_lceil_saved($et_index)] {
7215 verbose "check_effective_target_vect_call_lceil: using cached result" 2
7217 set et_vect_call_lceil_saved($et_index) 0
7218 if { [istarget aarch64*-*-*] } {
7219 set et_vect_call_lceil_saved($et_index) 1
7223 verbose "check_effective_target_vect_call_lceil:\
7224 returning $et_vect_call_lceil_saved($et_index)" 2
7225 return $et_vect_call_lceil_saved($et_index)
7228 # Return 1 if the target supports vector lfloor calls.
7230 proc check_effective_target_vect_call_lfloor { } {
7231 global et_vect_call_lfloor_saved
7234 if [info exists et_vect_call_lfloor_saved($et_index)] {
7235 verbose "check_effective_target_vect_call_lfloor: using cached result" 2
7237 set et_vect_call_lfloor_saved($et_index) 0
7238 if { [istarget aarch64*-*-*] } {
7239 set et_vect_call_lfloor_saved($et_index) 1
7243 verbose "check_effective_target_vect_call_lfloor:\
7244 returning $et_vect_call_lfloor_saved($et_index)" 2
7245 return $et_vect_call_lfloor_saved($et_index)
7248 # Return 1 if the target supports vector nearbyint calls.
7250 proc check_effective_target_vect_call_nearbyint { } {
7251 global et_vect_call_nearbyint_saved
7254 if [info exists et_vect_call_nearbyint_saved($et_index)] {
7255 verbose "check_effective_target_vect_call_nearbyint: using cached result" 2
7257 set et_vect_call_nearbyint_saved($et_index) 0
7258 if { [istarget aarch64*-*-*] } {
7259 set et_vect_call_nearbyint_saved($et_index) 1
7263 verbose "check_effective_target_vect_call_nearbyint:\
7264 returning $et_vect_call_nearbyint_saved($et_index)" 2
7265 return $et_vect_call_nearbyint_saved($et_index)
7268 # Return 1 if the target supports vector nearbyintf calls.
7270 proc check_effective_target_vect_call_nearbyintf { } {
7271 global et_vect_call_nearbyintf_saved
7274 if [info exists et_vect_call_nearbyintf_saved($et_index)] {
7275 verbose "check_effective_target_vect_call_nearbyintf:\
7276 using cached result" 2
7278 set et_vect_call_nearbyintf_saved($et_index) 0
7279 if { [istarget aarch64*-*-*] } {
7280 set et_vect_call_nearbyintf_saved($et_index) 1
7284 verbose "check_effective_target_vect_call_nearbyintf:\
7285 returning $et_vect_call_nearbyintf_saved($et_index)" 2
7286 return $et_vect_call_nearbyintf_saved($et_index)
7289 # Return 1 if the target supports vector round calls.
7291 proc check_effective_target_vect_call_round { } {
7292 global et_vect_call_round_saved
7295 if [info exists et_vect_call_round_saved($et_index)] {
7296 verbose "check_effective_target_vect_call_round: using cached result" 2
7298 set et_vect_call_round_saved($et_index) 0
7299 if { [istarget aarch64*-*-*] } {
7300 set et_vect_call_round_saved($et_index) 1
7304 verbose "check_effective_target_vect_call_round:\
7305 returning $et_vect_call_round_saved($et_index)" 2
7306 return $et_vect_call_round_saved($et_index)
7309 # Return 1 if the target supports vector roundf calls.
7311 proc check_effective_target_vect_call_roundf { } {
7312 global et_vect_call_roundf_saved
7315 if [info exists et_vect_call_roundf_saved($et_index)] {
7316 verbose "check_effective_target_vect_call_roundf: using cached result" 2
7318 set et_vect_call_roundf_saved($et_index) 0
7319 if { [istarget aarch64*-*-*] } {
7320 set et_vect_call_roundf_saved($et_index) 1
7324 verbose "check_effective_target_vect_call_roundf:\
7325 returning $et_vect_call_roundf_saved($et_index)" 2
7326 return $et_vect_call_roundf_saved($et_index)
7329 # Return 1 if the target supports AND, OR and XOR reduction.
7331 proc check_effective_target_vect_logical_reduc { } {
7332 return [check_effective_target_aarch64_sve]
7335 # Return 1 if the target supports the fold_extract_last optab.
7337 proc check_effective_target_vect_fold_extract_last { } {
7338 return [check_effective_target_aarch64_sve]
7341 # Return 1 if the target supports section-anchors
7343 proc check_effective_target_section_anchors { } {
7344 global et_section_anchors_saved
7346 if [info exists et_section_anchors_saved] {
7347 verbose "check_effective_target_section_anchors: using cached result" 2
7349 set et_section_anchors_saved 0
7350 if { [istarget powerpc*-*-*]
7351 || [istarget arm*-*-*]
7352 || [istarget aarch64*-*-*] } {
7353 set et_section_anchors_saved 1
7357 verbose "check_effective_target_section_anchors: returning $et_section_anchors_saved" 2
7358 return $et_section_anchors_saved
7361 # Return 1 if the target supports atomic operations on "int_128" values.
7363 proc check_effective_target_sync_int_128 { } {
7364 if { [istarget spu-*-*] } {
7371 # Return 1 if the target supports atomic operations on "int_128" values
7372 # and can execute them.
7373 # This requires support for both compare-and-swap and true atomic loads.
7375 proc check_effective_target_sync_int_128_runtime { } {
7376 if { [istarget spu-*-*] } {
7383 # Return 1 if the target supports atomic operations on "long long".
7385 # Note: 32bit x86 targets require -march=pentium in dg-options.
7386 # Note: 32bit s390 targets require -mzarch in dg-options.
7388 proc check_effective_target_sync_long_long { } {
7389 if { [istarget i?86-*-*] || [istarget x86_64-*-*])
7390 || [istarget aarch64*-*-*]
7391 || [istarget arm*-*-*]
7392 || [istarget alpha*-*-*]
7393 || ([istarget sparc*-*-*] && [check_effective_target_lp64])
7394 || [istarget s390*-*-*]
7395 || [istarget spu-*-*] } {
7402 # Return 1 if the target supports atomic operations on "long long"
7403 # and can execute them.
7405 # Note: 32bit x86 targets require -march=pentium in dg-options.
7407 proc check_effective_target_sync_long_long_runtime { } {
7408 if { (([istarget x86_64-*-*] || [istarget i?86-*-*])
7409 && [check_cached_effective_target sync_long_long_available {
7410 check_runtime_nocache sync_long_long_available {
7414 unsigned int eax, ebx, ecx, edx;
7415 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
7416 return !(edx & bit_CMPXCHG8B);
7421 || [istarget aarch64*-*-*]
7422 || ([istarget arm*-*-linux-*]
7423 && [check_runtime sync_longlong_runtime {
7429 if (sizeof (long long) != 8)
7432 /* Just check for native;
7433 checking for kernel fallback is tricky. */
7434 asm volatile ("ldrexd r0,r1, [%0]"
7435 : : "r" (&l1) : "r0", "r1");
7439 || [istarget alpha*-*-*]
7440 || ([istarget sparc*-*-*]
7441 && [check_effective_target_lp64]
7442 && [check_effective_target_ultrasparc_hw])
7443 || [istarget spu-*-*]
7444 || ([istarget powerpc*-*-*] && [check_effective_target_lp64]) } {
7451 # Return 1 if the target supports byte swap instructions.
7453 proc check_effective_target_bswap { } {
7454 global et_bswap_saved
7456 if [info exists et_bswap_saved] {
7457 verbose "check_effective_target_bswap: using cached result" 2
7459 set et_bswap_saved 0
7460 if { [istarget aarch64*-*-*]
7461 || [istarget alpha*-*-*]
7462 || [istarget i?86-*-*] || [istarget x86_64-*-*]
7463 || [istarget m68k-*-*]
7464 || [istarget powerpc*-*-*]
7465 || [istarget rs6000-*-*]
7466 || [istarget s390*-*-*]
7467 || ([istarget arm*-*-*]
7468 && [check_no_compiler_messages_nocache arm_v6_or_later object {
7470 #error not armv6 or later
7474 set et_bswap_saved 1
7478 verbose "check_effective_target_bswap: returning $et_bswap_saved" 2
7479 return $et_bswap_saved
7482 # Return 1 if the target supports atomic operations on "int" and "long".
7484 proc check_effective_target_sync_int_long { } {
7485 global et_sync_int_long_saved
7487 if [info exists et_sync_int_long_saved] {
7488 verbose "check_effective_target_sync_int_long: using cached result" 2
7490 set et_sync_int_long_saved 0
7491 # This is intentionally powerpc but not rs6000, rs6000 doesn't have the
7492 #
load-reserved/store
-conditional instructions.
7493 if { [istarget ia64
-*-*]
7494 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
7495 ||
[istarget aarch64
*-*-*]
7496 ||
[istarget alpha
*-*-*]
7497 ||
[istarget arm
*-*-linux
-*]
7498 ||
([istarget arm
*-*-*]
7499 && [check_effective_target_arm_acq_rel
])
7500 ||
[istarget bfin
*-*linux
*]
7501 ||
[istarget hppa
*-*linux
*]
7502 ||
[istarget s390
*-*-*]
7503 ||
[istarget powerpc
*-*-*]
7504 ||
[istarget crisv32
-*-*] ||
[istarget cris
-*-*]
7505 ||
([istarget sparc
*-*-*] && [check_effective_target_sparc_v9
])
7506 ||
[istarget spu
-*-*]
7507 ||
([istarget arc
*-*-*] && [check_effective_target_arc_atomic
])
7508 ||
[check_effective_target_mips_llsc
] } {
7509 set et_sync_int_long_saved
1
7513 verbose
"check_effective_target_sync_int_long: returning $et_sync_int_long_saved" 2
7514 return $et_sync_int_long_saved
7517 #
Return 1 if the target supports atomic operations
on "char" and "short".
7519 proc check_effective_target_sync_char_short
{ } {
7520 global et_sync_char_short_saved
7522 if [info exists et_sync_char_short_saved
] {
7523 verbose
"check_effective_target_sync_char_short: using cached result" 2
7525 set et_sync_char_short_saved
0
7526 # This is intentionally powerpc but not rs6000
, rs6000 doesn
't have the
7527 # load-reserved/store-conditional instructions.
7528 if { [istarget aarch64*-*-*]
7529 || [istarget ia64-*-*]
7530 || [istarget i?86-*-*] || [istarget x86_64-*-*]
7531 || [istarget alpha*-*-*]
7532 || [istarget arm*-*-linux-*]
7533 || ([istarget arm*-*-*]
7534 && [check_effective_target_arm_acq_rel])
7535 || [istarget hppa*-*linux*]
7536 || [istarget s390*-*-*]
7537 || [istarget powerpc*-*-*]
7538 || [istarget crisv32-*-*] || [istarget cris-*-*]
7539 || ([istarget sparc*-*-*] && [check_effective_target_sparc_v9])
7540 || [istarget spu-*-*]
7541 || ([istarget arc*-*-*] && [check_effective_target_arc_atomic])
7542 || [check_effective_target_mips_llsc] } {
7543 set et_sync_char_short_saved 1
7547 verbose "check_effective_target_sync_char_short: returning $et_sync_char_short_saved" 2
7548 return $et_sync_char_short_saved
7551 # Return 1 if the target uses a ColdFire FPU.
7553 proc check_effective_target_coldfire_fpu { } {
7554 return [check_no_compiler_messages coldfire_fpu assembly {
7561 # Return true if this is a uClibc target.
7563 proc check_effective_target_uclibc {} {
7564 return [check_no_compiler_messages uclibc object {
7565 #include <features.h>
7566 #if !defined (__UCLIBC__)
7572 # Return true if this is a uclibc target and if the uclibc feature
7573 # described by __$feature__ is not present.
7575 proc check_missing_uclibc_feature {feature} {
7576 return [check_no_compiler_messages $feature object "
7577 #include <features.h>
7578 #if !defined (__UCLIBC) || defined (__${feature}__)
7584 # Return true if this is a Newlib target.
7586 proc check_effective_target_newlib {} {
7587 return [check_no_compiler_messages newlib object {
7592 # Some newlib versions don't provide a frexpl and instead depend
7593 #
on frexp to implement long double conversions in their printf
-like
7594 # functions. This leads to broken results. Detect such versions here.
7596 proc check_effective_target_newlib_broken_long_double_io
{} {
7597 if { [is
-effective
-target newlib
] && ![is
-effective
-target frexpl
] } {
7603 #
Return true
if this is NOT a Bionic target.
7605 proc check_effective_target_non_bionic
{} {
7606 return [check_no_compiler_messages non_bionic object
{
7608 #
if defined
(__BIONIC__
)
7614 #
Return true
if this target has error.h header.
7616 proc check_effective_target_error_h
{} {
7617 return [check_no_compiler_messages error_h object
{
7622 #
Return true
if this target has tgmath.h header.
7624 proc check_effective_target_tgmath_h
{} {
7625 return [check_no_compiler_messages tgmath_h object
{
7630 #
Return true
if target
's libc supports complex functions.
7632 proc check_effective_target_libc_has_complex_functions {} {
7633 return [check_no_compiler_messages libc_has_complex_functions object {
7634 #include <complex.h>
7639 # (a) an error of a few ULP is expected in string to floating-point
7640 # conversion functions; and
7641 # (b) overflow is not always detected correctly by those functions.
7643 proc check_effective_target_lax_strtofp {} {
7644 # By default, assume that all uClibc targets suffer from this.
7645 return [check_effective_target_uclibc]
7648 # Return 1 if this is a target for which wcsftime is a dummy
7649 # function that always returns 0.
7651 proc check_effective_target_dummy_wcsftime {} {
7652 # By default, assume that all uClibc targets suffer from this.
7653 return [check_effective_target_uclibc]
7656 # Return 1 if constructors with initialization priority arguments are
7657 # supposed on this target.
7659 proc check_effective_target_init_priority {} {
7660 return [check_no_compiler_messages init_priority assembly "
7661 void f() __attribute__((constructor (1000)));
7666 # Return 1 if the target matches the effective target 'arg', 0 otherwise.
7667 # This can be used with any check_* proc that takes no argument and
7668 # returns only 1 or 0. It could be used with check_* procs that take
7669 # arguments with keywords that pass particular arguments.
7671 proc is-effective-target { arg } {
7674 if { ![info exists et_index] } {
7675 # Initialize the effective target index that is used in some
7676 # check_effective_target_* procs.
7679 if { [info procs check_effective_target_${arg}] != [list] } {
7680 set selected [check_effective_target_${arg}]
7683 "vmx_hw" { set selected [check_vmx_hw_available] }
7684 "vsx_hw" { set selected [check_vsx_hw_available] }
7685 "p8vector_hw" { set selected [check_p8vector_hw_available] }
7686 "p9vector_hw" { set selected [check_p9vector_hw_available] }
7687 "p9modulo_hw" { set selected [check_p9modulo_hw_available] }
7688 "ppc_float128_sw" { set selected [check_ppc_float128_sw_available] }
7689 "ppc_float128_hw" { set selected [check_ppc_float128_hw_available] }
7690 "ppc_recip_hw" { set selected [check_ppc_recip_hw_available] }
7691 "ppc_cpu_supports_hw" { set selected [check_ppc_cpu_supports_hw_available] }
7692 "dfp_hw" { set selected [check_dfp_hw_available] }
7693 "htm_hw" { set selected [check_htm_hw_available] }
7694 "named_sections" { set selected [check_named_sections_available] }
7695 "gc_sections" { set selected [check_gc_sections_available] }
7696 "cxa_atexit" { set selected [check_cxa_atexit_available] }
7697 default { error "unknown effective target keyword `$arg'" }
7700 verbose
"is-effective-target: $arg $selected" 2
7704 #
Return 1 if the
argument is an effective
-target keyword
, 0 otherwise.
7706 proc is
-effective
-target
-keyword
{ arg } {
7707 if { [info procs check_effective_target_$
{arg}] != [list
] } {
7710 # These have different names
for their check_
* procs.
7712 "vmx_hw" { return 1 }
7713 "vsx_hw" { return 1 }
7714 "p8vector_hw" { return 1 }
7715 "p9vector_hw" { return 1 }
7716 "p9modulo_hw" { return 1 }
7717 "ppc_float128_sw" { return 1 }
7718 "ppc_float128_hw" { return 1 }
7719 "ppc_recip_hw" { return 1 }
7720 "dfp_hw" { return 1 }
7721 "htm_hw" { return 1 }
7722 "named_sections" { return 1 }
7723 "gc_sections" { return 1 }
7724 "cxa_atexit" { return 1 }
7725 default
{ return 0 }
7730 #
Execute tests
for all targets in EFFECTIVE_TARGETS list.
Set et_index to
7731 # indicate what target is currently being processed. This is
for
7732 # the vectorizer tests
, e.g. vect_int
, to keep track what target supports
7735 proc et
-dg
-runtest
{ runtest testcases flags default
-extra
-flags
} {
7736 global dg
-do-what
-default
7737 global EFFECTIVE_TARGETS
7740 if { [llength $EFFECTIVE_TARGETS
] > 0 } {
7741 foreach target $EFFECTIVE_TARGETS
{
7742 set target_flags $flags
7743 set dg
-do-what
-default
compile
7744 set et_index
[lsearch
-exact $EFFECTIVE_TARGETS $target
]
7745 if { [info procs add_options_for_$
{target
}] != [list
] } {
7746 set target_flags
[add_options_for_$
{target
} "$flags"]
7748 if { [info procs check_effective_target_$
{target
}_runtime
]
7749 != [list
] && [check_effective_target_$
{target
}_runtime
] } {
7750 set dg
-do-what
-default run
7752 $runtest $testcases $target_flags $
{default
-extra
-flags
}
7756 $runtest $testcases $flags $
{default
-extra
-flags
}
7760 #
Return 1 if a target matches the target in EFFECTIVE_TARGETS at index
7761 # et_index
, 0 otherwise.
7763 proc et
-is
-effective
-target
{ target
} {
7764 global EFFECTIVE_TARGETS
7767 if { [llength $EFFECTIVE_TARGETS
] > $et_index
7768 && [lindex $EFFECTIVE_TARGETS $et_index
] == $target
} {
7774 #
Return 1 if target default to short enums
7776 proc check_effective_target_short_enums
{ } {
7777 return [check_no_compiler_messages short_enums assembly
{
7779 int s
[sizeof
(enum foo
) == 1 ?
1 : -1];
7783 #
Return 1 if target supports merging string constants at link time.
7785 proc check_effective_target_string_merging
{ } {
7786 return [check_no_messages_and_pattern string_merging \
7787 "rodata\\.str" assembly {
7788 const char
*var
= "String";
7792 #
Return 1 if target has the basic signed and unsigned types in
7793 #
<stdint.h
>, 0 otherwise. This will be obsolete when GCC ensures a
7794 # working
<stdint.h
> for all targets.
7796 proc check_effective_target_stdint_types
{ } {
7797 return [check_no_compiler_messages stdint_types assembly
{
7799 int8_t a
; int16_t b
; int32_t c
; int64_t d
;
7800 uint8_t e
; uint16_t f
; uint32_t g
; uint64_t h
;
7804 #
Return 1 if target has the basic signed and unsigned types in
7805 #
<inttypes.h
>, 0 otherwise. This is
for tests that GCC
's notions of
7806 # these types agree with those in the header, as some systems have
7807 # only <inttypes.h>.
7809 proc check_effective_target_inttypes_types { } {
7810 return [check_no_compiler_messages inttypes_types assembly {
7811 #include <inttypes.h>
7812 int8_t a; int16_t b; int32_t c; int64_t d;
7813 uint8_t e; uint16_t f; uint32_t g; uint64_t h;
7817 # Return 1 if programs are intended to be run on a simulator
7818 # (i.e. slowly) rather than hardware (i.e. fast).
7820 proc check_effective_target_simulator { } {
7822 # All "src/sim" simulators set this one.
7823 if [board_info target exists is_simulator] {
7824 return [board_info target is_simulator]
7827 # The "sid" simulators don't
set that one
, but at least they
set
7829 if [board_info target
exists slow_simulator
] {
7830 return [board_info target slow_simulator
]
7836 #
Return 1 if programs are intended to be run
on hardware rather than
7839 proc check_effective_target_hw
{ } {
7841 # All
"src/sim" simulators set this one.
7842 if [board_info target
exists is_simulator
] {
7843 if [board_info target is_simulator
] {
7850 # The
"sid" simulators don't set that one, but at least they set
7852 if [board_info target
exists slow_simulator
] {
7853 if [board_info target slow_simulator
] {
7863 #
Return 1 if the target is a VxWorks kernel.
7865 proc check_effective_target_vxworks_kernel
{ } {
7866 return [check_no_compiler_messages vxworks_kernel assembly
{
7867 #
if !defined __vxworks || defined __RTP__
7873 #
Return 1 if the target is a VxWorks RTP.
7875 proc check_effective_target_vxworks_rtp
{ } {
7876 return [check_no_compiler_messages vxworks_rtp assembly
{
7877 #
if !defined __vxworks ||
!defined __RTP__
7883 #
Return 1 if the target is expected to provide wide character support.
7885 proc check_effective_target_wchar
{ } {
7886 if {[check_missing_uclibc_feature UCLIBC_HAS_WCHAR
]} {
7889 return [check_no_compiler_messages wchar assembly
{
7894 #
Return 1 if the target has
<pthread.h
>.
7896 proc check_effective_target_pthread_h
{ } {
7897 return [check_no_compiler_messages pthread_h assembly
{
7898 #
include <pthread.h
>
7902 #
Return 1 if the target can truncate a file from a file
-descriptor
,
7903 # as used by libgfortran
/io
/unix.c
:fd_truncate
; i.e. ftruncate or
7904 # chsize. We test
for a trivially functional truncation
; no stubs.
7905 # As libgfortran uses _FILE_OFFSET_BITS
64, we
do too
; it
'll cause a
7906 # different function to be used.
7908 proc check_effective_target_fd_truncate { } {
7910 #define _FILE_OFFSET_BITS 64
7917 FILE *f = fopen ("tst.tmp", "wb");
7919 const char t[] = "test writing more than ten characters";
7923 write (fd, t, sizeof (t) - 1);
7925 if (ftruncate (fd, 10) != 0)
7934 f = fopen ("tst.tmp", "rb");
7935 if (fread (s, 1, sizeof (s), f) != 10 || strncmp (s, t, 10) != 0)
7943 if { [check_runtime ftruncate $prog] } {
7947 regsub "ftruncate" $prog "chsize" prog
7948 return [check_runtime chsize $prog]
7951 # Add to FLAGS all the target-specific flags needed to access the c99 runtime.
7953 proc add_options_for_c99_runtime { flags } {
7954 if { [istarget *-*-solaris2*] } {
7955 return "$flags -std=c99"
7957 if { [istarget powerpc-*-darwin*] } {
7958 return "$flags -mmacosx-version-min=10.3"
7963 # Add to FLAGS all the target-specific flags needed to enable
7964 # full IEEE compliance mode.
7966 proc add_options_for_ieee { flags } {
7967 if { [istarget alpha*-*-*]
7968 || [istarget sh*-*-*] } {
7969 return "$flags -mieee"
7971 if { [istarget rx-*-*] } {
7972 return "$flags -mnofpu"
7977 if {![info exists flags_to_postpone]} {
7978 set flags_to_postpone ""
7981 # Add to FLAGS the flags needed to enable functions to bind locally
7982 # when using pic/PIC passes in the testsuite.
7983 proc add_options_for_bind_pic_locally { flags } {
7984 global flags_to_postpone
7986 # Instead of returning 'flags
' with the -fPIE or -fpie appended, we save it
7987 # in 'flags_to_postpone
' and append it later in gcc_target_compile procedure in
7988 # order to make sure that the multilib_flags doesn't override this.
7990 if {[check_no_compiler_messages using_pic2 assembly
{
7995 set flags_to_postpone
"-fPIE"
7998 if {[check_no_compiler_messages using_pic1 assembly
{
8003 set flags_to_postpone
"-fpie"
8009 # Add to FLAGS the flags needed to enable
64-bit vectors.
8011 proc add_options_for_double_vectors
{ flags
} {
8012 if [is
-effective
-target arm_neon_ok
] {
8013 return "$flags -mvectorize-with-neon-double"
8019 # Add to FLAGS the flags needed to
define the STACK_SIZE macro.
8021 proc add_options_for_stack_size
{ flags
} {
8022 if [is
-effective
-target stack_size
] {
8023 set stack_size
[dg
-effective
-target
-value stack_size
]
8024 return "$flags -DSTACK_SIZE=$stack_size"
8030 #
Return 1 if the target provides a full C99 runtime.
8032 proc check_effective_target_c99_runtime
{ } {
8033 return [check_cached_effective_target c99_runtime
{
8036 set file
[open
"$srcdir/gcc.dg/builtins-config.h"]
8037 set contents
[read $file
]
8040 #ifndef HAVE_C99_RUNTIME
8041 #error
!HAVE_C99_RUNTIME
8044 check_no_compiler_messages_nocache c99_runtime assembly \
8045 $contents
[add_options_for_c99_runtime
""]
8049 #
Return 1 if target wchar_t is at least
4 bytes.
8051 proc check_effective_target_4byte_wchar_t
{ } {
8052 return [check_no_compiler_messages
4byte_wchar_t object
{
8053 int dummy
[sizeof
(__WCHAR_TYPE__
) >= 4 ?
1 : -1];
8057 #
Return 1 if the target supports automatic stack alignment.
8059 proc check_effective_target_automatic_stack_alignment
{ } {
8060 # Ordinarily x86 supports automatic stack alignment ...
8061 if { [istarget i?
86*-*-*] ||
[istarget x86_64
-*-*] } then {
8062 if { [istarget
*-*-mingw
*] ||
[istarget
*-*-cygwin
*] } {
8063 # ... except Win64 SEH doesn
't. Succeed for Win32 though.
8064 return [check_effective_target_ilp32];
8071 # Return true if we are compiling for AVX target.
8073 proc check_avx_available { } {
8074 if { [check_no_compiler_messages avx_available assembly {
8084 # Return true if we are compiling for SSSE3 target.
8086 proc check_ssse3_available { } {
8087 if { [check_no_compiler_messages sse3a_available assembly {
8097 # Return true if 32- and 16-bytes vectors are available.
8099 proc check_effective_target_vect_sizes_32B_16B { } {
8100 return [expr { [available_vector_sizes] == [list 256 128] }]
8103 # Return true if 16- and 8-bytes vectors are available.
8105 proc check_effective_target_vect_sizes_16B_8B { } {
8106 if { [check_avx_available]
8107 || [is-effective-target arm_neon]
8108 || [istarget aarch64*-*-*] } {
8116 # Return true if 128-bits vectors are preferred even if 256-bits vectors
8119 proc check_prefer_avx128 { } {
8120 if ![check_avx_available] {
8123 return [check_no_messages_and_pattern avx_explicit "xmm" assembly {
8124 float a[1024],b[1024],c[1024];
8125 void foo (void) { int i; for (i = 0; i < 1024; i++) a[i]=b[i]+c[i];}
8126 } "-O2 -ftree-vectorize"]
8130 # Return 1 if avx512f instructions can be compiled.
8132 proc check_effective_target_avx512f { } {
8133 return [check_no_compiler_messages avx512f object {
8134 typedef double __m512d __attribute__ ((__vector_size__ (64)));
8135 typedef double __m128d __attribute__ ((__vector_size__ (16)));
8137 __m512d _mm512_add (__m512d a)
8139 return __builtin_ia32_addpd512_mask (a, a, a, 1, 4);
8142 __m128d _mm128_add (__m128d a)
8144 return __builtin_ia32_addsd_round (a, a, 8);
8147 __m128d _mm128_getmant (__m128d a)
8149 return __builtin_ia32_getmantsd_round (a, a, 0, 8);
8154 # Return 1 if avx instructions can be compiled.
8156 proc check_effective_target_avx { } {
8157 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
8160 return [check_no_compiler_messages avx object {
8161 void _mm256_zeroall (void)
8163 __builtin_ia32_vzeroall ();
8168 # Return 1 if avx2 instructions can be compiled.
8169 proc check_effective_target_avx2 { } {
8170 return [check_no_compiler_messages avx2 object {
8171 typedef long long __v4di __attribute__ ((__vector_size__ (32)));
8173 mm256_is32_andnotsi256 (__v4di __X, __v4di __Y)
8175 return __builtin_ia32_andnotsi256 (__X, __Y);
8180 # Return 1 if sse instructions can be compiled.
8181 proc check_effective_target_sse { } {
8182 return [check_no_compiler_messages sse object {
8185 __builtin_ia32_stmxcsr ();
8191 # Return 1 if sse2 instructions can be compiled.
8192 proc check_effective_target_sse2 { } {
8193 return [check_no_compiler_messages sse2 object {
8194 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
8196 __m128i _mm_srli_si128 (__m128i __A, int __N)
8198 return (__m128i)__builtin_ia32_psrldqi128 (__A, 8);
8203 # Return 1 if sse4.1 instructions can be compiled.
8204 proc check_effective_target_sse4 { } {
8205 return [check_no_compiler_messages sse4.1 object {
8206 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
8207 typedef int __v4si __attribute__ ((__vector_size__ (16)));
8209 __m128i _mm_mullo_epi32 (__m128i __X, __m128i __Y)
8211 return (__m128i) __builtin_ia32_pmulld128 ((__v4si)__X,
8217 # Return 1 if F16C instructions can be compiled.
8219 proc check_effective_target_f16c { } {
8220 return [check_no_compiler_messages f16c object {
8221 #include "immintrin.h"
8223 foo (unsigned short val)
8225 return _cvtsh_ss (val);
8230 # Return 1 if C wchar_t type is compatible with char16_t.
8232 proc check_effective_target_wchar_t_char16_t_compatible { } {
8233 return [check_no_compiler_messages wchar_t_char16_t object {
8235 __CHAR16_TYPE__ *p16 = &wc;
8236 char t[(((__CHAR16_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
8240 # Return 1 if C wchar_t type is compatible with char32_t.
8242 proc check_effective_target_wchar_t_char32_t_compatible { } {
8243 return [check_no_compiler_messages wchar_t_char32_t object {
8245 __CHAR32_TYPE__ *p32 = &wc;
8246 char t[(((__CHAR32_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
8250 # Return 1 if pow10 function exists.
8252 proc check_effective_target_pow10 { } {
8253 return [check_runtime pow10 {
8263 # Return 1 if frexpl function exists.
8265 proc check_effective_target_frexpl { } {
8266 return [check_runtime frexpl {
8271 x = frexpl (5.0, &y);
8278 # Return 1 if issignaling function exists.
8279 proc check_effective_target_issignaling {} {
8280 return [check_runtime issignaling {
8285 return issignaling (0.0);
8290 # Return 1 if current options generate DFP instructions, 0 otherwise.
8291 proc check_effective_target_hard_dfp {} {
8292 return [check_no_messages_and_pattern hard_dfp "!adddd3" assembly {
8293 typedef float d64 __attribute__((mode(DD)));
8295 void foo (void) { z = x + y; }
8299 # Return 1 if string.h and wchar.h headers provide C++ requires overloads
8300 # for strchr etc. functions.
8302 proc check_effective_target_correct_iso_cpp_string_wchar_protos { } {
8303 return [check_no_compiler_messages correct_iso_cpp_string_wchar_protos assembly {
8306 #if !defined(__cplusplus) \
8307 || !defined(__CORRECT_ISO_CPP_STRING_H_PROTO) \
8308 || !defined(__CORRECT_ISO_CPP_WCHAR_H_PROTO)
8309 ISO C++ correct string.h and wchar.h protos not supported.
8316 # Return 1 if GNU as is used.
8318 proc check_effective_target_gas { } {
8319 global use_gas_saved
8322 if {![info exists use_gas_saved]} {
8323 # Check if the as used by gcc is GNU as.
8324 set gcc_as [lindex [${tool}_target_compile "-print-prog-name=as" "" "none" ""] 0]
8325 # Provide /dev/null as input, otherwise gas times out reading from
8327 set status [remote_exec host "$gcc_as" "-v /dev/null"]
8328 set as_output [lindex $status 1]
8329 if { [ string first "GNU" $as_output ] >= 0 } {
8335 return $use_gas_saved
8338 # Return 1 if GNU ld is used.
8340 proc check_effective_target_gld { } {
8341 global use_gld_saved
8344 if {![info exists use_gld_saved]} {
8345 # Check if the ld used by gcc is GNU ld.
8346 set gcc_ld [lindex [${tool}_target_compile "-print-prog-name=ld" "" "none" ""] 0]
8347 set status [remote_exec host "$gcc_ld" "--version"]
8348 set ld_output [lindex $status 1]
8349 if { [ string first "GNU" $ld_output ] >= 0 } {
8355 return $use_gld_saved
8358 # Return 1 if the compiler has been configure with link-time optimization
8361 proc check_effective_target_lto { } {
8362 if { [istarget nvptx-*-*] } {
8365 return [check_no_compiler_messages lto object {
8370 # Return 1 if -mx32 -maddress-mode=short can compile, 0 otherwise.
8372 proc check_effective_target_maybe_x32 { } {
8373 return [check_no_compiler_messages maybe_x32 object {
8375 } "-mx32 -maddress-mode=short"]
8378 # Return 1 if this target supports the -fsplit-stack option, 0
8381 proc check_effective_target_split_stack {} {
8382 return [check_no_compiler_messages split_stack object {
8387 # Return 1 if this target supports the -masm=intel option, 0
8390 proc check_effective_target_masm_intel {} {
8391 return [check_no_compiler_messages masm_intel object {
8392 extern void abort (void);
8396 # Return 1 if the language for the compiler under test is C.
8398 proc check_effective_target_c { } {
8400 if [string match $tool "gcc"] {
8406 # Return 1 if the language for the compiler under test is C++.
8408 proc check_effective_target_c++ { } {
8410 if { [string match $tool "g++"] || [string match $tool "libstdc++"] } {
8416 set cxx_default "c++14"
8417 # Check whether the current active language standard supports the features
8418 # of C++11/C++14 by checking for the presence of one of the -std flags.
8419 # This assumes that the default for the compiler is $cxx_default, and that
8420 # there will never be multiple -std= arguments on the command line.
8421 proc check_effective_target_c++11_only { } {
8423 if ![check_effective_target_c++] {
8426 if [check-flags { { } { } { -std=c++0x -std=gnu++0x -std=c++11 -std=gnu++11 } }] {
8429 if { $cxx_default == "c++11" && [check-flags { { } { } { } { -std=* } }] } {
8434 proc check_effective_target_c++11 { } {
8435 if [check_effective_target_c++11_only] {
8438 return [check_effective_target_c++14]
8440 proc check_effective_target_c++11_down { } {
8441 if ![check_effective_target_c++] {
8444 return [expr ![check_effective_target_c++14] ]
8447 proc check_effective_target_c++14_only { } {
8449 if ![check_effective_target_c++] {
8452 if [check-flags { { } { } { -std=c++14 -std=gnu++14 -std=c++14 -std=gnu++14 } }] {
8455 if { $cxx_default == "c++14" && [check-flags { { } { } { } { -std=* } }] } {
8461 proc check_effective_target_c++14 { } {
8462 if [check_effective_target_c++14_only] {
8465 return [check_effective_target_c++17]
8467 proc check_effective_target_c++14_down { } {
8468 if ![check_effective_target_c++] {
8471 return [expr ![check_effective_target_c++17] ]
8474 proc check_effective_target_c++98_only { } {
8476 if ![check_effective_target_c++] {
8479 if [check-flags { { } { } { -std=c++98 -std=gnu++98 -std=c++03 -std=gnu++03 } }] {
8482 if { $cxx_default == "c++98" && [check-flags { { } { } { } { -std=* } }] } {
8488 proc check_effective_target_c++17_only { } {
8490 if ![check_effective_target_c++] {
8493 if [check-flags { { } { } { -std=c++17 -std=gnu++17 -std=c++1z -std=gnu++1z } }] {
8496 if { $cxx_default == "c++17" && [check-flags { { } { } { } { -std=* } }] } {
8502 proc check_effective_target_c++17 { } {
8503 if [check_effective_target_c++17_only] {
8506 return [check_effective_target_c++2a]
8508 proc check_effective_target_c++17_down { } {
8509 if ![check_effective_target_c++] {
8512 return [expr ![check_effective_target_c++2a] ]
8515 proc check_effective_target_c++2a_only { } {
8517 if ![check_effective_target_c++] {
8520 if [check-flags { { } { } { -std=c++2a -std=gnu++2a } }] {
8523 if { $cxx_default == "c++20" && [check-flags { { } { } { } { -std=* } }] } {
8528 proc check_effective_target_c++2a { } {
8529 return [check_effective_target_c++2a_only]
8532 # Check for C++ Concepts TS support, i.e. -fconcepts flag.
8533 proc check_effective_target_concepts { } {
8534 return [check-flags { "" { } { -fconcepts } }]
8537 # Return 1 if expensive testcases should be run.
8539 proc check_effective_target_run_expensive_tests { } {
8540 if { [getenv GCC_TEST_RUN_EXPENSIVE] != "" } {
8546 # Returns 1 if "mempcpy" is available on the target system.
8548 proc check_effective_target_mempcpy {} {
8549 return [check_function_available "mempcpy"]
8552 # Returns 1 if "stpcpy" is available on the target system.
8554 proc check_effective_target_stpcpy {} {
8555 return [check_function_available "stpcpy"]
8558 # Check whether the vectorizer tests are supported by the target and
8559 # append additional target-dependent compile flags to DEFAULT_VECTCFLAGS.
8560 # If a port wants to execute the tests more than once it should append
8561 # the supported target to EFFECTIVE_TARGETS instead, and the compile flags
8562 # will be added by a call to add_options_for_<target>.
8563 # Set dg-do-what-default to either compile or run, depending on target
8564 # capabilities. Do not set this if the supported target is appended to
8565 # EFFECTIVE_TARGETS. Flags and this variable will be set by et-dg-runtest
8566 # automatically. Return the number of effective targets if vectorizer tests
8567 # are supported, 0 otherwise.
8569 proc check_vect_support_and_set_flags { } {
8570 global DEFAULT_VECTCFLAGS
8571 global dg-do-what-default
8572 global EFFECTIVE_TARGETS
8574 if [istarget powerpc-*paired*] {
8575 lappend DEFAULT_VECTCFLAGS "-mpaired"
8576 if [check_750cl_hw_available] {
8577 set dg-do-what-default run
8579 set dg-do-what-default compile
8581 } elseif [istarget powerpc*-*-*] {
8582 # Skip targets not supporting -maltivec.
8583 if ![is-effective-target powerpc_altivec_ok] {
8587 lappend DEFAULT_VECTCFLAGS "-maltivec"
8588 if [check_p9vector_hw_available] {
8589 lappend DEFAULT_VECTCFLAGS "-mpower9-vector"
8590 } elseif [check_p8vector_hw_available] {
8591 lappend DEFAULT_VECTCFLAGS "-mpower8-vector"
8592 } elseif [check_vsx_hw_available] {
8593 lappend DEFAULT_VECTCFLAGS "-mvsx" "-mno-allow-movmisalign"
8596 if [check_vmx_hw_available] {
8597 set dg-do-what-default run
8599 if [is-effective-target ilp32] {
8600 # Specify a cpu that supports VMX for compile-only tests.
8601 lappend DEFAULT_VECTCFLAGS "-mcpu=970"
8603 set dg-do-what-default compile
8605 } elseif { [istarget spu-*-*] } {
8606 set dg-do-what-default run
8607 } elseif { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
8608 lappend DEFAULT_VECTCFLAGS "-msse2"
8609 if { [check_effective_target_sse2_runtime] } {
8610 set dg-do-what-default run
8612 set dg-do-what-default compile
8614 } elseif { [istarget mips*-*-*]
8615 && [check_effective_target_nomips16] } {
8616 if { [check_effective_target_mpaired_single] } {
8617 lappend EFFECTIVE_TARGETS mpaired_single
8619 if { [check_effective_target_mips_loongson] } {
8620 lappend EFFECTIVE_TARGETS mips_loongson
8622 if { [check_effective_target_mips_msa] } {
8623 lappend EFFECTIVE_TARGETS mips_msa
8625 return [llength $EFFECTIVE_TARGETS]
8626 } elseif [istarget sparc*-*-*] {
8627 lappend DEFAULT_VECTCFLAGS "-mcpu=ultrasparc" "-mvis"
8628 if [check_effective_target_ultrasparc_hw] {
8629 set dg-do-what-default run
8631 set dg-do-what-default compile
8633 } elseif [istarget alpha*-*-*] {
8634 # Alpha's vectorization capabilities are extremely limited.
8635 # It
's more effort than its worth disabling all of the tests
8636 # that it cannot pass. But if you actually want to see what
8637 # does work, command out the return.
8640 lappend DEFAULT_VECTCFLAGS "-mmax"
8641 if [check_alpha_max_hw_available] {
8642 set dg-do-what-default run
8644 set dg-do-what-default compile
8646 } elseif [istarget ia64-*-*] {
8647 set dg-do-what-default run
8648 } elseif [is-effective-target arm_neon_ok] {
8649 eval lappend DEFAULT_VECTCFLAGS [add_options_for_arm_neon ""]
8650 # NEON does not support denormals, so is not used for vectorization by
8651 # default to avoid loss of precision. We must pass -ffast-math to test
8652 # vectorization of float operations.
8653 lappend DEFAULT_VECTCFLAGS "-ffast-math"
8654 if [is-effective-target arm_neon_hw] {
8655 set dg-do-what-default run
8657 set dg-do-what-default compile
8659 } elseif [istarget "aarch64*-*-*"] {
8660 set dg-do-what-default run
8661 } elseif [istarget s390*-*-*] {
8662 # The S/390 backend set a default of 2 for that value.
8663 # Override it to have the same situation as with other
8665 lappend DEFAULT_VECTCFLAGS "--param" "min-vect-loop-bound=1"
8666 lappend DEFAULT_VECTCFLAGS "--param" "max-unrolled-insns=200"
8667 lappend DEFAULT_VECTCFLAGS "--param" "max-unroll-times=8"
8668 lappend DEFAULT_VECTCFLAGS "--param" "max-completely-peeled-insns=200"
8669 lappend DEFAULT_VECTCFLAGS "--param" "max-completely-peel-times=16"
8670 if [check_effective_target_s390_vxe] {
8671 lappend DEFAULT_VECTCFLAGS "-march=z14" "-mzarch"
8672 set dg-do-what-default run
8673 } elseif [check_effective_target_s390_vx] {
8674 lappend DEFAULT_VECTCFLAGS "-march=z13" "-mzarch"
8675 set dg-do-what-default run
8677 lappend DEFAULT_VECTCFLAGS "-march=z14" "-mzarch"
8678 set dg-do-what-default compile
8687 # Return 1 if the target does *not* require strict alignment.
8689 proc check_effective_target_non_strict_align {} {
8691 # On ARM, the default is to use STRICT_ALIGNMENT, but there
8692 # are interfaces defined for misaligned access and thus
8693 # depending on the architecture levels unaligned access is
8695 if [istarget "arm*-*-*"] {
8696 return [check_effective_target_arm_unaligned]
8699 return [check_no_compiler_messages non_strict_align assembly {
8701 typedef char __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__))) c;
8703 void foo(void) { z = (c *) y; }
8707 # Return 1 if the target has <ucontext.h>.
8709 proc check_effective_target_ucontext_h { } {
8710 return [check_no_compiler_messages ucontext_h assembly {
8711 #include <ucontext.h>
8715 proc check_effective_target_aarch64_tiny { } {
8716 if { [istarget aarch64*-*-*] } {
8717 return [check_no_compiler_messages aarch64_tiny object {
8718 #ifdef __AARCH64_CMODEL_TINY__
8721 #error target not AArch64 tiny code model
8729 # Create functions to check that the AArch64 assembler supports the
8730 # various architecture extensions via the .arch_extension pseudo-op.
8732 foreach { aarch64_ext } { "fp" "simd" "crypto" "crc" "lse" "dotprod" "sve"} {
8733 eval [string map [list FUNC $aarch64_ext] {
8734 proc check_effective_target_aarch64_asm_FUNC_ok { } {
8735 if { [istarget aarch64*-*-*] } {
8736 return [check_no_compiler_messages aarch64_FUNC_assembler object {
8737 __asm__ (".arch_extension FUNC");
8738 } "-march=armv8-a+FUNC"]
8746 proc check_effective_target_aarch64_small { } {
8747 if { [istarget aarch64*-*-*] } {
8748 return [check_no_compiler_messages aarch64_small object {
8749 #ifdef __AARCH64_CMODEL_SMALL__
8752 #error target not AArch64 small code model
8760 proc check_effective_target_aarch64_large { } {
8761 if { [istarget aarch64*-*-*] } {
8762 return [check_no_compiler_messages aarch64_large object {
8763 #ifdef __AARCH64_CMODEL_LARGE__
8766 #error target not AArch64 large code model
8775 # Return 1 if this is a reduced AVR Tiny core. Such cores have different
8776 # register set, instruction set, addressing capabilities and ABI.
8778 proc check_effective_target_avr_tiny { } {
8779 if { [istarget avr*-*-*] } {
8780 return [check_no_compiler_messages avr_tiny object {
8784 #error target not a reduced AVR Tiny core
8792 # Return 1 if <fenv.h> is available with all the standard IEEE
8793 # exceptions and floating-point exceptions are raised by arithmetic
8794 # operations. (If the target requires special options for "inexact"
8795 # exceptions, those need to be specified in the testcases.)
8797 proc check_effective_target_fenv_exceptions {} {
8798 return [check_runtime fenv_exceptions {
8801 #ifndef FE_DIVBYZERO
8802 # error Missing FE_DIVBYZERO
8805 # error Missing FE_INEXACT
8808 # error Missing FE_INVALID
8811 # error Missing FE_OVERFLOW
8813 #ifndef FE_UNDERFLOW
8814 # error Missing FE_UNDERFLOW
8816 volatile float a = 0.0f, r;
8821 if (fetestexcept (FE_INVALID))
8826 } [add_options_for_ieee "-std=gnu99"]]
8829 proc check_effective_target_tiny {} {
8830 global et_target_tiny_saved
8832 if [info exists et_target_tiny_saved] {
8833 verbose "check_effective_target_tiny: using cached result" 2
8835 set et_target_tiny_saved 0
8836 if { [istarget aarch64*-*-*]
8837 && [check_effective_target_aarch64_tiny] } {
8838 set et_target_tiny_saved 1
8840 if { [istarget avr-*-*]
8841 && [check_effective_target_avr_tiny] } {
8842 set et_target_tiny_saved 1
8846 return $et_target_tiny_saved
8849 # Return 1 if LOGICAL_OP_NON_SHORT_CIRCUIT is set to 0 for the current target.
8851 proc check_effective_target_logical_op_short_circuit {} {
8852 if { [istarget mips*-*-*]
8853 || [istarget arc*-*-*]
8854 || [istarget avr*-*-*]
8855 || [istarget crisv32-*-*] || [istarget cris-*-*]
8856 || [istarget csky*-*-*]
8857 || [istarget mmix-*-*]
8858 || [istarget s390*-*-*]
8859 || [istarget powerpc*-*-*]
8860 || [istarget nios2*-*-*]
8861 || [istarget riscv*-*-*]
8862 || [istarget v850*-*-*]
8863 || [istarget visium-*-*]
8864 || [check_effective_target_arm_cortex_m] } {
8870 # Return 1 if the target supports -mbranch-cost=N option.
8872 proc check_effective_target_branch_cost {} {
8873 if { [ istarget arm*-*-*]
8874 || [istarget avr*-*-*]
8875 || [istarget csky*-*-*]
8876 || [istarget epiphany*-*-*]
8877 || [istarget frv*-*-*]
8878 || [istarget i?86-*-*] || [istarget x86_64-*-*]
8879 || [istarget mips*-*-*]
8880 || [istarget s390*-*-*]
8881 || [istarget riscv*-*-*]
8882 || [istarget sh*-*-*]
8883 || [istarget spu*-*-*] } {
8889 # Record that dg-final test TEST requires convential compilation.
8891 proc force_conventional_output_for { test } {
8892 if { [info proc $test] == "" } {
8893 perror "$test does not exist"
8896 proc ${test}_required_options {} {
8897 global gcc_force_conventional_output
8898 return $gcc_force_conventional_output
8902 # Record that dg-final test scan-ltrans-tree-dump* requires -flto-partition=one
8903 # in order to force a single partition, allowing scan-ltrans-tree-dump* to scan
8904 # a dump file *.exe.ltrans0.*.
8906 proc scan-ltrans-tree-dump_required_options {} {
8907 return "-flto-partition=one"
8909 proc scan-ltrans-tree-dump-times_required_options {} {
8910 return "-flto-partition=one"
8912 proc scan-ltrans-tree-dump-not_required_options {} {
8913 return "-flto-partition=one"
8915 proc scan-ltrans-tree-dump-dem_required_options {} {
8916 return "-flto-partition=one"
8918 proc scan-ltrans-tree-dump-dem-not_required_options {} {
8919 return "-flto-partition=one"
8922 # Return 1 if the x86-64 target supports PIE with copy reloc, 0
8923 # otherwise. Cache the result.
8925 proc check_effective_target_pie_copyreloc { } {
8926 global pie_copyreloc_available_saved
8928 global GCC_UNDER_TEST
8930 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
8934 # Need auto-host.h to check linker support.
8935 if { ![file exists ../../auto-host.h ] } {
8939 if [info exists pie_copyreloc_available_saved] {
8940 verbose "check_effective_target_pie_copyreloc returning saved $pie_copyreloc_available_saved" 2
8942 # Set up and compile to see if linker supports PIE with copy
8943 # reloc. Include the current process ID in the file names to
8944 # prevent conflicts with invocations for multiple testsuites.
8949 set f [open $src "w"]
8950 puts $f "#include \"../../auto-host.h\""
8951 puts $f "#if HAVE_LD_PIE_COPYRELOC == 0"
8952 puts $f "# error Linker does not support PIE with copy reloc."
8956 verbose "check_effective_target_pie_copyreloc compiling testfile $src" 2
8957 set lines [${tool}_target_compile $src $obj object ""]
8962 if [string match "" $lines] then {
8963 verbose "check_effective_target_pie_copyreloc testfile compilation passed" 2
8964 set pie_copyreloc_available_saved 1
8966 verbose "check_effective_target_pie_copyreloc testfile compilation failed" 2
8967 set pie_copyreloc_available_saved 0
8971 return $pie_copyreloc_available_saved
8974 # Return 1 if the x86 target supports R_386_GOT32X relocation, 0
8975 # otherwise. Cache the result.
8977 proc check_effective_target_got32x_reloc { } {
8978 global got32x_reloc_available_saved
8980 global GCC_UNDER_TEST
8982 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
8986 # Need auto-host.h to check linker support.
8987 if { ![file exists ../../auto-host.h ] } {
8991 if [info exists got32x_reloc_available_saved] {
8992 verbose "check_effective_target_got32x_reloc returning saved $got32x_reloc_available_saved" 2
8994 # Include the current process ID in the file names to prevent
8995 # conflicts with invocations for multiple testsuites.
8997 set src got32x[pid].c
8998 set obj got32x[pid].o
9000 set f [open $src "w"]
9001 puts $f "#include \"../../auto-host.h\""
9002 puts $f "#if HAVE_AS_IX86_GOT32X == 0"
9003 puts $f "# error Assembler does not support R_386_GOT32X."
9007 verbose "check_effective_target_got32x_reloc compiling testfile $src" 2
9008 set lines [${tool}_target_compile $src $obj object ""]
9013 if [string match "" $lines] then {
9014 verbose "check_effective_target_got32x_reloc testfile compilation passed" 2
9015 set got32x_reloc_available_saved 1
9017 verbose "check_effective_target_got32x_reloc testfile compilation failed" 2
9018 set got32x_reloc_available_saved 0
9022 return $got32x_reloc_available_saved
9025 # Return 1 if the x86 target supports calling ___tls_get_addr via GOT,
9026 # 0 otherwise. Cache the result.
9028 proc check_effective_target_tls_get_addr_via_got { } {
9029 global tls_get_addr_via_got_available_saved
9031 global GCC_UNDER_TEST
9033 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
9037 # Need auto-host.h to check linker support.
9038 if { ![file exists ../../auto-host.h ] } {
9042 if [info exists tls_get_addr_via_got_available_saved] {
9043 verbose "check_effective_target_tls_get_addr_via_got returning saved $tls_get_addr_via_got_available_saved" 2
9045 # Include the current process ID in the file names to prevent
9046 # conflicts with invocations for multiple testsuites.
9048 set src tls_get_addr_via_got[pid].c
9049 set obj tls_get_addr_via_got[pid].o
9051 set f [open $src "w"]
9052 puts $f "#include \"../../auto-host.h\""
9053 puts $f "#if HAVE_AS_IX86_TLS_GET_ADDR_GOT == 0"
9054 puts $f "# error Assembler/linker do not support calling ___tls_get_addr via GOT."
9058 verbose "check_effective_target_tls_get_addr_via_got compiling testfile $src" 2
9059 set lines [${tool}_target_compile $src $obj object ""]
9064 if [string match "" $lines] then {
9065 verbose "check_effective_target_tls_get_addr_via_got testfile compilation passed" 2
9066 set tls_get_addr_via_got_available_saved 1
9068 verbose "check_effective_target_tls_get_addr_via_got testfile compilation failed" 2
9069 set tls_get_addr_via_got_available_saved 0
9073 return $tls_get_addr_via_got_available_saved
9076 # Return 1 if the target uses comdat groups.
9078 proc check_effective_target_comdat_group {} {
9079 return [check_no_messages_and_pattern comdat_group "\.section\[^\n\r]*,comdat|\.group\[^\n\r]*,#comdat" assembly {
9081 inline int foo () { return 1; }
9086 # Return 1 if target supports __builtin_eh_return
9087 proc check_effective_target_builtin_eh_return { } {
9088 return [check_no_compiler_messages builtin_eh_return object {
9089 void test (long l, void *p)
9091 __builtin_eh_return (l, p);
9096 # Return 1 if the target supports max reduction for vectors.
9098 proc check_effective_target_vect_max_reduc { } {
9099 if { [istarget aarch64*-*-*] || [is-effective-target arm_neon] } {
9105 # Return 1 if there is an nvptx offload compiler.
9107 proc check_effective_target_offload_nvptx { } {
9108 return [check_no_compiler_messages offload_nvptx object {
9109 int main () {return 0;}
9110 } "-foffload=nvptx-none" ]
9113 # Return 1 if the compiler has been configured with hsa offloading.
9115 proc check_effective_target_offload_hsa { } {
9116 return [check_no_compiler_messages offload_hsa assembly {
9117 int main () {return 0;}
9121 # Return 1 if the target support -fprofile-update=atomic
9122 proc check_effective_target_profile_update_atomic {} {
9123 return [check_no_compiler_messages profile_update_atomic assembly {
9124 int main (void) { return 0; }
9125 } "-fprofile-update=atomic -fprofile-generate"]
9128 # Return 1 if vector (va - vector add) instructions are understood by
9129 # the assembler and can be executed. This also covers checking for
9130 # the VX kernel feature. A kernel without that feature does not
9131 # enable the vector facility and the following check will die with a
9133 proc check_effective_target_s390_vx { } {
9134 if ![istarget s390*-*-*] then {
9138 return [check_runtime s390_check_vx {
9141 asm ("va %%v24, %%v26, %%v28, 3" : : : "v24", "v26", "v28");
9144 } "-march=z13 -mzarch" ]
9147 # Same as above but for the z14 vector enhancement facility. Test
9148 # is performed with the vector nand instruction.
9149 proc check_effective_target_s390_vxe { } {
9150 if ![istarget s390*-*-*] then {
9154 return [check_runtime s390_check_vxe {
9157 asm ("vnn %%v24, %%v26, %%v28" : : : "v24", "v26", "v28");
9160 } "-march=z14 -mzarch" ]
9163 #For versions of ARM architectures that have hardware div insn,
9164 #disable the divmod transform
9166 proc check_effective_target_arm_divmod_simode { } {
9167 return [check_no_compiler_messages arm_divmod assembly {
9168 #ifdef __ARM_ARCH_EXT_IDIV__
9175 # Return 1 if target supports divmod hardware insn or divmod libcall.
9177 proc check_effective_target_divmod { } {
9178 #TODO: Add checks for all targets that have either hardware divmod insn
9179 # or define libfunc for divmod.
9180 if { [istarget arm*-*-*]
9181 || [istarget i?86-*-*] || [istarget x86_64-*-*] } {
9187 # Return 1 if target supports divmod for SImode. The reason for
9188 # separating this from check_effective_target_divmod is that
9189 # some versions of ARM architecture define div instruction
9190 # only for simode, and for these archs, we do not want to enable
9191 # divmod transform for simode.
9193 proc check_effective_target_divmod_simode { } {
9194 if { [istarget arm*-*-*] } {
9195 return [check_effective_target_arm_divmod_simode]
9198 return [check_effective_target_divmod]
9201 # Return 1 if store merging optimization is applicable for target.
9202 # Store merging is not profitable for targets like the avr which
9203 # can load/store only one byte at a time. Use int size as a proxy
9204 # for the number of bytes the target can write, and skip for targets
9205 # with a smallish (< 32) size.
9207 proc check_effective_target_store_merge { } {
9208 if { [is-effective-target non_strict_align ] && [is-effective-target int32plus] } {
9215 # Return 1 if we're able to assemble rdrand
9217 proc check_effective_target_rdrand
{ } {
9218 return [check_no_compiler_messages_nocache rdrand object
{
9223 __builtin_ia32_rdrand32_step
(&val
);
9229 #
Return 1 if the target supports coprocessor instructions
: cdp
, ldc
, ldcl
,
9230 # stc
, stcl
, mcr and mrc.
9231 proc check_effective_target_arm_coproc1_ok_nocache
{ } {
9232 if { ![istarget arm
*-*-*] } {
9235 return [check_no_compiler_messages_nocache arm_coproc1_ok assembly
{
9236 #
if (__thumb__
&& !__thumb2__
) || __ARM_ARCH
< 4
9242 proc check_effective_target_arm_coproc1_ok
{ } {
9243 return [check_cached_effective_target arm_coproc1_ok \
9244 check_effective_target_arm_coproc1_ok_nocache
]
9247 #
Return 1 if the target supports all coprocessor instructions checked by
9248 # check_effective_target_arm_coproc1_ok in addition to the following
: cdp2
,
9249 # ldc2
, ldc2l
, stc2
, stc2l
, mcr2 and mrc2.
9250 proc check_effective_target_arm_coproc2_ok_nocache
{ } {
9251 if { ![check_effective_target_arm_coproc1_ok
] } {
9254 return [check_no_compiler_messages_nocache arm_coproc2_ok assembly
{
9255 #
if (__thumb__
&& !__thumb2__
) || __ARM_ARCH
< 5
9261 proc check_effective_target_arm_coproc2_ok
{ } {
9262 return [check_cached_effective_target arm_coproc2_ok \
9263 check_effective_target_arm_coproc2_ok_nocache
]
9266 #
Return 1 if the target supports all coprocessor instructions checked by
9267 # check_effective_target_arm_coproc2_ok in addition the following
: mcrr and
9269 proc check_effective_target_arm_coproc3_ok_nocache
{ } {
9270 if { ![check_effective_target_arm_coproc2_ok
] } {
9273 return [check_no_compiler_messages_nocache arm_coproc3_ok assembly
{
9274 #
if (__thumb__
&& !__thumb2__
) \
9275 ||
(__ARM_ARCH
< 6 && !defined
(__ARM_ARCH_5TE__
))
9281 proc check_effective_target_arm_coproc3_ok
{ } {
9282 return [check_cached_effective_target arm_coproc3_ok \
9283 check_effective_target_arm_coproc3_ok_nocache
]
9286 #
Return 1 if the target supports all coprocessor instructions checked by
9287 # check_effective_target_arm_coproc3_ok in addition the following
: mcrr2 and
9289 proc check_effective_target_arm_coproc4_ok_nocache
{ } {
9290 if { ![check_effective_target_arm_coproc3_ok
] } {
9293 return [check_no_compiler_messages_nocache arm_coproc4_ok assembly
{
9294 #
if (__thumb__
&& !__thumb2__
) || __ARM_ARCH
< 6
9300 proc check_effective_target_arm_coproc4_ok
{ } {
9301 return [check_cached_effective_target arm_coproc4_ok \
9302 check_effective_target_arm_coproc4_ok_nocache
]
9305 #
Return 1 if the target supports the auto_inc_dec optimization pass.
9306 proc check_effective_target_autoincdec
{ } {
9307 if { ![check_no_compiler_messages auto_incdec assembly
{ void f
() { }
9308 } "-O2 -fdump-rtl-auto_inc_dec" ] } {
9312 set dumpfile
[glob
-nocomplain
"auto_incdec[pid].c.\[0-9\]\[0-9\]\[0-9\]r.auto_inc_dec"]
9313 if { [file
exists $dumpfile
] } {
9314 file
delete $dumpfile
9320 #
Return 1 if the target has support
for stack probing designed
9321 # to avoid stack
-clash style attacks.
9323 # This is used to restrict the stack
-clash mitigation tests to
9324 # just those targets that have been explicitly supported.
9326 # In addition to the prologue work
on those targets
, each target
's
9327 # properties should be described in the functions below so that
9328 # tests do not become a mess of unreadable target conditions.
9330 proc check_effective_target_supports_stack_clash_protection { } {
9332 # Temporary until the target bits are fully ACK'd.
9333 #
if { [istarget aarch
*-*-*] } {
9337 if { [istarget x86_64
-*-*] ||
[istarget i?
86-*-*]
9338 ||
[istarget powerpc
*-*-*] ||
[istarget rs6000
*-*-*]
9339 ||
[istarget s390
*-*-*] } {
9345 #
Return 1 if the target creates a frame pointer
for non
-leaf functions
9346 # Note we ignore cases where we apply tail
call optimization here.
9347 proc check_effective_target_frame_pointer_for_non_leaf
{ } {
9348 if { [istarget aarch
*-*-*] } {
9352 # Solaris
/x86 defaults to
-fno
-omit
-frame
-pointer.
9353 if { [istarget i?
86-*-solaris
*] ||
[istarget x86_64
-*-solaris
*] } {
9360 #
Return 1 if the target
's calling sequence or its ABI
9361 # create implicit stack probes at or prior to function entry.
9362 proc check_effective_target_caller_implicit_probes { } {
9364 # On x86/x86_64 the call instruction itself pushes the return
9365 # address onto the stack. That is an implicit probe of *sp.
9366 if { [istarget x86_64-*-*] || [istarget i?86-*-*] } {
9370 # On PPC, the ABI mandates that the address of the outer
9371 # frame be stored at *sp. Thus each allocation of stack
9372 # space is itself an implicit probe of *sp.
9373 if { [istarget powerpc*-*-*] || [istarget rs6000*-*-*] } {
9377 # s390's ABI has a register save area allocated by the
9378 # caller
for use by the callee. The mere existence does
9379 # not constitute a probe by the caller
, but when the slots
9380 # used by the callee those stores are implicit probes.
9381 if { [istarget s390
*-*-*] } {
9385 # Not strictly true
on aarch64
, but we have agreed that we will
9386 #
consider any function that pushes SP more than
3kbytes into
9387 # the guard
page as broken. This essentially means that we can
9388 #
consider the aarch64 as having a caller implicit probe at
9390 if { [istarget aarch64
*-*-*] } {
9397 # Targets that potentially realign the stack pointer often cause residual
9398 # stack allocations and make it difficult to elimination loops or residual
9399 # allocations
for dynamic stack allocations
9400 proc check_effective_target_callee_realigns_stack
{ } {
9401 if { [istarget x86_64
-*-*] ||
[istarget i?
86-*-*] } {
9407 #
Return 1 if CET instructions can be compiled.
9408 proc check_effective_target_cet
{ } {
9409 if { !([istarget i?
86-*-*] ||
[istarget x86_64
-*-*]) } {
9412 return [check_no_compiler_messages cet object
{