1 # Copyright
(C
) 1999-2018 Free Software Foundation
, Inc.
3 # This
program is free software
; you can redistribute it and
/or modify
4 # it under the terms of the GNU General Public License as published by
5 # the Free Software Foundation
; either version
3 of the License
, or
6 #
(at your option
) any later version.
8 # This
program is distributed in the hope that it will be useful
,
9 # but WITHOUT
ANY WARRANTY
; without even the implied warranty of
10 # MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. See the
11 # GNU General Public License
for more details.
13 # You should have received a copy of the GNU General Public License
14 # along with GCC
; see the file COPYING3.
If not see
15 #
<http
://www.gnu.org
/licenses
/>.
17 # Please email
any bugs
, comments
, and
/or additions to this file to
:
18 # gcc
-patches@gcc.gnu.org
20 # This file defines procs
for determining features supported by the target.
22 # Try to
compile the code given by CONTENTS into an output file of
23 # type TYPE
, where TYPE is as
for target_compile.
Return a list
24 # whose first element contains the compiler messages and whose
25 # second element is the
name of the output file.
27 # BASENAME is a prefix to use
for source and output files.
28 #
If ARGS is not empty
, its first element is a string that
29 # should be added to the command line.
31 # Assume by default that CONTENTS is C code.
32 # Otherwise
, code should contain
:
34 #
"! Fortran" for Fortran code,
36 #
"// ObjC++" for ObjC++
38 #
If the tool is ObjC
/ObjC
++ then we overide the extension to .m
/.mm to
39 # allow
for ObjC
/ObjC
++ specific flags.
40 proc check_compile
{basename type contents
args} {
42 verbose
"check_compile tool: $tool for $basename"
44 # Save additional_sources to avoid compiling testsuite
's sources
45 # against check_compile's source.
46 global additional_sources
47 if [info exists additional_sources
] {
48 set tmp_additional_sources
"$additional_sources"
49 set additional_sources
""
52 if { [llength $
args] > 0 } {
53 set options
[list
"additional_flags=[lindex $args 0]"]
57 switch -glob
-- $contents
{
58 "*! Fortran*" { set src ${basename}[pid].f90 }
59 "*// C++*" { set src ${basename}[pid].cc }
60 "*// ObjC++*" { set src ${basename}[pid].mm }
61 "*/* ObjC*" { set src ${basename}[pid].m }
62 "*// Go*" { set src ${basename}[pid].go }
65 "objc" { set src ${basename}[pid].m }
66 "obj-c++" { set src ${basename}[pid].mm }
67 default
{ set src $
{basename
}[pid
].c
}
72 set compile_type $type
74 assembly
{ set output $
{basename
}[pid
].s
}
75 object
{ set output $
{basename
}[pid
].o
}
76 executable
{ set output $
{basename
}[pid
].exe
}
78 set output $
{basename
}[pid
].s
79 lappend options
"additional_flags=-fdump-$type"
80 set compile_type assembly
86 set lines
[$
{tool
}_target_compile $src $output $compile_type
"$options"]
89 set scan_output $output
90 # Don
't try folding this into the switch above; calling "glob" before the
91 # file is created won't work.
92 if [regexp
"rtl-(.*)" $type dummy rtl_type] {
93 set scan_output
"[glob $src.\[0-9\]\[0-9\]\[0-9\]r.$rtl_type]"
97 # Restore additional_sources.
98 if [info exists additional_sources
] {
99 set additional_sources
"$tmp_additional_sources"
102 return [list $lines $scan_output
]
105 proc current_target_name
{ } {
107 if [info exists target_info
(target
,name)] {
108 set answer $target_info
(target
,name)
115 # Implement an effective
-target check
for property PROP by invoking
116 # the Tcl command
ARGS and seeing
if it returns true.
118 proc check_cached_effective_target
{ prop
args } {
122 set target
[current_target_name
]
123 if {![info exists et_cache
($prop
,target
)]
124 || $et_cache
($prop
,target
) != $target
} {
125 verbose
"check_cached_effective_target $prop: checking $target" 2
126 set et_cache
($prop
,target
) $target
127 set et_cache
($prop
,value
) [uplevel eval $
args]
128 if {![info exists et_prop_list
]
129 ||
[lsearch $et_prop_list $prop
] < 0} {
130 lappend et_prop_list $prop
132 verbose
"check_cached_effective_target cached list is now: $et_prop_list" 2
134 set value $et_cache
($prop
,value
)
135 verbose
"check_cached_effective_target $prop: returning $value for $target" 2
139 # Clear effective
-target
cache. This is useful after testing
140 # effective
-target features and overriding TEST_ALWAYS_FLAGS and
/or
142 #
If one changes ALWAYS_CXXFLAGS or TEST_ALWAYS_FLAGS
then they should
143 #
do a clear_effective_target_cache at the end as the target
cache can
144 # make decisions based upon the flags
, and those decisions need to be
145 # redone when the flags change. An example of this is the
146 # asan_init
/asan_finish pair.
148 proc clear_effective_target_cache
{ } {
152 if {[info exists et_prop_list
]} {
153 verbose
"clear_effective_target_cache: $et_prop_list" 2
154 foreach prop $et_prop_list
{
155 unset et_cache
($prop
,value
)
156 unset et_cache
($prop
,target
)
162 # Like check_compile
, but
delete the output file and
return true
if the
163 # compiler printed no messages.
164 proc check_no_compiler_messages_nocache
{args} {
165 set result
[eval check_compile $
args]
166 set lines
[lindex $result
0]
167 set output
[lindex $result
1]
168 remote_file build
delete $output
169 return [string match
"" $lines]
172 # Like check_no_compiler_messages_nocache
, but
cache the result.
173 # PROP is the
property we
're checking, and doubles as a prefix for
174 # temporary filenames.
175 proc check_no_compiler_messages {prop args} {
176 return [check_cached_effective_target $prop {
177 eval [list check_no_compiler_messages_nocache $prop] $args
181 # Like check_compile, but return true if the compiler printed no
182 # messages and if the contents of the output file satisfy PATTERN.
183 # If PATTERN has the form "!REGEXP", the contents satisfy it if they
184 # don't match regular expression REGEXP
, otherwise they satisfy it
185 #
if they
do match regular expression PATTERN.
(PATTERN can start
186 # with something like
"[!]" if the regular expression needs to match
187 #
"!" as the first character.)
189 #
Delete the output file before returning. The other arguments are
190 # as
for check_compile.
191 proc check_no_messages_and_pattern_nocache
{basename pattern
args} {
194 set result
[eval
[list check_compile $basename
] $
args]
195 set lines
[lindex $result
0]
196 set output
[lindex $result
1]
199 if { [string match
"" $lines] } {
200 set chan
[open
"$output"]
201 set invert
[regexp
{^
!(.
*)} $pattern dummy pattern
]
202 set ok
[expr
{ [regexp $pattern
[read $chan
]] != $invert
}]
206 remote_file build
delete $output
210 # Like check_no_messages_and_pattern_nocache
, but
cache the result.
211 # PROP is the
property we
're checking, and doubles as a prefix for
212 # temporary filenames.
213 proc check_no_messages_and_pattern {prop pattern args} {
214 return [check_cached_effective_target $prop {
215 eval [list check_no_messages_and_pattern_nocache $prop $pattern] $args
219 # Try to compile and run an executable from code CONTENTS. Return true
220 # if the compiler reports no messages and if execution "passes" in the
221 # usual DejaGNU sense. The arguments are as for check_compile, with
222 # TYPE implicitly being "executable".
223 proc check_runtime_nocache {basename contents args} {
226 set result [eval [list check_compile $basename executable $contents] $args]
227 set lines [lindex $result 0]
228 set output [lindex $result 1]
231 if { [string match "" $lines] } {
232 # No error messages, everything is OK.
233 set result [remote_load target "./$output" "" ""]
234 set status [lindex $result 0]
235 verbose "check_runtime_nocache $basename: status is <$status>" 2
236 if { $status == "pass" } {
240 remote_file build delete $output
244 # Like check_runtime_nocache, but cache the result. PROP is the
245 # property we're checking
, and doubles as a prefix
for temporary
247 proc check_runtime
{prop
args} {
250 return [check_cached_effective_target $prop
{
251 eval
[list check_runtime_nocache $prop
] $
args
255 #
Return 1 if GCC was configured with $pattern.
256 proc check_configured_with
{ pattern
} {
259 set gcc_output
[$
{tool
}_target_compile
"-v" "" "none" ""]
260 if { [ regexp
"Configured with: \[^\n\]*$pattern" $gcc_output ] } {
261 verbose
"Matched: $pattern" 2
265 verbose
"Failed to match: $pattern" 2
269 ###############################
270 # proc check_weak_available
{ }
271 ###############################
273 # weak symbols are only supported in some configs
/object formats
274 # this proc returns
1 if they
're supported, 0 if they're not
, or
-1 if unsure
276 proc check_weak_available
{ } {
279 # All mips targets should support it
281 if { [ string first
"mips" $target_cpu ] >= 0 } {
285 # All AIX targets should support it
287 if { [istarget
*-*-aix
*] } {
291 # All solaris2 targets should support it
293 if { [istarget
*-*-solaris2
*] } {
297 # Windows targets Cygwin and MingW32 support it
299 if { [istarget
*-*-cygwin
*] ||
[istarget
*-*-mingw
*] } {
303 # HP
-UX
10.X doesn
't support it
305 if { [istarget hppa*-*-hpux10*] } {
309 # nvptx (nearly) supports it
311 if { [istarget nvptx-*-*] } {
315 # ELF and ECOFF support it. a.out does with gas/gld but may also with
316 # other linkers, so we should try it
318 set objformat [gcc_target_object_format]
326 unknown { return -1 }
331 # return 1 if weak undefined symbols are supported.
333 proc check_effective_target_weak_undefined { } {
334 return [check_runtime weak_undefined {
335 extern void foo () __attribute__((weak));
336 int main (void) { if (foo) return 1; return 0; }
340 ###############################
341 # proc check_weak_override_available { }
342 ###############################
344 # Like check_weak_available, but return 0 if weak symbol definitions
345 # cannot be overridden.
347 proc check_weak_override_available { } {
348 if { [istarget *-*-mingw*] } {
351 return [check_weak_available]
354 ###############################
355 # proc check_visibility_available { what_kind }
356 ###############################
358 # The visibility attribute is only support in some object formats
359 # This proc returns 1 if it is supported, 0 if not.
360 # The argument is the kind of visibility, default/protected/hidden/internal.
362 proc check_visibility_available { what_kind } {
363 if [string match "" $what_kind] { set what_kind "hidden" }
365 return [check_no_compiler_messages visibility_available_$what_kind object "
366 void f() __attribute__((visibility(\"$what_kind\")));
371 ###############################
372 # proc check_alias_available { }
373 ###############################
375 # Determine if the target toolchain supports the alias attribute.
377 # Returns 2 if the target supports aliases. Returns 1 if the target
378 # only supports weak aliased. Returns 0 if the target does not
379 # support aliases at all. Returns -1 if support for aliases could not
382 proc check_alias_available { } {
383 global alias_available_saved
386 if [info exists alias_available_saved] {
387 verbose "check_alias_available returning saved $alias_available_saved" 2
391 verbose "check_alias_available compiling testfile $src" 2
392 set f [open $src "w"]
393 # Compile a small test program. The definition of "g" is
394 # necessary to keep the Solaris assembler from complaining
396 puts $f "#ifdef __cplusplus\nextern \"C\"\n#endif\n"
397 puts $f "void g() {} void f() __attribute__((alias(\"g\")));"
399 set lines [${tool}_target_compile $src $obj object ""]
401 remote_file build delete $obj
403 if [string match "" $lines] then {
404 # No error messages, everything is OK.
405 set alias_available_saved 2
407 if [regexp "alias definitions not supported" $lines] {
408 verbose "check_alias_available target does not support aliases" 2
410 set objformat [gcc_target_object_format]
412 if { $objformat == "elf" } {
413 verbose "check_alias_available but target uses ELF format, so it ought to" 2
414 set alias_available_saved -1
416 set alias_available_saved 0
419 if [regexp "only weak aliases are supported" $lines] {
420 verbose "check_alias_available target supports only weak aliases" 2
421 set alias_available_saved 1
423 set alias_available_saved -1
428 verbose "check_alias_available returning $alias_available_saved" 2
431 return $alias_available_saved
434 # Returns 1 if the target toolchain supports strong aliases, 0 otherwise.
436 proc check_effective_target_alias { } {
437 if { [check_alias_available] < 2 } {
444 # Returns 1 if the target toolchain supports ifunc, 0 otherwise.
446 proc check_ifunc_available { } {
447 return [check_no_compiler_messages ifunc_available object {
452 typedef void F (void);
453 F* g (void) { return &f_; }
454 void f () __attribute__ ((ifunc ("g")));
461 # Returns true if --gc-sections is supported on the target.
463 proc check_gc_sections_available { } {
464 global gc_sections_available_saved
467 if {![info exists gc_sections_available_saved]} {
468 # Some targets don't support gc
-sections despite whatever
's
469 # advertised by ld's options.
470 if { [istarget alpha
*-*-*]
471 ||
[istarget ia64
-*-*] } {
472 set gc_sections_available_saved
0
476 # elf2flt uses
-q
(--emit
-relocs
), which is incompatible with
478 if { [board_info target
exists ldflags
]
479 && [regexp
" -elf2flt\[ =\]" " [board_info target ldflags] "] } {
480 set gc_sections_available_saved
0
484 # VxWorks kernel modules are relocatable objects linked with
-r
,
485 #
while RTP executables are linked with
-q
(--emit
-relocs
).
486 # Both of these options are incompatible with
--gc
-sections.
487 if { [istarget
*-*-vxworks
*] } {
488 set gc_sections_available_saved
0
492 # Check
if the
ld used by gcc supports
--gc
-sections.
493 set gcc_ld
[lindex
[$
{tool
}_target_compile
"-print-prog-name=ld" "" "none" ""] 0]
494 set ld_output
[remote_exec host
"$gcc_ld" "--help"]
495 if { [ string first
"--gc-sections" $ld_output ] >= 0 } {
496 set gc_sections_available_saved
1
498 set gc_sections_available_saved
0
501 return $gc_sections_available_saved
504 #
Return 1 if according to target_info struct and explicit target list
505 # target is supposed to support trampolines.
507 proc check_effective_target_trampolines
{ } {
508 if [target_info
exists gcc
,no_trampolines
] {
511 if { [istarget avr
-*-*]
512 ||
[istarget msp430
-*-*]
513 ||
[istarget nvptx
-*-*]
514 ||
[istarget hppa2.0w
-hp
-hpux11.23
]
515 ||
[istarget hppa64
-hp
-hpux11.23
] } {
521 #
Return 1 if target has limited stack size.
523 proc check_effective_target_stack_size
{ } {
524 if [target_info
exists gcc
,stack_size
] {
530 #
Return the value attribute of an effective target
, otherwise
return 0.
532 proc dg
-effective
-target
-value
{ effective_target
} {
533 if { "$effective_target" == "stack_size" } {
534 if [check_effective_target_stack_size
] {
535 return [target_info gcc
,stack_size
]
542 #
Return 1 if signal.h is supported.
544 proc check_effective_target_signal
{ } {
545 if [target_info
exists gcc
,signal_suppress
] {
551 #
Return 1 if according to target_info struct and explicit target list
552 # target disables
-fdelete
-null
-pointer
-checks. Targets should
return 0
553 #
if they simply default to
-fno
-delete-null
-pointer
-checks but obey
554 #
-fdelete
-null
-pointer
-checks when passed explicitly
(and tests that
555 # depend
on this option should
do that
).
557 proc check_effective_target_keeps_null_pointer_checks
{ } {
558 if [target_info
exists keeps_null_pointer_checks
] {
561 if { [istarget msp430
-*-*] } {
567 #
Return the autofdo profile wrapper
569 # Linux by default allows
516KB of perf event buffers
570 # in
/proc
/sys
/kernel
/perf_event_mlock_kb
571 # Each individual perf tries to grab it
572 # This causes problems with parallel test suite runs. Instead
573 #
limit us to
8 pages
(32K
), which should be good enough
574 #
for the small test programs. With the default settings
575 # this allows parallelism of
16 and higher of parallel gcc
-auto
-profile
576 proc profopt
-perf
-wrapper
{ } {
578 return "$srcdir/../config/i386/gcc-auto-profile -o perf.data -m8 "
581 #
Return true
if profiling is supported
on the target.
583 proc check_profiling_available
{ test_what
} {
584 global profiling_available_saved
586 verbose
"Profiling argument is <$test_what>" 1
588 # These conditions depend
on the
argument so examine them before
589 # looking at the
cache variable.
591 # Tree profiling requires TLS runtime support.
592 if { $test_what
== "-fprofile-generate" } {
593 if { ![check_effective_target_tls_runtime
] } {
598 if { $test_what
== "-fauto-profile" } {
599 if { !([istarget i?
86-*-linux
*] ||
[istarget x86_64
-*-linux
*]) } {
600 verbose
"autofdo only supported on linux"
603 # not cross compiling?
605 verbose
"autofdo not supported for non native builds"
608 set event
[profopt
-perf
-wrapper
]
610 verbose
"autofdo not supported"
614 set status [remote_exec host
"$srcdir/../config/i386/gcc-auto-profile" "true -v >/dev/null"]
615 if { [lindex $
status 0] != 0 } {
616 verbose
"autofdo not supported because perf does not work"
620 # no good way to check this in advance
-- check later instead.
621 #
set status [remote_exec host
"create_gcov" "2>/dev/null"]
622 #
if { [lindex $
status 0] != 255 } {
623 # verbose
"autofdo not supported due to missing create_gcov"
628 # Support
for -p
on solaris2 relies
on mcrt1.o which comes with the
629 # vendor compiler. We cannot reliably predict the directory where the
630 # vendor compiler
(and thus mcrt1.o
) is installed so we can
't
631 # necessarily find mcrt1.o even if we have it.
632 if { [istarget *-*-solaris2*] && $test_what == "-p" } {
636 # We don't yet support profiling
for MIPS16.
637 if { [istarget mips
*-*-*]
638 && ![check_effective_target_nomips16
]
639 && ($test_what
== "-p" || $test_what == "-pg") } {
643 # MinGW does not support
-p.
644 if { [istarget
*-*-mingw
*] && $test_what
== "-p" } {
648 # cygwin does not support
-p.
649 if { [istarget
*-*-cygwin
*] && $test_what
== "-p" } {
653 # uClibc does not have gcrt1.o.
654 if { [check_effective_target_uclibc
]
655 && ($test_what
== "-p" || $test_what == "-pg") } {
659 # Now examine the
cache variable.
660 if {![info exists profiling_available_saved
]} {
661 # Some targets don
't have any implementation of __bb_init_func or are
662 # missing other needed machinery.
663 if {[istarget aarch64*-*-elf]
664 || [istarget am3*-*-linux*]
665 || [istarget arm*-*-eabi*]
666 || [istarget arm*-*-elf]
667 || [istarget arm*-*-symbianelf*]
668 || [istarget avr-*-*]
669 || [istarget bfin-*-*]
670 || [istarget cris-*-*]
671 || [istarget crisv32-*-*]
672 || [istarget fido-*-elf]
673 || [istarget h8300-*-*]
674 || [istarget lm32-*-*]
675 || [istarget m32c-*-elf]
676 || [istarget m68k-*-elf]
677 || [istarget m68k-*-uclinux*]
678 || [istarget mips*-*-elf*]
679 || [istarget mmix-*-*]
680 || [istarget mn10300-*-elf*]
681 || [istarget moxie-*-elf*]
682 || [istarget msp430-*-*]
683 || [istarget nds32*-*-elf]
684 || [istarget nios2-*-elf]
685 || [istarget nvptx-*-*]
686 || [istarget powerpc-*-eabi*]
687 || [istarget powerpc-*-elf]
689 || [istarget tic6x-*-elf]
690 || [istarget visium-*-*]
691 || [istarget xstormy16-*]
692 || [istarget xtensa*-*-elf]
693 || [istarget *-*-rtems*]
694 || [istarget *-*-vxworks*] } {
695 set profiling_available_saved 0
697 set profiling_available_saved 1
701 # -pg link test result can't be cached since it may change between
703 set profiling_working $profiling_available_saved
704 if { $profiling_available_saved
== 1
705 && ![check_no_compiler_messages_nocache profiling executable
{
706 int main
() { return 0; } } "-pg"] } {
707 set profiling_working
0
710 return $profiling_working
713 # Check to see
if a target is
"freestanding". This is as per the definition
714 # in Section
4 of C99 standard. Effectively
, it is a target which supports no
715 # extra headers or libraries other than what is considered essential.
716 proc check_effective_target_freestanding
{ } {
717 if { [istarget nvptx
-*-*] } {
723 #
Return 1 if target has packed layout of structure members by
724 # default
, 0 otherwise. Note that this is slightly different than
725 # whether the target has
"natural alignment": both attributes may be
728 proc check_effective_target_default_packed
{ } {
729 return [check_no_compiler_messages default_packed assembly
{
730 struct x
{ char a
; long b
; } c
;
731 int s
[sizeof
(c
) == sizeof
(char
) + sizeof
(long
) ?
1 : -1];
735 #
Return 1 if target has PCC_BITFIELD_TYPE_MATTERS defined. See
736 # documentation
, where the test also comes from.
738 proc check_effective_target_pcc_bitfield_type_matters
{ } {
739 # PCC_BITFIELD_TYPE_MATTERS isn
't just about unnamed or empty
740 # bitfields, but let's stick to the example code from the docs.
741 return [check_no_compiler_messages pcc_bitfield_type_matters assembly
{
742 struct foo1
{ char x
; char
:0; char y
; };
743 struct foo2
{ char x
; int :0; char y
; };
744 int s
[sizeof
(struct foo1
) != sizeof
(struct foo2
) ?
1 : -1];
748 # Add to FLAGS all the target
-specific flags needed to use thread
-local storage.
750 proc add_options_for_tls
{ flags
} {
751 #
On Solaris
9, __tls_get_addr
/___tls_get_addr only lives in
752 # libthread
, so always pass
-pthread
for native TLS. Same
for AIX.
753 # Need to duplicate native TLS check from
754 # check_effective_target_tls_native to avoid recursion.
755 if { ([istarget powerpc
-ibm
-aix
*]) &&
756 [check_no_messages_and_pattern tls_native
"!emutls" assembly {
758 int f
(void
) { return i
; }
759 void g
(int j
) { i
= j
; }
761 return "-pthread [g++_link_flags [get_multilibs "-pthread"] ] $flags "
766 #
Return 1 if indirect jumps are supported
, 0 otherwise.
768 proc check_effective_target_indirect_jumps
{} {
769 if { [istarget nvptx
-*-*] } {
775 #
Return 1 if nonlocal
goto is supported
, 0 otherwise.
777 proc check_effective_target_nonlocal_goto
{} {
778 if { [istarget nvptx
-*-*] } {
784 #
Return 1 if global constructors are supported
, 0 otherwise.
786 proc check_effective_target_global_constructor
{} {
787 if { [istarget nvptx
-*-*] } {
793 #
Return 1 if taking label
values is supported
, 0 otherwise.
795 proc check_effective_target_label_values
{} {
796 if { [istarget nvptx
-*-*] ||
[target_info
exists gcc
,no_label_values
] } {
803 #
Return 1 if builtin_return_address and builtin_frame_address are
804 # supported
, 0 otherwise.
806 proc check_effective_target_return_address
{} {
807 if { [istarget nvptx
-*-*] } {
813 #
Return 1 if the assembler does not verify function types against
814 # calls
, 0 otherwise. Such verification will typically
show up problems
815 # with K
&R C function declarations.
817 proc check_effective_target_untyped_assembly
{} {
818 if { [istarget nvptx
-*-*] } {
824 #
Return 1 if alloca is supported
, 0 otherwise.
826 proc check_effective_target_alloca
{} {
827 if { [istarget nvptx
-*-*] } {
828 return [check_no_compiler_messages alloca assembly
{
830 void g
(int n
) { f
(__builtin_alloca
(n
)); }
836 #
Return 1 if thread local storage
(TLS
) is supported
, 0 otherwise.
838 proc check_effective_target_tls
{} {
839 return [check_no_compiler_messages tls assembly
{
841 int f
(void
) { return i
; }
842 void g
(int j
) { i
= j
; }
846 #
Return 1 if *native
* thread local storage
(TLS
) is supported
, 0 otherwise.
848 proc check_effective_target_tls_native
{} {
849 # VxWorks uses emulated TLS machinery
, but with non
-standard helper
850 # functions
, so we fail to automatically detect it.
851 if { [istarget
*-*-vxworks
*] } {
855 return [check_no_messages_and_pattern tls_native
"!emutls" assembly {
857 int f
(void
) { return i
; }
858 void g
(int j
) { i
= j
; }
862 #
Return 1 if *emulated
* thread local storage
(TLS
) is supported
, 0 otherwise.
864 proc check_effective_target_tls_emulated
{} {
865 # VxWorks uses emulated TLS machinery
, but with non
-standard helper
866 # functions
, so we fail to automatically detect it.
867 if { [istarget
*-*-vxworks
*] } {
871 return [check_no_messages_and_pattern tls_emulated
"emutls" assembly {
873 int f
(void
) { return i
; }
874 void g
(int j
) { i
= j
; }
878 #
Return 1 if TLS executables can run correctly
, 0 otherwise.
880 proc check_effective_target_tls_runtime
{} {
881 # The runtime does not have TLS support
, but just
882 # running the test below is insufficient to
show this.
883 if { [istarget msp430
-*-*] ||
[istarget visium
-*-*] } {
886 return [check_runtime tls_runtime
{
887 __thread
int thr
= 0;
888 int main
(void
) { return thr
; }
889 } [add_options_for_tls
""]]
892 #
Return 1 if atomic compare
-and
-swap is supported
on 'int'
894 proc check_effective_target_cas_char
{} {
895 return [check_no_compiler_messages cas_char assembly
{
896 #ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1
902 proc check_effective_target_cas_int
{} {
903 return [check_no_compiler_messages cas_int assembly
{
904 #
if __INT_MAX__
== 0x7fff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_2
906 #elif __INT_MAX__
== 0x7fffffff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
914 #
Return 1 if -ffunction
-sections is supported
, 0 otherwise.
916 proc check_effective_target_function_sections
{} {
917 # Darwin has its own scheme and silently accepts
-ffunction
-sections.
918 if { [istarget
*-*-darwin
*] } {
922 return [check_no_compiler_messages functionsections assembly
{
924 } "-ffunction-sections"]
927 #
Return 1 if instruction scheduling is available
, 0 otherwise.
929 proc check_effective_target_scheduling
{} {
930 return [check_no_compiler_messages scheduling object
{
932 } "-fschedule-insns"]
935 #
Return 1 if trapping arithmetic is available
, 0 otherwise.
937 proc check_effective_target_trapping
{} {
938 return [check_no_compiler_messages trapping object
{
939 int add
(int a
, int b
) { return a
+ b
; }
943 #
Return 1 if compilation with
-fgraphite is error
-free
for trivial
946 proc check_effective_target_fgraphite
{} {
947 return [check_no_compiler_messages fgraphite object
{
952 #
Return 1 if compilation with
-fopenacc is error
-free
for trivial
955 proc check_effective_target_fopenacc
{} {
956 # nvptx can be built with the device
-side bits of openacc
, but it
957 # does not make sense to test it as an openacc host.
958 if [istarget nvptx
-*-*] { return 0 }
960 return [check_no_compiler_messages fopenacc object
{
965 #
Return 1 if compilation with
-fopenmp is error
-free
for trivial
968 proc check_effective_target_fopenmp
{} {
969 # nvptx can be built with the device
-side bits of libgomp
, but it
970 # does not make sense to test it as an openmp host.
971 if [istarget nvptx
-*-*] { return 0 }
973 return [check_no_compiler_messages fopenmp object
{
978 #
Return 1 if compilation with
-fgnu
-tm is error
-free
for trivial
981 proc check_effective_target_fgnu_tm
{} {
982 return [check_no_compiler_messages fgnu_tm object
{
987 #
Return 1 if the target supports mmap
, 0 otherwise.
989 proc check_effective_target_mmap
{} {
990 return [check_function_available
"mmap"]
993 #
Return 1 if the target supports dlopen
, 0 otherwise.
994 proc check_effective_target_dlopen
{} {
995 return [check_no_compiler_messages dlopen executable
{
997 int main
(void
) { dlopen
("dummy.so", RTLD_NOW); }
998 } [add_options_for_dlopen
""]]
1001 proc add_options_for_dlopen
{ flags
} {
1002 return "$flags -ldl"
1005 #
Return 1 if the target supports clone
, 0 otherwise.
1006 proc check_effective_target_clone
{} {
1007 return [check_function_available
"clone"]
1010 #
Return 1 if the target supports setrlimit
, 0 otherwise.
1011 proc check_effective_target_setrlimit
{} {
1012 # Darwin has non
-posix compliant RLIMIT_AS
1013 if { [istarget
*-*-darwin
*] } {
1016 return [check_function_available
"setrlimit"]
1019 #
Return 1 if the target supports gettimeofday
, 0 otherwise.
1020 proc check_effective_target_gettimeofday
{} {
1021 return [check_function_available
"gettimeofday"]
1024 #
Return 1 if the target supports swapcontext
, 0 otherwise.
1025 proc check_effective_target_swapcontext
{} {
1026 return [check_no_compiler_messages swapcontext executable
{
1027 #
include <ucontext.h
>
1030 ucontext_t orig_context
,child_context
;
1031 if (swapcontext
(&child_context
, &orig_context
) < 0) { }
1036 #
Return 1 if compilation with
-pthread is error
-free
for trivial
1037 # code
, 0 otherwise.
1039 proc check_effective_target_pthread
{} {
1040 return [check_no_compiler_messages pthread object
{
1045 #
Return 1 if compilation with
-gstabs is error
-free
for trivial
1046 # code
, 0 otherwise.
1048 proc check_effective_target_stabs
{} {
1049 return [check_no_compiler_messages stabs object
{
1054 #
Return 1 if compilation with
-mpe
-aligned
-commons is error
-free
1055 #
for trivial code
, 0 otherwise.
1057 proc check_effective_target_pe_aligned_commons
{} {
1058 if { [istarget
*-*-cygwin
*] ||
[istarget
*-*-mingw
*] } {
1059 return [check_no_compiler_messages pe_aligned_commons object
{
1061 } "-mpe-aligned-commons"]
1066 #
Return 1 if the target supports
-static
1067 proc check_effective_target_static
{} {
1068 return [check_no_compiler_messages static executable
{
1069 int main
(void
) { return 0; }
1073 #
Return 1 if the target supports
-fstack
-protector
1074 proc check_effective_target_fstack_protector
{} {
1075 return [check_runtime fstack_protector
{
1077 int main
(int argc
, char
*argv
[]) {
1079 return !strcpy
(buf
, strrchr
(argv
[0], '/'));
1081 } "-fstack-protector"]
1084 #
Return 1 if the target supports
-fstack
-check or
-fstack
-check
=$stack_kind
1085 proc check_stack_check_available
{ stack_kind
} {
1086 if [string match
"" $stack_kind] then {
1087 set stack_opt
"-fstack-check"
1088 } else { set stack_opt
"-fstack-check=$stack_kind" }
1090 return [check_no_compiler_messages stack_check_$stack_kind executable
{
1091 int main
(void
) { return 0; }
1095 #
Return 1 if compilation with
-freorder
-blocks
-and
-partition is error
-free
1096 #
for trivial code
, 0 otherwise. As some targets
(ARM
for example
) only
1097 # warn when
-fprofile
-use is also supplied we test that combination too.
1099 proc check_effective_target_freorder
{} {
1100 if { [check_no_compiler_messages freorder object
{
1102 } "-freorder-blocks-and-partition"]
1103 && [check_no_compiler_messages fprofile_use_freorder object
{
1105 } "-fprofile-use -freorder-blocks-and-partition"] } {
1111 #
Return 1 if -fpic and
-fPIC are supported
, as in no warnings or errors
1112 # emitted
, 0 otherwise. Whether a shared library can actually be built is
1113 # out of scope
for this test.
1115 proc check_effective_target_fpic
{ } {
1116 # Note that M68K has a multilib that supports
-fpic but not
1117 #
-fPIC
, so we need to check both. We test with a
program that
1118 # requires GOT references.
1119 foreach
arg {fpic fPIC
} {
1120 if [check_no_compiler_messages $
arg object
{
1121 extern
int foo
(void
); extern
int bar
;
1122 int baz
(void
) { return foo
() + bar
; }
1130 #
On AArch64
, if -fpic is not supported
, then we will fall
back to
-fPIC
1131 # silently. So
, we can
't rely on above "check_effective_target_fpic" as it
1132 # assumes compiler will give warning if -fpic not supported. Here we check
1133 # whether binutils supports those new -fpic relocation modifiers, and assume
1134 # -fpic is supported if there is binutils support. GCC configuration will
1135 # enable -fpic for AArch64 in this case.
1137 # "check_effective_target_aarch64_small_fpic" is dedicated for checking small
1138 # memory model -fpic relocation types.
1140 proc check_effective_target_aarch64_small_fpic { } {
1141 if { [istarget aarch64*-*-*] } {
1142 return [check_no_compiler_messages aarch64_small_fpic object {
1143 void foo (void) { asm ("ldr x0, [x2, #:gotpage_lo15:globalsym]"); }
1150 # On AArch64, instruction sequence for TLS LE under -mtls-size=32 will utilize
1151 # the relocation modifier "tprel_g0_nc" together with MOVK, it's only supported
1152 # in binutils since
2015-03-04 as PR gas
/17843.
1154 # This test directive make sure binutils support all features needed by TLS LE
1155 # under
-mtls
-size
=32 on AArch64.
1157 proc check_effective_target_aarch64_tlsle32
{ } {
1158 if { [istarget aarch64
*-*-*] } {
1159 return [check_no_compiler_messages aarch64_tlsle32 object
{
1160 void foo
(void
) { asm
("movk x1,#:tprel_g0_nc:t1"); }
1167 #
Return 1 if -shared is supported
, as in no warnings or errors
1168 # emitted
, 0 otherwise.
1170 proc check_effective_target_shared
{ } {
1171 # Note that M68K has a multilib that supports
-fpic but not
1172 #
-fPIC
, so we need to check both. We test with a
program that
1173 # requires GOT references.
1174 return [check_no_compiler_messages shared executable
{
1175 extern
int foo
(void
); extern
int bar
;
1176 int baz
(void
) { return foo
() + bar
; }
1180 #
Return 1 if -pie
, -fpie and
-fPIE are supported
, 0 otherwise.
1182 proc check_effective_target_pie
{ } {
1183 if { [istarget
*-*-darwin\
[912\
]*]
1184 ||
[istarget
*-*-dragonfly
*]
1185 ||
[istarget
*-*-freebsd
*]
1186 ||
[istarget
*-*-linux
*]
1187 ||
[istarget
*-*-gnu
*] } {
1190 if { [istarget
*-*-solaris2.1\
[1-9\
]*] } {
1191 # Full PIE support was added in Solaris
11.3, but gcc errors out
1192 #
if missing
, so check
for that.
1193 return [check_no_compiler_messages pie executable
{
1194 int main
(void
) { return 0; }
1200 #
Return true
if the target supports
-mpaired
-single
(as used
on MIPS
).
1202 proc check_effective_target_mpaired_single
{ } {
1203 return [check_no_compiler_messages mpaired_single object
{
1205 } "-mpaired-single"]
1208 #
Return true
if the target has access to FPU instructions.
1210 proc check_effective_target_hard_float
{ } {
1211 if { [istarget mips
*-*-*] } {
1212 return [check_no_compiler_messages hard_float assembly
{
1213 #
if (defined __mips_soft_float || defined __mips16
)
1214 #error __mips_soft_float || __mips16
1219 # This proc is actually checking the availabilty of FPU
1220 # support
for doubles
, so
on the RX we must fail
if the
1221 #
64-bit double multilib has been selected.
1222 if { [istarget rx
-*-*] } {
1224 #
return [check_no_compiler_messages hard_float assembly
{
1225 #
if defined __RX_64_BIT_DOUBLES__
1226 #error __RX_64_BIT_DOUBLES__
1231 # The generic test equates hard_float with
"no call for adding doubles".
1232 return [check_no_messages_and_pattern hard_float
"!\\(call" rtl-expand {
1233 double a
(double b
, double c
) { return b
+ c
; }
1237 #
Return true
if the target is a
64-bit MIPS target.
1239 proc check_effective_target_mips64
{ } {
1240 return [check_no_compiler_messages mips64 assembly
{
1247 #
Return true
if the target is a MIPS target that does not produce
1250 proc check_effective_target_nomips16
{ } {
1251 return [check_no_compiler_messages nomips16 object
{
1255 /* A cheap way of testing
for -mflip
-mips16.
*/
1256 void foo
(void
) { asm
("addiu $20,$20,1"); }
1257 void bar
(void
) { asm
("addiu $20,$20,1"); }
1262 # Add the options needed
for MIPS16 function attributes. At the moment
,
1263 # we don
't support MIPS16 PIC.
1265 proc add_options_for_mips16_attribute { flags } {
1266 return "$flags -mno-abicalls -fno-pic -DMIPS16=__attribute__((mips16))"
1269 # Return true if we can force a mode that allows MIPS16 code generation.
1270 # We don't support MIPS16 PIC
, and only support MIPS16
-mhard
-float
1273 proc check_effective_target_mips16_attribute
{ } {
1274 return [check_no_compiler_messages mips16_attribute assembly
{
1278 #
if defined __mips_hard_float \
1279 && (!defined _ABIO32 || _MIPS_SIM
!= _ABIO32
) \
1280 && (!defined _ABIO64 || _MIPS_SIM
!= _ABIO64
)
1281 #error __mips_hard_float
&& (!_ABIO32 ||
!_ABIO64
)
1283 } [add_options_for_mips16_attribute
""]]
1286 #
Return 1 if the target supports long double larger than double when
1287 # using the new ABI
, 0 otherwise.
1289 proc check_effective_target_mips_newabi_large_long_double
{ } {
1290 return [check_no_compiler_messages mips_newabi_large_long_double object
{
1291 int dummy
[sizeof
(long double
) > sizeof
(double
) ?
1 : -1];
1295 #
Return true
if the target is a MIPS target that has access
1296 # to the LL and SC instructions.
1298 proc check_effective_target_mips_llsc
{ } {
1299 if { ![istarget mips
*-*-*] } {
1302 # Assume that these instructions are always implemented
for
1303 # non
-elf
* targets
, via emulation
if necessary.
1304 if { ![istarget
*-*-elf
*] } {
1307 # Otherwise assume LL
/SC support
for everything but MIPS I.
1308 return [check_no_compiler_messages mips_llsc assembly
{
1315 #
Return true
if the target is a MIPS target that uses in
-place relocations.
1317 proc check_effective_target_mips_rel
{ } {
1318 if { ![istarget mips
*-*-*] } {
1321 return [check_no_compiler_messages mips_rel object
{
1322 #
if (defined _ABIN32
&& _MIPS_SIM
== _ABIN32
) \
1323 ||
(defined _ABI64
&& _MIPS_SIM
== _ABI64
)
1324 #error _ABIN32
&& (_ABIN32 || _ABI64
)
1329 #
Return true
if the target is a MIPS target that uses the EABI.
1331 proc check_effective_target_mips_eabi
{ } {
1332 if { ![istarget mips
*-*-*] } {
1335 return [check_no_compiler_messages mips_eabi object
{
1342 #
Return 1 if the current multilib does not generate PIC by default.
1344 proc check_effective_target_nonpic
{ } {
1345 return [check_no_compiler_messages nonpic assembly
{
1352 #
Return 1 if the current multilib generates PIE by default.
1354 proc check_effective_target_pie_enabled
{ } {
1355 return [check_no_compiler_messages pie_enabled assembly
{
1362 #
Return 1 if the target generates
-fstack
-protector by default.
1364 proc check_effective_target_fstack_protector_enabled
{} {
1365 return [ check_no_compiler_messages fstack_protector_enabled assembly
{
1366 #
if !defined
(__SSP__
) && !defined
(__SSP_ALL__
) && \
1367 !defined
(__SSP_STRONG__
) && !defined
(__SSP_EXPICIT__
)
1373 #
Return 1 if the target does not use a
status wrapper.
1375 proc check_effective_target_unwrapped
{ } {
1376 if { [target_info needs_status_wrapper
] != "" \
1377 && [target_info needs_status_wrapper
] != "0" } {
1383 #
Return true
if iconv is supported
on the target. In particular IBM1047.
1385 proc check_iconv_available
{ test_what
} {
1388 #
If the tool configuration file has not
set libiconv
, try
"-liconv"
1389 if { ![info exists libiconv
] } {
1390 set libiconv
"-liconv"
1392 set test_what
[lindex $test_what
1]
1393 return [check_runtime_nocache $test_what
[subst
{
1399 cd
= iconv_open
("$test_what", "UTF-8");
1400 if (cd
== (iconv_t
) -1)
1407 #
Return true
if the atomic library is supported
on the target.
1408 proc check_effective_target_libatomic_available
{ } {
1409 return [check_no_compiler_messages libatomic_available executable
{
1410 int main
(void
) { return 0; }
1414 #
Return 1 if an ASCII locale is supported
on this host
, 0 otherwise.
1416 proc check_ascii_locale_available
{ } {
1420 #
Return true
if named sections are supported
on this target.
1422 proc check_named_sections_available
{ } {
1423 return [check_no_compiler_messages named_sections assembly
{
1424 int __attribute__
((section
("whatever"))) foo;
1428 #
Return true
if the
"naked" function attribute is supported on this target.
1430 proc check_effective_target_naked_functions
{ } {
1431 return [check_no_compiler_messages naked_functions assembly
{
1432 void f
() __attribute__
((naked
));
1436 #
Return 1 if the target supports Fortran real kinds larger than real
(8),
1439 # When the target
name changes
, replace the cached result.
1441 proc check_effective_target_fortran_large_real
{ } {
1442 return [check_no_compiler_messages fortran_large_real executable
{
1444 integer,parameter
:: k
= selected_real_kind
(precision
(0.0_8
) + 1)
1451 #
Return 1 if the target supports Fortran real kind real
(16),
1452 #
0 otherwise. Contrary to check_effective_target_fortran_large_real
1453 # this checks
for Real
(16) only
; the other returned real
(10) if
1454 # both real
(10) and real
(16) are available.
1456 # When the target
name changes
, replace the cached result.
1458 proc check_effective_target_fortran_real_16
{ } {
1459 return [check_no_compiler_messages fortran_real_16 executable
{
1467 #
Return 1 if the target supports Fortran real kind
10,
1468 #
0 otherwise. Contrary to check_effective_target_fortran_large_real
1469 # this checks
for real
(10) only.
1471 # When the target
name changes
, replace the cached result.
1473 proc check_effective_target_fortran_real_10
{ } {
1474 return [check_no_compiler_messages fortran_real_10 executable
{
1482 #
Return 1 if the target supports Fortran
's IEEE modules,
1485 # When the target name changes, replace the cached result.
1487 proc check_effective_target_fortran_ieee { flags } {
1488 return [check_no_compiler_messages fortran_ieee executable {
1490 use, intrinsic :: ieee_features
1496 # Return 1 if the target supports SQRT for the largest floating-point
1497 # type. (Some targets lack the libm support for this FP type.)
1498 # On most targets, this check effectively checks either whether sqrtl is
1499 # available or on __float128 systems whether libquadmath is installed,
1500 # which provides sqrtq.
1502 # When the target name changes, replace the cached result.
1504 proc check_effective_target_fortran_largest_fp_has_sqrt { } {
1505 return [check_no_compiler_messages fortran_largest_fp_has_sqrt executable {
1507 use iso_fortran_env, only: real_kinds
1508 integer,parameter:: maxFP = real_kinds(ubound(real_kinds,dim=1))
1509 real(kind=maxFP), volatile :: x
1517 # Return 1 if the target supports Fortran integer kinds larger than
1518 # integer(8), 0 otherwise.
1520 # When the target name changes, replace the cached result.
1522 proc check_effective_target_fortran_large_int { } {
1523 return [check_no_compiler_messages fortran_large_int executable {
1525 integer,parameter :: k = selected_int_kind (range (0_8) + 1)
1526 integer(kind=k) :: i
1531 # Return 1 if the target supports Fortran integer(16), 0 otherwise.
1533 # When the target name changes, replace the cached result.
1535 proc check_effective_target_fortran_integer_16 { } {
1536 return [check_no_compiler_messages fortran_integer_16 executable {
1543 # Return 1 if we can statically link libgfortran, 0 otherwise.
1545 # When the target name changes, replace the cached result.
1547 proc check_effective_target_static_libgfortran { } {
1548 return [check_no_compiler_messages static_libgfortran executable {
1555 # Return 1 if we can use the -rdynamic option, 0 otherwise.
1557 proc check_effective_target_rdynamic { } {
1558 return [check_no_compiler_messages rdynamic executable {
1559 int main() { return 0; }
1563 proc check_linker_plugin_available { } {
1564 return [check_no_compiler_messages_nocache linker_plugin executable {
1565 int main() { return 0; }
1566 } "-flto -fuse-linker-plugin"]
1569 # Return 1 if the target OS supports running SSE executables, 0
1570 # otherwise. Cache the result.
1572 proc check_sse_os_support_available { } {
1573 return [check_cached_effective_target sse_os_support_available {
1574 # If this is not the right target then we can skip the test.
1575 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1577 } elseif { [istarget i?86-*-solaris2*] } {
1578 # The Solaris 2 kernel doesn't save and restore SSE registers
1579 # before Solaris
9 4/04. Before that
, executables die with SIGILL.
1580 check_runtime_nocache sse_os_support_available
{
1583 asm volatile
("movaps %xmm0,%xmm0");
1593 #
Return 1 if the target OS supports running AVX executables
, 0
1594 # otherwise.
Cache the result.
1596 proc check_avx_os_support_available
{ } {
1597 return [check_cached_effective_target avx_os_support_available
{
1598 #
If this is not the right target
then we can skip the test.
1599 if { !([istarget i?
86-*-*] ||
[istarget x86_64
-*-*]) } {
1602 # Check that OS has AVX and SSE saving enabled.
1603 check_runtime_nocache avx_os_support_available
{
1606 unsigned
int eax
, edx
;
1608 asm
("xgetbv" : "=a" (eax), "=d" (edx) : "c" (0));
1609 return (eax
& 0x06) != 0x06;
1616 #
Return 1 if the target OS supports running AVX executables
, 0
1617 # otherwise.
Cache the result.
1619 proc check_avx512_os_support_available
{ } {
1620 return [check_cached_effective_target avx512_os_support_available
{
1621 #
If this is not the right target
then we can skip the test.
1622 if { !([istarget i?
86-*-*] ||
[istarget x86_64
-*-*]) } {
1625 # Check that OS has AVX512
, AVX and SSE saving enabled.
1626 check_runtime_nocache avx512_os_support_available
{
1629 unsigned
int eax
, edx
;
1631 asm
("xgetbv" : "=a" (eax), "=d" (edx) : "c" (0));
1632 return (eax
& 0xe6) != 0xe6;
1639 #
Return 1 if the target supports executing SSE instructions
, 0
1640 # otherwise.
Cache the result.
1642 proc check_sse_hw_available
{ } {
1643 return [check_cached_effective_target sse_hw_available
{
1644 #
If this is not the right target
then we can skip the test.
1645 if { !([istarget i?
86-*-*] ||
[istarget x86_64
-*-*]) } {
1648 check_runtime_nocache sse_hw_available
{
1652 unsigned
int eax
, ebx
, ecx
, edx
;
1653 if (!__get_cpuid
(1, &eax
, &ebx
, &ecx
, &edx
))
1656 return !(edx
& bit_SSE
);
1663 #
Return 1 if the target supports executing SSE2 instructions
, 0
1664 # otherwise.
Cache the result.
1666 proc check_sse2_hw_available
{ } {
1667 return [check_cached_effective_target sse2_hw_available
{
1668 #
If this is not the right target
then we can skip the test.
1669 if { !([istarget i?
86-*-*] ||
[istarget x86_64
-*-*]) } {
1672 check_runtime_nocache sse2_hw_available
{
1676 unsigned
int eax
, ebx
, ecx
, edx
;
1677 if (!__get_cpuid
(1, &eax
, &ebx
, &ecx
, &edx
))
1680 return !(edx
& bit_SSE2
);
1687 #
Return 1 if the target supports executing SSE4 instructions
, 0
1688 # otherwise.
Cache the result.
1690 proc check_sse4_hw_available
{ } {
1691 return [check_cached_effective_target sse4_hw_available
{
1692 #
If this is not the right target
then we can skip the test.
1693 if { !([istarget i?
86-*-*] ||
[istarget x86_64
-*-*]) } {
1696 check_runtime_nocache sse4_hw_available
{
1700 unsigned
int eax
, ebx
, ecx
, edx
;
1701 if (!__get_cpuid
(1, &eax
, &ebx
, &ecx
, &edx
))
1704 return !(ecx
& bit_SSE4_2
);
1711 #
Return 1 if the target supports executing AVX instructions
, 0
1712 # otherwise.
Cache the result.
1714 proc check_avx_hw_available
{ } {
1715 return [check_cached_effective_target avx_hw_available
{
1716 #
If this is not the right target
then we can skip the test.
1717 if { !([istarget i?
86-*-*] ||
[istarget x86_64
-*-*]) } {
1720 check_runtime_nocache avx_hw_available
{
1724 unsigned
int eax
, ebx
, ecx
, edx
;
1725 if (!__get_cpuid
(1, &eax
, &ebx
, &ecx
, &edx
))
1728 return ((ecx
& (bit_AVX | bit_OSXSAVE
))
1729 != (bit_AVX | bit_OSXSAVE
));
1736 #
Return 1 if the target supports executing AVX2 instructions
, 0
1737 # otherwise.
Cache the result.
1739 proc check_avx2_hw_available
{ } {
1740 return [check_cached_effective_target avx2_hw_available
{
1741 #
If this is not the right target
then we can skip the test.
1742 if { !([istarget x86_64
-*-*] ||
[istarget i?
86-*-*]) } {
1745 check_runtime_nocache avx2_hw_available
{
1750 unsigned
int eax
, ebx
, ecx
, edx
;
1752 if (__get_cpuid_max
(0, NULL
) < 7)
1755 __cpuid
(1, eax
, ebx
, ecx
, edx
);
1757 if (!(ecx
& bit_OSXSAVE
))
1760 __cpuid_count
(7, 0, eax
, ebx
, ecx
, edx
);
1762 return !(ebx
& bit_AVX2
);
1769 #
Return 1 if the target supports executing AVX512 foundation instructions
, 0
1770 # otherwise.
Cache the result.
1772 proc check_avx512f_hw_available
{ } {
1773 return [check_cached_effective_target avx512f_hw_available
{
1774 #
If this is not the right target
then we can skip the test.
1775 if { !([istarget x86_64
-*-*] ||
[istarget i?
86-*-*]) } {
1778 check_runtime_nocache avx512f_hw_available
{
1783 unsigned
int eax
, ebx
, ecx
, edx
;
1785 if (__get_cpuid_max
(0, NULL
) < 7)
1788 __cpuid
(1, eax
, ebx
, ecx
, edx
);
1790 if (!(ecx
& bit_OSXSAVE
))
1793 __cpuid_count
(7, 0, eax
, ebx
, ecx
, edx
);
1795 return !(ebx
& bit_AVX512F
);
1802 #
Return 1 if the target supports running SSE executables
, 0 otherwise.
1804 proc check_effective_target_sse_runtime
{ } {
1805 if { [check_effective_target_sse
]
1806 && [check_sse_hw_available
]
1807 && [check_sse_os_support_available
] } {
1813 #
Return 1 if the target supports running SSE2 executables
, 0 otherwise.
1815 proc check_effective_target_sse2_runtime
{ } {
1816 if { [check_effective_target_sse2
]
1817 && [check_sse2_hw_available
]
1818 && [check_sse_os_support_available
] } {
1824 #
Return 1 if the target supports running SSE4 executables
, 0 otherwise.
1826 proc check_effective_target_sse4_runtime
{ } {
1827 if { [check_effective_target_sse4
]
1828 && [check_sse4_hw_available
]
1829 && [check_sse_os_support_available
] } {
1835 #
Return 1 if the target supports running AVX executables
, 0 otherwise.
1837 proc check_effective_target_avx_runtime
{ } {
1838 if { [check_effective_target_avx
]
1839 && [check_avx_hw_available
]
1840 && [check_avx_os_support_available
] } {
1846 #
Return 1 if the target supports running AVX2 executables
, 0 otherwise.
1848 proc check_effective_target_avx2_runtime
{ } {
1849 if { [check_effective_target_avx2
]
1850 && [check_avx2_hw_available
]
1851 && [check_avx_os_support_available
] } {
1857 #
Return 1 if the target supports running AVX512f executables
, 0 otherwise.
1859 proc check_effective_target_avx512f_runtime
{ } {
1860 if { [check_effective_target_avx512f
]
1861 && [check_avx512f_hw_available
]
1862 && [check_avx512_os_support_available
] } {
1868 #
Return 1 if bmi2 instructions can be compiled.
1869 proc check_effective_target_bmi2
{ } {
1870 if { !([istarget i?
86-*-*] ||
[istarget x86_64
-*-*]) } {
1873 return [check_no_compiler_messages bmi2 object
{
1875 _bzhi_u32
(unsigned
int __X
, unsigned
int __Y
)
1877 return __builtin_ia32_bzhi_si
(__X
, __Y
);
1882 #
Return 1 if the target supports executing MIPS Paired
-Single instructions
,
1883 #
0 otherwise.
Cache the result.
1885 proc check_mpaired_single_hw_available
{ } {
1886 return [check_cached_effective_target mpaired_single_hw_available
{
1887 #
If this is not the right target
then we can skip the test.
1888 if { !([istarget mips
*-*-*]) } {
1891 check_runtime_nocache mpaired_single_hw_available
{
1894 asm volatile
("pll.ps $f2,$f4,$f6");
1902 #
Return 1 if the target supports executing Loongson vector instructions
,
1903 #
0 otherwise.
Cache the result.
1905 proc check_mips_loongson_hw_available
{ } {
1906 return [check_cached_effective_target mips_loongson_hw_available
{
1907 #
If this is not the right target
then we can skip the test.
1908 if { !([istarget mips
*-*-*]) } {
1911 check_runtime_nocache mips_loongson_hw_available
{
1912 #
include <loongson.h
>
1915 asm volatile
("paddw $f2,$f4,$f6");
1923 #
Return 1 if the target supports executing MIPS MSA instructions
, 0
1924 # otherwise.
Cache the result.
1926 proc check_mips_msa_hw_available
{ } {
1927 return [check_cached_effective_target mips_msa_hw_available
{
1928 #
If this is not the right target
then we can skip the test.
1929 if { !([istarget mips
*-*-*]) } {
1932 check_runtime_nocache mips_msa_hw_available
{
1933 #
if !defined
(__mips_msa
)
1934 #error
"MSA NOT AVAIL"
1936 #
if !(((__mips
== 64) ||
(__mips
== 32)) && (__mips_isa_rev
>= 2))
1937 #error
"MSA NOT AVAIL FOR ISA REV < 2"
1939 #
if !defined
(__mips_hard_float
)
1940 #error
"MSA HARD_FLOAT REQUIRED"
1942 #
if __mips_fpr
!= 64
1943 #error
"MSA 64-bit FPR REQUIRED"
1949 v8i16 v
= __builtin_msa_ldi_h
(0);
1959 #
Return 1 if the target supports running MIPS Paired
-Single
1960 # executables
, 0 otherwise.
1962 proc check_effective_target_mpaired_single_runtime
{ } {
1963 if { [check_effective_target_mpaired_single
]
1964 && [check_mpaired_single_hw_available
] } {
1970 #
Return 1 if the target supports running Loongson executables
, 0 otherwise.
1972 proc check_effective_target_mips_loongson_runtime
{ } {
1973 if { [check_effective_target_mips_loongson
]
1974 && [check_mips_loongson_hw_available
] } {
1980 #
Return 1 if the target supports running MIPS MSA executables
, 0 otherwise.
1982 proc check_effective_target_mips_msa_runtime
{ } {
1983 if { [check_effective_target_mips_msa
]
1984 && [check_mips_msa_hw_available
] } {
1990 #
Return 1 if we are compiling
for 64-bit PowerPC but we
do not use direct
1991 #
move instructions
for moves from GPR to FPR.
1993 proc check_effective_target_powerpc64_no_dm
{ } {
1994 # The
"mulld" checks if we are generating PowerPC64 code. The "lfd"
1995 # checks
if we
do not use direct moves
, but use the old
-fashioned
1996 # slower
move-via
-the
-stack.
1997 return [check_no_messages_and_pattern powerpc64_no_dm \
1998 {\mmulld\M.
*\mlfd
} assembly
{
1999 double f
(long long x
) { return x
*x
; }
2003 #
Return 1 if the target supports the __builtin_cpu_supports built
-in
,
2004 # including having a new enough library to support the test.
Cache the result.
2005 # Require at least a power7 to run
on.
2007 proc check_ppc_cpu_supports_hw_available
{ } {
2008 return [check_cached_effective_target ppc_cpu_supports_hw_available
{
2009 # Some simulators are known to not support VSX
/power8 instructions.
2010 #
For now
, disable
on Darwin
2011 if { [istarget powerpc
-*-eabi
]
2012 ||
[istarget powerpc
*-*-eabispe
]
2013 ||
[istarget
*-*-darwin
*]} {
2017 check_runtime_nocache ppc_cpu_supports_hw_available
{
2021 asm volatile
("xxlor vs0,vs0,vs0");
2023 asm volatile
("xxlor 0,0,0");
2025 if (!__builtin_cpu_supports
("vsx"))
2034 #
Return 1 if the target supports executing
750CL paired
-single instructions
, 0
2035 # otherwise.
Cache the result.
2037 proc check_750cl_hw_available
{ } {
2038 return [check_cached_effective_target
750cl_hw_available
{
2039 #
If this is not the right target
then we can skip the test.
2040 if { ![istarget powerpc
-*paired
*] } {
2043 check_runtime_nocache
750cl_hw_available
{
2047 asm volatile
("ps_mul v0,v0,v0");
2049 asm volatile
("ps_mul 0,0,0");
2058 #
Return 1 if the target supports executing power8 vector instructions
, 0
2059 # otherwise.
Cache the result.
2061 proc check_p8vector_hw_available
{ } {
2062 return [check_cached_effective_target p8vector_hw_available
{
2063 # Some simulators are known to not support VSX
/power8 instructions.
2064 #
For now
, disable
on Darwin
2065 if { [istarget powerpc
-*-eabi
]
2066 ||
[istarget powerpc
*-*-eabispe
]
2067 ||
[istarget
*-*-darwin
*]} {
2070 set options
"-mpower8-vector"
2071 check_runtime_nocache p8vector_hw_available
{
2075 asm volatile
("xxlorc vs0,vs0,vs0");
2077 asm volatile
("xxlorc 0,0,0");
2086 #
Return 1 if the target supports executing power9 vector instructions
, 0
2087 # otherwise.
Cache the result.
2089 proc check_p9vector_hw_available
{ } {
2090 return [check_cached_effective_target p9vector_hw_available
{
2091 # Some simulators are known to not support VSX
/power8
/power9
2092 # instructions.
For now
, disable
on Darwin.
2093 if { [istarget powerpc
-*-eabi
]
2094 ||
[istarget powerpc
*-*-eabispe
]
2095 ||
[istarget
*-*-darwin
*]} {
2098 set options
"-mpower9-vector"
2099 check_runtime_nocache p9vector_hw_available
{
2103 vector double v
= (vector double
) { 0.0, 0.0 };
2104 asm
("xsxexpdp %0,%1" : "+r" (e) : "wa" (v));
2112 #
Return 1 if the target supports executing power9 modulo instructions
, 0
2113 # otherwise.
Cache the result.
2115 proc check_p9modulo_hw_available
{ } {
2116 return [check_cached_effective_target p9modulo_hw_available
{
2117 # Some simulators are known to not support VSX
/power8
/power9
2118 # instructions.
For now
, disable
on Darwin.
2119 if { [istarget powerpc
-*-eabi
]
2120 ||
[istarget powerpc
*-*-eabispe
]
2121 ||
[istarget
*-*-darwin
*]} {
2124 set options
"-mmodulo"
2125 check_runtime_nocache p9modulo_hw_available
{
2128 int i
= 5, j
= 3, r
= -1;
2129 asm
("modsw %0,%1,%2" : "+r" (r) : "r" (i), "r" (j));
2137 #
Return 1 if the target supports executing __float128
on PowerPC via software
2138 # emulation
, 0 otherwise.
Cache the result.
2140 proc check_ppc_float128_sw_available
{ } {
2141 return [check_cached_effective_target ppc_float128_sw_available
{
2142 # Some simulators are known to not support VSX
/power8
/power9
2143 # instructions.
For now
, disable
on Darwin.
2144 if { [istarget powerpc
-*-eabi
]
2145 ||
[istarget powerpc
*-*-eabispe
]
2146 ||
[istarget
*-*-darwin
*]} {
2149 set options
"-mfloat128 -mvsx"
2150 check_runtime_nocache ppc_float128_sw_available
{
2151 volatile __float128 x
= 1.0q
;
2152 volatile __float128 y
= 2.0q
;
2155 __float128 z
= x
+ y
;
2163 #
Return 1 if the target supports executing __float128
on PowerPC via power9
2164 # hardware instructions
, 0 otherwise.
Cache the result.
2166 proc check_ppc_float128_hw_available
{ } {
2167 return [check_cached_effective_target ppc_float128_hw_available
{
2168 # Some simulators are known to not support VSX
/power8
/power9
2169 # instructions.
For now
, disable
on Darwin.
2170 if { [istarget powerpc
-*-eabi
]
2171 ||
[istarget powerpc
*-*-eabispe
]
2172 ||
[istarget
*-*-darwin
*]} {
2175 set options
"-mfloat128 -mvsx -mfloat128-hardware -mpower9-vector"
2176 check_runtime_nocache ppc_float128_hw_available
{
2177 volatile __float128 x
= 1.0q
;
2178 volatile __float128 y
= 2.0q
;
2181 __float128 z
= x
+ y
;
2182 __float128 w
= -1.0q
;
2184 __asm__
("xsaddqp %0,%1,%2" : "+v" (w) : "v" (x), "v" (y));
2185 return ((z
!= 3.0q
) ||
(z
!= w
);
2192 #
Return 1 if the target supports executing VSX instructions
, 0
2193 # otherwise.
Cache the result.
2195 proc check_vsx_hw_available
{ } {
2196 return [check_cached_effective_target vsx_hw_available
{
2197 # Some simulators are known to not support VSX instructions.
2198 #
For now
, disable
on Darwin
2199 if { [istarget powerpc
-*-eabi
]
2200 ||
[istarget powerpc
*-*-eabispe
]
2201 ||
[istarget
*-*-darwin
*]} {
2205 check_runtime_nocache vsx_hw_available
{
2209 asm volatile
("xxlor vs0,vs0,vs0");
2211 asm volatile
("xxlor 0,0,0");
2220 #
Return 1 if the target supports executing AltiVec instructions
, 0
2221 # otherwise.
Cache the result.
2223 proc check_vmx_hw_available
{ } {
2224 return [check_cached_effective_target vmx_hw_available
{
2225 # Some simulators are known to not support VMX instructions.
2226 if { [istarget powerpc
-*-eabi
] ||
[istarget powerpc
*-*-eabispe
] } {
2229 # Most targets don
't require special flags for this test case, but
2230 # Darwin does. Just to be sure, make sure VSX is not enabled for
2231 # the altivec tests.
2232 if { [istarget *-*-darwin*]
2233 || [istarget *-*-aix*] } {
2234 set options "-maltivec -mno-vsx"
2236 set options "-mno-vsx"
2238 check_runtime_nocache vmx_hw_available {
2242 asm volatile ("vor v0,v0,v0");
2244 asm volatile ("vor 0,0,0");
2253 proc check_ppc_recip_hw_available { } {
2254 return [check_cached_effective_target ppc_recip_hw_available {
2255 # Some simulators may not support FRE/FRES/FRSQRTE/FRSQRTES
2256 # For now, disable on Darwin
2257 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
2260 set options "-mpowerpc-gfxopt -mpowerpc-gpopt -mpopcntb"
2261 check_runtime_nocache ppc_recip_hw_available {
2262 volatile double d_recip, d_rsqrt, d_four = 4.0;
2263 volatile float f_recip, f_rsqrt, f_four = 4.0f;
2266 asm volatile ("fres %0,%1" : "=f" (f_recip) : "f" (f_four));
2267 asm volatile ("fre %0,%1" : "=d" (d_recip) : "d" (d_four));
2268 asm volatile ("frsqrtes %0,%1" : "=f" (f_rsqrt) : "f" (f_four));
2269 asm volatile ("frsqrte %0,%1" : "=f" (d_rsqrt) : "d" (d_four));
2277 # Return 1 if the target supports executing AltiVec and Cell PPU
2278 # instructions, 0 otherwise. Cache the result.
2280 proc check_effective_target_cell_hw { } {
2281 return [check_cached_effective_target cell_hw_available {
2282 # Some simulators are known to not support VMX and PPU instructions.
2283 if { [istarget powerpc-*-eabi*] } {
2286 # Most targets don't require special flags
for this test
2287 # case
, but Darwin and AIX
do.
2288 if { [istarget
*-*-darwin
*]
2289 ||
[istarget
*-*-aix
*] } {
2290 set options
"-maltivec -mcpu=cell"
2292 set options
"-mcpu=cell"
2294 check_runtime_nocache cell_hw_available
{
2298 asm volatile
("vor v0,v0,v0");
2299 asm volatile
("lvlx v0,r0,r0");
2301 asm volatile
("vor 0,0,0");
2302 asm volatile
("lvlx 0,0,0");
2311 #
Return 1 if the target supports executing
64-bit instructions
, 0
2312 # otherwise.
Cache the result.
2314 proc check_effective_target_powerpc64
{ } {
2315 global powerpc64_available_saved
2318 if [info exists powerpc64_available_saved
] {
2319 verbose
"check_effective_target_powerpc64 returning saved $powerpc64_available_saved" 2
2321 set powerpc64_available_saved
0
2323 # Some simulators are known to not support powerpc64 instructions.
2324 if { [istarget powerpc
-*-eabi
*] ||
[istarget powerpc
-ibm
-aix
*] } {
2325 verbose
"check_effective_target_powerpc64 returning 0" 2
2326 return $powerpc64_available_saved
2329 #
Set up
, compile, and
execute a test
program containing a
64-bit
2330 # instruction.
Include the current process ID in the file
2331 # names to prevent conflicts with invocations
for multiple
2336 set f
[open $src
"w"]
2337 puts $f
"int main() {"
2338 puts $f
"#ifdef __MACH__"
2339 puts $f
" asm volatile (\"extsw r0,r0\");"
2341 puts $f
" asm volatile (\"extsw 0,0\");"
2343 puts $f
" return 0; }"
2346 set opts
"additional_flags=-mcpu=G5"
2348 verbose
"check_effective_target_powerpc64 compiling testfile $src" 2
2349 set lines
[$
{tool
}_target_compile $src $exe executable
"$opts"]
2352 if [string match
"" $lines] then {
2353 # No error message
, compilation succeeded.
2354 set result
[$
{tool
}_load
"./$exe" "" ""]
2355 set status [lindex $result
0]
2356 remote_file build
delete $exe
2357 verbose
"check_effective_target_powerpc64 testfile status is <$status>" 2
2359 if { $
status == "pass" } then {
2360 set powerpc64_available_saved
1
2363 verbose
"check_effective_target_powerpc64 testfile compilation failed" 2
2367 return $powerpc64_available_saved
2370 # GCC
3.4.0 for powerpc64
-*-linux
* included an ABI fix
for passing
2371 # complex float arguments. This affects gfortran tests that
call cabsf
2372 # in libm built by an earlier compiler.
Return 0 if libm uses the same
2373 #
argument passing as the compiler under test
, 1 otherwise.
2375 proc check_effective_target_broken_cplxf_arg
{ } {
2376 # Skip the work
for targets known not to be affected.
2377 if { ![istarget powerpc
*-*-linux
*] ||
![is
-effective
-target lp64
] } {
2381 return [check_cached_effective_target broken_cplxf_arg
{
2382 check_runtime_nocache broken_cplxf_arg
{
2383 #
include <complex.h
>
2384 extern void abort
(void
);
2385 float fabsf
(float
);
2386 float cabsf
(_Complex float
);
2393 if (fabsf
(f
- 5.0) > 0.0001)
2394 /* Yes
, it
's broken. */
2396 /* All fine, not broken. */
2403 # Return 1 is this is a TI C6X target supporting C67X instructions
2404 proc check_effective_target_ti_c67x { } {
2405 return [check_no_compiler_messages ti_c67x assembly {
2406 #if !defined(_TMS320C6700)
2407 #error !_TMS320C6700
2412 # Return 1 is this is a TI C6X target supporting C64X+ instructions
2413 proc check_effective_target_ti_c64xp { } {
2414 return [check_no_compiler_messages ti_c64xp assembly {
2415 #if !defined(_TMS320C6400_PLUS)
2416 #error !_TMS320C6400_PLUS
2422 proc check_alpha_max_hw_available { } {
2423 return [check_runtime alpha_max_hw_available {
2424 int main() { return __builtin_alpha_amask(1<<8) != 0; }
2428 # Returns true iff the FUNCTION is available on the target system.
2429 # (This is essentially a Tcl implementation of Autoconf's
2432 proc check_function_available
{ function
} {
2433 return [check_no_compiler_messages $
{function
}_available \
2439 int main
() { $function
(); }
2443 # Returns true iff
"fork" is available on the target system.
2445 proc check_fork_available
{} {
2446 return [check_function_available
"fork"]
2449 # Returns true iff
"mkfifo" is available on the target system.
2451 proc check_mkfifo_available
{} {
2452 if { [istarget
*-*-cygwin
*] } {
2453 # Cygwin has mkfifo
, but support is incomplete.
2457 return [check_function_available
"mkfifo"]
2460 # Returns true iff
"__cxa_atexit" is used on the target system.
2462 proc check_cxa_atexit_available
{ } {
2463 return [check_cached_effective_target cxa_atexit_available
{
2464 if { [istarget hppa
*-*-hpux10
*] } {
2465 # HP
-UX
10 doesn
't have __cxa_atexit but subsequent test passes.
2467 } elseif { [istarget *-*-vxworks] } {
2468 # vxworks doesn't have __cxa_atexit but subsequent test passes.
2471 check_runtime_nocache cxa_atexit_available
{
2474 static unsigned
int count;
2491 Y
() { f
(); count = 2; }
2500 int main
() { return 0; }
2506 proc check_effective_target_objc2
{ } {
2507 return [check_no_compiler_messages objc2 object
{
2516 proc check_effective_target_next_runtime
{ } {
2517 return [check_no_compiler_messages objc2 object
{
2518 #ifdef __NEXT_RUNTIME__
2521 #error
!__NEXT_RUNTIME__
2526 #
Return 1 if we
're generating 32-bit code using default options, 0
2529 proc check_effective_target_ilp32 { } {
2530 return [check_no_compiler_messages ilp32 object {
2531 int dummy[sizeof (int) == 4
2532 && sizeof (void *) == 4
2533 && sizeof (long) == 4 ? 1 : -1];
2537 # Return 1 if we're generating ia32 code using default options
, 0
2540 proc check_effective_target_ia32
{ } {
2541 return [check_no_compiler_messages ia32 object
{
2542 int dummy
[sizeof
(int) == 4
2543 && sizeof
(void
*) == 4
2544 && sizeof
(long
) == 4 ?
1 : -1] = { __i386__
};
2548 #
Return 1 if we
're generating x32 code using default options, 0
2551 proc check_effective_target_x32 { } {
2552 return [check_no_compiler_messages x32 object {
2553 int dummy[sizeof (int) == 4
2554 && sizeof (void *) == 4
2555 && sizeof (long) == 4 ? 1 : -1] = { __x86_64__ };
2559 # Return 1 if we're generating
32-bit integers using default
2560 # options
, 0 otherwise.
2562 proc check_effective_target_int32
{ } {
2563 return [check_no_compiler_messages int32 object
{
2564 int dummy
[sizeof
(int) == 4 ?
1 : -1];
2568 #
Return 1 if we
're generating 32-bit or larger integers using default
2569 # options, 0 otherwise.
2571 proc check_effective_target_int32plus { } {
2572 return [check_no_compiler_messages int32plus object {
2573 int dummy[sizeof (int) >= 4 ? 1 : -1];
2577 # Return 1 if we're generating
32-bit or larger pointers using default
2578 # options
, 0 otherwise.
2580 proc check_effective_target_ptr32plus
{ } {
2581 # The msp430 has
16-bit or
20-bit pointers. The
20-bit pointer is stored
2582 # in a
32-bit slot when in memory
, so sizeof
(void
*) returns
4, but it
2583 # cannot really hold a
32-bit address
, so we always
return false here.
2584 if { [istarget msp430
-*-*] } {
2588 return [check_no_compiler_messages ptr32plus object
{
2589 int dummy
[sizeof
(void
*) >= 4 ?
1 : -1];
2593 #
Return 1 if we support
32-bit or larger array and structure sizes
2594 # using default options
, 0 otherwise. Avoid false positive
on
2595 # targets with
20 or
24 bit address spaces.
2597 proc check_effective_target_size32plus
{ } {
2598 return [check_no_compiler_messages size32plus object
{
2599 char dummy
[16777217L];
2603 # Returns
1 if we
're generating 16-bit or smaller integers with the
2604 # default options, 0 otherwise.
2606 proc check_effective_target_int16 { } {
2607 return [check_no_compiler_messages int16 object {
2608 int dummy[sizeof (int) < 4 ? 1 : -1];
2612 # Return 1 if we're generating
64-bit code using default options
, 0
2615 proc check_effective_target_lp64
{ } {
2616 return [check_no_compiler_messages lp64 object
{
2617 int dummy
[sizeof
(int) == 4
2618 && sizeof
(void
*) == 8
2619 && sizeof
(long
) == 8 ?
1 : -1];
2623 #
Return 1 if we
're generating 64-bit code using default llp64 options,
2626 proc check_effective_target_llp64 { } {
2627 return [check_no_compiler_messages llp64 object {
2628 int dummy[sizeof (int) == 4
2629 && sizeof (void *) == 8
2630 && sizeof (long long) == 8
2631 && sizeof (long) == 4 ? 1 : -1];
2635 # Return 1 if long and int have different sizes,
2638 proc check_effective_target_long_neq_int { } {
2639 return [check_no_compiler_messages long_ne_int object {
2640 int dummy[sizeof (int) != sizeof (long) ? 1 : -1];
2644 # Return 1 if the target supports long double larger than double,
2647 proc check_effective_target_large_long_double { } {
2648 return [check_no_compiler_messages large_long_double object {
2649 int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
2653 # Return 1 if the target supports double larger than float,
2656 proc check_effective_target_large_double { } {
2657 return [check_no_compiler_messages large_double object {
2658 int dummy[sizeof(double) > sizeof(float) ? 1 : -1];
2662 # Return 1 if the target supports long double of 128 bits,
2665 proc check_effective_target_longdouble128 { } {
2666 return [check_no_compiler_messages longdouble128 object {
2667 int dummy[sizeof(long double) == 16 ? 1 : -1];
2671 # Return 1 if the target supports double of 64 bits,
2674 proc check_effective_target_double64 { } {
2675 return [check_no_compiler_messages double64 object {
2676 int dummy[sizeof(double) == 8 ? 1 : -1];
2680 # Return 1 if the target supports double of at least 64 bits,
2683 proc check_effective_target_double64plus { } {
2684 return [check_no_compiler_messages double64plus object {
2685 int dummy[sizeof(double) >= 8 ? 1 : -1];
2689 # Return 1 if the target supports 'w
' suffix on floating constant
2692 proc check_effective_target_has_w_floating_suffix { } {
2694 if [check_effective_target_c++] {
2695 append opts "-std=gnu++03"
2697 return [check_no_compiler_messages w_fp_suffix object {
2702 # Return 1 if the target supports 'q
' suffix on floating constant
2705 proc check_effective_target_has_q_floating_suffix { } {
2707 if [check_effective_target_c++] {
2708 append opts "-std=gnu++03"
2710 return [check_no_compiler_messages q_fp_suffix object {
2715 # Return 1 if the target supports the _FloatN / _FloatNx type
2716 # indicated in the function name, 0 otherwise.
2718 proc check_effective_target_float16 {} {
2719 return [check_no_compiler_messages_nocache float16 object {
2721 } [add_options_for_float16 ""]]
2724 proc check_effective_target_float32 {} {
2725 return [check_no_compiler_messages_nocache float32 object {
2727 } [add_options_for_float32 ""]]
2730 proc check_effective_target_float64 {} {
2731 return [check_no_compiler_messages_nocache float64 object {
2733 } [add_options_for_float64 ""]]
2736 proc check_effective_target_float128 {} {
2737 return [check_no_compiler_messages_nocache float128 object {
2739 } [add_options_for_float128 ""]]
2742 proc check_effective_target_float32x {} {
2743 return [check_no_compiler_messages_nocache float32x object {
2745 } [add_options_for_float32x ""]]
2748 proc check_effective_target_float64x {} {
2749 return [check_no_compiler_messages_nocache float64x object {
2751 } [add_options_for_float64x ""]]
2754 proc check_effective_target_float128x {} {
2755 return [check_no_compiler_messages_nocache float128x object {
2757 } [add_options_for_float128x ""]]
2760 # Likewise, but runtime support for any special options used as well
2761 # as compile-time support is required.
2763 proc check_effective_target_float16_runtime {} {
2764 return [check_effective_target_float16]
2767 proc check_effective_target_float32_runtime {} {
2768 return [check_effective_target_float32]
2771 proc check_effective_target_float64_runtime {} {
2772 return [check_effective_target_float64]
2775 proc check_effective_target_float128_runtime {} {
2776 if { ![check_effective_target_float128] } {
2779 if { [istarget powerpc*-*-*] } {
2780 return [check_effective_target_base_quadfloat_support]
2785 proc check_effective_target_float32x_runtime {} {
2786 return [check_effective_target_float32x]
2789 proc check_effective_target_float64x_runtime {} {
2790 if { ![check_effective_target_float64x] } {
2793 if { [istarget powerpc*-*-*] } {
2794 return [check_effective_target_base_quadfloat_support]
2799 proc check_effective_target_float128x_runtime {} {
2800 return [check_effective_target_float128x]
2803 # Return 1 if the target hardware supports any options added for
2804 # _FloatN and _FloatNx types, 0 otherwise.
2806 proc check_effective_target_floatn_nx_runtime {} {
2807 if { [istarget powerpc*-*-aix*] } {
2810 if { [istarget powerpc*-*-*] } {
2811 return [check_effective_target_base_quadfloat_support]
2816 # Add options needed to use the _FloatN / _FloatNx type indicated in
2817 # the function name.
2819 proc add_options_for_float16 { flags } {
2820 if { [istarget arm*-*-*] } {
2821 return "$flags -mfp16-format=ieee"
2826 proc add_options_for_float32 { flags } {
2830 proc add_options_for_float64 { flags } {
2834 proc add_options_for_float128 { flags } {
2835 return [add_options_for___float128 "$flags"]
2838 proc add_options_for_float32x { flags } {
2842 proc add_options_for_float64x { flags } {
2843 return [add_options_for___float128 "$flags"]
2846 proc add_options_for_float128x { flags } {
2850 # Return 1 if the target supports __float128,
2853 proc check_effective_target___float128 { } {
2854 if { [istarget powerpc*-*-*] } {
2855 return [check_ppc_float128_sw_available]
2857 if { [istarget ia64-*-*]
2858 || [istarget i?86-*-*] || [istarget x86_64-*-*] } {
2864 proc add_options_for___float128 { flags } {
2865 if { [istarget powerpc*-*-*] } {
2866 return "$flags -mfloat128 -mvsx"
2871 # Return 1 if the target supports any special run-time requirements
2872 # for __float128 or _Float128,
2875 proc check_effective_target_base_quadfloat_support { } {
2876 if { [istarget powerpc*-*-*] } {
2877 return [check_vsx_hw_available]
2882 # Return 1 if the target supports compiling fixed-point,
2885 proc check_effective_target_fixed_point { } {
2886 return [check_no_compiler_messages fixed_point object {
2887 _Sat _Fract x; _Sat _Accum y;
2891 # Return 1 if the target supports compiling decimal floating point,
2894 proc check_effective_target_dfp_nocache { } {
2895 verbose "check_effective_target_dfp_nocache: compiling source" 2
2896 set ret [check_no_compiler_messages_nocache dfp object {
2897 float x __attribute__((mode(DD)));
2899 verbose "check_effective_target_dfp_nocache: returning $ret" 2
2903 proc check_effective_target_dfprt_nocache { } {
2904 return [check_runtime_nocache dfprt {
2905 typedef float d64 __attribute__((mode(DD)));
2906 d64 x = 1.2df, y = 2.3dd, z;
2907 int main () { z = x + y; return 0; }
2911 # Return 1 if the target supports compiling Decimal Floating Point,
2914 # This won't change
for different subtargets so
cache the result.
2916 proc check_effective_target_dfp
{ } {
2917 return [check_cached_effective_target dfp
{
2918 check_effective_target_dfp_nocache
2922 #
Return 1 if the target supports linking and executing Decimal Floating
2923 # Point
, 0 otherwise.
2925 # This won
't change for different subtargets so cache the result.
2927 proc check_effective_target_dfprt { } {
2928 return [check_cached_effective_target dfprt {
2929 check_effective_target_dfprt_nocache
2933 proc check_effective_target_powerpc_popcntb_ok { } {
2934 return [check_cached_effective_target powerpc_popcntb_ok {
2936 # Disable on Darwin.
2937 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
2940 check_runtime_nocache powerpc_popcntb_ok {
2942 volatile int a = 0x12345678;
2945 asm volatile ("popcntb %0,%1" : "=r" (r) : "r" (a));
2953 # Return 1 if the target supports executing DFP hardware instructions,
2954 # 0 otherwise. Cache the result.
2956 proc check_dfp_hw_available { } {
2957 return [check_cached_effective_target dfp_hw_available {
2958 # For now, disable on Darwin
2959 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
2962 check_runtime_nocache dfp_hw_available {
2963 volatile _Decimal64 r;
2964 volatile _Decimal64 a = 4.0DD;
2965 volatile _Decimal64 b = 2.0DD;
2968 asm volatile ("dadd %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2969 asm volatile ("dsub %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2970 asm volatile ("dmul %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2971 asm volatile ("ddiv %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2974 } "-mcpu=power6 -mhard-float"
2979 # Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
2981 proc check_effective_target_ucn_nocache { } {
2982 # -std=c99 is only valid for C
2983 if [check_effective_target_c] {
2984 set ucnopts "-std=c99"
2988 verbose "check_effective_target_ucn_nocache: compiling source" 2
2989 set ret [check_no_compiler_messages_nocache ucn object {
2992 verbose "check_effective_target_ucn_nocache: returning $ret" 2
2996 # Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
2998 # This won't change
for different subtargets
, so
cache the result.
3000 proc check_effective_target_ucn
{ } {
3001 return [check_cached_effective_target ucn
{
3002 check_effective_target_ucn_nocache
3006 #
Return 1 if the target needs a command line
argument to enable a SIMD
3009 proc check_effective_target_vect_cmdline_needed
{ } {
3010 global et_vect_cmdline_needed_saved
3011 global et_vect_cmdline_needed_target_name
3013 if { ![info exists et_vect_cmdline_needed_target_name
] } {
3014 set et_vect_cmdline_needed_target_name
""
3017 #
If the target has changed since we
set the cached value
, clear it.
3018 set current_target
[current_target_name
]
3019 if { $current_target
!= $et_vect_cmdline_needed_target_name
} {
3020 verbose
"check_effective_target_vect_cmdline_needed: `$et_vect_cmdline_needed_target_name' `$current_target'" 2
3021 set et_vect_cmdline_needed_target_name $current_target
3022 if { [info exists et_vect_cmdline_needed_saved
] } {
3023 verbose
"check_effective_target_vect_cmdline_needed: removing cached result" 2
3024 unset et_vect_cmdline_needed_saved
3028 if [info exists et_vect_cmdline_needed_saved
] {
3029 verbose
"check_effective_target_vect_cmdline_needed: using cached result" 2
3031 set et_vect_cmdline_needed_saved
1
3032 if { [istarget alpha
*-*-*]
3033 ||
[istarget ia64
-*-*]
3034 ||
(([istarget i?
86-*-*] ||
[istarget x86_64
-*-*])
3035 && ![is
-effective
-target ia32
])
3036 ||
([istarget powerpc
*-*-*]
3037 && ([check_effective_target_powerpc_spe
]
3038 ||
[check_effective_target_powerpc_altivec
]))
3039 ||
([istarget sparc
*-*-*] && [check_effective_target_sparc_vis
])
3040 ||
[istarget spu
-*-*]
3041 ||
([istarget arm
*-*-*] && [check_effective_target_arm_neon
])
3042 ||
[istarget aarch64
*-*-*] } {
3043 set et_vect_cmdline_needed_saved
0
3047 verbose
"check_effective_target_vect_cmdline_needed: returning $et_vect_cmdline_needed_saved" 2
3048 return $et_vect_cmdline_needed_saved
3051 #
Return 1 if the target supports hardware vectors of
int, 0 otherwise.
3053 # This won
't change for different subtargets so cache the result.
3055 proc check_effective_target_vect_int { } {
3056 global et_vect_int_saved
3059 if [info exists et_vect_int_saved($et_index)] {
3060 verbose "check_effective_target_vect_int: using cached result" 2
3062 set et_vect_int_saved($et_index) 0
3063 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
3064 || ([istarget powerpc*-*-*]
3065 && ![istarget powerpc-*-linux*paired*])
3066 || [istarget spu-*-*]
3067 || [istarget sparc*-*-*]
3068 || [istarget alpha*-*-*]
3069 || [istarget ia64-*-*]
3070 || [istarget aarch64*-*-*]
3071 || [is-effective-target arm_neon]
3072 || ([istarget mips*-*-*]
3073 && ([et-is-effective-target mips_loongson]
3074 || [et-is-effective-target mips_msa]))
3075 || ([istarget s390*-*-*]
3076 && [check_effective_target_s390_vx]) } {
3077 set et_vect_int_saved($et_index) 1
3081 verbose "check_effective_target_vect_int:\
3082 returning $et_vect_int_saved($et_index)" 2
3083 return $et_vect_int_saved($et_index)
3086 # Return 1 if the target supports signed int->float conversion
3089 proc check_effective_target_vect_intfloat_cvt { } {
3090 global et_vect_intfloat_cvt_saved
3093 if [info exists et_vect_intfloat_cvt_saved($et_index)] {
3094 verbose "check_effective_target_vect_intfloat_cvt:\
3095 using cached result" 2
3097 set et_vect_intfloat_cvt_saved($et_index) 0
3098 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
3099 || ([istarget powerpc*-*-*]
3100 && ![istarget powerpc-*-linux*paired*])
3101 || [is-effective-target arm_neon]
3102 || ([istarget mips*-*-*]
3103 && [et-is-effective-target mips_msa]) } {
3104 set et_vect_intfloat_cvt_saved($et_index) 1
3108 verbose "check_effective_target_vect_intfloat_cvt:\
3109 returning $et_vect_intfloat_cvt_saved($et_index)" 2
3110 return $et_vect_intfloat_cvt_saved($et_index)
3113 # Return 1 if the target supports signed double->int conversion
3116 proc check_effective_target_vect_doubleint_cvt { } {
3117 global et_vect_doubleint_cvt_saved
3120 if [info exists et_vect_doubleint_cvt_saved($et_index)] {
3121 verbose "check_effective_target_vect_doubleint_cvt: using cached result" 2
3123 set et_vect_doubleint_cvt_saved($et_index) 0
3124 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
3125 && [check_no_compiler_messages vect_doubleint_cvt assembly {
3126 #ifdef __tune_atom__
3127 # error No double vectorizer support.
3130 || [istarget aarch64*-*-*]
3131 || [istarget spu-*-*]
3132 || ([istarget powerpc*-*-*] && [check_vsx_hw_available])
3133 || ([istarget mips*-*-*]
3134 && [et-is-effective-target mips_msa]) } {
3135 set et_vect_doubleint_cvt_saved($et_index) 1
3139 verbose "check_effective_target_vect_doubleint_cvt:\
3140 returning $et_vect_doubleint_cvt_saved($et_index)" 2
3141 return $et_vect_doubleint_cvt_saved($et_index)
3144 # Return 1 if the target supports signed int->double conversion
3147 proc check_effective_target_vect_intdouble_cvt { } {
3148 global et_vect_intdouble_cvt_saved
3151 if [info exists et_vect_intdouble_cvt_saved($et_index)] {
3152 verbose "check_effective_target_vect_intdouble_cvt: using cached result" 2
3154 set et_vect_intdouble_cvt_saved($et_index) 0
3155 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
3156 && [check_no_compiler_messages vect_intdouble_cvt assembly {
3157 #ifdef __tune_atom__
3158 # error No double vectorizer support.
3161 || [istarget aarch64*-*-*]
3162 || [istarget spu-*-*]
3163 || ([istarget powerpc*-*-*] && [check_vsx_hw_available])
3164 || ([istarget mips*-*-*]
3165 && [et-is-effective-target mips_msa]) } {
3166 set et_vect_intdouble_cvt_saved($et_index) 1
3170 verbose "check_effective_target_vect_intdouble_cvt:\
3171 returning $et_vect_intdouble_cvt_saved($et_index)" 2
3172 return $et_vect_intdouble_cvt_saved($et_index)
3175 #Return 1 if we're supporting __int128
for target
, 0 otherwise.
3177 proc check_effective_target_int128
{ } {
3178 return [check_no_compiler_messages int128 object
{
3180 #ifndef __SIZEOF_INT128__
3189 #
Return 1 if the target supports unsigned
int->float conversion
3192 proc check_effective_target_vect_uintfloat_cvt
{ } {
3193 global et_vect_uintfloat_cvt_saved
3196 if [info exists et_vect_uintfloat_cvt_saved
($et_index
)] {
3197 verbose
"check_effective_target_vect_uintfloat_cvt:\
3198 using cached result
" 2
3200 set et_vect_uintfloat_cvt_saved
($et_index
) 0
3201 if { [istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
3202 ||
([istarget powerpc
*-*-*]
3203 && ![istarget powerpc
-*-linux
*paired
*])
3204 ||
[istarget aarch64
*-*-*]
3205 ||
[is
-effective
-target arm_neon
]
3206 ||
([istarget mips
*-*-*]
3207 && [et
-is
-effective
-target mips_msa
]) } {
3208 set et_vect_uintfloat_cvt_saved
($et_index
) 1
3212 verbose
"check_effective_target_vect_uintfloat_cvt:\
3213 returning $et_vect_uintfloat_cvt_saved
($et_index
)" 2
3214 return $et_vect_uintfloat_cvt_saved
($et_index
)
3218 #
Return 1 if the target supports signed float
->int conversion
3221 proc check_effective_target_vect_floatint_cvt
{ } {
3222 global et_vect_floatint_cvt_saved
3225 if [info exists et_vect_floatint_cvt_saved
($et_index
)] {
3226 verbose
"check_effective_target_vect_floatint_cvt:\
3227 using cached result
" 2
3229 set et_vect_floatint_cvt_saved
($et_index
) 0
3230 if { [istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
3231 ||
([istarget powerpc
*-*-*]
3232 && ![istarget powerpc
-*-linux
*paired
*])
3233 ||
[is
-effective
-target arm_neon
]
3234 ||
([istarget mips
*-*-*]
3235 && [et
-is
-effective
-target mips_msa
]) } {
3236 set et_vect_floatint_cvt_saved
($et_index
) 1
3240 verbose
"check_effective_target_vect_floatint_cvt:\
3241 returning $et_vect_floatint_cvt_saved
($et_index
)" 2
3242 return $et_vect_floatint_cvt_saved
($et_index
)
3245 #
Return 1 if the target supports unsigned float
->int conversion
3248 proc check_effective_target_vect_floatuint_cvt
{ } {
3249 global et_vect_floatuint_cvt_saved
3252 if [info exists et_vect_floatuint_cvt_saved
($et_index
)] {
3253 verbose
"check_effective_target_vect_floatuint_cvt:\
3254 using cached result
" 2
3256 set et_vect_floatuint_cvt_saved
($et_index
) 0
3257 if { ([istarget powerpc
*-*-*]
3258 && ![istarget powerpc
-*-linux
*paired
*])
3259 ||
[is
-effective
-target arm_neon
]
3260 ||
([istarget mips
*-*-*]
3261 && [et
-is
-effective
-target mips_msa
]) } {
3262 set et_vect_floatuint_cvt_saved
($et_index
) 1
3266 verbose
"check_effective_target_vect_floatuint_cvt:\
3267 returning $et_vect_floatuint_cvt_saved
($et_index
)" 2
3268 return $et_vect_floatuint_cvt_saved
($et_index
)
3271 #
Return 1 if peeling
for alignment might be profitable
on the target
3274 proc check_effective_target_vect_peeling_profitable
{ } {
3275 global et_vect_peeling_profitable_saved
3278 if [info exists et_vect_peeling_profitable_saved
($et_index
)] {
3279 verbose
"check_effective_target_vect_peeling_profitable: using cached result" 2
3281 set et_vect_peeling_profitable_saved
($et_index
) 1
3282 if { ([istarget s390
*-*-*]
3283 && [check_effective_target_s390_vx
])
3284 ||
[check_effective_target_vect_element_align_preferred
] } {
3285 set et_vect_peeling_profitable_saved
($et_index
) 0
3289 verbose
"check_effective_target_vect_peeling_profitable:\
3290 returning $et_vect_peeling_profitable_saved
($et_index
)" 2
3291 return $et_vect_peeling_profitable_saved
($et_index
)
3294 #
Return 1 if the target supports #pragma omp declare simd
, 0 otherwise.
3296 # This won
't change for different subtargets so cache the result.
3298 proc check_effective_target_vect_simd_clones { } {
3299 global et_vect_simd_clones_saved
3302 if [info exists et_vect_simd_clones_saved($et_index)] {
3303 verbose "check_effective_target_vect_simd_clones: using cached result" 2
3305 set et_vect_simd_clones_saved($et_index) 0
3306 # On i?86/x86_64 #pragma omp declare simd builds a sse2, avx,
3307 # avx2 and avx512f clone. Only the right clone for the
3308 # specified arch will be chosen, but still we need to at least
3309 # be able to assemble avx512f.
3310 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
3311 && [check_effective_target_avx512f]) } {
3312 set et_vect_simd_clones_saved($et_index) 1
3316 verbose "check_effective_target_vect_simd_clones:\
3317 returning $et_vect_simd_clones_saved($et_index)" 2
3318 return $et_vect_simd_clones_saved($et_index)
3321 # Return 1 if this is a AArch64 target supporting big endian
3322 proc check_effective_target_aarch64_big_endian { } {
3323 return [check_no_compiler_messages aarch64_big_endian assembly {
3324 #if !defined(__aarch64__) || !defined(__AARCH64EB__)
3325 #error !__aarch64__ || !__AARCH64EB__
3330 # Return 1 if this is a AArch64 target supporting little endian
3331 proc check_effective_target_aarch64_little_endian { } {
3332 if { ![istarget aarch64*-*-*] } {
3336 return [check_no_compiler_messages aarch64_little_endian assembly {
3337 #if !defined(__aarch64__) || defined(__AARCH64EB__)
3343 # Return 1 if this is an AArch64 target supporting SVE.
3344 proc check_effective_target_aarch64_sve { } {
3345 if { ![istarget aarch64*-*-*] } {
3348 return [check_no_compiler_messages aarch64_sve assembly {
3349 #if !defined (__ARM_FEATURE_SVE)
3355 # Return the size in bits of an SVE vector, or 0 if the size is variable.
3356 proc aarch64_sve_bits { } {
3357 return [check_cached_effective_target aarch64_sve_bits {
3360 set src dummy[pid].c
3361 set f [open $src "w"]
3362 puts $f "int bits = __ARM_FEATURE_SVE_BITS;"
3364 set output [${tool}_target_compile $src "" preprocess ""]
3367 regsub {.*bits = ([^;]*);.*} $output {\1} bits
3372 # Return 1 if this is a compiler supporting ARC atomic operations
3373 proc check_effective_target_arc_atomic { } {
3374 return [check_no_compiler_messages arc_atomic assembly {
3375 #if !defined(__ARC_ATOMIC__)
3381 # Return 1 if this is an arm target using 32-bit instructions
3382 proc check_effective_target_arm32 { } {
3383 if { ![istarget arm*-*-*] } {
3387 return [check_no_compiler_messages arm32 assembly {
3388 #if !defined(__arm__) || (defined(__thumb__) && !defined(__thumb2__))
3389 #error !__arm || __thumb__ && !__thumb2__
3394 # Return 1 if this is an arm target not using Thumb
3395 proc check_effective_target_arm_nothumb { } {
3396 if { ![istarget arm*-*-*] } {
3400 return [check_no_compiler_messages arm_nothumb assembly {
3401 #if !defined(__arm__) || (defined(__thumb__) || defined(__thumb2__))
3402 #error !__arm__ || __thumb || __thumb2__
3407 # Return 1 if this is a little-endian ARM target
3408 proc check_effective_target_arm_little_endian { } {
3409 if { ![istarget arm*-*-*] } {
3413 return [check_no_compiler_messages arm_little_endian assembly {
3414 #if !defined(__arm__) || !defined(__ARMEL__)
3415 #error !__arm__ || !__ARMEL__
3420 # Return 1 if this is an ARM target that only supports aligned vector accesses
3421 proc check_effective_target_arm_vect_no_misalign { } {
3422 if { ![istarget arm*-*-*] } {
3426 return [check_no_compiler_messages arm_vect_no_misalign assembly {
3427 #if !defined(__arm__) \
3428 || (defined(__ARM_FEATURE_UNALIGNED) \
3429 && defined(__ARMEL__))
3430 #error !__arm__ || (__ARMEL__ && __ARM_FEATURE_UNALIGNED)
3436 # Return 1 if this is an ARM target supporting -mfloat-abi=soft. Some
3437 # multilibs may be incompatible with this option.
3439 proc check_effective_target_arm_soft_ok { } {
3440 if { [check_effective_target_arm32] } {
3441 return [check_no_compiler_messages arm_soft_ok executable {
3442 int main() { return 0;}
3443 } "-mfloat-abi=soft"]
3449 # Return 1 if this is an ARM target supporting -mfpu=vfp
3450 # -mfloat-abi=softfp. Some multilibs may be incompatible with these
3453 proc check_effective_target_arm_vfp_ok { } {
3454 if { [check_effective_target_arm32] } {
3455 return [check_no_compiler_messages arm_vfp_ok object {
3457 } "-mfpu=vfp -mfloat-abi=softfp"]
3463 # Return 1 if this is an ARM target supporting -mfpu=vfp3
3464 # -mfloat-abi=softfp.
3466 proc check_effective_target_arm_vfp3_ok { } {
3467 if { [check_effective_target_arm32] } {
3468 return [check_no_compiler_messages arm_vfp3_ok object {
3470 } "-mfpu=vfp3 -mfloat-abi=softfp"]
3476 # Return 1 if this is an ARM target supporting -mfpu=fp-armv8
3477 # -mfloat-abi=softfp.
3478 proc check_effective_target_arm_v8_vfp_ok {} {
3479 if { [check_effective_target_arm32] } {
3480 return [check_no_compiler_messages arm_v8_vfp_ok object {
3483 __asm__ volatile ("vrinta.f32.f32 s0, s0");
3486 } "-mfpu=fp-armv8 -mfloat-abi=softfp"]
3492 # Return 1 if this is an ARM target supporting -mfpu=vfp
3493 # -mfloat-abi=hard. Some multilibs may be incompatible with these
3496 proc check_effective_target_arm_hard_vfp_ok { } {
3497 if { [check_effective_target_arm32]
3498 && ! [check-flags [list "" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=hard" }]] } {
3499 return [check_no_compiler_messages arm_hard_vfp_ok executable {
3500 int main() { return 0;}
3501 } "-mfpu=vfp -mfloat-abi=hard"]
3507 # Return 1 if this is an ARM target defining __ARM_FP. We may need
3508 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3509 # incompatible with these options. Also set et_arm_fp_flags to the
3510 # best options to add.
3512 proc check_effective_target_arm_fp_ok_nocache { } {
3513 global et_arm_fp_flags
3514 set et_arm_fp_flags ""
3515 if { [check_effective_target_arm32] } {
3516 foreach flags {"" "-mfloat-abi=softfp" "-mfloat-abi=hard"} {
3517 if { [check_no_compiler_messages_nocache arm_fp_ok object {
3519 #error __ARM_FP not defined
3522 set et_arm_fp_flags $flags
3531 proc check_effective_target_arm_fp_ok { } {
3532 return [check_cached_effective_target arm_fp_ok \
3533 check_effective_target_arm_fp_ok_nocache]
3536 # Add the options needed to define __ARM_FP. We need either
3537 # -mfloat-abi=softfp or -mfloat-abi=hard, but if one is already
3538 # specified by the multilib, use it.
3540 proc add_options_for_arm_fp { flags } {
3541 if { ! [check_effective_target_arm_fp_ok] } {
3544 global et_arm_fp_flags
3545 return "$flags $et_arm_fp_flags"
3548 # Return 1 if this is an ARM target that supports DSP multiply with
3549 # current multilib flags.
3551 proc check_effective_target_arm_dsp { } {
3552 return [check_no_compiler_messages arm_dsp assembly {
3553 #ifndef __ARM_FEATURE_DSP
3560 # Return 1 if this is an ARM target that supports unaligned word/halfword
3561 # load/store instructions.
3563 proc check_effective_target_arm_unaligned { } {
3564 return [check_no_compiler_messages arm_unaligned assembly {
3565 #ifndef __ARM_FEATURE_UNALIGNED
3566 #error no unaligned support
3572 # Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8
3573 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3574 # incompatible with these options. Also set et_arm_crypto_flags to the
3575 # best options to add.
3577 proc check_effective_target_arm_crypto_ok_nocache { } {
3578 global et_arm_crypto_flags
3579 set et_arm_crypto_flags ""
3580 if { [check_effective_target_arm_v8_neon_ok] } {
3581 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=crypto-neon-fp-armv8" "-mfpu=crypto-neon-fp-armv8 -mfloat-abi=softfp"} {
3582 if { [check_no_compiler_messages_nocache arm_crypto_ok object {
3583 #include "arm_neon.h"
3585 foo (uint8x16_t a, uint8x16_t b)
3587 return vaeseq_u8 (a, b);
3590 set et_arm_crypto_flags $flags
3599 # Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8
3601 proc check_effective_target_arm_crypto_ok { } {
3602 return [check_cached_effective_target arm_crypto_ok \
3603 check_effective_target_arm_crypto_ok_nocache]
3606 # Add options for crypto extensions.
3607 proc add_options_for_arm_crypto { flags } {
3608 if { ! [check_effective_target_arm_crypto_ok] } {
3611 global et_arm_crypto_flags
3612 return "$flags $et_arm_crypto_flags"
3615 # Add the options needed for NEON. We need either -mfloat-abi=softfp
3616 # or -mfloat-abi=hard, but if one is already specified by the
3617 # multilib, use it. Similarly, if a -mfpu option already enables
3618 # NEON, do not add -mfpu=neon.
3620 proc add_options_for_arm_neon { flags } {
3621 if { ! [check_effective_target_arm_neon_ok] } {
3624 global et_arm_neon_flags
3625 return "$flags $et_arm_neon_flags"
3628 proc add_options_for_arm_v8_vfp { flags } {
3629 if { ! [check_effective_target_arm_v8_vfp_ok] } {
3632 return "$flags -mfpu=fp-armv8 -mfloat-abi=softfp"
3635 proc add_options_for_arm_v8_neon { flags } {
3636 if { ! [check_effective_target_arm_v8_neon_ok] } {
3639 global et_arm_v8_neon_flags
3640 return "$flags $et_arm_v8_neon_flags -march=armv8-a"
3643 # Add the options needed for ARMv8.1 Adv.SIMD. Also adds the ARMv8 NEON
3644 # options for AArch64 and for ARM.
3646 proc add_options_for_arm_v8_1a_neon { flags } {
3647 if { ! [check_effective_target_arm_v8_1a_neon_ok] } {
3650 global et_arm_v8_1a_neon_flags
3651 return "$flags $et_arm_v8_1a_neon_flags"
3654 # Add the options needed for ARMv8.2 with the scalar FP16 extension.
3655 # Also adds the ARMv8 FP options for ARM and for AArch64.
3657 proc add_options_for_arm_v8_2a_fp16_scalar { flags } {
3658 if { ! [check_effective_target_arm_v8_2a_fp16_scalar_ok] } {
3661 global et_arm_v8_2a_fp16_scalar_flags
3662 return "$flags $et_arm_v8_2a_fp16_scalar_flags"
3665 # Add the options needed for ARMv8.2 with the FP16 extension. Also adds
3666 # the ARMv8 NEON options for ARM and for AArch64.
3668 proc add_options_for_arm_v8_2a_fp16_neon { flags } {
3669 if { ! [check_effective_target_arm_v8_2a_fp16_neon_ok] } {
3672 global et_arm_v8_2a_fp16_neon_flags
3673 return "$flags $et_arm_v8_2a_fp16_neon_flags"
3676 proc add_options_for_arm_crc { flags } {
3677 if { ! [check_effective_target_arm_crc_ok] } {
3680 global et_arm_crc_flags
3681 return "$flags $et_arm_crc_flags"
3684 # Add the options needed for NEON. We need either -mfloat-abi=softfp
3685 # or -mfloat-abi=hard, but if one is already specified by the
3686 # multilib, use it. Similarly, if a -mfpu option already enables
3687 # NEON, do not add -mfpu=neon.
3689 proc add_options_for_arm_neonv2 { flags } {
3690 if { ! [check_effective_target_arm_neonv2_ok] } {
3693 global et_arm_neonv2_flags
3694 return "$flags $et_arm_neonv2_flags"
3697 # Add the options needed for vfp3.
3698 proc add_options_for_arm_vfp3 { flags } {
3699 if { ! [check_effective_target_arm_vfp3_ok] } {
3702 return "$flags -mfpu=vfp3 -mfloat-abi=softfp"
3705 # Return 1 if this is an ARM target supporting -mfpu=neon
3706 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3707 # incompatible with these options. Also set et_arm_neon_flags to the
3708 # best options to add.
3710 proc check_effective_target_arm_neon_ok_nocache { } {
3711 global et_arm_neon_flags
3712 set et_arm_neon_flags ""
3713 if { [check_effective_target_arm32] } {
3714 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon" "-mfpu=neon -mfloat-abi=softfp" "-mfpu=neon -mfloat-abi=softfp -march=armv7-a" "-mfloat-abi=hard" "-mfpu=neon -mfloat-abi=hard" "-mfpu=neon -mfloat-abi=hard -march=armv7-a"} {
3715 if { [check_no_compiler_messages_nocache arm_neon_ok object {
3716 #include <arm_neon.h>
3718 #ifndef __ARM_NEON__
3721 /* Avoid the case where a test adds -mfpu=neon, but the toolchain is
3722 configured for -mcpu=arm926ej-s, for example. */
3723 #if __ARM_ARCH < 7 || __ARM_ARCH_PROFILE == 'M
'
3724 #error Architecture does not support NEON.
3727 set et_arm_neon_flags $flags
3736 proc check_effective_target_arm_neon_ok { } {
3737 return [check_cached_effective_target arm_neon_ok \
3738 check_effective_target_arm_neon_ok_nocache]
3741 # Return 1 if this is an ARM target supporting -mfpu=neon without any
3742 # -mfloat-abi= option. Useful in tests where add_options is not
3743 # supported (such as lto tests).
3745 proc check_effective_target_arm_neon_ok_no_float_abi_nocache { } {
3746 if { [check_effective_target_arm32] } {
3747 foreach flags {"-mfpu=neon"} {
3748 if { [check_no_compiler_messages_nocache arm_neon_ok_no_float_abi object {
3749 #include <arm_neon.h>
3751 #ifndef __ARM_NEON__
3754 /* Avoid the case where a test adds -mfpu=neon, but the toolchain is
3755 configured for -mcpu=arm926ej-s, for example. */
3756 #if __ARM_ARCH < 7 || __ARM_ARCH_PROFILE == 'M
'
3757 #error Architecture does not support NEON.
3768 proc check_effective_target_arm_neon_ok_no_float_abi { } {
3769 return [check_cached_effective_target arm_neon_ok_no_float_abi \
3770 check_effective_target_arm_neon_ok_no_float_abi_nocache]
3773 proc check_effective_target_arm_crc_ok_nocache { } {
3774 global et_arm_crc_flags
3775 set et_arm_crc_flags "-march=armv8-a+crc"
3776 return [check_no_compiler_messages_nocache arm_crc_ok object {
3777 #if !defined (__ARM_FEATURE_CRC32)
3780 } "$et_arm_crc_flags"]
3783 proc check_effective_target_arm_crc_ok { } {
3784 return [check_cached_effective_target arm_crc_ok \
3785 check_effective_target_arm_crc_ok_nocache]
3788 # Return 1 if this is an ARM target supporting -mfpu=neon-fp16
3789 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3790 # incompatible with these options. Also set et_arm_neon_fp16_flags to
3791 # the best options to add.
3793 proc check_effective_target_arm_neon_fp16_ok_nocache { } {
3794 global et_arm_neon_fp16_flags
3795 global et_arm_neon_flags
3796 set et_arm_neon_fp16_flags ""
3797 if { [check_effective_target_arm32]
3798 && [check_effective_target_arm_neon_ok] } {
3799 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
3800 "-mfpu=neon-fp16 -mfloat-abi=softfp"
3801 "-mfp16-format=ieee"
3802 "-mfloat-abi=softfp -mfp16-format=ieee"
3803 "-mfpu=neon-fp16 -mfp16-format=ieee"
3804 "-mfpu=neon-fp16 -mfloat-abi=softfp -mfp16-format=ieee"} {
3805 if { [check_no_compiler_messages_nocache arm_neon_fp16_ok object {
3806 #include "arm_neon.h"
3808 foo (float32x4_t arg)
3810 return vcvt_f16_f32 (arg);
3812 } "$et_arm_neon_flags $flags"] } {
3813 set et_arm_neon_fp16_flags [concat $et_arm_neon_flags $flags]
3822 proc check_effective_target_arm_neon_fp16_ok { } {
3823 return [check_cached_effective_target arm_neon_fp16_ok \
3824 check_effective_target_arm_neon_fp16_ok_nocache]
3827 proc check_effective_target_arm_neon_fp16_hw { } {
3828 if {! [check_effective_target_arm_neon_fp16_ok] } {
3831 global et_arm_neon_fp16_flags
3832 check_runtime_nocache arm_neon_fp16_hw {
3834 main (int argc, char **argv)
3836 asm ("vcvt.f32.f16 q1, d0");
3839 } $et_arm_neon_fp16_flags
3842 proc add_options_for_arm_neon_fp16 { flags } {
3843 if { ! [check_effective_target_arm_neon_fp16_ok] } {
3846 global et_arm_neon_fp16_flags
3847 return "$flags $et_arm_neon_fp16_flags"
3850 # Return 1 if this is an ARM target supporting the FP16 alternative
3851 # format. Some multilibs may be incompatible with the options needed. Also
3852 # set et_arm_neon_fp16_flags to the best options to add.
3854 proc check_effective_target_arm_fp16_alternative_ok_nocache { } {
3855 global et_arm_neon_fp16_flags
3856 set et_arm_neon_fp16_flags ""
3857 if { [check_effective_target_arm32] } {
3858 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
3859 "-mfpu=neon-fp16 -mfloat-abi=softfp"} {
3860 if { [check_no_compiler_messages_nocache \
3861 arm_fp16_alternative_ok object {
3862 #if !defined (__ARM_FP16_FORMAT_ALTERNATIVE)
3863 #error __ARM_FP16_FORMAT_ALTERNATIVE not defined
3865 } "$flags -mfp16-format=alternative"] } {
3866 set et_arm_neon_fp16_flags "$flags -mfp16-format=alternative"
3875 proc check_effective_target_arm_fp16_alternative_ok { } {
3876 return [check_cached_effective_target arm_fp16_alternative_ok \
3877 check_effective_target_arm_fp16_alternative_ok_nocache]
3880 # Return 1 if this is an ARM target supports specifying the FP16 none
3881 # format. Some multilibs may be incompatible with the options needed.
3883 proc check_effective_target_arm_fp16_none_ok_nocache { } {
3884 if { [check_effective_target_arm32] } {
3885 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
3886 "-mfpu=neon-fp16 -mfloat-abi=softfp"} {
3887 if { [check_no_compiler_messages_nocache \
3888 arm_fp16_none_ok object {
3889 #if defined (__ARM_FP16_FORMAT_ALTERNATIVE)
3890 #error __ARM_FP16_FORMAT_ALTERNATIVE defined
3892 #if defined (__ARM_FP16_FORMAT_IEEE)
3893 #error __ARM_FP16_FORMAT_IEEE defined
3895 } "$flags -mfp16-format=none"] } {
3904 proc check_effective_target_arm_fp16_none_ok { } {
3905 return [check_cached_effective_target arm_fp16_none_ok \
3906 check_effective_target_arm_fp16_none_ok_nocache]
3909 # Return 1 if this is an ARM target supporting -mfpu=neon-fp-armv8
3910 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3911 # incompatible with these options. Also set et_arm_v8_neon_flags to the
3912 # best options to add.
3914 proc check_effective_target_arm_v8_neon_ok_nocache { } {
3915 global et_arm_v8_neon_flags
3916 set et_arm_v8_neon_flags ""
3917 if { [check_effective_target_arm32] } {
3918 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp-armv8" "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
3919 if { [check_no_compiler_messages_nocache arm_v8_neon_ok object {
3921 #error not armv8 or later
3923 #include "arm_neon.h"
3927 __asm__ volatile ("vrintn.f32 q0, q0");
3929 } "$flags -march=armv8-a"] } {
3930 set et_arm_v8_neon_flags $flags
3939 proc check_effective_target_arm_v8_neon_ok { } {
3940 return [check_cached_effective_target arm_v8_neon_ok \
3941 check_effective_target_arm_v8_neon_ok_nocache]
3944 # Return 1 if this is an ARM target supporting -mfpu=neon-vfpv4
3945 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3946 # incompatible with these options. Also set et_arm_neonv2_flags to the
3947 # best options to add.
3949 proc check_effective_target_arm_neonv2_ok_nocache { } {
3950 global et_arm_neonv2_flags
3951 global et_arm_neon_flags
3952 set et_arm_neonv2_flags ""
3953 if { [check_effective_target_arm32]
3954 && [check_effective_target_arm_neon_ok] } {
3955 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-vfpv4" "-mfpu=neon-vfpv4 -mfloat-abi=softfp"} {
3956 if { [check_no_compiler_messages_nocache arm_neonv2_ok object {
3957 #include "arm_neon.h"
3959 foo (float32x2_t a, float32x2_t b, float32x2_t c)
3961 return vfma_f32 (a, b, c);
3963 } "$et_arm_neon_flags $flags"] } {
3964 set et_arm_neonv2_flags [concat $et_arm_neon_flags $flags]
3973 proc check_effective_target_arm_neonv2_ok { } {
3974 return [check_cached_effective_target arm_neonv2_ok \
3975 check_effective_target_arm_neonv2_ok_nocache]
3978 # Add the options needed for VFP FP16 support. We need either
3979 # -mfloat-abi=softfp or -mfloat-abi=hard. If one is already specified by
3980 # the multilib, use it.
3982 proc add_options_for_arm_fp16 { flags } {
3983 if { ! [check_effective_target_arm_fp16_ok] } {
3986 global et_arm_fp16_flags
3987 return "$flags $et_arm_fp16_flags"
3990 # Add the options needed to enable support for IEEE format
3991 # half-precision support. This is valid for ARM targets.
3993 proc add_options_for_arm_fp16_ieee { flags } {
3994 if { ! [check_effective_target_arm_fp16_ok] } {
3997 global et_arm_fp16_flags
3998 return "$flags $et_arm_fp16_flags -mfp16-format=ieee"
4001 # Add the options needed to enable support for ARM Alternative format
4002 # half-precision support. This is valid for ARM targets.
4004 proc add_options_for_arm_fp16_alternative { flags } {
4005 if { ! [check_effective_target_arm_fp16_ok] } {
4008 global et_arm_fp16_flags
4009 return "$flags $et_arm_fp16_flags -mfp16-format=alternative"
4012 # Return 1 if this is an ARM target that can support a VFP fp16 variant.
4013 # Skip multilibs that are incompatible with these options and set
4014 # et_arm_fp16_flags to the best options to add. This test is valid for
4017 proc check_effective_target_arm_fp16_ok_nocache { } {
4018 global et_arm_fp16_flags
4019 set et_arm_fp16_flags ""
4020 if { ! [check_effective_target_arm32] } {
4024 [list "" { *-*-* } { "-mfpu=*" } \
4025 { "-mfpu=*fp16*" "-mfpu=*fpv[4-9]*" \
4026 "-mfpu=*fpv[1-9][0-9]*" "-mfpu=*fp-armv8*" } ]] {
4027 # Multilib flags would override -mfpu.
4030 if [check-flags [list "" { *-*-* } { "-mfloat-abi=soft" } { "" } ]] {
4031 # Must generate floating-point instructions.
4034 if [check_effective_target_arm_hf_eabi] {
4035 # Use existing float-abi and force an fpu which supports fp16
4036 set et_arm_fp16_flags "-mfpu=vfpv4"
4039 if [check-flags [list "" { *-*-* } { "-mfpu=*" } { "" } ]] {
4040 # The existing -mfpu value is OK; use it, but add softfp.
4041 set et_arm_fp16_flags "-mfloat-abi=softfp"
4044 # Add -mfpu for a VFP fp16 variant since there is no preprocessor
4045 # macro to check for this support.
4046 set flags "-mfpu=vfpv4 -mfloat-abi=softfp"
4047 if { [check_no_compiler_messages_nocache arm_fp16_ok assembly {
4050 set et_arm_fp16_flags "$flags"
4057 proc check_effective_target_arm_fp16_ok { } {
4058 return [check_cached_effective_target arm_fp16_ok \
4059 check_effective_target_arm_fp16_ok_nocache]
4062 # Return 1 if the target supports executing VFP FP16 instructions, 0
4063 # otherwise. This test is valid for ARM only.
4065 proc check_effective_target_arm_fp16_hw { } {
4066 if {! [check_effective_target_arm_fp16_ok] } {
4069 global et_arm_fp16_flags
4070 check_runtime_nocache arm_fp16_hw {
4072 main (int argc, char **argv)
4076 asm ("vcvtb.f32.f16 %0, %1"
4077 : "=w" (r) : "w" (a)
4078 : /* No clobbers. */);
4079 return (r == 1.0) ? 0 : 1;
4081 } "$et_arm_fp16_flags -mfp16-format=ieee"
4084 # Creates a series of routines that return 1 if the given architecture
4085 # can be selected and a routine to give the flags to select that architecture
4086 # Note: Extra flags may be added to disable options from newer compilers
4087 # (Thumb in particular - but others may be added in the future).
4088 # Warning: Do not use check_effective_target_arm_arch_*_ok for architecture
4089 # extension (eg. ARMv8.1-A) since there is no macro defined for them. See
4090 # how only __ARM_ARCH_8A__ is checked for ARMv8.1-A.
4091 # Usage: /* { dg-require-effective-target arm_arch_v5_ok } */
4092 # /* { dg-add-options arm_arch_v5 } */
4093 # /* { dg-require-effective-target arm_arch_v5_multilib } */
4094 foreach { armfunc armflag armdefs } {
4095 v4 "-march=armv4 -marm" __ARM_ARCH_4__
4096 v4t "-march=armv4t" __ARM_ARCH_4T__
4097 v5 "-march=armv5 -marm" __ARM_ARCH_5__
4098 v5t "-march=armv5t" __ARM_ARCH_5T__
4099 v5te "-march=armv5te" __ARM_ARCH_5TE__
4100 v6 "-march=armv6" __ARM_ARCH_6__
4101 v6k "-march=armv6k" __ARM_ARCH_6K__
4102 v6t2 "-march=armv6t2" __ARM_ARCH_6T2__
4103 v6z "-march=armv6z" __ARM_ARCH_6Z__
4104 v6m "-march=armv6-m -mthumb -mfloat-abi=soft" __ARM_ARCH_6M__
4105 v7a "-march=armv7-a" __ARM_ARCH_7A__
4106 v7r "-march=armv7-r" __ARM_ARCH_7R__
4107 v7m "-march=armv7-m -mthumb" __ARM_ARCH_7M__
4108 v7em "-march=armv7e-m -mthumb" __ARM_ARCH_7EM__
4109 v7ve "-march=armv7ve -marm"
4110 "__ARM_ARCH_7A__ && __ARM_FEATURE_IDIV"
4111 v8a "-march=armv8-a" __ARM_ARCH_8A__
4112 v8_1a "-march=armv8.1-a" __ARM_ARCH_8A__
4113 v8_2a "-march=armv8.2-a" __ARM_ARCH_8A__
4114 v8m_base "-march=armv8-m.base -mthumb -mfloat-abi=soft"
4115 __ARM_ARCH_8M_BASE__
4116 v8m_main "-march=armv8-m.main -mthumb" __ARM_ARCH_8M_MAIN__
4117 v8r "-march=armv8-r" __ARM_ARCH_8R__ } {
4118 eval [string map [list FUNC $armfunc FLAG $armflag DEFS $armdefs ] {
4119 proc check_effective_target_arm_arch_FUNC_ok { } {
4120 if { [ string match "*-marm*" "FLAG" ] &&
4121 ![check_effective_target_arm_arm_ok] } {
4124 return [check_no_compiler_messages arm_arch_FUNC_ok assembly {
4136 proc add_options_for_arm_arch_FUNC { flags } {
4137 return "$flags FLAG"
4140 proc check_effective_target_arm_arch_FUNC_multilib { } {
4141 return [check_runtime arm_arch_FUNC_multilib {
4147 } [add_options_for_arm_arch_FUNC ""]]
4152 # Return 1 if GCC was configured with --with-mode=
4153 proc check_effective_target_default_mode { } {
4155 return [check_configured_with "with-mode="]
4158 # Return 1 if this is an ARM target where -marm causes ARM to be
4161 proc check_effective_target_arm_arm_ok { } {
4162 return [check_no_compiler_messages arm_arm_ok assembly {
4163 #if !defined (__arm__) || defined (__thumb__) || defined (__thumb2__)
4164 #error !__arm__ || __thumb__ || __thumb2__
4170 # Return 1 is this is an ARM target where -mthumb causes Thumb-1 to be
4173 proc check_effective_target_arm_thumb1_ok { } {
4174 return [check_no_compiler_messages arm_thumb1_ok assembly {
4175 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
4176 #error !__arm__ || !__thumb__ || __thumb2__
4178 int foo (int i) { return i; }
4182 # Return 1 is this is an ARM target where -mthumb causes Thumb-2 to be
4185 proc check_effective_target_arm_thumb2_ok { } {
4186 return [check_no_compiler_messages arm_thumb2_ok assembly {
4187 #if !defined(__thumb2__)
4190 int foo (int i) { return i; }
4194 # Return 1 if this is an ARM target where Thumb-1 is used without options
4195 # added by the test.
4197 proc check_effective_target_arm_thumb1 { } {
4198 return [check_no_compiler_messages arm_thumb1 assembly {
4199 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
4200 #error !__arm__ || !__thumb__ || __thumb2__
4206 # Return 1 if this is an ARM target where Thumb-2 is used without options
4207 # added by the test.
4209 proc check_effective_target_arm_thumb2 { } {
4210 return [check_no_compiler_messages arm_thumb2 assembly {
4211 #if !defined(__thumb2__)
4218 # Return 1 if this is an ARM target where conditional execution is available.
4220 proc check_effective_target_arm_cond_exec { } {
4221 return [check_no_compiler_messages arm_cond_exec assembly {
4222 #if defined(__arm__) && defined(__thumb__) && !defined(__thumb2__)
4229 # Return 1 if this is an ARM cortex-M profile cpu
4231 proc check_effective_target_arm_cortex_m { } {
4232 if { ![istarget arm*-*-*] } {
4235 return [check_no_compiler_messages arm_cortex_m assembly {
4236 #if defined(__ARM_ARCH_ISA_ARM)
4237 #error __ARM_ARCH_ISA_ARM is defined
4243 # Return 1 if this is an ARM target where -mthumb causes Thumb-1 to be
4244 # used and MOVT/MOVW instructions to be available.
4246 proc check_effective_target_arm_thumb1_movt_ok {} {
4247 if [check_effective_target_arm_thumb1_ok] {
4248 return [check_no_compiler_messages arm_movt object {
4252 asm ("movt r0, #42");
4260 # Return 1 if this is an ARM target where -mthumb causes Thumb-1 to be
4261 # used and CBZ and CBNZ instructions are available.
4263 proc check_effective_target_arm_thumb1_cbz_ok {} {
4264 if [check_effective_target_arm_thumb1_ok] {
4265 return [check_no_compiler_messages arm_movt object {
4269 asm ("cbz r0, 2f\n2:");
4277 # Return 1 if this is an ARM target where ARMv8-M Security Extensions is
4280 proc check_effective_target_arm_cmse_ok {} {
4281 return [check_no_compiler_messages arm_cmse object {
4290 # Return 1 if this compilation turns on string_ops_prefer_neon on.
4292 proc check_effective_target_arm_tune_string_ops_prefer_neon { } {
4293 return [check_no_messages_and_pattern arm_tune_string_ops_prefer_neon "@string_ops_prefer_neon:\t1" assembly {
4294 int foo (void) { return 0; }
4295 } "-O2 -mprint-tune-info" ]
4298 # Return 1 if the target supports executing NEON instructions, 0
4299 # otherwise. Cache the result.
4301 proc check_effective_target_arm_neon_hw { } {
4302 return [check_runtime arm_neon_hw_available {
4306 long long a = 0, b = 1;
4307 asm ("vorr %P0, %P1, %P2"
4309 : "0" (a), "w" (b));
4312 } [add_options_for_arm_neon ""]]
4315 # Return true if this is an AArch64 target that can run SVE code.
4317 proc check_effective_target_aarch64_sve_hw { } {
4318 if { ![istarget aarch64*-*-*] } {
4321 return [check_runtime aarch64_sve_hw_available {
4325 asm volatile ("ptrue p0.b");
4331 # Return true if this is an AArch64 target that can run SVE code and
4332 # if its SVE vectors have exactly BITS bits.
4334 proc aarch64_sve_hw_bits { bits } {
4335 if { ![check_effective_target_aarch64_sve_hw] } {
4338 return [check_runtime aarch64_sve${bits}_hw [subst {
4343 asm volatile ("cntd %0" : "=r" (res));
4344 if (res * 64 != $bits)
4351 # Return true if this is an AArch64 target that can run SVE code and
4352 # if its SVE vectors have exactly 256 bits.
4354 proc check_effective_target_aarch64_sve256_hw { } {
4355 return [aarch64_sve_hw_bits 256]
4358 proc check_effective_target_arm_neonv2_hw { } {
4359 return [check_runtime arm_neon_hwv2_available {
4360 #include "arm_neon.h"
4364 float32x2_t a, b, c;
4365 asm ("vfma.f32 %P0, %P1, %P2"
4367 : "w" (b), "w" (c));
4370 } [add_options_for_arm_neonv2 ""]]
4373 # Return 1 if the target supports the ARMv8.1 Adv.SIMD extension, 0
4374 # otherwise. The test is valid for AArch64 and ARM. Record the command
4375 # line options needed.
4377 proc check_effective_target_arm_v8_1a_neon_ok_nocache { } {
4378 global et_arm_v8_1a_neon_flags
4379 set et_arm_v8_1a_neon_flags ""
4381 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
4385 # Iterate through sets of options to find the compiler flags that
4386 # need to be added to the -march option. Start with the empty set
4387 # since AArch64 only needs the -march setting.
4388 foreach flags {"" "-mfpu=neon-fp-armv8" "-mfloat-abi=softfp" \
4389 "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
4390 foreach arches { "-march=armv8-a+rdma" "-march=armv8.1-a" } {
4391 if { [check_no_compiler_messages_nocache arm_v8_1a_neon_ok object {
4392 #if !defined (__ARM_FEATURE_QRDMX)
4393 #error "__ARM_FEATURE_QRDMX not defined"
4395 } "$flags $arches"] } {
4396 set et_arm_v8_1a_neon_flags "$flags $arches"
4405 proc check_effective_target_arm_v8_1a_neon_ok { } {
4406 return [check_cached_effective_target arm_v8_1a_neon_ok \
4407 check_effective_target_arm_v8_1a_neon_ok_nocache]
4410 # Return 1 if the target supports ARMv8.2 scalar FP16 arithmetic
4411 # instructions, 0 otherwise. The test is valid for ARM and for AArch64.
4412 # Record the command line options needed.
4414 proc check_effective_target_arm_v8_2a_fp16_scalar_ok_nocache { } {
4415 global et_arm_v8_2a_fp16_scalar_flags
4416 set et_arm_v8_2a_fp16_scalar_flags ""
4418 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
4422 # Iterate through sets of options to find the compiler flags that
4423 # need to be added to the -march option.
4424 foreach flags {"" "-mfpu=fp-armv8" "-mfloat-abi=softfp" \
4425 "-mfpu=fp-armv8 -mfloat-abi=softfp"} {
4426 if { [check_no_compiler_messages_nocache \
4427 arm_v8_2a_fp16_scalar_ok object {
4428 #if !defined (__ARM_FEATURE_FP16_SCALAR_ARITHMETIC)
4429 #error "__ARM_FEATURE_FP16_SCALAR_ARITHMETIC not defined"
4431 } "$flags -march=armv8.2-a+fp16"] } {
4432 set et_arm_v8_2a_fp16_scalar_flags "$flags -march=armv8.2-a+fp16"
4440 proc check_effective_target_arm_v8_2a_fp16_scalar_ok { } {
4441 return [check_cached_effective_target arm_v8_2a_fp16_scalar_ok \
4442 check_effective_target_arm_v8_2a_fp16_scalar_ok_nocache]
4445 # Return 1 if the target supports ARMv8.2 Adv.SIMD FP16 arithmetic
4446 # instructions, 0 otherwise. The test is valid for ARM and for AArch64.
4447 # Record the command line options needed.
4449 proc check_effective_target_arm_v8_2a_fp16_neon_ok_nocache { } {
4450 global et_arm_v8_2a_fp16_neon_flags
4451 set et_arm_v8_2a_fp16_neon_flags ""
4453 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
4457 # Iterate through sets of options to find the compiler flags that
4458 # need to be added to the -march option.
4459 foreach flags {"" "-mfpu=neon-fp-armv8" "-mfloat-abi=softfp" \
4460 "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
4461 if { [check_no_compiler_messages_nocache \
4462 arm_v8_2a_fp16_neon_ok object {
4463 #if !defined (__ARM_FEATURE_FP16_VECTOR_ARITHMETIC)
4464 #error "__ARM_FEATURE_FP16_VECTOR_ARITHMETIC not defined"
4466 } "$flags -march=armv8.2-a+fp16"] } {
4467 set et_arm_v8_2a_fp16_neon_flags "$flags -march=armv8.2-a+fp16"
4475 proc check_effective_target_arm_v8_2a_fp16_neon_ok { } {
4476 return [check_cached_effective_target arm_v8_2a_fp16_neon_ok \
4477 check_effective_target_arm_v8_2a_fp16_neon_ok_nocache]
4480 # Return 1 if the target supports ARMv8.2 Adv.SIMD Dot Product
4481 # instructions, 0 otherwise. The test is valid for ARM and for AArch64.
4482 # Record the command line options needed.
4484 proc check_effective_target_arm_v8_2a_dotprod_neon_ok_nocache { } {
4485 global et_arm_v8_2a_dotprod_neon_flags
4486 set et_arm_v8_2a_dotprod_neon_flags ""
4488 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
4492 # Iterate through sets of options to find the compiler flags that
4493 # need to be added to the -march option.
4494 foreach flags {"" "-mfloat-abi=softfp -mfpu=neon-fp-armv8" "-mfloat-abi=hard -mfpu=neon-fp-armv8"} {
4495 if { [check_no_compiler_messages_nocache \
4496 arm_v8_2a_dotprod_neon_ok object {
4497 #if !defined (__ARM_FEATURE_DOTPROD)
4498 #error "__ARM_FEATURE_DOTPROD not defined"
4500 } "$flags -march=armv8.2-a+dotprod"] } {
4501 set et_arm_v8_2a_dotprod_neon_flags "$flags -march=armv8.2-a+dotprod"
4509 proc check_effective_target_arm_v8_2a_dotprod_neon_ok { } {
4510 return [check_cached_effective_target arm_v8_2a_dotprod_neon_ok \
4511 check_effective_target_arm_v8_2a_dotprod_neon_ok_nocache]
4514 proc add_options_for_arm_v8_2a_dotprod_neon { flags } {
4515 if { ! [check_effective_target_arm_v8_2a_dotprod_neon_ok] } {
4518 global et_arm_v8_2a_dotprod_neon_flags
4519 return "$flags $et_arm_v8_2a_dotprod_neon_flags"
4522 # Return 1 if the target supports FP16 VFMAL and VFMSL
4523 # instructions, 0 otherwise.
4524 # Record the command line options needed.
4526 proc check_effective_target_arm_fp16fml_neon_ok_nocache { } {
4527 global et_arm_fp16fml_neon_flags
4528 set et_arm_fp16fml_neon_flags ""
4530 if { ![istarget arm*-*-*] } {
4534 # Iterate through sets of options to find the compiler flags that
4535 # need to be added to the -march option.
4536 foreach flags {"" "-mfloat-abi=softfp -mfpu=neon-fp-armv8" "-mfloat-abi=hard -mfpu=neon-fp-armv8"} {
4537 if { [check_no_compiler_messages_nocache \
4538 arm_fp16fml_neon_ok assembly {
4539 #include <arm_neon.h>
4541 foo (float32x2_t r, float16x4_t a, float16x4_t b)
4543 return vfmlal_high_u32 (r, a, b);
4545 } "$flags -march=armv8.2-a+fp16fml"] } {
4546 set et_arm_fp16fml_neon_flags "$flags -march=armv8.2-a+fp16fml"
4554 proc check_effective_target_arm_fp16fml_neon_ok { } {
4555 return [check_cached_effective_target arm_fp16fml_neon_ok \
4556 check_effective_target_arm_fp16fml_neon_ok_nocache]
4559 proc add_options_for_arm_fp16fml_neon { flags } {
4560 if { ! [check_effective_target_arm_fp16fml_neon_ok] } {
4563 global et_arm_fp16fml_neon_flags
4564 return "$flags $et_arm_fp16fml_neon_flags"
4567 # Return 1 if the target supports executing ARMv8 NEON instructions, 0
4570 proc check_effective_target_arm_v8_neon_hw { } {
4571 return [check_runtime arm_v8_neon_hw_available {
4572 #include "arm_neon.h"
4576 float32x2_t a = { 1.0f, 2.0f };
4577 #ifdef __ARM_ARCH_ISA_A64
4578 asm ("frinta %0.2s, %1.2s"
4582 asm ("vrinta.f32 %P0, %P1"
4586 return a[0] == 2.0f;
4588 } [add_options_for_arm_v8_neon ""]]
4591 # Return 1 if the target supports executing the ARMv8.1 Adv.SIMD extension, 0
4592 # otherwise. The test is valid for AArch64 and ARM.
4594 proc check_effective_target_arm_v8_1a_neon_hw { } {
4595 if { ![check_effective_target_arm_v8_1a_neon_ok] } {
4598 return [check_runtime arm_v8_1a_neon_hw_available {
4602 #ifdef __ARM_ARCH_ISA_A64
4603 __Int32x2_t a = {0, 1};
4604 __Int32x2_t b = {0, 2};
4607 asm ("sqrdmlah %0.2s, %1.2s, %2.2s"
4610 : /* No clobbers. */);
4614 __simd64_int32_t a = {0, 1};
4615 __simd64_int32_t b = {0, 2};
4616 __simd64_int32_t result;
4618 asm ("vqrdmlah.s32 %P0, %P1, %P2"
4621 : /* No clobbers. */);
4626 } [add_options_for_arm_v8_1a_neon ""]]
4629 # Return 1 if the target supports executing floating point instructions from
4630 # ARMv8.2 with the FP16 extension, 0 otherwise. The test is valid for ARM and
4633 proc check_effective_target_arm_v8_2a_fp16_scalar_hw { } {
4634 if { ![check_effective_target_arm_v8_2a_fp16_scalar_ok] } {
4637 return [check_runtime arm_v8_2a_fp16_scalar_hw_available {
4644 #ifdef __ARM_ARCH_ISA_A64
4646 asm ("fabs %h0, %h1"
4649 : /* No clobbers. */);
4653 asm ("vabs.f16 %0, %1"
4656 : /* No clobbers. */);
4660 return (result == 1.0) ? 0 : 1;
4662 } [add_options_for_arm_v8_2a_fp16_scalar ""]]
4665 # Return 1 if the target supports executing Adv.SIMD instructions from ARMv8.2
4666 # with the FP16 extension, 0 otherwise. The test is valid for ARM and for
4669 proc check_effective_target_arm_v8_2a_fp16_neon_hw { } {
4670 if { ![check_effective_target_arm_v8_2a_fp16_neon_ok] } {
4673 return [check_runtime arm_v8_2a_fp16_neon_hw_available {
4677 #ifdef __ARM_ARCH_ISA_A64
4679 __Float16x4_t a = {1.0, -1.0, 1.0, -1.0};
4680 __Float16x4_t result;
4682 asm ("fabs %0.4h, %1.4h"
4685 : /* No clobbers. */);
4689 __simd64_float16_t a = {1.0, -1.0, 1.0, -1.0};
4690 __simd64_float16_t result;
4692 asm ("vabs.f16 %P0, %P1"
4695 : /* No clobbers. */);
4699 return (result[0] == 1.0) ? 0 : 1;
4701 } [add_options_for_arm_v8_2a_fp16_neon ""]]
4704 # Return 1 if the target supports executing AdvSIMD instructions from ARMv8.2
4705 # with the Dot Product extension, 0 otherwise. The test is valid for ARM and for
4708 proc check_effective_target_arm_v8_2a_dotprod_neon_hw { } {
4709 if { ![check_effective_target_arm_v8_2a_dotprod_neon_ok] } {
4712 return [check_runtime arm_v8_2a_dotprod_neon_hw_available {
4713 #include "arm_neon.h"
4718 uint32x2_t results = {0,0};
4719 uint8x8_t a = {1,1,1,1,2,2,2,2};
4720 uint8x8_t b = {2,2,2,2,3,3,3,3};
4722 #ifdef __ARM_ARCH_ISA_A64
4723 asm ("udot %0.2s, %1.8b, %2.8b"
4726 : /* No clobbers. */);
4729 asm ("vudot.u8 %P0, %P1, %P2"
4732 : /* No clobbers. */);
4735 return (results[0] == 8 && results[1] == 24) ? 1 : 0;
4737 } [add_options_for_arm_v8_2a_dotprod_neon ""]]
4740 # Return 1 if this is a ARM target with NEON enabled.
4742 proc check_effective_target_arm_neon { } {
4743 if { [check_effective_target_arm32] } {
4744 return [check_no_compiler_messages arm_neon object {
4745 #ifndef __ARM_NEON__
4756 proc check_effective_target_arm_neonv2 { } {
4757 if { [check_effective_target_arm32] } {
4758 return [check_no_compiler_messages arm_neon object {
4759 #ifndef __ARM_NEON__
4762 #ifndef __ARM_FEATURE_FMA
4774 # Return 1 if this is an ARM target with load acquire and store release
4775 # instructions for 8-, 16- and 32-bit types.
4777 proc check_effective_target_arm_acq_rel { } {
4778 return [check_no_compiler_messages arm_acq_rel object {
4780 load_acquire_store_release (void)
4782 asm ("lda r0, [r1]\n\t"
4788 : : : "r0", "memory");
4793 # Add the options needed for MIPS Paired-Single.
4795 proc add_options_for_mpaired_single { flags } {
4796 if { ! [check_effective_target_mpaired_single] } {
4799 return "$flags -mpaired-single"
4802 # Add the options needed for MIPS SIMD Architecture.
4804 proc add_options_for_mips_msa { flags } {
4805 if { ! [check_effective_target_mips_msa] } {
4808 return "$flags -mmsa"
4811 # Return 1 if this a Loongson-2E or -2F target using an ABI that supports
4812 # the Loongson vector modes.
4814 proc check_effective_target_mips_loongson { } {
4815 return [check_no_compiler_messages loongson assembly {
4816 #if !defined(__mips_loongson_vector_rev)
4817 #error !__mips_loongson_vector_rev
4822 # Return 1 if this is a MIPS target that supports the legacy NAN.
4824 proc check_effective_target_mips_nanlegacy { } {
4825 return [check_no_compiler_messages nanlegacy assembly {
4827 int main () { return 0; }
4831 # Return 1 if an MSA program can be compiled to object
4833 proc check_effective_target_mips_msa { } {
4834 if ![check_effective_target_nomips16] {
4837 return [check_no_compiler_messages msa object {
4838 #if !defined(__mips_msa)
4839 #error "MSA NOT AVAIL"
4841 #if !(((__mips == 64) || (__mips == 32)) && (__mips_isa_rev >= 2))
4842 #error "MSA NOT AVAIL FOR ISA REV < 2"
4844 #if !defined(__mips_hard_float)
4845 #error "MSA HARD_FLOAT REQUIRED"
4847 #if __mips_fpr != 64
4848 #error "MSA 64-bit FPR REQUIRED"
4854 v8i16 v = __builtin_msa_ldi_h (1);
4862 # Return 1 if this is an ARM target that adheres to the ABI for the ARM
4865 proc check_effective_target_arm_eabi { } {
4866 return [check_no_compiler_messages arm_eabi object {
4867 #ifndef __ARM_EABI__
4875 # Return 1 if this is an ARM target that adheres to the hard-float variant of
4876 # the ABI for the ARM Architecture (e.g. -mfloat-abi=hard).
4878 proc check_effective_target_arm_hf_eabi { } {
4879 return [check_no_compiler_messages arm_hf_eabi object {
4880 #if !defined(__ARM_EABI__) || !defined(__ARM_PCS_VFP)
4881 #error not hard-float EABI
4888 # Return 1 if this is an ARM target that uses the soft float ABI
4889 # with no floating-point instructions at all (e.g. -mfloat-abi=soft).
4891 proc check_effective_target_arm_softfloat { } {
4892 return [check_no_compiler_messages arm_softfloat object {
4893 #if !defined(__SOFTFP__)
4894 #error not soft-float EABI
4901 # Return 1 if this is an ARM target supporting -mcpu=iwmmxt.
4902 # Some multilibs may be incompatible with this option.
4904 proc check_effective_target_arm_iwmmxt_ok { } {
4905 if { [check_effective_target_arm32] } {
4906 return [check_no_compiler_messages arm_iwmmxt_ok object {
4914 # Return true if LDRD/STRD instructions are prefered over LDM/STM instructions
4915 # for an ARM target.
4916 proc check_effective_target_arm_prefer_ldrd_strd { } {
4917 if { ![check_effective_target_arm32] } {
4921 return [check_no_messages_and_pattern arm_prefer_ldrd_strd "strd\tr" assembly {
4922 void foo (void) { __asm__ ("" ::: "r4", "r5"); }
4926 # Return 1 if this is a PowerPC target supporting -meabi.
4928 proc check_effective_target_powerpc_eabi_ok { } {
4929 if { [istarget powerpc*-*-*] } {
4930 return [check_no_compiler_messages powerpc_eabi_ok object {
4938 # Return 1 if this is a PowerPC target with floating-point registers.
4940 proc check_effective_target_powerpc_fprs { } {
4941 if { [istarget powerpc*-*-*]
4942 || [istarget rs6000-*-*] } {
4943 return [check_no_compiler_messages powerpc_fprs object {
4955 # Return 1 if this is a PowerPC target with hardware double-precision
4958 proc check_effective_target_powerpc_hard_double { } {
4959 if { [istarget powerpc*-*-*]
4960 || [istarget rs6000-*-*] } {
4961 return [check_no_compiler_messages powerpc_hard_double object {
4973 # Return 1 if this is a PowerPC target supporting -maltivec.
4975 proc check_effective_target_powerpc_altivec_ok { } {
4976 if { ([istarget powerpc*-*-*]
4977 && ![istarget powerpc-*-linux*paired*])
4978 || [istarget rs6000-*-*] } {
4979 # AltiVec is not supported on AIX before 5.3.
4980 if { [istarget powerpc*-*-aix4*]
4981 || [istarget powerpc*-*-aix5.1*]
4982 || [istarget powerpc*-*-aix5.2*] } {
4985 return [check_no_compiler_messages powerpc_altivec_ok object {
4993 # Return 1 if this is a PowerPC target supporting -mpower8-vector
4995 proc check_effective_target_powerpc_p8vector_ok { } {
4996 if { ([istarget powerpc*-*-*]
4997 && ![istarget powerpc-*-linux*paired*])
4998 || [istarget rs6000-*-*] } {
4999 # AltiVec is not supported on AIX before 5.3.
5000 if { [istarget powerpc*-*-aix4*]
5001 || [istarget powerpc*-*-aix5.1*]
5002 || [istarget powerpc*-*-aix5.2*] } {
5005 return [check_no_compiler_messages powerpc_p8vector_ok object {
5008 asm volatile ("xxlorc vs0,vs0,vs0");
5010 asm volatile ("xxlorc 0,0,0");
5014 } "-mpower8-vector"]
5020 # Return 1 if this is a PowerPC target supporting -mpower9-vector
5022 proc check_effective_target_powerpc_p9vector_ok { } {
5023 if { ([istarget powerpc*-*-*]
5024 && ![istarget powerpc-*-linux*paired*])
5025 || [istarget rs6000-*-*] } {
5026 # AltiVec is not supported on AIX before 5.3.
5027 if { [istarget powerpc*-*-aix4*]
5028 || [istarget powerpc*-*-aix5.1*]
5029 || [istarget powerpc*-*-aix5.2*] } {
5032 return [check_no_compiler_messages powerpc_p9vector_ok object {
5035 vector double v = (vector double) { 0.0, 0.0 };
5036 asm ("xsxexpdp %0,%1" : "+r" (e) : "wa" (v));
5039 } "-mpower9-vector"]
5045 # Return 1 if this is a PowerPC target supporting -mmodulo
5047 proc check_effective_target_powerpc_p9modulo_ok { } {
5048 if { ([istarget powerpc*-*-*]
5049 && ![istarget powerpc-*-linux*paired*])
5050 || [istarget rs6000-*-*] } {
5051 # AltiVec is not supported on AIX before 5.3.
5052 if { [istarget powerpc*-*-aix4*]
5053 || [istarget powerpc*-*-aix5.1*]
5054 || [istarget powerpc*-*-aix5.2*] } {
5057 return [check_no_compiler_messages powerpc_p9modulo_ok object {
5059 int i = 5, j = 3, r = -1;
5060 asm ("modsw %0,%1,%2" : "+r" (r) : "r" (i), "r" (j));
5069 # Return 1 if this is a PowerPC target supporting -mfloat128 via either
5070 # software emulation on power7/power8 systems or hardware support on power9.
5072 proc check_effective_target_powerpc_float128_sw_ok { } {
5073 if { ([istarget powerpc*-*-*]
5074 && ![istarget powerpc-*-linux*paired*])
5075 || [istarget rs6000-*-*] } {
5076 # AltiVec is not supported on AIX before 5.3.
5077 if { [istarget powerpc*-*-aix4*]
5078 || [istarget powerpc*-*-aix5.1*]
5079 || [istarget powerpc*-*-aix5.2*] } {
5082 return [check_no_compiler_messages powerpc_float128_sw_ok object {
5083 volatile __float128 x = 1.0q;
5084 volatile __float128 y = 2.0q;
5086 __float128 z = x + y;
5089 } "-mfloat128 -mvsx"]
5095 # Return 1 if this is a PowerPC target supporting -mfloat128 via hardware
5096 # support on power9.
5098 proc check_effective_target_powerpc_float128_hw_ok { } {
5099 if { ([istarget powerpc*-*-*]
5100 && ![istarget powerpc-*-linux*paired*])
5101 || [istarget rs6000-*-*] } {
5102 # AltiVec is not supported on AIX before 5.3.
5103 if { [istarget powerpc*-*-aix4*]
5104 || [istarget powerpc*-*-aix5.1*]
5105 || [istarget powerpc*-*-aix5.2*] } {
5108 return [check_no_compiler_messages powerpc_float128_hw_ok object {
5109 volatile __float128 x = 1.0q;
5110 volatile __float128 y = 2.0q;
5113 __asm__ ("xsaddqp %0,%1,%2" : "=v" (z) : "v" (x), "v" (y));
5116 } "-mfloat128-hardware"]
5122 # Return 1 if this is a PowerPC target supporting -mvsx
5124 proc check_effective_target_powerpc_vsx_ok { } {
5125 if { ([istarget powerpc*-*-*]
5126 && ![istarget powerpc-*-linux*paired*])
5127 || [istarget rs6000-*-*] } {
5128 # VSX is not supported on AIX before 7.1.
5129 if { [istarget powerpc*-*-aix4*]
5130 || [istarget powerpc*-*-aix5*]
5131 || [istarget powerpc*-*-aix6*] } {
5134 return [check_no_compiler_messages powerpc_vsx_ok object {
5137 asm volatile ("xxlor vs0,vs0,vs0");
5139 asm volatile ("xxlor 0,0,0");
5149 # Return 1 if this is a PowerPC target supporting -mhtm
5151 proc check_effective_target_powerpc_htm_ok { } {
5152 if { ([istarget powerpc*-*-*]
5153 && ![istarget powerpc-*-linux*paired*])
5154 || [istarget rs6000-*-*] } {
5155 # HTM is not supported on AIX yet.
5156 if { [istarget powerpc*-*-aix*] } {
5159 return [check_no_compiler_messages powerpc_htm_ok object {
5161 asm volatile ("tbegin. 0");
5170 # Return 1 if the target supports executing HTM hardware instructions,
5171 # 0 otherwise. Cache the result.
5173 proc check_htm_hw_available { } {
5174 return [check_cached_effective_target htm_hw_available {
5175 # For now, disable on Darwin
5176 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
5179 check_runtime_nocache htm_hw_available {
5189 # Return 1 if this is a PowerPC target supporting -mcpu=cell.
5191 proc check_effective_target_powerpc_ppu_ok { } {
5192 if [check_effective_target_powerpc_altivec_ok] {
5193 return [check_no_compiler_messages cell_asm_available object {
5196 asm volatile ("lvlx v0,v0,v0");
5198 asm volatile ("lvlx 0,0,0");
5208 # Return 1 if this is a PowerPC target that supports SPU.
5210 proc check_effective_target_powerpc_spu { } {
5211 if { [istarget powerpc*-*-linux*] } {
5212 return [check_effective_target_powerpc_altivec_ok]
5218 # Return 1 if this is a PowerPC SPE target. The check includes options
5219 # specified by dg-options for this test, so don't
cache the result.
5221 proc check_effective_target_powerpc_spe_nocache
{ } {
5222 if { [istarget powerpc
*-*-*] } {
5223 return [check_no_compiler_messages_nocache powerpc_spe object
{
5229 } [current_compiler_flags
]]
5235 #
Return 1 if this is a PowerPC target with SPE enabled.
5237 proc check_effective_target_powerpc_spe
{ } {
5238 if { [istarget powerpc
*-*-*] } {
5239 return [check_no_compiler_messages powerpc_spe object
{
5251 #
Return 1 if this is a PowerPC target with Altivec enabled.
5253 proc check_effective_target_powerpc_altivec
{ } {
5254 if { [istarget powerpc
*-*-*] } {
5255 return [check_no_compiler_messages powerpc_altivec object
{
5267 #
Return 1 if this is a PowerPC
405 target. The check includes options
5268 # specified by dg
-options
for this test
, so don
't cache the result.
5270 proc check_effective_target_powerpc_405_nocache { } {
5271 if { [istarget powerpc*-*-*] || [istarget rs6000-*-*] } {
5272 return [check_no_compiler_messages_nocache powerpc_405 object {
5278 } [current_compiler_flags]]
5284 # Return 1 if this is a PowerPC target using the ELFv2 ABI.
5286 proc check_effective_target_powerpc_elfv2 { } {
5287 if { [istarget powerpc*-*-*] } {
5288 return [check_no_compiler_messages powerpc_elfv2 object {
5290 #error not ELF v2 ABI
5300 # Return 1 if this is a SPU target with a toolchain that
5301 # supports automatic overlay generation.
5303 proc check_effective_target_spu_auto_overlay { } {
5304 if { [istarget spu*-*-elf*] } {
5305 return [check_no_compiler_messages spu_auto_overlay executable {
5307 } "-Wl,--auto-overlay" ]
5313 # The VxWorks SPARC simulator accepts only EM_SPARC executables and
5314 # chokes on EM_SPARC32PLUS or EM_SPARCV9 executables. Return 1 if the
5315 # test environment appears to run executables on such a simulator.
5317 proc check_effective_target_ultrasparc_hw { } {
5318 return [check_runtime ultrasparc_hw {
5319 int main() { return 0; }
5320 } "-mcpu=ultrasparc"]
5323 # Return 1 if the test environment supports executing UltraSPARC VIS2
5324 # instructions. We check this by attempting: "bmask %g0, %g0, %g0"
5326 proc check_effective_target_ultrasparc_vis2_hw { } {
5327 return [check_runtime ultrasparc_vis2_hw {
5328 int main() { __asm__(".word 0x81b00320"); return 0; }
5329 } "-mcpu=ultrasparc3"]
5332 # Return 1 if the test environment supports executing UltraSPARC VIS3
5333 # instructions. We check this by attempting: "addxc %g0, %g0, %g0"
5335 proc check_effective_target_ultrasparc_vis3_hw { } {
5336 return [check_runtime ultrasparc_vis3_hw {
5337 int main() { __asm__(".word 0x81b00220"); return 0; }
5341 # Return 1 if this is a SPARC-V9 target.
5343 proc check_effective_target_sparc_v9 { } {
5344 if { [istarget sparc*-*-*] } {
5345 return [check_no_compiler_messages sparc_v9 object {
5347 asm volatile ("return %i7+8");
5356 # Return 1 if this is a SPARC target with VIS enabled.
5358 proc check_effective_target_sparc_vis { } {
5359 if { [istarget sparc*-*-*] } {
5360 return [check_no_compiler_messages sparc_vis object {
5372 # Return 1 if the target supports hardware vector shift operation.
5374 proc check_effective_target_vect_shift { } {
5375 global et_vect_shift_saved
5378 if [info exists et_vect_shift_saved($et_index)] {
5379 verbose "check_effective_target_vect_shift: using cached result" 2
5381 set et_vect_shift_saved($et_index) 0
5382 if { ([istarget powerpc*-*-*]
5383 && ![istarget powerpc-*-linux*paired*])
5384 || [istarget ia64-*-*]
5385 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5386 || [istarget aarch64*-*-*]
5387 || [is-effective-target arm_neon]
5388 || ([istarget mips*-*-*]
5389 && ([et-is-effective-target mips_msa]
5390 || [et-is-effective-target mips_loongson]))
5391 || ([istarget s390*-*-*]
5392 && [check_effective_target_s390_vx]) } {
5393 set et_vect_shift_saved($et_index) 1
5397 verbose "check_effective_target_vect_shift:\
5398 returning $et_vect_shift_saved($et_index)" 2
5399 return $et_vect_shift_saved($et_index)
5402 proc check_effective_target_whole_vector_shift { } {
5403 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
5404 || [istarget ia64-*-*]
5405 || [istarget aarch64*-*-*]
5406 || [istarget powerpc64*-*-*]
5407 || ([is-effective-target arm_neon]
5408 && [check_effective_target_arm_little_endian])
5409 || ([istarget mips*-*-*]
5410 && [et-is-effective-target mips_loongson])
5411 || ([istarget s390*-*-*]
5412 && [check_effective_target_s390_vx]) } {
5418 verbose "check_effective_target_vect_long: returning $answer" 2
5422 # Return 1 if the target supports vector bswap operations.
5424 proc check_effective_target_vect_bswap { } {
5425 global et_vect_bswap_saved
5428 if [info exists et_vect_bswap_saved($et_index)] {
5429 verbose "check_effective_target_vect_bswap: using cached result" 2
5431 set et_vect_bswap_saved($et_index) 0
5432 if { [istarget aarch64*-*-*]
5433 || [is-effective-target arm_neon]
5435 set et_vect_bswap_saved($et_index) 1
5439 verbose "check_effective_target_vect_bswap:\
5440 returning $et_vect_bswap_saved($et_index)" 2
5441 return $et_vect_bswap_saved($et_index)
5444 # Return 1 if the target supports hardware vector shift operation for char.
5446 proc check_effective_target_vect_shift_char { } {
5447 global et_vect_shift_char_saved
5450 if [info exists et_vect_shift_char_saved($et_index)] {
5451 verbose "check_effective_target_vect_shift_char: using cached result" 2
5453 set et_vect_shift_char_saved($et_index) 0
5454 if { ([istarget powerpc*-*-*]
5455 && ![istarget powerpc-*-linux*paired*])
5456 || [is-effective-target arm_neon]
5457 || ([istarget mips*-*-*]
5458 && [et-is-effective-target mips_msa])
5459 || ([istarget s390*-*-*]
5460 && [check_effective_target_s390_vx]) } {
5461 set et_vect_shift_char_saved($et_index) 1
5465 verbose "check_effective_target_vect_shift_char:\
5466 returning $et_vect_shift_char_saved($et_index)" 2
5467 return $et_vect_shift_char_saved($et_index)
5470 # Return 1 if the target supports hardware vectors of long, 0 otherwise.
5472 # This can change for different subtargets so do not cache the result.
5474 proc check_effective_target_vect_long { } {
5475 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
5476 || (([istarget powerpc*-*-*]
5477 && ![istarget powerpc-*-linux*paired*])
5478 && [check_effective_target_ilp32])
5479 || [is-effective-target arm_neon]
5480 || ([istarget sparc*-*-*] && [check_effective_target_ilp32])
5481 || [istarget aarch64*-*-*]
5482 || ([istarget mips*-*-*]
5483 && [et-is-effective-target mips_msa])
5484 || ([istarget s390*-*-*]
5485 && [check_effective_target_s390_vx]) } {
5491 verbose "check_effective_target_vect_long: returning $answer" 2
5495 # Return 1 if the target supports hardware vectors of float when
5496 # -funsafe-math-optimizations is enabled, 0 otherwise.
5498 # This won't change
for different subtargets so
cache the result.
5500 proc check_effective_target_vect_float
{ } {
5501 global et_vect_float_saved
5504 if [info exists et_vect_float_saved
($et_index
)] {
5505 verbose
"check_effective_target_vect_float: using cached result" 2
5507 set et_vect_float_saved
($et_index
) 0
5508 if { [istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
5509 ||
[istarget powerpc
*-*-*]
5510 ||
[istarget spu
-*-*]
5511 ||
[istarget mips
-sde
-elf
]
5512 ||
[istarget mipsisa64
*-*-*]
5513 ||
[istarget ia64
-*-*]
5514 ||
[istarget aarch64
*-*-*]
5515 ||
([istarget mips
*-*-*]
5516 && [et
-is
-effective
-target mips_msa
])
5517 ||
[is
-effective
-target arm_neon
]
5518 ||
([istarget s390
*-*-*]
5519 && [check_effective_target_s390_vxe
]) } {
5520 set et_vect_float_saved
($et_index
) 1
5524 verbose
"check_effective_target_vect_float:\
5525 returning $et_vect_float_saved
($et_index
)" 2
5526 return $et_vect_float_saved
($et_index
)
5529 #
Return 1 if the target supports hardware vectors of float without
5530 #
-funsafe
-math
-optimizations being enabled
, 0 otherwise.
5532 proc check_effective_target_vect_float_strict
{ } {
5533 return [expr
{ [check_effective_target_vect_float
]
5534 && ![istarget arm
*-*-*] }]
5537 #
Return 1 if the target supports hardware vectors of double
, 0 otherwise.
5539 # This won
't change for different subtargets so cache the result.
5541 proc check_effective_target_vect_double { } {
5542 global et_vect_double_saved
5545 if [info exists et_vect_double_saved($et_index)] {
5546 verbose "check_effective_target_vect_double: using cached result" 2
5548 set et_vect_double_saved($et_index) 0
5549 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
5550 && [check_no_compiler_messages vect_double assembly {
5551 #ifdef __tune_atom__
5552 # error No double vectorizer support.
5555 || [istarget aarch64*-*-*]
5556 || [istarget spu-*-*]
5557 || ([istarget powerpc*-*-*] && [check_vsx_hw_available])
5558 || ([istarget mips*-*-*]
5559 && [et-is-effective-target mips_msa])
5560 || ([istarget s390*-*-*]
5561 && [check_effective_target_s390_vx]) } {
5562 set et_vect_double_saved($et_index) 1
5566 verbose "check_effective_target_vect_double:\
5567 returning $et_vect_double_saved($et_index)" 2
5568 return $et_vect_double_saved($et_index)
5571 # Return 1 if the target supports hardware vectors of long long, 0 otherwise.
5573 # This won't change
for different subtargets so
cache the result.
5575 proc check_effective_target_vect_long_long
{ } {
5576 global et_vect_long_long_saved
5579 if [info exists et_vect_long_long_saved
($et_index
)] {
5580 verbose
"check_effective_target_vect_long_long: using cached result" 2
5582 set et_vect_long_long_saved
($et_index
) 0
5583 if { [istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
5584 ||
([istarget mips
*-*-*]
5585 && [et
-is
-effective
-target mips_msa
])
5586 ||
([istarget s390
*-*-*]
5587 && [check_effective_target_s390_vx
]) } {
5588 set et_vect_long_long_saved
($et_index
) 1
5592 verbose
"check_effective_target_vect_long_long:\
5593 returning $et_vect_long_long_saved
($et_index
)" 2
5594 return $et_vect_long_long_saved
($et_index
)
5598 #
Return 1 if the target plus current options does not support a vector
5599 #
max instruction
on "int", 0 otherwise.
5601 # This won
't change for different subtargets so cache the result.
5603 proc check_effective_target_vect_no_int_min_max { } {
5604 global et_vect_no_int_min_max_saved
5607 if [info exists et_vect_no_int_min_max_saved($et_index)] {
5608 verbose "check_effective_target_vect_no_int_min_max:\
5609 using cached result" 2
5611 set et_vect_no_int_min_max_saved($et_index) 0
5612 if { [istarget sparc*-*-*]
5613 || [istarget spu-*-*]
5614 || [istarget alpha*-*-*]
5615 || ([istarget mips*-*-*]
5616 && [et-is-effective-target mips_loongson]) } {
5617 set et_vect_no_int_min_max_saved($et_index) 1
5620 verbose "check_effective_target_vect_no_int_min_max:\
5621 returning $et_vect_no_int_min_max_saved($et_index)" 2
5622 return $et_vect_no_int_min_max_saved($et_index)
5625 # Return 1 if the target plus current options does not support a vector
5626 # add instruction on "int", 0 otherwise.
5628 # This won't change
for different subtargets so
cache the result.
5630 proc check_effective_target_vect_no_int_add
{ } {
5631 global et_vect_no_int_add_saved
5634 if [info exists et_vect_no_int_add_saved
($et_index
)] {
5635 verbose
"check_effective_target_vect_no_int_add: using cached result" 2
5637 set et_vect_no_int_add_saved
($et_index
) 0
5638 # Alpha only supports vector add
on V8QI and V4HI.
5639 if { [istarget alpha
*-*-*] } {
5640 set et_vect_no_int_add_saved
($et_index
) 1
5643 verbose
"check_effective_target_vect_no_int_add:\
5644 returning $et_vect_no_int_add_saved
($et_index
)" 2
5645 return $et_vect_no_int_add_saved
($et_index
)
5648 #
Return 1 if the target plus current options does not support vector
5649 # bitwise instructions
, 0 otherwise.
5651 # This won
't change for different subtargets so cache the result.
5653 proc check_effective_target_vect_no_bitwise { } {
5654 global et_vect_no_bitwise_saved
5657 if [info exists et_vect_no_bitwise_saved($et_index)] {
5658 verbose "check_effective_target_vect_no_bitwise: using cached result" 2
5660 set et_vect_no_bitwise_saved($et_index) 0
5662 verbose "check_effective_target_vect_no_bitwise:\
5663 returning $et_vect_no_bitwise_saved($et_index)" 2
5664 return $et_vect_no_bitwise_saved($et_index)
5667 # Return 1 if the target plus current options supports vector permutation,
5670 # This won't change
for different subtargets so
cache the result.
5672 proc check_effective_target_vect_perm
{ } {
5673 global et_vect_perm_saved
5676 if [info exists et_vect_perm_saved
($et_index
)] {
5677 verbose
"check_effective_target_vect_perm: using cached result" 2
5679 set et_vect_perm_saved
($et_index
) 0
5680 if { [is
-effective
-target arm_neon
]
5681 ||
([istarget aarch64
*-*-*]
5682 && ![check_effective_target_vect_variable_length
])
5683 ||
[istarget powerpc
*-*-*]
5684 ||
[istarget spu
-*-*]
5685 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
5686 ||
([istarget mips
*-*-*]
5687 && ([et
-is
-effective
-target mpaired_single
]
5688 ||
[et
-is
-effective
-target mips_msa
]))
5689 ||
([istarget s390
*-*-*]
5690 && [check_effective_target_s390_vx
]) } {
5691 set et_vect_perm_saved
($et_index
) 1
5694 verbose
"check_effective_target_vect_perm:\
5695 returning $et_vect_perm_saved
($et_index
)" 2
5696 return $et_vect_perm_saved
($et_index
)
5699 #
Return 1 if, for some VF
:
5701 #
- the target
's default vector size is VF * ELEMENT_BITS bits
5703 # - it is possible to implement the equivalent of:
5705 # int<ELEMENT_BITS>_t s1[COUNT][COUNT * VF], s2[COUNT * VF];
5706 # for (int i = 0; i < COUNT; ++i)
5707 # for (int j = 0; j < COUNT * VF; ++j)
5708 # s1[i][j] = s2[j - j % COUNT + i]
5710 # using only a single 2-vector permute for each vector in s1.
5712 # E.g. for COUNT == 3 and vector length 4, the two arrays would be:
5714 # s2 | a0 a1 a2 a3 | b0 b1 b2 b3 | c0 c1 c2 c3
5715 # ------+-------------+-------------+------------
5716 # s1[0] | a0 a0 a0 a3 | a3 a3 b2 b2 | b2 c1 c1 c1
5717 # s1[1] | a1 a1 a1 b0 | b0 b0 b3 b3 | b3 c2 c2 c2
5718 # s1[2] | a2 a2 a2 b1 | b1 b1 c0 c0 | c0 c3 c3 c3
5720 # Each s1 permute requires only two of a, b and c.
5722 # The distance between the start of vector n in s1[0] and the start
5723 # of vector n in s2 is:
5725 # A = (n * VF) % COUNT
5727 # The corresponding value for the end of vector n is:
5729 # B = (n * VF + VF - 1) % COUNT
5731 # Subtracting i from each value gives the corresponding difference
5732 # for s1[i]. The condition being tested by this function is false
5733 # iff A - i > 0 and B - i < 0 for some i and n, such that the first
5734 # element for s1[i] comes from vector n - 1 of s2 and the last element
5735 # comes from vector n + 1 of s2. The condition is therefore true iff
5736 # A <= B for all n. This is turn means the condition is true iff:
5738 # (n * VF) % COUNT + (VF - 1) % COUNT < COUNT
5740 # for all n. COUNT - (n * VF) % COUNT is bounded by gcd (VF, COUNT),
5741 # and will be that value for at least one n in [0, COUNT), so we want:
5743 # (VF - 1) % COUNT < gcd (VF, COUNT)
5745 proc vect_perm_supported { count element_bits } {
5746 set vector_bits [lindex [available_vector_sizes] 0]
5747 if { $vector_bits <= 0 } {
5750 set vf [expr { $vector_bits / $element_bits }]
5752 # Compute gcd (VF, COUNT).
5755 while { $temp1 > 0 } {
5756 set temp2 [expr { $gcd % $temp1 }]
5760 return [expr { ($vf - 1) % $count < $gcd }]
5763 # Return 1 if the target supports SLP permutation of 3 vectors when each
5764 # element has 32 bits.
5766 proc check_effective_target_vect_perm3_int { } {
5767 return [expr { [check_effective_target_vect_perm]
5768 && [vect_perm_supported 3 32] }]
5771 # Return 1 if the target plus current options supports vector permutation
5772 # on byte-sized elements, 0 otherwise.
5774 # This won't change
for different subtargets so
cache the result.
5776 proc check_effective_target_vect_perm_byte
{ } {
5777 global et_vect_perm_byte_saved
5780 if [info exists et_vect_perm_byte_saved
($et_index
)] {
5781 verbose
"check_effective_target_vect_perm_byte: using cached result" 2
5783 set et_vect_perm_byte_saved
($et_index
) 0
5784 if { ([is
-effective
-target arm_neon
]
5785 && [is
-effective
-target arm_little_endian
])
5786 ||
([istarget aarch64
*-*-*]
5787 && [is
-effective
-target aarch64_little_endian
]
5788 && ![check_effective_target_vect_variable_length
])
5789 ||
[istarget powerpc
*-*-*]
5790 ||
[istarget spu
-*-*]
5791 ||
([istarget mips
-*.
*]
5792 && [et
-is
-effective
-target mips_msa
])
5793 ||
([istarget s390
*-*-*]
5794 && [check_effective_target_s390_vx
]) } {
5795 set et_vect_perm_byte_saved
($et_index
) 1
5798 verbose
"check_effective_target_vect_perm_byte:\
5799 returning $et_vect_perm_byte_saved
($et_index
)" 2
5800 return $et_vect_perm_byte_saved
($et_index
)
5803 #
Return 1 if the target supports SLP permutation of
3 vectors when each
5804 # element has
8 bits.
5806 proc check_effective_target_vect_perm3_byte
{ } {
5807 return [expr
{ [check_effective_target_vect_perm_byte
]
5808 && [vect_perm_supported
3 8] }]
5811 #
Return 1 if the target plus current options supports vector permutation
5812 #
on short
-sized elements
, 0 otherwise.
5814 # This won
't change for different subtargets so cache the result.
5816 proc check_effective_target_vect_perm_short { } {
5817 global et_vect_perm_short_saved
5820 if [info exists et_vect_perm_short_saved($et_index)] {
5821 verbose "check_effective_target_vect_perm_short: using cached result" 2
5823 set et_vect_perm_short_saved($et_index) 0
5824 if { ([is-effective-target arm_neon]
5825 && [is-effective-target arm_little_endian])
5826 || ([istarget aarch64*-*-*]
5827 && [is-effective-target aarch64_little_endian]
5828 && ![check_effective_target_vect_variable_length])
5829 || [istarget powerpc*-*-*]
5830 || [istarget spu-*-*]
5831 || (([istarget i?86-*-*] || [istarget x86_64-*-*]
5832 && [check_ssse3_available]))
5833 || ([istarget mips*-*-*]
5834 && [et-is-effective-target mips_msa])
5835 || ([istarget s390*-*-*]
5836 && [check_effective_target_s390_vx]) } {
5837 set et_vect_perm_short_saved($et_index) 1
5840 verbose "check_effective_target_vect_perm_short:\
5841 returning $et_vect_perm_short_saved($et_index)" 2
5842 return $et_vect_perm_short_saved($et_index)
5845 # Return 1 if the target supports SLP permutation of 3 vectors when each
5846 # element has 16 bits.
5848 proc check_effective_target_vect_perm3_short { } {
5849 return [expr { [check_effective_target_vect_perm_short]
5850 && [vect_perm_supported 3 16] }]
5853 # Return 1 if the target plus current options supports folding of
5854 # copysign into XORSIGN.
5856 # This won't change
for different subtargets so
cache the result.
5858 proc check_effective_target_xorsign
{ } {
5859 global et_xorsign_saved
5862 if [info exists et_xorsign_saved
($et_index
)] {
5863 verbose
"check_effective_target_xorsign: using cached result" 2
5865 set et_xorsign_saved
($et_index
) 0
5866 if { [istarget aarch64
*-*-*] ||
[istarget arm
*-*-*] } {
5867 set et_xorsign_saved
($et_index
) 1
5870 verbose
"check_effective_target_xorsign:\
5871 returning $et_xorsign_saved
($et_index
)" 2
5872 return $et_xorsign_saved
($et_index
)
5875 #
Return 1 if the target plus current options supports a vector
5876 # widening summation of
*short
* args into
*int* result
, 0 otherwise.
5878 # This won
't change for different subtargets so cache the result.
5880 proc check_effective_target_vect_widen_sum_hi_to_si_pattern { } {
5881 global et_vect_widen_sum_hi_to_si_pattern_saved
5884 if [info exists et_vect_widen_sum_hi_to_si_pattern_saved($et_index)] {
5885 verbose "check_effective_target_vect_widen_sum_hi_to_si_pattern:\
5886 using cached result" 2
5888 set et_vect_widen_sum_hi_to_si_pattern_saved($et_index) 0
5889 if { [istarget powerpc*-*-*]
5890 || ([istarget aarch64*-*-*]
5891 && ![check_effective_target_aarch64_sve])
5892 || [is-effective-target arm_neon]
5893 || [istarget ia64-*-*] } {
5894 set et_vect_widen_sum_hi_to_si_pattern_saved($et_index) 1
5897 verbose "check_effective_target_vect_widen_sum_hi_to_si_pattern:\
5898 returning $et_vect_widen_sum_hi_to_si_pattern_saved($et_index)" 2
5899 return $et_vect_widen_sum_hi_to_si_pattern_saved($et_index)
5902 # Return 1 if the target plus current options supports a vector
5903 # widening summation of *short* args into *int* result, 0 otherwise.
5904 # A target can also support this widening summation if it can support
5905 # promotion (unpacking) from shorts to ints.
5907 # This won't change
for different subtargets so
cache the result.
5909 proc check_effective_target_vect_widen_sum_hi_to_si
{ } {
5910 global et_vect_widen_sum_hi_to_si_saved
5913 if [info exists et_vect_widen_sum_hi_to_si_saved
($et_index
)] {
5914 verbose
"check_effective_target_vect_widen_sum_hi_to_si:\
5915 using cached result
" 2
5917 set et_vect_widen_sum_hi_to_si_saved
($et_index
) \
5918 [check_effective_target_vect_unpack
]
5919 if { [istarget powerpc
*-*-*]
5920 ||
[istarget ia64
-*-*] } {
5921 set et_vect_widen_sum_hi_to_si_saved
($et_index
) 1
5924 verbose
"check_effective_target_vect_widen_sum_hi_to_si:\
5925 returning $et_vect_widen_sum_hi_to_si_saved
($et_index
)" 2
5926 return $et_vect_widen_sum_hi_to_si_saved
($et_index
)
5929 #
Return 1 if the target plus current options supports a vector
5930 # widening summation of
*char
* args into
*short
* result
, 0 otherwise.
5931 # A target can also support this widening summation
if it can support
5932 # promotion
(unpacking
) from chars to shorts.
5934 # This won
't change for different subtargets so cache the result.
5936 proc check_effective_target_vect_widen_sum_qi_to_hi { } {
5937 global et_vect_widen_sum_qi_to_hi_saved
5940 if [info exists et_vect_widen_sum_qi_to_hi_saved($et_index)] {
5941 verbose "check_effective_target_vect_widen_sum_qi_to_hi:\
5942 using cached result" 2
5944 set et_vect_widen_sum_qi_to_hi_saved($et_index) 0
5945 if { [check_effective_target_vect_unpack]
5946 || [is-effective-target arm_neon]
5947 || [istarget ia64-*-*] } {
5948 set et_vect_widen_sum_qi_to_hi_saved($et_index) 1
5951 verbose "check_effective_target_vect_widen_sum_qi_to_hi:\
5952 returning $et_vect_widen_sum_qi_to_hi_saved($et_index)" 2
5953 return $et_vect_widen_sum_qi_to_hi_saved($et_index)
5956 # Return 1 if the target plus current options supports a vector
5957 # widening summation of *char* args into *int* result, 0 otherwise.
5959 # This won't change
for different subtargets so
cache the result.
5961 proc check_effective_target_vect_widen_sum_qi_to_si
{ } {
5962 global et_vect_widen_sum_qi_to_si_saved
5965 if [info exists et_vect_widen_sum_qi_to_si_saved
($et_index
)] {
5966 verbose
"check_effective_target_vect_widen_sum_qi_to_si:\
5967 using cached result
" 2
5969 set et_vect_widen_sum_qi_to_si_saved
($et_index
) 0
5970 if { [istarget powerpc
*-*-*] } {
5971 set et_vect_widen_sum_qi_to_si_saved
($et_index
) 1
5974 verbose
"check_effective_target_vect_widen_sum_qi_to_si:\
5975 returning $et_vect_widen_sum_qi_to_si_saved
($et_index
)" 2
5976 return $et_vect_widen_sum_qi_to_si_saved
($et_index
)
5979 #
Return 1 if the target plus current options supports a vector
5980 # widening multiplication of
*char
* args into
*short
* result
, 0 otherwise.
5981 # A target can also support this widening multplication
if it can support
5982 # promotion
(unpacking
) from chars to shorts
, and vect_short_mult
(non
-widening
5983 # multiplication of shorts
).
5985 # This won
't change for different subtargets so cache the result.
5988 proc check_effective_target_vect_widen_mult_qi_to_hi { } {
5989 global et_vect_widen_mult_qi_to_hi_saved
5992 if [info exists et_vect_widen_mult_qi_to_hi_saved($et_index)] {
5993 verbose "check_effective_target_vect_widen_mult_qi_to_hi:\
5994 using cached result" 2
5996 if { [check_effective_target_vect_unpack]
5997 && [check_effective_target_vect_short_mult] } {
5998 set et_vect_widen_mult_qi_to_hi_saved($et_index) 1
6000 set et_vect_widen_mult_qi_to_hi_saved($et_index) 0
6002 if { [istarget powerpc*-*-*]
6003 || ([istarget aarch64*-*-*]
6004 && ![check_effective_target_aarch64_sve])
6005 || [is-effective-target arm_neon]
6006 || ([istarget s390*-*-*]
6007 && [check_effective_target_s390_vx]) } {
6008 set et_vect_widen_mult_qi_to_hi_saved($et_index) 1
6011 verbose "check_effective_target_vect_widen_mult_qi_to_hi:\
6012 returning $et_vect_widen_mult_qi_to_hi_saved($et_index)" 2
6013 return $et_vect_widen_mult_qi_to_hi_saved($et_index)
6016 # Return 1 if the target plus current options supports a vector
6017 # widening multiplication of *short* args into *int* result, 0 otherwise.
6018 # A target can also support this widening multplication if it can support
6019 # promotion (unpacking) from shorts to ints, and vect_int_mult (non-widening
6020 # multiplication of ints).
6022 # This won't change
for different subtargets so
cache the result.
6025 proc check_effective_target_vect_widen_mult_hi_to_si
{ } {
6026 global et_vect_widen_mult_hi_to_si_saved
6029 if [info exists et_vect_widen_mult_hi_to_si_saved
($et_index
)] {
6030 verbose
"check_effective_target_vect_widen_mult_hi_to_si:\
6031 using cached result
" 2
6033 if { [check_effective_target_vect_unpack
]
6034 && [check_effective_target_vect_int_mult
] } {
6035 set et_vect_widen_mult_hi_to_si_saved
($et_index
) 1
6037 set et_vect_widen_mult_hi_to_si_saved
($et_index
) 0
6039 if { [istarget powerpc
*-*-*]
6040 ||
[istarget spu
-*-*]
6041 ||
[istarget ia64
-*-*]
6042 ||
([istarget aarch64
*-*-*]
6043 && ![check_effective_target_aarch64_sve
])
6044 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
6045 ||
[is
-effective
-target arm_neon
]
6046 ||
([istarget s390
*-*-*]
6047 && [check_effective_target_s390_vx
]) } {
6048 set et_vect_widen_mult_hi_to_si_saved
($et_index
) 1
6051 verbose
"check_effective_target_vect_widen_mult_hi_to_si:\
6052 returning $et_vect_widen_mult_hi_to_si_saved
($et_index
)" 2
6053 return $et_vect_widen_mult_hi_to_si_saved
($et_index
)
6056 #
Return 1 if the target plus current options supports a vector
6057 # widening multiplication of
*char
* args into
*short
* result
, 0 otherwise.
6059 # This won
't change for different subtargets so cache the result.
6061 proc check_effective_target_vect_widen_mult_qi_to_hi_pattern { } {
6062 global et_vect_widen_mult_qi_to_hi_pattern_saved
6065 if [info exists et_vect_widen_mult_qi_to_hi_pattern_saved($et_index)] {
6066 verbose "check_effective_target_vect_widen_mult_qi_to_hi_pattern:\
6067 using cached result" 2
6069 set et_vect_widen_mult_qi_to_hi_pattern_saved($et_index) 0
6070 if { [istarget powerpc*-*-*]
6071 || ([is-effective-target arm_neon]
6072 && [check_effective_target_arm_little_endian])
6073 || ([istarget s390*-*-*]
6074 && [check_effective_target_s390_vx]) } {
6075 set et_vect_widen_mult_qi_to_hi_pattern_saved($et_index) 1
6078 verbose "check_effective_target_vect_widen_mult_qi_to_hi_pattern:\
6079 returning $et_vect_widen_mult_qi_to_hi_pattern_saved($et_index)" 2
6080 return $et_vect_widen_mult_qi_to_hi_pattern_saved($et_index)
6083 # Return 1 if the target plus current options supports a vector
6084 # widening multiplication of *short* args into *int* result, 0 otherwise.
6086 # This won't change
for different subtargets so
cache the result.
6088 proc check_effective_target_vect_widen_mult_hi_to_si_pattern
{ } {
6089 global et_vect_widen_mult_hi_to_si_pattern_saved
6092 if [info exists et_vect_widen_mult_hi_to_si_pattern_saved
($et_index
)] {
6093 verbose
"check_effective_target_vect_widen_mult_hi_to_si_pattern:\
6094 using cached result
" 2
6096 set et_vect_widen_mult_hi_to_si_pattern_saved
($et_index
) 0
6097 if { [istarget powerpc
*-*-*]
6098 ||
[istarget spu
-*-*]
6099 ||
[istarget ia64
-*-*]
6100 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
6101 ||
([is
-effective
-target arm_neon
]
6102 && [check_effective_target_arm_little_endian
])
6103 ||
([istarget s390
*-*-*]
6104 && [check_effective_target_s390_vx
]) } {
6105 set et_vect_widen_mult_hi_to_si_pattern_saved
($et_index
) 1
6108 verbose
"check_effective_target_vect_widen_mult_hi_to_si_pattern:\
6109 returning $et_vect_widen_mult_hi_to_si_pattern_saved
($et_index
)" 2
6110 return $et_vect_widen_mult_hi_to_si_pattern_saved
($et_index
)
6113 #
Return 1 if the target plus current options supports a vector
6114 # widening multiplication of
*int* args into
*long
* result
, 0 otherwise.
6116 # This won
't change for different subtargets so cache the result.
6118 proc check_effective_target_vect_widen_mult_si_to_di_pattern { } {
6119 global et_vect_widen_mult_si_to_di_pattern_saved
6122 if [info exists et_vect_widen_mult_si_to_di_pattern_saved($et_index)] {
6123 verbose "check_effective_target_vect_widen_mult_si_to_di_pattern:\
6124 using cached result" 2
6126 set et_vect_widen_mult_si_to_di_pattern_saved($et_index) 0
6127 if {[istarget ia64-*-*]
6128 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6129 || ([istarget s390*-*-*]
6130 && [check_effective_target_s390_vx]) } {
6131 set et_vect_widen_mult_si_to_di_pattern_saved($et_index) 1
6134 verbose "check_effective_target_vect_widen_mult_si_to_di_pattern:\
6135 returning $et_vect_widen_mult_si_to_di_pattern_saved($et_index)" 2
6136 return $et_vect_widen_mult_si_to_di_pattern_saved($et_index)
6139 # Return 1 if the target plus current options supports a vector
6140 # widening shift, 0 otherwise.
6142 # This won't change
for different subtargets so
cache the result.
6144 proc check_effective_target_vect_widen_shift
{ } {
6145 global et_vect_widen_shift_saved
6148 if [info exists et_vect_shift_saved
($et_index
)] {
6149 verbose
"check_effective_target_vect_widen_shift: using cached result" 2
6151 set et_vect_widen_shift_saved
($et_index
) 0
6152 if { [is
-effective
-target arm_neon
] } {
6153 set et_vect_widen_shift_saved
($et_index
) 1
6156 verbose
"check_effective_target_vect_widen_shift:\
6157 returning $et_vect_widen_shift_saved
($et_index
)" 2
6158 return $et_vect_widen_shift_saved
($et_index
)
6161 #
Return 1 if the target plus current options supports a vector
6162 # dot
-product of signed chars
, 0 otherwise.
6164 # This won
't change for different subtargets so cache the result.
6166 proc check_effective_target_vect_sdot_qi { } {
6167 global et_vect_sdot_qi_saved
6170 if [info exists et_vect_sdot_qi_saved($et_index)] {
6171 verbose "check_effective_target_vect_sdot_qi: using cached result" 2
6173 set et_vect_sdot_qi_saved($et_index) 0
6174 if { [istarget ia64-*-*]
6175 || [istarget aarch64*-*-*]
6176 || [istarget arm*-*-*]
6177 || ([istarget mips*-*-*]
6178 && [et-is-effective-target mips_msa]) } {
6179 set et_vect_udot_qi_saved 1
6182 verbose "check_effective_target_vect_sdot_qi:\
6183 returning $et_vect_sdot_qi_saved($et_index)" 2
6184 return $et_vect_sdot_qi_saved($et_index)
6187 # Return 1 if the target plus current options supports a vector
6188 # dot-product of unsigned chars, 0 otherwise.
6190 # This won't change
for different subtargets so
cache the result.
6192 proc check_effective_target_vect_udot_qi
{ } {
6193 global et_vect_udot_qi_saved
6196 if [info exists et_vect_udot_qi_saved
($et_index
)] {
6197 verbose
"check_effective_target_vect_udot_qi: using cached result" 2
6199 set et_vect_udot_qi_saved
($et_index
) 0
6200 if { [istarget powerpc
*-*-*]
6201 ||
[istarget aarch64
*-*-*]
6202 ||
[istarget arm
*-*-*]
6203 ||
[istarget ia64
-*-*]
6204 ||
([istarget mips
*-*-*]
6205 && [et
-is
-effective
-target mips_msa
]) } {
6206 set et_vect_udot_qi_saved
($et_index
) 1
6209 verbose
"check_effective_target_vect_udot_qi:\
6210 returning $et_vect_udot_qi_saved
($et_index
)" 2
6211 return $et_vect_udot_qi_saved
($et_index
)
6214 #
Return 1 if the target plus current options supports a vector
6215 # dot
-product of signed shorts
, 0 otherwise.
6217 # This won
't change for different subtargets so cache the result.
6219 proc check_effective_target_vect_sdot_hi { } {
6220 global et_vect_sdot_hi_saved
6223 if [info exists et_vect_sdot_hi_saved($et_index)] {
6224 verbose "check_effective_target_vect_sdot_hi: using cached result" 2
6226 set et_vect_sdot_hi_saved($et_index) 0
6227 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
6228 || [istarget ia64-*-*]
6229 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6230 || ([istarget mips*-*-*]
6231 && [et-is-effective-target mips_msa]) } {
6232 set et_vect_sdot_hi_saved($et_index) 1
6235 verbose "check_effective_target_vect_sdot_hi:\
6236 returning $et_vect_sdot_hi_saved($et_index)" 2
6237 return $et_vect_sdot_hi_saved($et_index)
6240 # Return 1 if the target plus current options supports a vector
6241 # dot-product of unsigned shorts, 0 otherwise.
6243 # This won't change
for different subtargets so
cache the result.
6245 proc check_effective_target_vect_udot_hi
{ } {
6246 global et_vect_udot_hi_saved
6249 if [info exists et_vect_udot_hi_saved
($et_index
)] {
6250 verbose
"check_effective_target_vect_udot_hi: using cached result" 2
6252 set et_vect_udot_hi_saved
($et_index
) 0
6253 if { ([istarget powerpc
*-*-*] && ![istarget powerpc
-*-linux
*paired
*])
6254 ||
([istarget mips
*-*-*]
6255 && [et
-is
-effective
-target mips_msa
]) } {
6256 set et_vect_udot_hi_saved
($et_index
) 1
6259 verbose
"check_effective_target_vect_udot_hi:\
6260 returning $et_vect_udot_hi_saved
($et_index
)" 2
6261 return $et_vect_udot_hi_saved
($et_index
)
6264 #
Return 1 if the target plus current options supports a vector
6265 # sad operation of unsigned chars
, 0 otherwise.
6267 # This won
't change for different subtargets so cache the result.
6269 proc check_effective_target_vect_usad_char { } {
6270 global et_vect_usad_char_saved
6273 if [info exists et_vect_usad_char_saved($et_index)] {
6274 verbose "check_effective_target_vect_usad_char: using cached result" 2
6276 set et_vect_usad_char_saved($et_index) 0
6277 if { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
6278 set et_vect_usad_char_saved($et_index) 1
6281 verbose "check_effective_target_vect_usad_char:\
6282 returning $et_vect_usad_char_saved($et_index)" 2
6283 return $et_vect_usad_char_saved($et_index)
6286 # Return 1 if the target plus current options supports a vector
6287 # demotion (packing) of shorts (to chars) and ints (to shorts)
6288 # using modulo arithmetic, 0 otherwise.
6290 # This won't change
for different subtargets so
cache the result.
6292 proc check_effective_target_vect_pack_trunc
{ } {
6293 global et_vect_pack_trunc_saved
6296 if [info exists et_vect_pack_trunc_saved
($et_index
)] {
6297 verbose
"check_effective_target_vect_pack_trunc: using cached result" 2
6299 set et_vect_pack_trunc_saved
($et_index
) 0
6300 if { ([istarget powerpc
*-*-*] && ![istarget powerpc
-*-linux
*paired
*])
6301 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
6302 ||
[istarget aarch64
*-*-*]
6303 ||
[istarget spu
-*-*]
6304 ||
([istarget arm
*-*-*] && [check_effective_target_arm_neon_ok
]
6305 && [check_effective_target_arm_little_endian
])
6306 ||
([istarget mips
*-*-*]
6307 && [et
-is
-effective
-target mips_msa
])
6308 ||
([istarget s390
*-*-*]
6309 && [check_effective_target_s390_vx
]) } {
6310 set et_vect_pack_trunc_saved
($et_index
) 1
6313 verbose
"check_effective_target_vect_pack_trunc:\
6314 returning $et_vect_pack_trunc_saved
($et_index
)" 2
6315 return $et_vect_pack_trunc_saved
($et_index
)
6318 #
Return 1 if the target plus current options supports a vector
6319 # promotion
(unpacking
) of chars
(to shorts
) and shorts
(to ints
), 0 otherwise.
6321 # This won
't change for different subtargets so cache the result.
6323 proc check_effective_target_vect_unpack { } {
6324 global et_vect_unpack_saved
6327 if [info exists et_vect_unpack_saved($et_index)] {
6328 verbose "check_effective_target_vect_unpack: using cached result" 2
6330 set et_vect_unpack_saved($et_index) 0
6331 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*paired*])
6332 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6333 || [istarget spu-*-*]
6334 || [istarget ia64-*-*]
6335 || [istarget aarch64*-*-*]
6336 || ([istarget mips*-*-*]
6337 && [et-is-effective-target mips_msa])
6338 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]
6339 && [check_effective_target_arm_little_endian])
6340 || ([istarget s390*-*-*]
6341 && [check_effective_target_s390_vx]) } {
6342 set et_vect_unpack_saved($et_index) 1
6345 verbose "check_effective_target_vect_unpack:\
6346 returning $et_vect_unpack_saved($et_index)" 2
6347 return $et_vect_unpack_saved($et_index)
6350 # Return 1 if the target plus current options does not guarantee
6351 # that its STACK_BOUNDARY is >= the reguired vector alignment.
6353 # This won't change
for different subtargets so
cache the result.
6355 proc check_effective_target_unaligned_stack
{ } {
6356 global et_unaligned_stack_saved
6358 if [info exists et_unaligned_stack_saved
] {
6359 verbose
"check_effective_target_unaligned_stack: using cached result" 2
6361 set et_unaligned_stack_saved
0
6363 verbose
"check_effective_target_unaligned_stack: returning $et_unaligned_stack_saved" 2
6364 return $et_unaligned_stack_saved
6367 #
Return 1 if the target plus current options does not have
6368 # slow unaligned access when using word size accesses.
6370 # This won
't change for different subtargets so cache the result.
6372 proc check_effective_target_word_mode_no_slow_unalign { } {
6373 global et_word_mode_no_slow_unalign_saved
6376 if [info exists et_word_mode_no_slow_unalign_saved($et_index)] {
6377 verbose "check_effective_target_word_mode_no_slow_unalign: \
6378 using cached result" 2
6380 set et_word_mode_no_slow_unalign_saved($et_index) 0
6381 if { [is-effective-target non_strict_align]
6382 && !([istarget arm*-*-*])
6384 set et_word_mode_no_slow_unalign_saved($et_index) 1
6387 verbose "check_effective_target_word_mode_no_slow_unalign:\
6388 returning $et_word_mode_no_slow_unalign_saved($et_index)" 2
6389 return $et_word_mode_no_slow_unalign_saved($et_index)
6392 # Return 1 if the target plus current options does not support a vector
6393 # alignment mechanism, 0 otherwise.
6395 # This won't change
for different subtargets so
cache the result.
6397 proc check_effective_target_vect_no_align
{ } {
6398 global et_vect_no_align_saved
6401 if [info exists et_vect_no_align_saved
($et_index
)] {
6402 verbose
"check_effective_target_vect_no_align: using cached result" 2
6404 set et_vect_no_align_saved
($et_index
) 0
6405 if { [istarget mipsisa64
*-*-*]
6406 ||
[istarget mips
-sde
-elf
]
6407 ||
[istarget sparc
*-*-*]
6408 ||
[istarget ia64
-*-*]
6409 ||
[check_effective_target_arm_vect_no_misalign
]
6410 ||
([istarget powerpc
*-*-*] && [check_p8vector_hw_available
])
6411 ||
([istarget mips
*-*-*]
6412 && [et
-is
-effective
-target mips_loongson
]) } {
6413 set et_vect_no_align_saved
($et_index
) 1
6416 verbose
"check_effective_target_vect_no_align:\
6417 returning $et_vect_no_align_saved
($et_index
)" 2
6418 return $et_vect_no_align_saved
($et_index
)
6421 #
Return 1 if the target supports a vector misalign access
, 0 otherwise.
6423 # This won
't change for different subtargets so cache the result.
6425 proc check_effective_target_vect_hw_misalign { } {
6426 global et_vect_hw_misalign_saved
6429 if [info exists et_vect_hw_misalign_saved($et_index)] {
6430 verbose "check_effective_target_vect_hw_misalign: using cached result" 2
6432 set et_vect_hw_misalign_saved($et_index) 0
6433 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
6434 || ([istarget powerpc*-*-*] && [check_p8vector_hw_available])
6435 || [istarget aarch64*-*-*]
6436 || ([istarget mips*-*-*] && [et-is-effective-target mips_msa])
6437 || ([istarget s390*-*-*]
6438 && [check_effective_target_s390_vx]) } {
6439 set et_vect_hw_misalign_saved($et_index) 1
6441 if { [istarget arm*-*-*] } {
6442 set et_vect_hw_misalign_saved($et_index) [expr ![check_effective_target_arm_vect_no_misalign]]
6445 verbose "check_effective_target_vect_hw_misalign:\
6446 returning $et_vect_hw_misalign_saved($et_index)" 2
6447 return $et_vect_hw_misalign_saved($et_index)
6451 # Return 1 if arrays are aligned to the vector alignment
6452 # boundary, 0 otherwise.
6454 proc check_effective_target_vect_aligned_arrays { } {
6455 set et_vect_aligned_arrays 0
6456 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
6457 && !([is-effective-target ia32]
6458 || ([check_avx_available] && ![check_prefer_avx128])))
6459 || [istarget spu-*-*] } {
6460 set et_vect_aligned_arrays 1
6463 verbose "check_effective_target_vect_aligned_arrays:\
6464 returning $et_vect_aligned_arrays" 2
6465 return $et_vect_aligned_arrays
6468 # Return 1 if types of size 32 bit or less are naturally aligned
6469 # (aligned to their type-size), 0 otherwise.
6471 # This won't change
for different subtargets so
cache the result.
6473 proc check_effective_target_natural_alignment_32
{ } {
6474 global et_natural_alignment_32
6476 if [info exists et_natural_alignment_32_saved
] {
6477 verbose
"check_effective_target_natural_alignment_32: using cached result" 2
6479 # FIXME
: 32bit powerpc
: guaranteed only
if MASK_ALIGN_NATURAL
/POWER.
6480 set et_natural_alignment_32_saved
1
6481 if { ([istarget
*-*-darwin
*] && [is
-effective
-target lp64
])
6482 ||
[istarget avr
-*-*] } {
6483 set et_natural_alignment_32_saved
0
6486 verbose
"check_effective_target_natural_alignment_32: returning $et_natural_alignment_32_saved" 2
6487 return $et_natural_alignment_32_saved
6490 #
Return 1 if types of size
64 bit or less are naturally aligned
(aligned to their
6491 # type
-size
), 0 otherwise.
6493 # This won
't change for different subtargets so cache the result.
6495 proc check_effective_target_natural_alignment_64 { } {
6496 global et_natural_alignment_64
6498 if [info exists et_natural_alignment_64_saved] {
6499 verbose "check_effective_target_natural_alignment_64: using cached result" 2
6501 set et_natural_alignment_64_saved 0
6502 if { ([is-effective-target lp64] && ![istarget *-*-darwin*])
6503 || [istarget spu-*-*] } {
6504 set et_natural_alignment_64_saved 1
6507 verbose "check_effective_target_natural_alignment_64: returning $et_natural_alignment_64_saved" 2
6508 return $et_natural_alignment_64_saved
6511 # Return 1 if all vector types are naturally aligned (aligned to their
6512 # type-size), 0 otherwise.
6514 proc check_effective_target_vect_natural_alignment { } {
6515 set et_vect_natural_alignment 1
6516 if { [check_effective_target_arm_eabi]
6517 || [istarget nvptx-*-*]
6518 || [istarget s390*-*-*] } {
6519 set et_vect_natural_alignment 0
6521 verbose "check_effective_target_vect_natural_alignment:\
6522 returning $et_vect_natural_alignment" 2
6523 return $et_vect_natural_alignment
6526 # Return true if fully-masked loops are supported.
6528 proc check_effective_target_vect_fully_masked { } {
6529 return [check_effective_target_aarch64_sve]
6532 # Return 1 if the target doesn't prefer
any alignment beyond element
6533 # alignment during vectorization.
6535 proc check_effective_target_vect_element_align_preferred
{ } {
6536 return [expr
{ [check_effective_target_aarch64_sve
]
6537 && [check_effective_target_vect_variable_length
] }]
6540 #
Return 1 if we can align stack data to the preferred vector alignment.
6542 proc check_effective_target_vect_align_stack_vars
{ } {
6543 if { [check_effective_target_aarch64_sve
] } {
6544 return [check_effective_target_vect_variable_length
]
6549 #
Return 1 if vector alignment
(for types of size
32 bit or less
) is reachable
, 0 otherwise.
6551 proc check_effective_target_vector_alignment_reachable
{ } {
6552 set et_vector_alignment_reachable
0
6553 if { [check_effective_target_vect_aligned_arrays
]
6554 ||
[check_effective_target_natural_alignment_32
] } {
6555 set et_vector_alignment_reachable
1
6557 verbose
"check_effective_target_vector_alignment_reachable:\
6558 returning $et_vector_alignment_reachable
" 2
6559 return $et_vector_alignment_reachable
6562 #
Return 1 if vector alignment
for 64 bit is reachable
, 0 otherwise.
6564 proc check_effective_target_vector_alignment_reachable_for_64bit
{ } {
6565 set et_vector_alignment_reachable_for_64bit
0
6566 if { [check_effective_target_vect_aligned_arrays
]
6567 ||
[check_effective_target_natural_alignment_64
] } {
6568 set et_vector_alignment_reachable_for_64bit
1
6570 verbose
"check_effective_target_vector_alignment_reachable_for_64bit:\
6571 returning $et_vector_alignment_reachable_for_64bit
" 2
6572 return $et_vector_alignment_reachable_for_64bit
6575 #
Return 1 if the target only requires element alignment
for vector accesses
6577 proc check_effective_target_vect_element_align
{ } {
6578 global et_vect_element_align
6581 if [info exists et_vect_element_align
($et_index
)] {
6582 verbose
"check_effective_target_vect_element_align:\
6583 using cached result
" 2
6585 set et_vect_element_align
($et_index
) 0
6586 if { ([istarget arm
*-*-*]
6587 && ![check_effective_target_arm_vect_no_misalign
])
6588 ||
[check_effective_target_vect_hw_misalign
] } {
6589 set et_vect_element_align
($et_index
) 1
6593 verbose
"check_effective_target_vect_element_align:\
6594 returning $et_vect_element_align
($et_index
)" 2
6595 return $et_vect_element_align
($et_index
)
6598 #
Return 1 if we expect to see unaligned accesses in at least some
6601 proc check_effective_target_vect_unaligned_possible
{ } {
6602 return [expr
{ ![check_effective_target_vect_element_align_preferred
]
6603 && (![check_effective_target_vect_no_align
]
6604 ||
[check_effective_target_vect_hw_misalign
]) }]
6607 #
Return 1 if the target supports vector LOAD_LANES operations
, 0 otherwise.
6609 proc check_effective_target_vect_load_lanes
{ } {
6610 global et_vect_load_lanes
6612 if [info exists et_vect_load_lanes
] {
6613 verbose
"check_effective_target_vect_load_lanes: using cached result" 2
6615 set et_vect_load_lanes
0
6616 # We don
't support load_lanes correctly on big-endian arm.
6617 if { ([istarget arm-*-*] && [check_effective_target_arm_neon_ok])
6618 || [istarget aarch64*-*-*] } {
6619 set et_vect_load_lanes 1
6623 verbose "check_effective_target_vect_load_lanes: returning $et_vect_load_lanes" 2
6624 return $et_vect_load_lanes
6627 # Return 1 if the target supports vector masked stores.
6629 proc check_effective_target_vect_masked_store { } {
6630 return [check_effective_target_aarch64_sve]
6633 # Return 1 if the target supports vector scatter stores.
6635 proc check_effective_target_vect_scatter_store { } {
6636 return [check_effective_target_aarch64_sve]
6639 # Return 1 if the target supports vector conditional operations, 0 otherwise.
6641 proc check_effective_target_vect_condition { } {
6642 global et_vect_cond_saved
6645 if [info exists et_vect_cond_saved($et_index)] {
6646 verbose "check_effective_target_vect_cond: using cached result" 2
6648 set et_vect_cond_saved($et_index) 0
6649 if { [istarget aarch64*-*-*]
6650 || [istarget powerpc*-*-*]
6651 || [istarget ia64-*-*]
6652 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6653 || [istarget spu-*-*]
6654 || ([istarget mips*-*-*]
6655 && [et-is-effective-target mips_msa])
6656 || ([istarget arm*-*-*]
6657 && [check_effective_target_arm_neon_ok])
6658 || ([istarget s390*-*-*]
6659 && [check_effective_target_s390_vx]) } {
6660 set et_vect_cond_saved($et_index) 1
6664 verbose "check_effective_target_vect_cond:\
6665 returning $et_vect_cond_saved($et_index)" 2
6666 return $et_vect_cond_saved($et_index)
6669 # Return 1 if the target supports vector conditional operations where
6670 # the comparison has different type from the lhs, 0 otherwise.
6672 proc check_effective_target_vect_cond_mixed { } {
6673 global et_vect_cond_mixed_saved
6676 if [info exists et_vect_cond_mixed_saved($et_index)] {
6677 verbose "check_effective_target_vect_cond_mixed: using cached result" 2
6679 set et_vect_cond_mixed_saved($et_index) 0
6680 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
6681 || [istarget aarch64*-*-*]
6682 || [istarget powerpc*-*-*]
6683 || ([istarget mips*-*-*]
6684 && [et-is-effective-target mips_msa])
6685 || ([istarget s390*-*-*]
6686 && [check_effective_target_s390_vx]) } {
6687 set et_vect_cond_mixed_saved($et_index) 1
6691 verbose "check_effective_target_vect_cond_mixed:\
6692 returning $et_vect_cond_mixed_saved($et_index)" 2
6693 return $et_vect_cond_mixed_saved($et_index)
6696 # Return 1 if the target supports vector char multiplication, 0 otherwise.
6698 proc check_effective_target_vect_char_mult { } {
6699 global et_vect_char_mult_saved
6702 if [info exists et_vect_char_mult_saved($et_index)] {
6703 verbose "check_effective_target_vect_char_mult: using cached result" 2
6705 set et_vect_char_mult_saved($et_index) 0
6706 if { [istarget aarch64*-*-*]
6707 || [istarget ia64-*-*]
6708 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6709 || [check_effective_target_arm32]
6710 || [check_effective_target_powerpc_altivec]
6711 || ([istarget mips*-*-*]
6712 && [et-is-effective-target mips_msa])
6713 || ([istarget s390*-*-*]
6714 && [check_effective_target_s390_vx]) } {
6715 set et_vect_char_mult_saved($et_index) 1
6719 verbose "check_effective_target_vect_char_mult:\
6720 returning $et_vect_char_mult_saved($et_index)" 2
6721 return $et_vect_char_mult_saved($et_index)
6724 # Return 1 if the target supports vector short multiplication, 0 otherwise.
6726 proc check_effective_target_vect_short_mult { } {
6727 global et_vect_short_mult_saved
6730 if [info exists et_vect_short_mult_saved($et_index)] {
6731 verbose "check_effective_target_vect_short_mult: using cached result" 2
6733 set et_vect_short_mult_saved($et_index) 0
6734 if { [istarget ia64-*-*]
6735 || [istarget spu-*-*]
6736 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6737 || [istarget powerpc*-*-*]
6738 || [istarget aarch64*-*-*]
6739 || [check_effective_target_arm32]
6740 || ([istarget mips*-*-*]
6741 && ([et-is-effective-target mips_msa]
6742 || [et-is-effective-target mips_loongson]))
6743 || ([istarget s390*-*-*]
6744 && [check_effective_target_s390_vx]) } {
6745 set et_vect_short_mult_saved($et_index) 1
6749 verbose "check_effective_target_vect_short_mult:\
6750 returning $et_vect_short_mult_saved($et_index)" 2
6751 return $et_vect_short_mult_saved($et_index)
6754 # Return 1 if the target supports vector int multiplication, 0 otherwise.
6756 proc check_effective_target_vect_int_mult { } {
6757 global et_vect_int_mult_saved
6760 if [info exists et_vect_int_mult_saved($et_index)] {
6761 verbose "check_effective_target_vect_int_mult: using cached result" 2
6763 set et_vect_int_mult_saved($et_index) 0
6764 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
6765 || [istarget spu-*-*]
6766 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6767 || [istarget ia64-*-*]
6768 || [istarget aarch64*-*-*]
6769 || ([istarget mips*-*-*]
6770 && [et-is-effective-target mips_msa])
6771 || [check_effective_target_arm32]
6772 || ([istarget s390*-*-*]
6773 && [check_effective_target_s390_vx]) } {
6774 set et_vect_int_mult_saved($et_index) 1
6778 verbose "check_effective_target_vect_int_mult:\
6779 returning $et_vect_int_mult_saved($et_index)" 2
6780 return $et_vect_int_mult_saved($et_index)
6783 # Return 1 if the target supports 64 bit hardware vector
6784 # multiplication of long operands with a long result, 0 otherwise.
6786 # This can change for different subtargets so do not cache the result.
6788 proc check_effective_target_vect_long_mult { } {
6789 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
6790 || (([istarget powerpc*-*-*]
6791 && ![istarget powerpc-*-linux*paired*])
6792 && [check_effective_target_ilp32])
6793 || [is-effective-target arm_neon]
6794 || ([istarget sparc*-*-*] && [check_effective_target_ilp32])
6795 || [istarget aarch64*-*-*]
6796 || ([istarget mips*-*-*]
6797 && [et-is-effective-target mips_msa]) } {
6803 verbose "check_effective_target_vect_long_mult: returning $answer" 2
6807 # Return 1 if the target supports vector even/odd elements extraction, 0 otherwise.
6809 proc check_effective_target_vect_extract_even_odd { } {
6810 global et_vect_extract_even_odd_saved
6813 if [info exists et_vect_extract_even_odd_saved($et_index)] {
6814 verbose "check_effective_target_vect_extract_even_odd:\
6815 using cached result" 2
6817 set et_vect_extract_even_odd_saved($et_index) 0
6818 if { [istarget aarch64*-*-*]
6819 || [istarget powerpc*-*-*]
6820 || [is-effective-target arm_neon]
6821 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6822 || [istarget ia64-*-*]
6823 || [istarget spu-*-*]
6824 || ([istarget mips*-*-*]
6825 && ([et-is-effective-target mips_msa]
6826 || [et-is-effective-target mpaired_single]))
6827 || ([istarget s390*-*-*]
6828 && [check_effective_target_s390_vx]) } {
6829 set et_vect_extract_even_odd_saved($et_index) 1
6833 verbose "check_effective_target_vect_extract_even_odd:\
6834 returning $et_vect_extract_even_odd_saved($et_index)" 2
6835 return $et_vect_extract_even_odd_saved($et_index)
6838 # Return 1 if the target supports vector interleaving, 0 otherwise.
6840 proc check_effective_target_vect_interleave { } {
6841 global et_vect_interleave_saved
6844 if [info exists et_vect_interleave_saved($et_index)] {
6845 verbose "check_effective_target_vect_interleave: using cached result" 2
6847 set et_vect_interleave_saved($et_index) 0
6848 if { [istarget aarch64*-*-*]
6849 || [istarget powerpc*-*-*]
6850 || [is-effective-target arm_neon]
6851 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6852 || [istarget ia64-*-*]
6853 || [istarget spu-*-*]
6854 || ([istarget mips*-*-*]
6855 && ([et-is-effective-target mpaired_single]
6856 || [et-is-effective-target mips_msa]))
6857 || ([istarget s390*-*-*]
6858 && [check_effective_target_s390_vx]) } {
6859 set et_vect_interleave_saved($et_index) 1
6863 verbose "check_effective_target_vect_interleave:\
6864 returning $et_vect_interleave_saved($et_index)" 2
6865 return $et_vect_interleave_saved($et_index)
6868 foreach N {2 3 4 8} {
6869 eval [string map [list N $N] {
6870 # Return 1 if the target supports 2-vector interleaving
6871 proc check_effective_target_vect_stridedN { } {
6872 global et_vect_stridedN_saved
6875 if [info exists et_vect_stridedN_saved($et_index)] {
6876 verbose "check_effective_target_vect_stridedN:\
6877 using cached result" 2
6879 set et_vect_stridedN_saved($et_index) 0
6881 && [check_effective_target_vect_interleave]
6882 && [check_effective_target_vect_extract_even_odd] } {
6883 set et_vect_stridedN_saved($et_index) 1
6885 if { ([istarget arm*-*-*]
6886 || [istarget aarch64*-*-*]) && N >= 2 && N <= 4 } {
6887 set et_vect_stridedN_saved($et_index) 1
6891 verbose "check_effective_target_vect_stridedN:\
6892 returning $et_vect_stridedN_saved($et_index)" 2
6893 return $et_vect_stridedN_saved($et_index)
6898 # Return the list of vector sizes (in bits) that each target supports.
6899 # A vector length of "0" indicates variable-length vectors.
6901 proc available_vector_sizes { } {
6903 if { [istarget aarch64*-*-*] } {
6904 if { [check_effective_target_aarch64_sve] } {
6905 lappend result [aarch64_sve_bits]
6907 lappend result 128 64
6908 } elseif { [istarget arm*-*-*]
6909 && [check_effective_target_arm_neon_ok] } {
6910 lappend result 128 64
6911 } elseif { (([istarget i?86-*-*] || [istarget x86_64-*-*])
6912 && ([check_avx_available] && ![check_prefer_avx128])) } {
6913 lappend result 256 128
6914 } elseif { [istarget sparc*-*-*] } {
6917 # The traditional default asumption.
6923 # Return 1 if the target supports multiple vector sizes
6925 proc check_effective_target_vect_multiple_sizes { } {
6926 return [expr { [llength [available_vector_sizes]] > 1 }]
6929 # Return true if variable-length vectors are supported.
6931 proc check_effective_target_vect_variable_length { } {
6932 return [expr { [lindex [available_vector_sizes] 0] == 0 }]
6935 # Return 1 if the target supports vectors of 64 bits.
6937 proc check_effective_target_vect64 { } {
6938 return [expr { [lsearch -exact [available_vector_sizes] 64] >= 0 }]
6941 # Return 1 if the target supports vector copysignf calls.
6943 proc check_effective_target_vect_call_copysignf { } {
6944 global et_vect_call_copysignf_saved
6947 if [info exists et_vect_call_copysignf_saved($et_index)] {
6948 verbose "check_effective_target_vect_call_copysignf:\
6949 using cached result" 2
6951 set et_vect_call_copysignf_saved($et_index) 0
6952 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
6953 || [istarget powerpc*-*-*]
6954 || [istarget aarch64*-*-*] } {
6955 set et_vect_call_copysignf_saved($et_index) 1
6959 verbose "check_effective_target_vect_call_copysignf:\
6960 returning $et_vect_call_copysignf_saved($et_index)" 2
6961 return $et_vect_call_copysignf_saved($et_index)
6964 # Return 1 if the target supports hardware square root instructions.
6966 proc check_effective_target_sqrt_insn { } {
6967 global et_sqrt_insn_saved
6969 if [info exists et_sqrt_insn_saved] {
6970 verbose "check_effective_target_hw_sqrt: using cached result" 2
6972 set et_sqrt_insn_saved 0
6973 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
6974 || [istarget powerpc*-*-*]
6975 || [istarget aarch64*-*-*]
6976 || ([istarget arm*-*-*] && [check_effective_target_arm_vfp_ok])
6977 || ([istarget s390*-*-*]
6978 && [check_effective_target_s390_vx]) } {
6979 set et_sqrt_insn_saved 1
6983 verbose "check_effective_target_hw_sqrt: returning et_sqrt_insn_saved" 2
6984 return $et_sqrt_insn_saved
6987 # Return 1 if the target supports vector sqrtf calls.
6989 proc check_effective_target_vect_call_sqrtf { } {
6990 global et_vect_call_sqrtf_saved
6993 if [info exists et_vect_call_sqrtf_saved($et_index)] {
6994 verbose "check_effective_target_vect_call_sqrtf: using cached result" 2
6996 set et_vect_call_sqrtf_saved($et_index) 0
6997 if { [istarget aarch64*-*-*]
6998 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6999 || ([istarget powerpc*-*-*] && [check_vsx_hw_available])
7000 || ([istarget s390*-*-*]
7001 && [check_effective_target_s390_vx]) } {
7002 set et_vect_call_sqrtf_saved($et_index) 1
7006 verbose "check_effective_target_vect_call_sqrtf:\
7007 returning $et_vect_call_sqrtf_saved($et_index)" 2
7008 return $et_vect_call_sqrtf_saved($et_index)
7011 # Return 1 if the target supports vector lrint calls.
7013 proc check_effective_target_vect_call_lrint { } {
7014 set et_vect_call_lrint 0
7015 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
7016 && [check_effective_target_ilp32]) } {
7017 set et_vect_call_lrint 1
7020 verbose "check_effective_target_vect_call_lrint: returning $et_vect_call_lrint" 2
7021 return $et_vect_call_lrint
7024 # Return 1 if the target supports vector btrunc calls.
7026 proc check_effective_target_vect_call_btrunc { } {
7027 global et_vect_call_btrunc_saved
7030 if [info exists et_vect_call_btrunc_saved($et_index)] {
7031 verbose "check_effective_target_vect_call_btrunc:\
7032 using cached result" 2
7034 set et_vect_call_btrunc_saved($et_index) 0
7035 if { [istarget aarch64*-*-*] } {
7036 set et_vect_call_btrunc_saved($et_index) 1
7040 verbose "check_effective_target_vect_call_btrunc:\
7041 returning $et_vect_call_btrunc_saved($et_index)" 2
7042 return $et_vect_call_btrunc_saved($et_index)
7045 # Return 1 if the target supports vector btruncf calls.
7047 proc check_effective_target_vect_call_btruncf { } {
7048 global et_vect_call_btruncf_saved
7051 if [info exists et_vect_call_btruncf_saved($et_index)] {
7052 verbose "check_effective_target_vect_call_btruncf:\
7053 using cached result" 2
7055 set et_vect_call_btruncf_saved($et_index) 0
7056 if { [istarget aarch64*-*-*] } {
7057 set et_vect_call_btruncf_saved($et_index) 1
7061 verbose "check_effective_target_vect_call_btruncf:\
7062 returning $et_vect_call_btruncf_saved($et_index)" 2
7063 return $et_vect_call_btruncf_saved($et_index)
7066 # Return 1 if the target supports vector ceil calls.
7068 proc check_effective_target_vect_call_ceil { } {
7069 global et_vect_call_ceil_saved
7072 if [info exists et_vect_call_ceil_saved($et_index)] {
7073 verbose "check_effective_target_vect_call_ceil: using cached result" 2
7075 set et_vect_call_ceil_saved($et_index) 0
7076 if { [istarget aarch64*-*-*] } {
7077 set et_vect_call_ceil_saved($et_index) 1
7081 verbose "check_effective_target_vect_call_ceil:\
7082 returning $et_vect_call_ceil_saved($et_index)" 2
7083 return $et_vect_call_ceil_saved($et_index)
7086 # Return 1 if the target supports vector ceilf calls.
7088 proc check_effective_target_vect_call_ceilf { } {
7089 global et_vect_call_ceilf_saved
7092 if [info exists et_vect_call_ceilf_saved($et_index)] {
7093 verbose "check_effective_target_vect_call_ceilf: using cached result" 2
7095 set et_vect_call_ceilf_saved($et_index) 0
7096 if { [istarget aarch64*-*-*] } {
7097 set et_vect_call_ceilf_saved($et_index) 1
7101 verbose "check_effective_target_vect_call_ceilf:\
7102 returning $et_vect_call_ceilf_saved($et_index)" 2
7103 return $et_vect_call_ceilf_saved($et_index)
7106 # Return 1 if the target supports vector floor calls.
7108 proc check_effective_target_vect_call_floor { } {
7109 global et_vect_call_floor_saved
7112 if [info exists et_vect_call_floor_saved($et_index)] {
7113 verbose "check_effective_target_vect_call_floor: using cached result" 2
7115 set et_vect_call_floor_saved($et_index) 0
7116 if { [istarget aarch64*-*-*] } {
7117 set et_vect_call_floor_saved($et_index) 1
7121 verbose "check_effective_target_vect_call_floor:\
7122 returning $et_vect_call_floor_saved($et_index)" 2
7123 return $et_vect_call_floor_saved($et_index)
7126 # Return 1 if the target supports vector floorf calls.
7128 proc check_effective_target_vect_call_floorf { } {
7129 global et_vect_call_floorf_saved
7132 if [info exists et_vect_call_floorf_saved($et_index)] {
7133 verbose "check_effective_target_vect_call_floorf: using cached result" 2
7135 set et_vect_call_floorf_saved($et_index) 0
7136 if { [istarget aarch64*-*-*] } {
7137 set et_vect_call_floorf_saved($et_index) 1
7141 verbose "check_effective_target_vect_call_floorf:\
7142 returning $et_vect_call_floorf_saved($et_index)" 2
7143 return $et_vect_call_floorf_saved($et_index)
7146 # Return 1 if the target supports vector lceil calls.
7148 proc check_effective_target_vect_call_lceil { } {
7149 global et_vect_call_lceil_saved
7152 if [info exists et_vect_call_lceil_saved($et_index)] {
7153 verbose "check_effective_target_vect_call_lceil: using cached result" 2
7155 set et_vect_call_lceil_saved($et_index) 0
7156 if { [istarget aarch64*-*-*] } {
7157 set et_vect_call_lceil_saved($et_index) 1
7161 verbose "check_effective_target_vect_call_lceil:\
7162 returning $et_vect_call_lceil_saved($et_index)" 2
7163 return $et_vect_call_lceil_saved($et_index)
7166 # Return 1 if the target supports vector lfloor calls.
7168 proc check_effective_target_vect_call_lfloor { } {
7169 global et_vect_call_lfloor_saved
7172 if [info exists et_vect_call_lfloor_saved($et_index)] {
7173 verbose "check_effective_target_vect_call_lfloor: using cached result" 2
7175 set et_vect_call_lfloor_saved($et_index) 0
7176 if { [istarget aarch64*-*-*] } {
7177 set et_vect_call_lfloor_saved($et_index) 1
7181 verbose "check_effective_target_vect_call_lfloor:\
7182 returning $et_vect_call_lfloor_saved($et_index)" 2
7183 return $et_vect_call_lfloor_saved($et_index)
7186 # Return 1 if the target supports vector nearbyint calls.
7188 proc check_effective_target_vect_call_nearbyint { } {
7189 global et_vect_call_nearbyint_saved
7192 if [info exists et_vect_call_nearbyint_saved($et_index)] {
7193 verbose "check_effective_target_vect_call_nearbyint: using cached result" 2
7195 set et_vect_call_nearbyint_saved($et_index) 0
7196 if { [istarget aarch64*-*-*] } {
7197 set et_vect_call_nearbyint_saved($et_index) 1
7201 verbose "check_effective_target_vect_call_nearbyint:\
7202 returning $et_vect_call_nearbyint_saved($et_index)" 2
7203 return $et_vect_call_nearbyint_saved($et_index)
7206 # Return 1 if the target supports vector nearbyintf calls.
7208 proc check_effective_target_vect_call_nearbyintf { } {
7209 global et_vect_call_nearbyintf_saved
7212 if [info exists et_vect_call_nearbyintf_saved($et_index)] {
7213 verbose "check_effective_target_vect_call_nearbyintf:\
7214 using cached result" 2
7216 set et_vect_call_nearbyintf_saved($et_index) 0
7217 if { [istarget aarch64*-*-*] } {
7218 set et_vect_call_nearbyintf_saved($et_index) 1
7222 verbose "check_effective_target_vect_call_nearbyintf:\
7223 returning $et_vect_call_nearbyintf_saved($et_index)" 2
7224 return $et_vect_call_nearbyintf_saved($et_index)
7227 # Return 1 if the target supports vector round calls.
7229 proc check_effective_target_vect_call_round { } {
7230 global et_vect_call_round_saved
7233 if [info exists et_vect_call_round_saved($et_index)] {
7234 verbose "check_effective_target_vect_call_round: using cached result" 2
7236 set et_vect_call_round_saved($et_index) 0
7237 if { [istarget aarch64*-*-*] } {
7238 set et_vect_call_round_saved($et_index) 1
7242 verbose "check_effective_target_vect_call_round:\
7243 returning $et_vect_call_round_saved($et_index)" 2
7244 return $et_vect_call_round_saved($et_index)
7247 # Return 1 if the target supports vector roundf calls.
7249 proc check_effective_target_vect_call_roundf { } {
7250 global et_vect_call_roundf_saved
7253 if [info exists et_vect_call_roundf_saved($et_index)] {
7254 verbose "check_effective_target_vect_call_roundf: using cached result" 2
7256 set et_vect_call_roundf_saved($et_index) 0
7257 if { [istarget aarch64*-*-*] } {
7258 set et_vect_call_roundf_saved($et_index) 1
7262 verbose "check_effective_target_vect_call_roundf:\
7263 returning $et_vect_call_roundf_saved($et_index)" 2
7264 return $et_vect_call_roundf_saved($et_index)
7267 # Return 1 if the target supports AND, OR and XOR reduction.
7269 proc check_effective_target_vect_logical_reduc { } {
7270 return [check_effective_target_aarch64_sve]
7273 # Return 1 if the target supports the fold_extract_last optab.
7275 proc check_effective_target_vect_fold_extract_last { } {
7276 return [check_effective_target_aarch64_sve]
7279 # Return 1 if the target supports section-anchors
7281 proc check_effective_target_section_anchors { } {
7282 global et_section_anchors_saved
7284 if [info exists et_section_anchors_saved] {
7285 verbose "check_effective_target_section_anchors: using cached result" 2
7287 set et_section_anchors_saved 0
7288 if { [istarget powerpc*-*-*]
7289 || [istarget arm*-*-*]
7290 || [istarget aarch64*-*-*] } {
7291 set et_section_anchors_saved 1
7295 verbose "check_effective_target_section_anchors: returning $et_section_anchors_saved" 2
7296 return $et_section_anchors_saved
7299 # Return 1 if the target supports atomic operations on "int_128" values.
7301 proc check_effective_target_sync_int_128 { } {
7302 if { [istarget spu-*-*] } {
7309 # Return 1 if the target supports atomic operations on "int_128" values
7310 # and can execute them.
7311 # This requires support for both compare-and-swap and true atomic loads.
7313 proc check_effective_target_sync_int_128_runtime { } {
7314 if { [istarget spu-*-*] } {
7321 # Return 1 if the target supports atomic operations on "long long".
7323 # Note: 32bit x86 targets require -march=pentium in dg-options.
7324 # Note: 32bit s390 targets require -mzarch in dg-options.
7326 proc check_effective_target_sync_long_long { } {
7327 if { [istarget i?86-*-*] || [istarget x86_64-*-*])
7328 || [istarget aarch64*-*-*]
7329 || [istarget arm*-*-*]
7330 || [istarget alpha*-*-*]
7331 || ([istarget sparc*-*-*] && [check_effective_target_lp64])
7332 || [istarget s390*-*-*]
7333 || [istarget spu-*-*] } {
7340 # Return 1 if the target supports atomic operations on "long long"
7341 # and can execute them.
7343 # Note: 32bit x86 targets require -march=pentium in dg-options.
7345 proc check_effective_target_sync_long_long_runtime { } {
7346 if { (([istarget x86_64-*-*] || [istarget i?86-*-*])
7347 && [check_cached_effective_target sync_long_long_available {
7348 check_runtime_nocache sync_long_long_available {
7352 unsigned int eax, ebx, ecx, edx;
7353 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
7354 return !(edx & bit_CMPXCHG8B);
7359 || [istarget aarch64*-*-*]
7360 || ([istarget arm*-*-linux-*]
7361 && [check_runtime sync_longlong_runtime {
7367 if (sizeof (long long) != 8)
7370 /* Just check for native;
7371 checking for kernel fallback is tricky. */
7372 asm volatile ("ldrexd r0,r1, [%0]"
7373 : : "r" (&l1) : "r0", "r1");
7377 || [istarget alpha*-*-*]
7378 || ([istarget sparc*-*-*]
7379 && [check_effective_target_lp64]
7380 && [check_effective_target_ultrasparc_hw])
7381 || [istarget spu-*-*]
7382 || ([istarget powerpc*-*-*] && [check_effective_target_lp64]) } {
7389 # Return 1 if the target supports byte swap instructions.
7391 proc check_effective_target_bswap { } {
7392 global et_bswap_saved
7394 if [info exists et_bswap_saved] {
7395 verbose "check_effective_target_bswap: using cached result" 2
7397 set et_bswap_saved 0
7398 if { [istarget aarch64*-*-*]
7399 || [istarget alpha*-*-*]
7400 || [istarget i?86-*-*] || [istarget x86_64-*-*]
7401 || [istarget m68k-*-*]
7402 || [istarget powerpc*-*-*]
7403 || [istarget rs6000-*-*]
7404 || [istarget s390*-*-*]
7405 || ([istarget arm*-*-*]
7406 && [check_no_compiler_messages_nocache arm_v6_or_later object {
7408 #error not armv6 or later
7412 set et_bswap_saved 1
7416 verbose "check_effective_target_bswap: returning $et_bswap_saved" 2
7417 return $et_bswap_saved
7420 # Return 1 if the target supports atomic operations on "int" and "long".
7422 proc check_effective_target_sync_int_long { } {
7423 global et_sync_int_long_saved
7425 if [info exists et_sync_int_long_saved] {
7426 verbose "check_effective_target_sync_int_long: using cached result" 2
7428 set et_sync_int_long_saved 0
7429 # This is intentionally powerpc but not rs6000, rs6000 doesn't have the
7430 #
load-reserved/store
-conditional instructions.
7431 if { [istarget ia64
-*-*]
7432 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
7433 ||
[istarget aarch64
*-*-*]
7434 ||
[istarget alpha
*-*-*]
7435 ||
[istarget arm
*-*-linux
-*]
7436 ||
([istarget arm
*-*-*]
7437 && [check_effective_target_arm_acq_rel
])
7438 ||
[istarget bfin
*-*linux
*]
7439 ||
[istarget hppa
*-*linux
*]
7440 ||
[istarget s390
*-*-*]
7441 ||
[istarget powerpc
*-*-*]
7442 ||
[istarget crisv32
-*-*] ||
[istarget cris
-*-*]
7443 ||
([istarget sparc
*-*-*] && [check_effective_target_sparc_v9
])
7444 ||
[istarget spu
-*-*]
7445 ||
([istarget arc
*-*-*] && [check_effective_target_arc_atomic
])
7446 ||
[check_effective_target_mips_llsc
] } {
7447 set et_sync_int_long_saved
1
7451 verbose
"check_effective_target_sync_int_long: returning $et_sync_int_long_saved" 2
7452 return $et_sync_int_long_saved
7455 #
Return 1 if the target supports atomic operations
on "char" and "short".
7457 proc check_effective_target_sync_char_short
{ } {
7458 global et_sync_char_short_saved
7460 if [info exists et_sync_char_short_saved
] {
7461 verbose
"check_effective_target_sync_char_short: using cached result" 2
7463 set et_sync_char_short_saved
0
7464 # This is intentionally powerpc but not rs6000
, rs6000 doesn
't have the
7465 # load-reserved/store-conditional instructions.
7466 if { [istarget aarch64*-*-*]
7467 || [istarget ia64-*-*]
7468 || [istarget i?86-*-*] || [istarget x86_64-*-*]
7469 || [istarget alpha*-*-*]
7470 || [istarget arm*-*-linux-*]
7471 || ([istarget arm*-*-*]
7472 && [check_effective_target_arm_acq_rel])
7473 || [istarget hppa*-*linux*]
7474 || [istarget s390*-*-*]
7475 || [istarget powerpc*-*-*]
7476 || [istarget crisv32-*-*] || [istarget cris-*-*]
7477 || ([istarget sparc*-*-*] && [check_effective_target_sparc_v9])
7478 || [istarget spu-*-*]
7479 || ([istarget arc*-*-*] && [check_effective_target_arc_atomic])
7480 || [check_effective_target_mips_llsc] } {
7481 set et_sync_char_short_saved 1
7485 verbose "check_effective_target_sync_char_short: returning $et_sync_char_short_saved" 2
7486 return $et_sync_char_short_saved
7489 # Return 1 if the target uses a ColdFire FPU.
7491 proc check_effective_target_coldfire_fpu { } {
7492 return [check_no_compiler_messages coldfire_fpu assembly {
7499 # Return true if this is a uClibc target.
7501 proc check_effective_target_uclibc {} {
7502 return [check_no_compiler_messages uclibc object {
7503 #include <features.h>
7504 #if !defined (__UCLIBC__)
7510 # Return true if this is a uclibc target and if the uclibc feature
7511 # described by __$feature__ is not present.
7513 proc check_missing_uclibc_feature {feature} {
7514 return [check_no_compiler_messages $feature object "
7515 #include <features.h>
7516 #if !defined (__UCLIBC) || defined (__${feature}__)
7522 # Return true if this is a Newlib target.
7524 proc check_effective_target_newlib {} {
7525 return [check_no_compiler_messages newlib object {
7530 # Some newlib versions don't provide a frexpl and instead depend
7531 #
on frexp to implement long double conversions in their printf
-like
7532 # functions. This leads to broken results. Detect such versions here.
7534 proc check_effective_target_newlib_broken_long_double_io
{} {
7535 if { [is
-effective
-target newlib
] && ![is
-effective
-target frexpl
] } {
7541 #
Return true
if this is NOT a Bionic target.
7543 proc check_effective_target_non_bionic
{} {
7544 return [check_no_compiler_messages non_bionic object
{
7546 #
if defined
(__BIONIC__
)
7552 #
Return true
if this target has error.h header.
7554 proc check_effective_target_error_h
{} {
7555 return [check_no_compiler_messages error_h object
{
7560 #
Return true
if this target has tgmath.h header.
7562 proc check_effective_target_tgmath_h
{} {
7563 return [check_no_compiler_messages tgmath_h object
{
7568 #
Return true
if target
's libc supports complex functions.
7570 proc check_effective_target_libc_has_complex_functions {} {
7571 return [check_no_compiler_messages libc_has_complex_functions object {
7572 #include <complex.h>
7577 # (a) an error of a few ULP is expected in string to floating-point
7578 # conversion functions; and
7579 # (b) overflow is not always detected correctly by those functions.
7581 proc check_effective_target_lax_strtofp {} {
7582 # By default, assume that all uClibc targets suffer from this.
7583 return [check_effective_target_uclibc]
7586 # Return 1 if this is a target for which wcsftime is a dummy
7587 # function that always returns 0.
7589 proc check_effective_target_dummy_wcsftime {} {
7590 # By default, assume that all uClibc targets suffer from this.
7591 return [check_effective_target_uclibc]
7594 # Return 1 if constructors with initialization priority arguments are
7595 # supposed on this target.
7597 proc check_effective_target_init_priority {} {
7598 return [check_no_compiler_messages init_priority assembly "
7599 void f() __attribute__((constructor (1000)));
7604 # Return 1 if the target matches the effective target 'arg', 0 otherwise.
7605 # This can be used with any check_* proc that takes no argument and
7606 # returns only 1 or 0. It could be used with check_* procs that take
7607 # arguments with keywords that pass particular arguments.
7609 proc is-effective-target { arg } {
7612 if { ![info exists et_index] } {
7613 # Initialize the effective target index that is used in some
7614 # check_effective_target_* procs.
7617 if { [info procs check_effective_target_${arg}] != [list] } {
7618 set selected [check_effective_target_${arg}]
7621 "vmx_hw" { set selected [check_vmx_hw_available] }
7622 "vsx_hw" { set selected [check_vsx_hw_available] }
7623 "p8vector_hw" { set selected [check_p8vector_hw_available] }
7624 "p9vector_hw" { set selected [check_p9vector_hw_available] }
7625 "p9modulo_hw" { set selected [check_p9modulo_hw_available] }
7626 "ppc_float128_sw" { set selected [check_ppc_float128_sw_available] }
7627 "ppc_float128_hw" { set selected [check_ppc_float128_hw_available] }
7628 "ppc_recip_hw" { set selected [check_ppc_recip_hw_available] }
7629 "ppc_cpu_supports_hw" { set selected [check_ppc_cpu_supports_hw_available] }
7630 "dfp_hw" { set selected [check_dfp_hw_available] }
7631 "htm_hw" { set selected [check_htm_hw_available] }
7632 "named_sections" { set selected [check_named_sections_available] }
7633 "gc_sections" { set selected [check_gc_sections_available] }
7634 "cxa_atexit" { set selected [check_cxa_atexit_available] }
7635 default { error "unknown effective target keyword `$arg'" }
7638 verbose
"is-effective-target: $arg $selected" 2
7642 #
Return 1 if the
argument is an effective
-target keyword
, 0 otherwise.
7644 proc is
-effective
-target
-keyword
{ arg } {
7645 if { [info procs check_effective_target_$
{arg}] != [list
] } {
7648 # These have different names
for their check_
* procs.
7650 "vmx_hw" { return 1 }
7651 "vsx_hw" { return 1 }
7652 "p8vector_hw" { return 1 }
7653 "p9vector_hw" { return 1 }
7654 "p9modulo_hw" { return 1 }
7655 "ppc_float128_sw" { return 1 }
7656 "ppc_float128_hw" { return 1 }
7657 "ppc_recip_hw" { return 1 }
7658 "dfp_hw" { return 1 }
7659 "htm_hw" { return 1 }
7660 "named_sections" { return 1 }
7661 "gc_sections" { return 1 }
7662 "cxa_atexit" { return 1 }
7663 default
{ return 0 }
7668 #
Execute tests
for all targets in EFFECTIVE_TARGETS list.
Set et_index to
7669 # indicate what target is currently being processed. This is
for
7670 # the vectorizer tests
, e.g. vect_int
, to keep track what target supports
7673 proc et
-dg
-runtest
{ runtest testcases flags default
-extra
-flags
} {
7674 global dg
-do-what
-default
7675 global EFFECTIVE_TARGETS
7678 if { [llength $EFFECTIVE_TARGETS
] > 0 } {
7679 foreach target $EFFECTIVE_TARGETS
{
7680 set target_flags $flags
7681 set dg
-do-what
-default
compile
7682 set et_index
[lsearch
-exact $EFFECTIVE_TARGETS $target
]
7683 if { [info procs add_options_for_$
{target
}] != [list
] } {
7684 set target_flags
[add_options_for_$
{target
} "$flags"]
7686 if { [info procs check_effective_target_$
{target
}_runtime
]
7687 != [list
] && [check_effective_target_$
{target
}_runtime
] } {
7688 set dg
-do-what
-default run
7690 $runtest $testcases $target_flags $
{default
-extra
-flags
}
7694 $runtest $testcases $flags $
{default
-extra
-flags
}
7698 #
Return 1 if a target matches the target in EFFECTIVE_TARGETS at index
7699 # et_index
, 0 otherwise.
7701 proc et
-is
-effective
-target
{ target
} {
7702 global EFFECTIVE_TARGETS
7705 if { [llength $EFFECTIVE_TARGETS
] > $et_index
7706 && [lindex $EFFECTIVE_TARGETS $et_index
] == $target
} {
7712 #
Return 1 if target default to short enums
7714 proc check_effective_target_short_enums
{ } {
7715 return [check_no_compiler_messages short_enums assembly
{
7717 int s
[sizeof
(enum foo
) == 1 ?
1 : -1];
7721 #
Return 1 if target supports merging string constants at link time.
7723 proc check_effective_target_string_merging
{ } {
7724 return [check_no_messages_and_pattern string_merging \
7725 "rodata\\.str" assembly {
7726 const char
*var
= "String";
7730 #
Return 1 if target has the basic signed and unsigned types in
7731 #
<stdint.h
>, 0 otherwise. This will be obsolete when GCC ensures a
7732 # working
<stdint.h
> for all targets.
7734 proc check_effective_target_stdint_types
{ } {
7735 return [check_no_compiler_messages stdint_types assembly
{
7737 int8_t a
; int16_t b
; int32_t c
; int64_t d
;
7738 uint8_t e
; uint16_t f
; uint32_t g
; uint64_t h
;
7742 #
Return 1 if target has the basic signed and unsigned types in
7743 #
<inttypes.h
>, 0 otherwise. This is
for tests that GCC
's notions of
7744 # these types agree with those in the header, as some systems have
7745 # only <inttypes.h>.
7747 proc check_effective_target_inttypes_types { } {
7748 return [check_no_compiler_messages inttypes_types assembly {
7749 #include <inttypes.h>
7750 int8_t a; int16_t b; int32_t c; int64_t d;
7751 uint8_t e; uint16_t f; uint32_t g; uint64_t h;
7755 # Return 1 if programs are intended to be run on a simulator
7756 # (i.e. slowly) rather than hardware (i.e. fast).
7758 proc check_effective_target_simulator { } {
7760 # All "src/sim" simulators set this one.
7761 if [board_info target exists is_simulator] {
7762 return [board_info target is_simulator]
7765 # The "sid" simulators don't
set that one
, but at least they
set
7767 if [board_info target
exists slow_simulator
] {
7768 return [board_info target slow_simulator
]
7774 #
Return 1 if programs are intended to be run
on hardware rather than
7777 proc check_effective_target_hw
{ } {
7779 # All
"src/sim" simulators set this one.
7780 if [board_info target
exists is_simulator
] {
7781 if [board_info target is_simulator
] {
7788 # The
"sid" simulators don't set that one, but at least they set
7790 if [board_info target
exists slow_simulator
] {
7791 if [board_info target slow_simulator
] {
7801 #
Return 1 if the target is a VxWorks kernel.
7803 proc check_effective_target_vxworks_kernel
{ } {
7804 return [check_no_compiler_messages vxworks_kernel assembly
{
7805 #
if !defined __vxworks || defined __RTP__
7811 #
Return 1 if the target is a VxWorks RTP.
7813 proc check_effective_target_vxworks_rtp
{ } {
7814 return [check_no_compiler_messages vxworks_rtp assembly
{
7815 #
if !defined __vxworks ||
!defined __RTP__
7821 #
Return 1 if the target is expected to provide wide character support.
7823 proc check_effective_target_wchar
{ } {
7824 if {[check_missing_uclibc_feature UCLIBC_HAS_WCHAR
]} {
7827 return [check_no_compiler_messages wchar assembly
{
7832 #
Return 1 if the target has
<pthread.h
>.
7834 proc check_effective_target_pthread_h
{ } {
7835 return [check_no_compiler_messages pthread_h assembly
{
7836 #
include <pthread.h
>
7840 #
Return 1 if the target can truncate a file from a file
-descriptor
,
7841 # as used by libgfortran
/io
/unix.c
:fd_truncate
; i.e. ftruncate or
7842 # chsize. We test
for a trivially functional truncation
; no stubs.
7843 # As libgfortran uses _FILE_OFFSET_BITS
64, we
do too
; it
'll cause a
7844 # different function to be used.
7846 proc check_effective_target_fd_truncate { } {
7848 #define _FILE_OFFSET_BITS 64
7855 FILE *f = fopen ("tst.tmp", "wb");
7857 const char t[] = "test writing more than ten characters";
7861 write (fd, t, sizeof (t) - 1);
7863 if (ftruncate (fd, 10) != 0)
7872 f = fopen ("tst.tmp", "rb");
7873 if (fread (s, 1, sizeof (s), f) != 10 || strncmp (s, t, 10) != 0)
7881 if { [check_runtime ftruncate $prog] } {
7885 regsub "ftruncate" $prog "chsize" prog
7886 return [check_runtime chsize $prog]
7889 # Add to FLAGS all the target-specific flags needed to access the c99 runtime.
7891 proc add_options_for_c99_runtime { flags } {
7892 if { [istarget *-*-solaris2*] } {
7893 return "$flags -std=c99"
7895 if { [istarget powerpc-*-darwin*] } {
7896 return "$flags -mmacosx-version-min=10.3"
7901 # Add to FLAGS all the target-specific flags needed to enable
7902 # full IEEE compliance mode.
7904 proc add_options_for_ieee { flags } {
7905 if { [istarget alpha*-*-*]
7906 || [istarget sh*-*-*] } {
7907 return "$flags -mieee"
7909 if { [istarget rx-*-*] } {
7910 return "$flags -mnofpu"
7915 if {![info exists flags_to_postpone]} {
7916 set flags_to_postpone ""
7919 # Add to FLAGS the flags needed to enable functions to bind locally
7920 # when using pic/PIC passes in the testsuite.
7921 proc add_options_for_bind_pic_locally { flags } {
7922 global flags_to_postpone
7924 # Instead of returning 'flags
' with the -fPIE or -fpie appended, we save it
7925 # in 'flags_to_postpone
' and append it later in gcc_target_compile procedure in
7926 # order to make sure that the multilib_flags doesn't override this.
7928 if {[check_no_compiler_messages using_pic2 assembly
{
7933 set flags_to_postpone
"-fPIE"
7936 if {[check_no_compiler_messages using_pic1 assembly
{
7941 set flags_to_postpone
"-fpie"
7947 # Add to FLAGS the flags needed to enable
64-bit vectors.
7949 proc add_options_for_double_vectors
{ flags
} {
7950 if [is
-effective
-target arm_neon_ok
] {
7951 return "$flags -mvectorize-with-neon-double"
7957 # Add to FLAGS the flags needed to
define the STACK_SIZE macro.
7959 proc add_options_for_stack_size
{ flags
} {
7960 if [is
-effective
-target stack_size
] {
7961 set stack_size
[dg
-effective
-target
-value stack_size
]
7962 return "$flags -DSTACK_SIZE=$stack_size"
7968 #
Return 1 if the target provides a full C99 runtime.
7970 proc check_effective_target_c99_runtime
{ } {
7971 return [check_cached_effective_target c99_runtime
{
7974 set file
[open
"$srcdir/gcc.dg/builtins-config.h"]
7975 set contents
[read $file
]
7978 #ifndef HAVE_C99_RUNTIME
7979 #error
!HAVE_C99_RUNTIME
7982 check_no_compiler_messages_nocache c99_runtime assembly \
7983 $contents
[add_options_for_c99_runtime
""]
7987 #
Return 1 if target wchar_t is at least
4 bytes.
7989 proc check_effective_target_4byte_wchar_t
{ } {
7990 return [check_no_compiler_messages
4byte_wchar_t object
{
7991 int dummy
[sizeof
(__WCHAR_TYPE__
) >= 4 ?
1 : -1];
7995 #
Return 1 if the target supports automatic stack alignment.
7997 proc check_effective_target_automatic_stack_alignment
{ } {
7998 # Ordinarily x86 supports automatic stack alignment ...
7999 if { [istarget i?
86*-*-*] ||
[istarget x86_64
-*-*] } then {
8000 if { [istarget
*-*-mingw
*] ||
[istarget
*-*-cygwin
*] } {
8001 # ... except Win64 SEH doesn
't. Succeed for Win32 though.
8002 return [check_effective_target_ilp32];
8009 # Return true if we are compiling for AVX target.
8011 proc check_avx_available { } {
8012 if { [check_no_compiler_messages avx_available assembly {
8022 # Return true if we are compiling for SSSE3 target.
8024 proc check_ssse3_available { } {
8025 if { [check_no_compiler_messages sse3a_available assembly {
8035 # Return true if 32- and 16-bytes vectors are available.
8037 proc check_effective_target_vect_sizes_32B_16B { } {
8038 return [expr { [available_vector_sizes] == [list 256 128] }]
8041 # Return true if 16- and 8-bytes vectors are available.
8043 proc check_effective_target_vect_sizes_16B_8B { } {
8044 if { [check_avx_available]
8045 || [is-effective-target arm_neon]
8046 || [istarget aarch64*-*-*] } {
8054 # Return true if 128-bits vectors are preferred even if 256-bits vectors
8057 proc check_prefer_avx128 { } {
8058 if ![check_avx_available] {
8061 return [check_no_messages_and_pattern avx_explicit "xmm" assembly {
8062 float a[1024],b[1024],c[1024];
8063 void foo (void) { int i; for (i = 0; i < 1024; i++) a[i]=b[i]+c[i];}
8064 } "-O2 -ftree-vectorize"]
8068 # Return 1 if avx512f instructions can be compiled.
8070 proc check_effective_target_avx512f { } {
8071 return [check_no_compiler_messages avx512f object {
8072 typedef double __m512d __attribute__ ((__vector_size__ (64)));
8073 typedef double __m128d __attribute__ ((__vector_size__ (16)));
8075 __m512d _mm512_add (__m512d a)
8077 return __builtin_ia32_addpd512_mask (a, a, a, 1, 4);
8080 __m128d _mm128_add (__m128d a)
8082 return __builtin_ia32_addsd_round (a, a, 8);
8085 __m128d _mm128_getmant (__m128d a)
8087 return __builtin_ia32_getmantsd_round (a, a, 0, 8);
8092 # Return 1 if avx instructions can be compiled.
8094 proc check_effective_target_avx { } {
8095 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
8098 return [check_no_compiler_messages avx object {
8099 void _mm256_zeroall (void)
8101 __builtin_ia32_vzeroall ();
8106 # Return 1 if avx2 instructions can be compiled.
8107 proc check_effective_target_avx2 { } {
8108 return [check_no_compiler_messages avx2 object {
8109 typedef long long __v4di __attribute__ ((__vector_size__ (32)));
8111 mm256_is32_andnotsi256 (__v4di __X, __v4di __Y)
8113 return __builtin_ia32_andnotsi256 (__X, __Y);
8118 # Return 1 if sse instructions can be compiled.
8119 proc check_effective_target_sse { } {
8120 return [check_no_compiler_messages sse object {
8123 __builtin_ia32_stmxcsr ();
8129 # Return 1 if sse2 instructions can be compiled.
8130 proc check_effective_target_sse2 { } {
8131 return [check_no_compiler_messages sse2 object {
8132 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
8134 __m128i _mm_srli_si128 (__m128i __A, int __N)
8136 return (__m128i)__builtin_ia32_psrldqi128 (__A, 8);
8141 # Return 1 if sse4.1 instructions can be compiled.
8142 proc check_effective_target_sse4 { } {
8143 return [check_no_compiler_messages sse4.1 object {
8144 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
8145 typedef int __v4si __attribute__ ((__vector_size__ (16)));
8147 __m128i _mm_mullo_epi32 (__m128i __X, __m128i __Y)
8149 return (__m128i) __builtin_ia32_pmulld128 ((__v4si)__X,
8155 # Return 1 if F16C instructions can be compiled.
8157 proc check_effective_target_f16c { } {
8158 return [check_no_compiler_messages f16c object {
8159 #include "immintrin.h"
8161 foo (unsigned short val)
8163 return _cvtsh_ss (val);
8168 # Return 1 if C wchar_t type is compatible with char16_t.
8170 proc check_effective_target_wchar_t_char16_t_compatible { } {
8171 return [check_no_compiler_messages wchar_t_char16_t object {
8173 __CHAR16_TYPE__ *p16 = &wc;
8174 char t[(((__CHAR16_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
8178 # Return 1 if C wchar_t type is compatible with char32_t.
8180 proc check_effective_target_wchar_t_char32_t_compatible { } {
8181 return [check_no_compiler_messages wchar_t_char32_t object {
8183 __CHAR32_TYPE__ *p32 = &wc;
8184 char t[(((__CHAR32_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
8188 # Return 1 if pow10 function exists.
8190 proc check_effective_target_pow10 { } {
8191 return [check_runtime pow10 {
8201 # Return 1 if frexpl function exists.
8203 proc check_effective_target_frexpl { } {
8204 return [check_runtime frexpl {
8209 x = frexpl (5.0, &y);
8216 # Return 1 if issignaling function exists.
8217 proc check_effective_target_issignaling {} {
8218 return [check_runtime issignaling {
8223 return issignaling (0.0);
8228 # Return 1 if current options generate DFP instructions, 0 otherwise.
8229 proc check_effective_target_hard_dfp {} {
8230 return [check_no_messages_and_pattern hard_dfp "!adddd3" assembly {
8231 typedef float d64 __attribute__((mode(DD)));
8233 void foo (void) { z = x + y; }
8237 # Return 1 if string.h and wchar.h headers provide C++ requires overloads
8238 # for strchr etc. functions.
8240 proc check_effective_target_correct_iso_cpp_string_wchar_protos { } {
8241 return [check_no_compiler_messages correct_iso_cpp_string_wchar_protos assembly {
8244 #if !defined(__cplusplus) \
8245 || !defined(__CORRECT_ISO_CPP_STRING_H_PROTO) \
8246 || !defined(__CORRECT_ISO_CPP_WCHAR_H_PROTO)
8247 ISO C++ correct string.h and wchar.h protos not supported.
8254 # Return 1 if GNU as is used.
8256 proc check_effective_target_gas { } {
8257 global use_gas_saved
8260 if {![info exists use_gas_saved]} {
8261 # Check if the as used by gcc is GNU as.
8262 set gcc_as [lindex [${tool}_target_compile "-print-prog-name=as" "" "none" ""] 0]
8263 # Provide /dev/null as input, otherwise gas times out reading from
8265 set status [remote_exec host "$gcc_as" "-v /dev/null"]
8266 set as_output [lindex $status 1]
8267 if { [ string first "GNU" $as_output ] >= 0 } {
8273 return $use_gas_saved
8276 # Return 1 if GNU ld is used.
8278 proc check_effective_target_gld { } {
8279 global use_gld_saved
8282 if {![info exists use_gld_saved]} {
8283 # Check if the ld used by gcc is GNU ld.
8284 set gcc_ld [lindex [${tool}_target_compile "-print-prog-name=ld" "" "none" ""] 0]
8285 set status [remote_exec host "$gcc_ld" "--version"]
8286 set ld_output [lindex $status 1]
8287 if { [ string first "GNU" $ld_output ] >= 0 } {
8293 return $use_gld_saved
8296 # Return 1 if the compiler has been configure with link-time optimization
8299 proc check_effective_target_lto { } {
8300 if { [istarget nvptx-*-*] } {
8303 return [check_no_compiler_messages lto object {
8308 # Return 1 if -mx32 -maddress-mode=short can compile, 0 otherwise.
8310 proc check_effective_target_maybe_x32 { } {
8311 return [check_no_compiler_messages maybe_x32 object {
8313 } "-mx32 -maddress-mode=short"]
8316 # Return 1 if this target supports the -fsplit-stack option, 0
8319 proc check_effective_target_split_stack {} {
8320 return [check_no_compiler_messages split_stack object {
8325 # Return 1 if this target supports the -masm=intel option, 0
8328 proc check_effective_target_masm_intel {} {
8329 return [check_no_compiler_messages masm_intel object {
8330 extern void abort (void);
8334 # Return 1 if the language for the compiler under test is C.
8336 proc check_effective_target_c { } {
8338 if [string match $tool "gcc"] {
8344 # Return 1 if the language for the compiler under test is C++.
8346 proc check_effective_target_c++ { } {
8348 if { [string match $tool "g++"] || [string match $tool "libstdc++"] } {
8354 set cxx_default "c++14"
8355 # Check whether the current active language standard supports the features
8356 # of C++11/C++14 by checking for the presence of one of the -std flags.
8357 # This assumes that the default for the compiler is $cxx_default, and that
8358 # there will never be multiple -std= arguments on the command line.
8359 proc check_effective_target_c++11_only { } {
8361 if ![check_effective_target_c++] {
8364 if [check-flags { { } { } { -std=c++0x -std=gnu++0x -std=c++11 -std=gnu++11 } }] {
8367 if { $cxx_default == "c++11" && [check-flags { { } { } { } { -std=* } }] } {
8372 proc check_effective_target_c++11 { } {
8373 if [check_effective_target_c++11_only] {
8376 return [check_effective_target_c++14]
8378 proc check_effective_target_c++11_down { } {
8379 if ![check_effective_target_c++] {
8382 return [expr ![check_effective_target_c++14] ]
8385 proc check_effective_target_c++14_only { } {
8387 if ![check_effective_target_c++] {
8390 if [check-flags { { } { } { -std=c++14 -std=gnu++14 -std=c++14 -std=gnu++14 } }] {
8393 if { $cxx_default == "c++14" && [check-flags { { } { } { } { -std=* } }] } {
8399 proc check_effective_target_c++14 { } {
8400 if [check_effective_target_c++14_only] {
8403 return [check_effective_target_c++17]
8405 proc check_effective_target_c++14_down { } {
8406 if ![check_effective_target_c++] {
8409 return [expr ![check_effective_target_c++17] ]
8412 proc check_effective_target_c++98_only { } {
8414 if ![check_effective_target_c++] {
8417 if [check-flags { { } { } { -std=c++98 -std=gnu++98 -std=c++03 -std=gnu++03 } }] {
8420 if { $cxx_default == "c++98" && [check-flags { { } { } { } { -std=* } }] } {
8426 proc check_effective_target_c++17_only { } {
8428 if ![check_effective_target_c++] {
8431 if [check-flags { { } { } { -std=c++17 -std=gnu++17 -std=c++1z -std=gnu++1z } }] {
8434 if { $cxx_default == "c++17" && [check-flags { { } { } { } { -std=* } }] } {
8440 proc check_effective_target_c++17 { } {
8441 if [check_effective_target_c++17_only] {
8444 return [check_effective_target_c++2a]
8446 proc check_effective_target_c++17_down { } {
8447 if ![check_effective_target_c++] {
8450 return [expr ![check_effective_target_c++2a] ]
8453 proc check_effective_target_c++2a_only { } {
8455 if ![check_effective_target_c++] {
8458 if [check-flags { { } { } { -std=c++2a -std=gnu++2a } }] {
8461 if { $cxx_default == "c++20" && [check-flags { { } { } { } { -std=* } }] } {
8466 proc check_effective_target_c++2a { } {
8467 return [check_effective_target_c++2a_only]
8470 # Check for C++ Concepts TS support, i.e. -fconcepts flag.
8471 proc check_effective_target_concepts { } {
8472 return [check-flags { "" { } { -fconcepts } }]
8475 # Return 1 if expensive testcases should be run.
8477 proc check_effective_target_run_expensive_tests { } {
8478 if { [getenv GCC_TEST_RUN_EXPENSIVE] != "" } {
8484 # Returns 1 if "mempcpy" is available on the target system.
8486 proc check_effective_target_mempcpy {} {
8487 return [check_function_available "mempcpy"]
8490 # Returns 1 if "stpcpy" is available on the target system.
8492 proc check_effective_target_stpcpy {} {
8493 return [check_function_available "stpcpy"]
8496 # Check whether the vectorizer tests are supported by the target and
8497 # append additional target-dependent compile flags to DEFAULT_VECTCFLAGS.
8498 # If a port wants to execute the tests more than once it should append
8499 # the supported target to EFFECTIVE_TARGETS instead, and the compile flags
8500 # will be added by a call to add_options_for_<target>.
8501 # Set dg-do-what-default to either compile or run, depending on target
8502 # capabilities. Do not set this if the supported target is appended to
8503 # EFFECTIVE_TARGETS. Flags and this variable will be set by et-dg-runtest
8504 # automatically. Return the number of effective targets if vectorizer tests
8505 # are supported, 0 otherwise.
8507 proc check_vect_support_and_set_flags { } {
8508 global DEFAULT_VECTCFLAGS
8509 global dg-do-what-default
8510 global EFFECTIVE_TARGETS
8512 if [istarget powerpc-*paired*] {
8513 lappend DEFAULT_VECTCFLAGS "-mpaired"
8514 if [check_750cl_hw_available] {
8515 set dg-do-what-default run
8517 set dg-do-what-default compile
8519 } elseif [istarget powerpc*-*-*] {
8520 # Skip targets not supporting -maltivec.
8521 if ![is-effective-target powerpc_altivec_ok] {
8525 lappend DEFAULT_VECTCFLAGS "-maltivec"
8526 if [check_p9vector_hw_available] {
8527 lappend DEFAULT_VECTCFLAGS "-mpower9-vector"
8528 } elseif [check_p8vector_hw_available] {
8529 lappend DEFAULT_VECTCFLAGS "-mpower8-vector"
8530 } elseif [check_vsx_hw_available] {
8531 lappend DEFAULT_VECTCFLAGS "-mvsx" "-mno-allow-movmisalign"
8534 if [check_vmx_hw_available] {
8535 set dg-do-what-default run
8537 if [is-effective-target ilp32] {
8538 # Specify a cpu that supports VMX for compile-only tests.
8539 lappend DEFAULT_VECTCFLAGS "-mcpu=970"
8541 set dg-do-what-default compile
8543 } elseif { [istarget spu-*-*] } {
8544 set dg-do-what-default run
8545 } elseif { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
8546 lappend DEFAULT_VECTCFLAGS "-msse2"
8547 if { [check_effective_target_sse2_runtime] } {
8548 set dg-do-what-default run
8550 set dg-do-what-default compile
8552 } elseif { [istarget mips*-*-*]
8553 && [check_effective_target_nomips16] } {
8554 if { [check_effective_target_mpaired_single] } {
8555 lappend EFFECTIVE_TARGETS mpaired_single
8557 if { [check_effective_target_mips_loongson] } {
8558 lappend EFFECTIVE_TARGETS mips_loongson
8560 if { [check_effective_target_mips_msa] } {
8561 lappend EFFECTIVE_TARGETS mips_msa
8563 return [llength $EFFECTIVE_TARGETS]
8564 } elseif [istarget sparc*-*-*] {
8565 lappend DEFAULT_VECTCFLAGS "-mcpu=ultrasparc" "-mvis"
8566 if [check_effective_target_ultrasparc_hw] {
8567 set dg-do-what-default run
8569 set dg-do-what-default compile
8571 } elseif [istarget alpha*-*-*] {
8572 # Alpha's vectorization capabilities are extremely limited.
8573 # It
's more effort than its worth disabling all of the tests
8574 # that it cannot pass. But if you actually want to see what
8575 # does work, command out the return.
8578 lappend DEFAULT_VECTCFLAGS "-mmax"
8579 if [check_alpha_max_hw_available] {
8580 set dg-do-what-default run
8582 set dg-do-what-default compile
8584 } elseif [istarget ia64-*-*] {
8585 set dg-do-what-default run
8586 } elseif [is-effective-target arm_neon_ok] {
8587 eval lappend DEFAULT_VECTCFLAGS [add_options_for_arm_neon ""]
8588 # NEON does not support denormals, so is not used for vectorization by
8589 # default to avoid loss of precision. We must pass -ffast-math to test
8590 # vectorization of float operations.
8591 lappend DEFAULT_VECTCFLAGS "-ffast-math"
8592 if [is-effective-target arm_neon_hw] {
8593 set dg-do-what-default run
8595 set dg-do-what-default compile
8597 } elseif [istarget "aarch64*-*-*"] {
8598 set dg-do-what-default run
8599 } elseif [istarget s390*-*-*] {
8600 # The S/390 backend set a default of 2 for that value.
8601 # Override it to have the same situation as with other
8603 lappend DEFAULT_VECTCFLAGS "--param" "min-vect-loop-bound=1"
8604 lappend DEFAULT_VECTCFLAGS "--param" "max-unrolled-insns=200"
8605 lappend DEFAULT_VECTCFLAGS "--param" "max-unroll-times=8"
8606 lappend DEFAULT_VECTCFLAGS "--param" "max-completely-peeled-insns=200"
8607 lappend DEFAULT_VECTCFLAGS "--param" "max-completely-peel-times=16"
8608 if [check_effective_target_s390_vxe] {
8609 lappend DEFAULT_VECTCFLAGS "-march=z14" "-mzarch"
8610 set dg-do-what-default run
8611 } elseif [check_effective_target_s390_vx] {
8612 lappend DEFAULT_VECTCFLAGS "-march=z13" "-mzarch"
8613 set dg-do-what-default run
8615 lappend DEFAULT_VECTCFLAGS "-march=z14" "-mzarch"
8616 set dg-do-what-default compile
8625 # Return 1 if the target does *not* require strict alignment.
8627 proc check_effective_target_non_strict_align {} {
8629 # On ARM, the default is to use STRICT_ALIGNMENT, but there
8630 # are interfaces defined for misaligned access and thus
8631 # depending on the architecture levels unaligned access is
8633 if [istarget "arm*-*-*"] {
8634 return [check_effective_target_arm_unaligned]
8637 return [check_no_compiler_messages non_strict_align assembly {
8639 typedef char __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__))) c;
8641 void foo(void) { z = (c *) y; }
8645 # Return 1 if the target has <ucontext.h>.
8647 proc check_effective_target_ucontext_h { } {
8648 return [check_no_compiler_messages ucontext_h assembly {
8649 #include <ucontext.h>
8653 proc check_effective_target_aarch64_tiny { } {
8654 if { [istarget aarch64*-*-*] } {
8655 return [check_no_compiler_messages aarch64_tiny object {
8656 #ifdef __AARCH64_CMODEL_TINY__
8659 #error target not AArch64 tiny code model
8667 # Create functions to check that the AArch64 assembler supports the
8668 # various architecture extensions via the .arch_extension pseudo-op.
8670 foreach { aarch64_ext } { "fp" "simd" "crypto" "crc" "lse" "dotprod" "sve"} {
8671 eval [string map [list FUNC $aarch64_ext] {
8672 proc check_effective_target_aarch64_asm_FUNC_ok { } {
8673 if { [istarget aarch64*-*-*] } {
8674 return [check_no_compiler_messages aarch64_FUNC_assembler object {
8675 __asm__ (".arch_extension FUNC");
8676 } "-march=armv8-a+FUNC"]
8684 proc check_effective_target_aarch64_small { } {
8685 if { [istarget aarch64*-*-*] } {
8686 return [check_no_compiler_messages aarch64_small object {
8687 #ifdef __AARCH64_CMODEL_SMALL__
8690 #error target not AArch64 small code model
8698 proc check_effective_target_aarch64_large { } {
8699 if { [istarget aarch64*-*-*] } {
8700 return [check_no_compiler_messages aarch64_large object {
8701 #ifdef __AARCH64_CMODEL_LARGE__
8704 #error target not AArch64 large code model
8713 # Return 1 if this is a reduced AVR Tiny core. Such cores have different
8714 # register set, instruction set, addressing capabilities and ABI.
8716 proc check_effective_target_avr_tiny { } {
8717 if { [istarget avr*-*-*] } {
8718 return [check_no_compiler_messages avr_tiny object {
8722 #error target not a reduced AVR Tiny core
8730 # Return 1 if <fenv.h> is available with all the standard IEEE
8731 # exceptions and floating-point exceptions are raised by arithmetic
8732 # operations. (If the target requires special options for "inexact"
8733 # exceptions, those need to be specified in the testcases.)
8735 proc check_effective_target_fenv_exceptions {} {
8736 return [check_runtime fenv_exceptions {
8739 #ifndef FE_DIVBYZERO
8740 # error Missing FE_DIVBYZERO
8743 # error Missing FE_INEXACT
8746 # error Missing FE_INVALID
8749 # error Missing FE_OVERFLOW
8751 #ifndef FE_UNDERFLOW
8752 # error Missing FE_UNDERFLOW
8754 volatile float a = 0.0f, r;
8759 if (fetestexcept (FE_INVALID))
8764 } [add_options_for_ieee "-std=gnu99"]]
8767 proc check_effective_target_tiny {} {
8768 global et_target_tiny_saved
8770 if [info exists et_target_tiny_saved] {
8771 verbose "check_effective_target_tiny: using cached result" 2
8773 set et_target_tiny_saved 0
8774 if { [istarget aarch64*-*-*]
8775 && [check_effective_target_aarch64_tiny] } {
8776 set et_target_tiny_saved 1
8778 if { [istarget avr-*-*]
8779 && [check_effective_target_avr_tiny] } {
8780 set et_target_tiny_saved 1
8784 return $et_target_tiny_saved
8787 # Return 1 if LOGICAL_OP_NON_SHORT_CIRCUIT is set to 0 for the current target.
8789 proc check_effective_target_logical_op_short_circuit {} {
8790 if { [istarget mips*-*-*]
8791 || [istarget arc*-*-*]
8792 || [istarget avr*-*-*]
8793 || [istarget crisv32-*-*] || [istarget cris-*-*]
8794 || [istarget mmix-*-*]
8795 || [istarget s390*-*-*]
8796 || [istarget powerpc*-*-*]
8797 || [istarget nios2*-*-*]
8798 || [istarget riscv*-*-*]
8799 || [istarget visium-*-*]
8800 || [check_effective_target_arm_cortex_m] } {
8806 # Return 1 if the target supports -mbranch-cost=N option.
8808 proc check_effective_target_branch_cost {} {
8809 if { [ istarget arm*-*-*]
8810 || [istarget avr*-*-*]
8811 || [istarget epiphany*-*-*]
8812 || [istarget frv*-*-*]
8813 || [istarget i?86-*-*] || [istarget x86_64-*-*]
8814 || [istarget mips*-*-*]
8815 || [istarget s390*-*-*]
8816 || [istarget riscv*-*-*]
8817 || [istarget sh*-*-*]
8818 || [istarget spu*-*-*] } {
8824 # Record that dg-final test TEST requires convential compilation.
8826 proc force_conventional_output_for { test } {
8827 if { [info proc $test] == "" } {
8828 perror "$test does not exist"
8831 proc ${test}_required_options {} {
8832 global gcc_force_conventional_output
8833 return $gcc_force_conventional_output
8837 # Return 1 if the x86-64 target supports PIE with copy reloc, 0
8838 # otherwise. Cache the result.
8840 proc check_effective_target_pie_copyreloc { } {
8841 global pie_copyreloc_available_saved
8843 global GCC_UNDER_TEST
8845 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
8849 # Need auto-host.h to check linker support.
8850 if { ![file exists ../../auto-host.h ] } {
8854 if [info exists pie_copyreloc_available_saved] {
8855 verbose "check_effective_target_pie_copyreloc returning saved $pie_copyreloc_available_saved" 2
8857 # Set up and compile to see if linker supports PIE with copy
8858 # reloc. Include the current process ID in the file names to
8859 # prevent conflicts with invocations for multiple testsuites.
8864 set f [open $src "w"]
8865 puts $f "#include \"../../auto-host.h\""
8866 puts $f "#if HAVE_LD_PIE_COPYRELOC == 0"
8867 puts $f "# error Linker does not support PIE with copy reloc."
8871 verbose "check_effective_target_pie_copyreloc compiling testfile $src" 2
8872 set lines [${tool}_target_compile $src $obj object ""]
8877 if [string match "" $lines] then {
8878 verbose "check_effective_target_pie_copyreloc testfile compilation passed" 2
8879 set pie_copyreloc_available_saved 1
8881 verbose "check_effective_target_pie_copyreloc testfile compilation failed" 2
8882 set pie_copyreloc_available_saved 0
8886 return $pie_copyreloc_available_saved
8889 # Return 1 if the x86 target supports R_386_GOT32X relocation, 0
8890 # otherwise. Cache the result.
8892 proc check_effective_target_got32x_reloc { } {
8893 global got32x_reloc_available_saved
8895 global GCC_UNDER_TEST
8897 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
8901 # Need auto-host.h to check linker support.
8902 if { ![file exists ../../auto-host.h ] } {
8906 if [info exists got32x_reloc_available_saved] {
8907 verbose "check_effective_target_got32x_reloc returning saved $got32x_reloc_available_saved" 2
8909 # Include the current process ID in the file names to prevent
8910 # conflicts with invocations for multiple testsuites.
8912 set src got32x[pid].c
8913 set obj got32x[pid].o
8915 set f [open $src "w"]
8916 puts $f "#include \"../../auto-host.h\""
8917 puts $f "#if HAVE_AS_IX86_GOT32X == 0"
8918 puts $f "# error Assembler does not support R_386_GOT32X."
8922 verbose "check_effective_target_got32x_reloc compiling testfile $src" 2
8923 set lines [${tool}_target_compile $src $obj object ""]
8928 if [string match "" $lines] then {
8929 verbose "check_effective_target_got32x_reloc testfile compilation passed" 2
8930 set got32x_reloc_available_saved 1
8932 verbose "check_effective_target_got32x_reloc testfile compilation failed" 2
8933 set got32x_reloc_available_saved 0
8937 return $got32x_reloc_available_saved
8940 # Return 1 if the x86 target supports calling ___tls_get_addr via GOT,
8941 # 0 otherwise. Cache the result.
8943 proc check_effective_target_tls_get_addr_via_got { } {
8944 global tls_get_addr_via_got_available_saved
8946 global GCC_UNDER_TEST
8948 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
8952 # Need auto-host.h to check linker support.
8953 if { ![file exists ../../auto-host.h ] } {
8957 if [info exists tls_get_addr_via_got_available_saved] {
8958 verbose "check_effective_target_tls_get_addr_via_got returning saved $tls_get_addr_via_got_available_saved" 2
8960 # Include the current process ID in the file names to prevent
8961 # conflicts with invocations for multiple testsuites.
8963 set src tls_get_addr_via_got[pid].c
8964 set obj tls_get_addr_via_got[pid].o
8966 set f [open $src "w"]
8967 puts $f "#include \"../../auto-host.h\""
8968 puts $f "#if HAVE_AS_IX86_TLS_GET_ADDR_GOT == 0"
8969 puts $f "# error Assembler/linker do not support calling ___tls_get_addr via GOT."
8973 verbose "check_effective_target_tls_get_addr_via_got compiling testfile $src" 2
8974 set lines [${tool}_target_compile $src $obj object ""]
8979 if [string match "" $lines] then {
8980 verbose "check_effective_target_tls_get_addr_via_got testfile compilation passed" 2
8981 set tls_get_addr_via_got_available_saved 1
8983 verbose "check_effective_target_tls_get_addr_via_got testfile compilation failed" 2
8984 set tls_get_addr_via_got_available_saved 0
8988 return $tls_get_addr_via_got_available_saved
8991 # Return 1 if the target uses comdat groups.
8993 proc check_effective_target_comdat_group {} {
8994 return [check_no_messages_and_pattern comdat_group "\.section\[^\n\r]*,comdat|\.group\[^\n\r]*,#comdat" assembly {
8996 inline int foo () { return 1; }
9001 # Return 1 if target supports __builtin_eh_return
9002 proc check_effective_target_builtin_eh_return { } {
9003 return [check_no_compiler_messages builtin_eh_return object {
9004 void test (long l, void *p)
9006 __builtin_eh_return (l, p);
9011 # Return 1 if the target supports max reduction for vectors.
9013 proc check_effective_target_vect_max_reduc { } {
9014 if { [istarget aarch64*-*-*] || [is-effective-target arm_neon] } {
9020 # Return 1 if there is an nvptx offload compiler.
9022 proc check_effective_target_offload_nvptx { } {
9023 return [check_no_compiler_messages offload_nvptx object {
9024 int main () {return 0;}
9025 } "-foffload=nvptx-none" ]
9028 # Return 1 if the compiler has been configured with hsa offloading.
9030 proc check_effective_target_offload_hsa { } {
9031 return [check_no_compiler_messages offload_hsa assembly {
9032 int main () {return 0;}
9036 # Return 1 if the target support -fprofile-update=atomic
9037 proc check_effective_target_profile_update_atomic {} {
9038 return [check_no_compiler_messages profile_update_atomic assembly {
9039 int main (void) { return 0; }
9040 } "-fprofile-update=atomic -fprofile-generate"]
9043 # Return 1 if vector (va - vector add) instructions are understood by
9044 # the assembler and can be executed. This also covers checking for
9045 # the VX kernel feature. A kernel without that feature does not
9046 # enable the vector facility and the following check will die with a
9048 proc check_effective_target_s390_vx { } {
9049 if ![istarget s390*-*-*] then {
9053 return [check_runtime s390_check_vx {
9056 asm ("va %%v24, %%v26, %%v28, 3" : : : "v24", "v26", "v28");
9059 } "-march=z13 -mzarch" ]
9062 # Same as above but for the z14 vector enhancement facility. Test
9063 # is performed with the vector nand instruction.
9064 proc check_effective_target_s390_vxe { } {
9065 if ![istarget s390*-*-*] then {
9069 return [check_runtime s390_check_vxe {
9072 asm ("vnn %%v24, %%v26, %%v28" : : : "v24", "v26", "v28");
9075 } "-march=z14 -mzarch" ]
9078 #For versions of ARM architectures that have hardware div insn,
9079 #disable the divmod transform
9081 proc check_effective_target_arm_divmod_simode { } {
9082 return [check_no_compiler_messages arm_divmod assembly {
9083 #ifdef __ARM_ARCH_EXT_IDIV__
9090 # Return 1 if target supports divmod hardware insn or divmod libcall.
9092 proc check_effective_target_divmod { } {
9093 #TODO: Add checks for all targets that have either hardware divmod insn
9094 # or define libfunc for divmod.
9095 if { [istarget arm*-*-*]
9096 || [istarget i?86-*-*] || [istarget x86_64-*-*] } {
9102 # Return 1 if target supports divmod for SImode. The reason for
9103 # separating this from check_effective_target_divmod is that
9104 # some versions of ARM architecture define div instruction
9105 # only for simode, and for these archs, we do not want to enable
9106 # divmod transform for simode.
9108 proc check_effective_target_divmod_simode { } {
9109 if { [istarget arm*-*-*] } {
9110 return [check_effective_target_arm_divmod_simode]
9113 return [check_effective_target_divmod]
9116 # Return 1 if store merging optimization is applicable for target.
9117 # Store merging is not profitable for targets like the avr which
9118 # can load/store only one byte at a time. Use int size as a proxy
9119 # for the number of bytes the target can write, and skip for targets
9120 # with a smallish (< 32) size.
9122 proc check_effective_target_store_merge { } {
9123 if { [is-effective-target non_strict_align ] && [is-effective-target int32plus] } {
9130 # Return 1 if we're able to assemble rdrand
9132 proc check_effective_target_rdrand
{ } {
9133 return [check_no_compiler_messages_nocache rdrand object
{
9138 __builtin_ia32_rdrand32_step
(&val
);
9144 #
Return 1 if the target supports coprocessor instructions
: cdp
, ldc
, ldcl
,
9145 # stc
, stcl
, mcr and mrc.
9146 proc check_effective_target_arm_coproc1_ok_nocache
{ } {
9147 if { ![istarget arm
*-*-*] } {
9150 return [check_no_compiler_messages_nocache arm_coproc1_ok assembly
{
9151 #
if (__thumb__
&& !__thumb2__
) || __ARM_ARCH
< 4
9157 proc check_effective_target_arm_coproc1_ok
{ } {
9158 return [check_cached_effective_target arm_coproc1_ok \
9159 check_effective_target_arm_coproc1_ok_nocache
]
9162 #
Return 1 if the target supports all coprocessor instructions checked by
9163 # check_effective_target_arm_coproc1_ok in addition to the following
: cdp2
,
9164 # ldc2
, ldc2l
, stc2
, stc2l
, mcr2 and mrc2.
9165 proc check_effective_target_arm_coproc2_ok_nocache
{ } {
9166 if { ![check_effective_target_arm_coproc1_ok
] } {
9169 return [check_no_compiler_messages_nocache arm_coproc2_ok assembly
{
9170 #
if (__thumb__
&& !__thumb2__
) || __ARM_ARCH
< 5
9176 proc check_effective_target_arm_coproc2_ok
{ } {
9177 return [check_cached_effective_target arm_coproc2_ok \
9178 check_effective_target_arm_coproc2_ok_nocache
]
9181 #
Return 1 if the target supports all coprocessor instructions checked by
9182 # check_effective_target_arm_coproc2_ok in addition the following
: mcrr and
9184 proc check_effective_target_arm_coproc3_ok_nocache
{ } {
9185 if { ![check_effective_target_arm_coproc2_ok
] } {
9188 return [check_no_compiler_messages_nocache arm_coproc3_ok assembly
{
9189 #
if (__thumb__
&& !__thumb2__
) \
9190 ||
(__ARM_ARCH
< 6 && !defined
(__ARM_ARCH_5TE__
))
9196 proc check_effective_target_arm_coproc3_ok
{ } {
9197 return [check_cached_effective_target arm_coproc3_ok \
9198 check_effective_target_arm_coproc3_ok_nocache
]
9201 #
Return 1 if the target supports all coprocessor instructions checked by
9202 # check_effective_target_arm_coproc3_ok in addition the following
: mcrr2 and
9204 proc check_effective_target_arm_coproc4_ok_nocache
{ } {
9205 if { ![check_effective_target_arm_coproc3_ok
] } {
9208 return [check_no_compiler_messages_nocache arm_coproc4_ok assembly
{
9209 #
if (__thumb__
&& !__thumb2__
) || __ARM_ARCH
< 6
9215 proc check_effective_target_arm_coproc4_ok
{ } {
9216 return [check_cached_effective_target arm_coproc4_ok \
9217 check_effective_target_arm_coproc4_ok_nocache
]
9220 #
Return 1 if the target supports the auto_inc_dec optimization pass.
9221 proc check_effective_target_autoincdec
{ } {
9222 if { ![check_no_compiler_messages auto_incdec assembly
{ void f
() { }
9223 } "-O2 -fdump-rtl-auto_inc_dec" ] } {
9227 set dumpfile
[glob
-nocomplain
"auto_incdec[pid].c.\[0-9\]\[0-9\]\[0-9\]r.auto_inc_dec"]
9228 if { [file
exists $dumpfile
] } {
9229 file
delete $dumpfile
9235 #
Return 1 if the target has support
for stack probing designed
9236 # to avoid stack
-clash style attacks.
9238 # This is used to restrict the stack
-clash mitigation tests to
9239 # just those targets that have been explicitly supported.
9241 # In addition to the prologue work
on those targets
, each target
's
9242 # properties should be described in the functions below so that
9243 # tests do not become a mess of unreadable target conditions.
9245 proc check_effective_target_supports_stack_clash_protection { } {
9247 # Temporary until the target bits are fully ACK'd.
9248 #
if { [istarget aarch
*-*-*] } {
9252 if { [istarget x86_64
-*-*] ||
[istarget i?
86-*-*]
9253 ||
[istarget powerpc
*-*-*] ||
[istarget rs6000
*-*-*]
9254 ||
[istarget s390
*-*-*] } {
9260 #
Return 1 if the target creates a frame pointer
for non
-leaf functions
9261 # Note we ignore cases where we apply tail
call optimization here.
9262 proc check_effective_target_frame_pointer_for_non_leaf
{ } {
9263 if { [istarget aarch
*-*-*] } {
9267 # Solaris
/x86 defaults to
-fno
-omit
-frame
-pointer.
9268 if { [istarget i?
86-*-solaris
*] ||
[istarget x86_64
-*-solaris
*] } {
9275 #
Return 1 if the target
's calling sequence or its ABI
9276 # create implicit stack probes at or prior to function entry.
9277 proc check_effective_target_caller_implicit_probes { } {
9279 # On x86/x86_64 the call instruction itself pushes the return
9280 # address onto the stack. That is an implicit probe of *sp.
9281 if { [istarget x86_64-*-*] || [istarget i?86-*-*] } {
9285 # On PPC, the ABI mandates that the address of the outer
9286 # frame be stored at *sp. Thus each allocation of stack
9287 # space is itself an implicit probe of *sp.
9288 if { [istarget powerpc*-*-*] || [istarget rs6000*-*-*] } {
9292 # s390's ABI has a register save area allocated by the
9293 # caller
for use by the callee. The mere existence does
9294 # not constitute a probe by the caller
, but when the slots
9295 # used by the callee those stores are implicit probes.
9296 if { [istarget s390
*-*-*] } {
9300 # Not strictly true
on aarch64
, but we have agreed that we will
9301 #
consider any function that pushes SP more than
3kbytes into
9302 # the guard
page as broken. This essentially means that we can
9303 #
consider the aarch64 as having a caller implicit probe at
9305 if { [istarget aarch64
*-*-*] } {
9312 # Targets that potentially realign the stack pointer often cause residual
9313 # stack allocations and make it difficult to elimination loops or residual
9314 # allocations
for dynamic stack allocations
9315 proc check_effective_target_callee_realigns_stack
{ } {
9316 if { [istarget x86_64
-*-*] ||
[istarget i?
86-*-*] } {
9322 #
Return 1 if CET instructions can be compiled.
9323 proc check_effective_target_cet
{ } {
9324 if { !([istarget i?
86-*-*] ||
[istarget x86_64
-*-*]) } {
9327 return [check_no_compiler_messages cet object
{