2 * Emulation of processor ioports.
4 * Copyright 1995 Morten Welinder
5 * Copyright 1998 Andreas Mohr, Ove Kaaven
6 * Copyright 2001 Uwe Bonnes
8 * This library is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU Lesser General Public
10 * License as published by the Free Software Foundation; either
11 * version 2.1 of the License, or (at your option) any later version.
13 * This library is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * Lesser General Public License for more details.
18 * You should have received a copy of the GNU Lesser General Public
19 * License along with this library; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA
24 - only a few ports are emulated.
25 - real-time clock in "cmos" is bogus. A nifty alarm() setup could
33 #include <sys/types.h>
34 #ifdef HAVE_SYS_STAT_H
35 # include <sys/stat.h>
43 #include "kernel16_private.h"
45 #include "wine/unicode.h"
46 #include "wine/debug.h"
48 WINE_DEFAULT_DEBUG_CHANNEL(int);
57 {0xFFFF, 0, 0x36, 0, 0},
58 {0x0012, 0, 0x74, 0, 0},
59 {0x0001, 0, 0xB6, 0, 0},
61 /* two byte read in progress */
62 #define TMR_RTOGGLE 0x01
63 /* two byte write in progress */
64 #define TMR_WTOGGLE 0x02
65 /* latch contains data */
66 #define TMR_LATCHED 0x04
67 /* counter is in update phase */
68 #define TMR_UPDATE 0x08
69 /* readback status request */
70 #define TMR_STATUS 0x10
73 static BYTE parport_8255
[4] = {0x4f, 0x20, 0xff, 0xff};
75 static BYTE cmosaddress
;
77 static BOOL cmos_image_initialized
= FALSE
;
79 static BYTE cmosimage
[64] =
81 0x27, /* 0x00: seconds */
82 0x34, /* 0X01: seconds alarm */
83 0x31, /* 0x02: minutes */
84 0x47, /* 0x03: minutes alarm */
85 0x16, /* 0x04: hour */
86 0x15, /* 0x05: hour alarm */
87 0x00, /* 0x06: week day */
88 0x01, /* 0x07: month day */
89 0x04, /* 0x08: month */
90 0x94, /* 0x09: year */
91 0x26, /* 0x0a: state A */
92 0x02, /* 0x0b: state B */
93 0x50, /* 0x0c: state C */
94 0x80, /* 0x0d: state D */
95 0x00, /* 0x0e: state diagnostic */
96 0x00, /* 0x0f: state state shutdown */
97 0x40, /* 0x10: floppy type */
98 0xb1, /* 0x11: reserved */
99 0x00, /* 0x12: HD type */
100 0x9c, /* 0x13: reserved */
101 0x01, /* 0x14: equipment */
102 0x80, /* 0x15: low base memory */
103 0x02, /* 0x16: high base memory (0x280 => 640KB) */
104 0x00, /* 0x17: low extended memory */
105 0x3b, /* 0x18: high extended memory (0x3b00 => 15MB) */
106 0x00, /* 0x19: HD 1 extended type byte */
107 0x00, /* 0x1a: HD 2 extended type byte */
108 0xad, /* 0x1b: reserved */
109 0x02, /* 0x1c: reserved */
110 0x10, /* 0x1d: reserved */
111 0x00, /* 0x1e: reserved */
112 0x00, /* 0x1f: installed features */
113 0x08, /* 0x20: HD 1 low cylinder number */
114 0x00, /* 0x21: HD 1 high cylinder number */
115 0x00, /* 0x22: HD 1 heads */
116 0x26, /* 0x23: HD 1 low pre-compensation start */
117 0x00, /* 0x24: HD 1 high pre-compensation start */
118 0x00, /* 0x25: HD 1 low landing zone */
119 0x00, /* 0x26: HD 1 high landing zone */
120 0x00, /* 0x27: HD 1 sectors */
121 0x00, /* 0x28: options 1 */
122 0x00, /* 0x29: reserved */
123 0x00, /* 0x2a: reserved */
124 0x00, /* 0x2b: options 2 */
125 0x00, /* 0x2c: options 3 */
126 0x3f, /* 0x2d: reserved */
127 0xcc, /* 0x2e: low CMOS ram checksum (computed automatically) */
128 0xcc, /* 0x2f: high CMOS ram checksum (computed automatically) */
129 0x00, /* 0x30: low extended memory byte */
130 0x1c, /* 0x31: high extended memory byte */
131 0x19, /* 0x32: century byte */
132 0x81, /* 0x33: setup information */
133 0x00, /* 0x34: CPU speed */
134 0x0e, /* 0x35: HD 2 low cylinder number */
135 0x00, /* 0x36: HD 2 high cylinder number */
136 0x80, /* 0x37: HD 2 heads */
137 0x1b, /* 0x38: HD 2 low pre-compensation start */
138 0x7b, /* 0x39: HD 2 high pre-compensation start */
139 0x21, /* 0x3a: HD 2 low landing zone */
140 0x00, /* 0x3b: HD 2 high landing zone */
141 0x00, /* 0x3c: HD 2 sectors */
142 0x00, /* 0x3d: reserved */
143 0x05, /* 0x3e: reserved */
144 0x5f /* 0x3f: reserved */
147 static void IO_FixCMOSCheckSum(void)
152 for (i
=0x10; i
< 0x2d; i
++)
154 cmosimage
[0x2e] = sum
>> 8; /* yes, this IS hi byte !! */
155 cmosimage
[0x2f] = sum
& 0xff;
156 TRACE("calculated hi %02x, lo %02x\n", cmosimage
[0x2e], cmosimage
[0x2f]);
160 ((a)%10 + ((a)>>4)%10*10 + ((a)>>8)%10*100 + ((a)>>12)%10*1000)
162 ((a)%10 | (a)/10%10<<4 | (a)/100%10<<8 | (a)/1000%10<<12)
165 static void set_timer(unsigned timer
)
167 DWORD val
= tmr_8253
[timer
].countmax
;
169 if (tmr_8253
[timer
].ctrlbyte_ch
& 0x01)
172 tmr_8253
[timer
].flags
&= ~TMR_UPDATE
;
173 if (!QueryPerformanceCounter((LARGE_INTEGER
*)&tmr_8253
[timer
].start_time
))
174 WARN("QueryPerformanceCounter should not fail!\n");
177 case 0: /* System timer counter divisor */
179 case 1: /* RAM refresh */
180 FIXME("RAM refresh counter handling not implemented !\n");
182 case 2: /* cassette & speaker */
184 if ((parport_8255
[1] & 3) == 3)
186 TRACE("Beep (freq: %d) !\n", 1193180 / val
);
187 Beep(1193180 / val
, 20);
194 static WORD
get_timer_val(unsigned timer
)
197 WORD maxval
, val
= tmr_8253
[timer
].countmax
;
198 BYTE mode
= tmr_8253
[timer
].ctrlbyte_ch
>> 1 & 0x07;
200 /* This is not strictly correct. In most cases the old countdown should
201 * finish normally (by counting down to 0) or halt and not jump to 0.
202 * But we are calculating and not counting, so this seems to be a good
203 * solution and should work well with most (all?) programs
205 if (tmr_8253
[timer
].flags
& TMR_UPDATE
)
208 if (!QueryPerformanceCounter(&time
))
209 WARN("QueryPerformanceCounter should not fail!\n");
211 time
.QuadPart
-= tmr_8253
[timer
].start_time
;
212 if (tmr_8253
[timer
].ctrlbyte_ch
& 0x01)
221 maxval
= tmr_8253
[timer
].ctrlbyte_ch
& 0x01 ? 9999 : 0xFFFF;
228 ERR("Invalid PIT mode: %d\n", mode
);
232 val
= (val
- time
.QuadPart
) % (maxval
+ 1);
233 if (tmr_8253
[timer
].ctrlbyte_ch
& 0x01)
241 /**********************************************************************
244 * Note: The size argument has to be handled correctly _externally_
245 * (as we always return a DWORD)
247 DWORD
DOSVM_inport( int port
, int size
)
251 TRACE("%d-byte value from port 0x%04x\n", size
, port
);
253 DOSMEM_InitDosMemory();
261 BYTE chan
= port
& 3;
262 WORD tempval
= tmr_8253
[chan
].flags
& TMR_LATCHED
263 ? tmr_8253
[chan
].latch
: get_timer_val(chan
);
265 if (tmr_8253
[chan
].flags
& TMR_STATUS
)
267 WARN("Read-back status\n");
268 /* We differ slightly from the spec:
269 * - TMR_UPDATE is already set with the first write
270 * of a two byte counter update
271 * - 0x80 should be set if OUT signal is 1 (high)
273 tmr_8253
[chan
].flags
&= ~TMR_STATUS
;
274 res
= (tmr_8253
[chan
].ctrlbyte_ch
& 0x3F) |
275 (tmr_8253
[chan
].flags
& TMR_UPDATE
? 0x40 : 0x00);
278 switch ((tmr_8253
[chan
].ctrlbyte_ch
& 0x30) >> 4)
281 res
= 0; /* shouldn't happen? */
283 case 1: /* read lo byte */
285 tmr_8253
[chan
].flags
&= ~TMR_LATCHED
;
287 case 3: /* read lo byte, then hi byte */
288 tmr_8253
[chan
].flags
^= TMR_RTOGGLE
; /* toggle */
289 if (tmr_8253
[chan
].flags
& TMR_RTOGGLE
)
294 /* else [fall through if read hi byte !] */
295 case 2: /* read hi byte */
296 res
= (BYTE
)(tempval
>> 8);
297 tmr_8253
[chan
].flags
&= ~TMR_LATCHED
;
305 res
= (DWORD
)parport_8255
[1];
308 res
= (DWORD
)parport_8255
[2];
311 res
= (DWORD
)cmosaddress
;
314 if (!cmos_image_initialized
)
316 IO_FixCMOSCheckSum();
317 cmos_image_initialized
= TRUE
;
319 res
= (DWORD
)cmosimage
[cmosaddress
& 0x3f];
323 res
= ~0U; /* no joystick */
326 WARN("Direct I/O read attempted from port %x\n", port
);
333 /**********************************************************************
336 void DOSVM_outport( int port
, int size
, DWORD value
)
338 TRACE("IO: 0x%x (%d-byte value) to port 0x%04x\n", value
, size
, port
);
340 DOSMEM_InitDosMemory();
350 BYTE chan
= port
& 3;
352 tmr_8253
[chan
].flags
|= TMR_UPDATE
;
353 switch ((tmr_8253
[chan
].ctrlbyte_ch
& 0x30) >> 4)
356 break; /* shouldn't happen? */
357 case 1: /* write lo byte */
358 tmr_8253
[chan
].countmax
=
359 (tmr_8253
[chan
].countmax
& 0xff00) | (BYTE
)value
;
361 case 3: /* write lo byte, then hi byte */
362 tmr_8253
[chan
].flags
^= TMR_WTOGGLE
; /* toggle */
363 if (tmr_8253
[chan
].flags
& TMR_WTOGGLE
)
365 tmr_8253
[chan
].countmax
=
366 (tmr_8253
[chan
].countmax
& 0xff00) | (BYTE
)value
;
369 /* else [fall through if write hi byte !] */
370 case 2: /* write hi byte */
371 tmr_8253
[chan
].countmax
=
372 (tmr_8253
[chan
].countmax
& 0x00ff) | ((BYTE
)value
<< 8);
375 /* if programming is finished, update to new value */
376 if ((tmr_8253
[chan
].ctrlbyte_ch
& 0x30) &&
377 !(tmr_8253
[chan
].flags
& TMR_WTOGGLE
))
383 BYTE chan
= ((BYTE
)value
& 0xc0) >> 6;
384 /* ctrl byte for specific timer channel */
387 if ( !(value
& 0x20) )
389 if ((value
& 0x02) && !(tmr_8253
[0].flags
& TMR_LATCHED
))
391 tmr_8253
[0].flags
|= TMR_LATCHED
;
392 tmr_8253
[0].latch
= get_timer_val(0);
394 if ((value
& 0x04) && !(tmr_8253
[1].flags
& TMR_LATCHED
))
396 tmr_8253
[1].flags
|= TMR_LATCHED
;
397 tmr_8253
[1].latch
= get_timer_val(1);
399 if ((value
& 0x08) && !(tmr_8253
[2].flags
& TMR_LATCHED
))
401 tmr_8253
[2].flags
|= TMR_LATCHED
;
402 tmr_8253
[2].latch
= get_timer_val(2);
406 if ( !(value
& 0x10) )
409 tmr_8253
[0].flags
|= TMR_STATUS
;
411 tmr_8253
[1].flags
|= TMR_STATUS
;
413 tmr_8253
[2].flags
|= TMR_STATUS
;
417 switch (((BYTE
)value
& 0x30) >> 4)
419 case 0: /* latch timer */
420 if ( !(tmr_8253
[chan
].flags
& TMR_LATCHED
) )
422 tmr_8253
[chan
].flags
|= TMR_LATCHED
;
423 tmr_8253
[chan
].latch
= get_timer_val(chan
);
426 case 1: /* write lo byte only */
427 case 2: /* write hi byte only */
428 case 3: /* write lo byte, then hi byte */
429 tmr_8253
[chan
].ctrlbyte_ch
= (BYTE
)value
;
430 tmr_8253
[chan
].countmax
= 0;
431 tmr_8253
[chan
].flags
= TMR_UPDATE
;
437 parport_8255
[1] = (BYTE
)value
;
438 if (((parport_8255
[1] & 3) == 3) && (tmr_8253
[2].countmax
!= 1))
440 TRACE("Beep (freq: %d) !\n", 1193180 / tmr_8253
[2].countmax
);
441 Beep(1193180 / tmr_8253
[2].countmax
, 20);
445 cmosaddress
= (BYTE
)value
& 0x7f;
448 if (!cmos_image_initialized
)
450 IO_FixCMOSCheckSum();
451 cmos_image_initialized
= TRUE
;
453 cmosimage
[cmosaddress
& 0x3f] = (BYTE
)value
;
456 WARN("Direct I/O write attempted to port %x\n", port
);