Release 9.12.
[wine.git] / dlls / krnl386.exe16 / ioports.c
blobdc188fabecfb88eb5745c28b10d0f0fb807485bd
1 /*
2 * Emulation of processor ioports.
4 * Copyright 1995 Morten Welinder
5 * Copyright 1998 Andreas Mohr, Ove Kaaven
6 * Copyright 2001 Uwe Bonnes
8 * This library is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU Lesser General Public
10 * License as published by the Free Software Foundation; either
11 * version 2.1 of the License, or (at your option) any later version.
13 * This library is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * Lesser General Public License for more details.
18 * You should have received a copy of the GNU Lesser General Public
19 * License along with this library; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA
23 /* Known problems:
24 - only a few ports are emulated.
25 - real-time clock in "cmos" is bogus. A nifty alarm() setup could
26 fix that, I guess.
29 #include <stdarg.h>
30 #include <stdlib.h>
31 #include <sys/types.h>
33 #include "windef.h"
34 #include "winbase.h"
35 #include "winnls.h"
36 #include "winreg.h"
37 #include "winternl.h"
38 #include "kernel16_private.h"
39 #include "dosexe.h"
40 #include "wine/debug.h"
42 WINE_DEFAULT_DEBUG_CHANNEL(int);
44 static struct {
45 WORD countmax;
46 WORD latch;
47 BYTE ctrlbyte_ch;
48 BYTE flags;
49 LONG64 start_time;
50 } tmr_8253[3] = {
51 {0xFFFF, 0, 0x36, 0, 0},
52 {0x0012, 0, 0x74, 0, 0},
53 {0x0001, 0, 0xB6, 0, 0},
55 /* two byte read in progress */
56 #define TMR_RTOGGLE 0x01
57 /* two byte write in progress */
58 #define TMR_WTOGGLE 0x02
59 /* latch contains data */
60 #define TMR_LATCHED 0x04
61 /* counter is in update phase */
62 #define TMR_UPDATE 0x08
63 /* readback status request */
64 #define TMR_STATUS 0x10
67 static BYTE parport_8255[4] = {0x4f, 0x20, 0xff, 0xff};
69 static BYTE cmosaddress;
71 static BOOL cmos_image_initialized = FALSE;
73 static BYTE cmosimage[64] =
75 0x27, /* 0x00: seconds */
76 0x34, /* 0X01: seconds alarm */
77 0x31, /* 0x02: minutes */
78 0x47, /* 0x03: minutes alarm */
79 0x16, /* 0x04: hour */
80 0x15, /* 0x05: hour alarm */
81 0x00, /* 0x06: week day */
82 0x01, /* 0x07: month day */
83 0x04, /* 0x08: month */
84 0x94, /* 0x09: year */
85 0x26, /* 0x0a: state A */
86 0x02, /* 0x0b: state B */
87 0x50, /* 0x0c: state C */
88 0x80, /* 0x0d: state D */
89 0x00, /* 0x0e: state diagnostic */
90 0x00, /* 0x0f: state state shutdown */
91 0x40, /* 0x10: floppy type */
92 0xb1, /* 0x11: reserved */
93 0x00, /* 0x12: HD type */
94 0x9c, /* 0x13: reserved */
95 0x01, /* 0x14: equipment */
96 0x80, /* 0x15: low base memory */
97 0x02, /* 0x16: high base memory (0x280 => 640KB) */
98 0x00, /* 0x17: low extended memory */
99 0x3b, /* 0x18: high extended memory (0x3b00 => 15MB) */
100 0x00, /* 0x19: HD 1 extended type byte */
101 0x00, /* 0x1a: HD 2 extended type byte */
102 0xad, /* 0x1b: reserved */
103 0x02, /* 0x1c: reserved */
104 0x10, /* 0x1d: reserved */
105 0x00, /* 0x1e: reserved */
106 0x00, /* 0x1f: installed features */
107 0x08, /* 0x20: HD 1 low cylinder number */
108 0x00, /* 0x21: HD 1 high cylinder number */
109 0x00, /* 0x22: HD 1 heads */
110 0x26, /* 0x23: HD 1 low pre-compensation start */
111 0x00, /* 0x24: HD 1 high pre-compensation start */
112 0x00, /* 0x25: HD 1 low landing zone */
113 0x00, /* 0x26: HD 1 high landing zone */
114 0x00, /* 0x27: HD 1 sectors */
115 0x00, /* 0x28: options 1 */
116 0x00, /* 0x29: reserved */
117 0x00, /* 0x2a: reserved */
118 0x00, /* 0x2b: options 2 */
119 0x00, /* 0x2c: options 3 */
120 0x3f, /* 0x2d: reserved */
121 0xcc, /* 0x2e: low CMOS ram checksum (computed automatically) */
122 0xcc, /* 0x2f: high CMOS ram checksum (computed automatically) */
123 0x00, /* 0x30: low extended memory byte */
124 0x1c, /* 0x31: high extended memory byte */
125 0x19, /* 0x32: century byte */
126 0x81, /* 0x33: setup information */
127 0x00, /* 0x34: CPU speed */
128 0x0e, /* 0x35: HD 2 low cylinder number */
129 0x00, /* 0x36: HD 2 high cylinder number */
130 0x80, /* 0x37: HD 2 heads */
131 0x1b, /* 0x38: HD 2 low pre-compensation start */
132 0x7b, /* 0x39: HD 2 high pre-compensation start */
133 0x21, /* 0x3a: HD 2 low landing zone */
134 0x00, /* 0x3b: HD 2 high landing zone */
135 0x00, /* 0x3c: HD 2 sectors */
136 0x00, /* 0x3d: reserved */
137 0x05, /* 0x3e: reserved */
138 0x5f /* 0x3f: reserved */
141 static void IO_FixCMOSCheckSum(void)
143 WORD sum = 0;
144 int i;
146 for (i=0x10; i < 0x2d; i++)
147 sum += cmosimage[i];
148 cmosimage[0x2e] = sum >> 8; /* yes, this IS hi byte !! */
149 cmosimage[0x2f] = sum & 0xff;
150 TRACE("calculated hi %02x, lo %02x\n", cmosimage[0x2e], cmosimage[0x2f]);
153 #define BCD2BIN(a) \
154 ((a)%10 + ((a)>>4)%10*10 + ((a)>>8)%10*100 + ((a)>>12)%10*1000)
155 #define BIN2BCD(a) \
156 ((a)%10 | (a)/10%10<<4 | (a)/100%10<<8 | (a)/1000%10<<12)
159 static void set_timer(unsigned timer)
161 DWORD val = tmr_8253[timer].countmax;
163 if (tmr_8253[timer].ctrlbyte_ch & 0x01)
164 val = BCD2BIN(val);
166 tmr_8253[timer].flags &= ~TMR_UPDATE;
167 if (!QueryPerformanceCounter((LARGE_INTEGER*)&tmr_8253[timer].start_time))
168 WARN("QueryPerformanceCounter should not fail!\n");
170 switch (timer) {
171 case 0: /* System timer counter divisor */
172 break;
173 case 1: /* RAM refresh */
174 FIXME("RAM refresh counter handling not implemented !\n");
175 break;
176 case 2: /* cassette & speaker */
177 /* speaker on ? */
178 if ((parport_8255[1] & 3) == 3)
180 TRACE("Beep (freq: %ld) !\n", 1193180 / val);
181 Beep(1193180 / val, 20);
183 break;
188 static WORD get_timer_val(unsigned timer)
190 LARGE_INTEGER time;
191 WORD maxval, val = tmr_8253[timer].countmax;
192 BYTE mode = tmr_8253[timer].ctrlbyte_ch >> 1 & 0x07;
194 /* This is not strictly correct. In most cases the old countdown should
195 * finish normally (by counting down to 0) or halt and not jump to 0.
196 * But we are calculating and not counting, so this seems to be a good
197 * solution and should work well with most (all?) programs
199 if (tmr_8253[timer].flags & TMR_UPDATE)
200 return 0;
202 if (!QueryPerformanceCounter(&time))
203 WARN("QueryPerformanceCounter should not fail!\n");
205 time.QuadPart -= tmr_8253[timer].start_time;
206 if (tmr_8253[timer].ctrlbyte_ch & 0x01)
207 val = BCD2BIN(val);
209 switch ( mode )
211 case 0:
212 case 1:
213 case 4:
214 case 5:
215 maxval = tmr_8253[timer].ctrlbyte_ch & 0x01 ? 9999 : 0xFFFF;
216 break;
217 case 2:
218 case 3:
219 maxval = val;
220 break;
221 default:
222 ERR("Invalid PIT mode: %d\n", mode);
223 return 0;
226 val = (val - time.QuadPart) % (maxval + 1);
227 if (tmr_8253[timer].ctrlbyte_ch & 0x01)
228 val = BIN2BCD(val);
230 return val;
235 /**********************************************************************
236 * DOSVM_inport
238 * Note: The size argument has to be handled correctly _externally_
239 * (as we always return a DWORD)
241 DWORD DOSVM_inport( int port, int size )
243 DWORD res = ~0U;
245 TRACE("%d-byte value from port 0x%04x\n", size, port );
247 DOSMEM_InitDosMemory();
249 switch (port)
251 case 0x40:
252 case 0x41:
253 case 0x42:
255 BYTE chan = port & 3;
256 WORD tempval = tmr_8253[chan].flags & TMR_LATCHED
257 ? tmr_8253[chan].latch : get_timer_val(chan);
259 if (tmr_8253[chan].flags & TMR_STATUS)
261 WARN("Read-back status\n");
262 /* We differ slightly from the spec:
263 * - TMR_UPDATE is already set with the first write
264 * of a two byte counter update
265 * - 0x80 should be set if OUT signal is 1 (high)
267 tmr_8253[chan].flags &= ~TMR_STATUS;
268 res = (tmr_8253[chan].ctrlbyte_ch & 0x3F) |
269 (tmr_8253[chan].flags & TMR_UPDATE ? 0x40 : 0x00);
270 break;
272 switch ((tmr_8253[chan].ctrlbyte_ch & 0x30) >> 4)
274 case 0:
275 res = 0; /* shouldn't happen? */
276 break;
277 case 1: /* read lo byte */
278 res = (BYTE)tempval;
279 tmr_8253[chan].flags &= ~TMR_LATCHED;
280 break;
281 case 3: /* read lo byte, then hi byte */
282 tmr_8253[chan].flags ^= TMR_RTOGGLE; /* toggle */
283 if (tmr_8253[chan].flags & TMR_RTOGGLE)
285 res = (BYTE)tempval;
286 break;
288 /* else [fall through if read hi byte !] */
289 case 2: /* read hi byte */
290 res = (BYTE)(tempval >> 8);
291 tmr_8253[chan].flags &= ~TMR_LATCHED;
292 break;
295 break;
296 case 0x60:
297 break;
298 case 0x61:
299 res = (DWORD)parport_8255[1];
300 break;
301 case 0x62:
302 res = (DWORD)parport_8255[2];
303 break;
304 case 0x70:
305 res = (DWORD)cmosaddress;
306 break;
307 case 0x71:
308 if (!cmos_image_initialized)
310 IO_FixCMOSCheckSum();
311 cmos_image_initialized = TRUE;
313 res = (DWORD)cmosimage[cmosaddress & 0x3f];
314 break;
315 case 0x200:
316 case 0x201:
317 res = ~0U; /* no joystick */
318 break;
319 case 0x3da:
320 res = GetTickCount() % 17 == 0 ? 0x4 : 0; /* report vblank about 60 times per second */
321 break;
322 default:
323 WARN("Direct I/O read attempted from port %x\n", port);
324 break;
326 return res;
330 /**********************************************************************
331 * DOSVM_outport
333 void DOSVM_outport( int port, int size, DWORD value )
335 TRACE("IO: 0x%lx (%d-byte value) to port 0x%04x\n", value, size, port );
337 DOSMEM_InitDosMemory();
339 switch (port)
341 case 0x20:
342 break;
343 case 0x40:
344 case 0x41:
345 case 0x42:
347 BYTE chan = port & 3;
349 tmr_8253[chan].flags |= TMR_UPDATE;
350 switch ((tmr_8253[chan].ctrlbyte_ch & 0x30) >> 4)
352 case 0:
353 break; /* shouldn't happen? */
354 case 1: /* write lo byte */
355 tmr_8253[chan].countmax =
356 (tmr_8253[chan].countmax & 0xff00) | (BYTE)value;
357 break;
358 case 3: /* write lo byte, then hi byte */
359 tmr_8253[chan].flags ^= TMR_WTOGGLE; /* toggle */
360 if (tmr_8253[chan].flags & TMR_WTOGGLE)
362 tmr_8253[chan].countmax =
363 (tmr_8253[chan].countmax & 0xff00) | (BYTE)value;
364 break;
366 /* else [fall through if write hi byte !] */
367 case 2: /* write hi byte */
368 tmr_8253[chan].countmax =
369 (tmr_8253[chan].countmax & 0x00ff) | ((BYTE)value << 8);
370 break;
372 /* if programming is finished, update to new value */
373 if ((tmr_8253[chan].ctrlbyte_ch & 0x30) &&
374 !(tmr_8253[chan].flags & TMR_WTOGGLE))
375 set_timer(chan);
377 break;
378 case 0x43:
380 BYTE chan = ((BYTE)value & 0xc0) >> 6;
381 /* ctrl byte for specific timer channel */
382 if (chan == 3)
384 if ( !(value & 0x20) )
386 if ((value & 0x02) && !(tmr_8253[0].flags & TMR_LATCHED))
388 tmr_8253[0].flags |= TMR_LATCHED;
389 tmr_8253[0].latch = get_timer_val(0);
391 if ((value & 0x04) && !(tmr_8253[1].flags & TMR_LATCHED))
393 tmr_8253[1].flags |= TMR_LATCHED;
394 tmr_8253[1].latch = get_timer_val(1);
396 if ((value & 0x08) && !(tmr_8253[2].flags & TMR_LATCHED))
398 tmr_8253[2].flags |= TMR_LATCHED;
399 tmr_8253[2].latch = get_timer_val(2);
403 if ( !(value & 0x10) )
405 if (value & 0x02)
406 tmr_8253[0].flags |= TMR_STATUS;
407 if (value & 0x04)
408 tmr_8253[1].flags |= TMR_STATUS;
409 if (value & 0x08)
410 tmr_8253[2].flags |= TMR_STATUS;
412 break;
414 switch (((BYTE)value & 0x30) >> 4)
416 case 0: /* latch timer */
417 if ( !(tmr_8253[chan].flags & TMR_LATCHED) )
419 tmr_8253[chan].flags |= TMR_LATCHED;
420 tmr_8253[chan].latch = get_timer_val(chan);
422 break;
423 case 1: /* write lo byte only */
424 case 2: /* write hi byte only */
425 case 3: /* write lo byte, then hi byte */
426 tmr_8253[chan].ctrlbyte_ch = (BYTE)value;
427 tmr_8253[chan].countmax = 0;
428 tmr_8253[chan].flags = TMR_UPDATE;
429 break;
432 break;
433 case 0x61:
434 parport_8255[1] = (BYTE)value;
435 if (((parport_8255[1] & 3) == 3) && (tmr_8253[2].countmax != 1))
437 TRACE("Beep (freq: %d) !\n", 1193180 / tmr_8253[2].countmax);
438 Beep(1193180 / tmr_8253[2].countmax, 20);
440 break;
441 case 0x70:
442 cmosaddress = (BYTE)value & 0x7f;
443 break;
444 case 0x71:
445 if (!cmos_image_initialized)
447 IO_FixCMOSCheckSum();
448 cmos_image_initialized = TRUE;
450 cmosimage[cmosaddress & 0x3f] = (BYTE)value;
451 break;
452 default:
453 WARN("Direct I/O write attempted to port %x\n", port );
454 break;