2 * Copyright (c) 2000 Mike Corrigan <mikejc@us.ibm.com>
3 * Copyright (c) 1999-2000 Grant Erickson <grant@lcse.umn.edu>
6 * Architecture- / platform-specific boot-time initialization code for
7 * the IBM iSeries LPAR. Adapted from original code by Grant Erickson and
8 * code by Gary Thomas, Cort Dougan <cort@fsmlabs.com>, and Dan Malek
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * as published by the Free Software Foundation; either version
14 * 2 of the License, or (at your option) any later version.
19 #include <linux/config.h>
20 #include <linux/init.h>
21 #include <linux/threads.h>
22 #include <linux/smp.h>
23 #include <linux/param.h>
24 #include <linux/string.h>
25 #include <linux/initrd.h>
26 #include <linux/seq_file.h>
27 #include <linux/kdev_t.h>
28 #include <linux/major.h>
29 #include <linux/root_dev.h>
30 #include <linux/kernel.h>
32 #include <asm/processor.h>
33 #include <asm/machdep.h>
36 #include <asm/pgtable.h>
37 #include <asm/mmu_context.h>
38 #include <asm/cputable.h>
39 #include <asm/sections.h>
40 #include <asm/iommu.h>
41 #include <asm/firmware.h>
42 #include <asm/system.h>
45 #include <asm/cache.h>
46 #include <asm/sections.h>
47 #include <asm/abs_addr.h>
48 #include <asm/iseries/hv_lp_config.h>
49 #include <asm/iseries/hv_call_event.h>
50 #include <asm/iseries/hv_call_xm.h>
51 #include <asm/iseries/it_lp_queue.h>
52 #include <asm/iseries/mf.h>
53 #include <asm/iseries/it_exp_vpd_panel.h>
54 #include <asm/iseries/hv_lp_event.h>
55 #include <asm/iseries/lpar_map.h>
61 #include "vpd_areas.h"
62 #include "processor_vpd.h"
63 #include "main_store.h"
68 #define DBG(fmt...) udbg_printf(fmt)
73 /* Function Prototypes */
74 static unsigned long build_iSeries_Memory_Map(void);
75 static void iseries_shared_idle(void);
76 static void iseries_dedicated_idle(void);
78 extern void iSeries_pci_final_fixup(void);
80 static void iSeries_pci_final_fixup(void) { }
83 /* Global Variables */
84 int piranha_simulator
;
86 extern int rd_size
; /* Defined in drivers/block/rd.c */
87 extern unsigned long embedded_sysmap_start
;
88 extern unsigned long embedded_sysmap_end
;
90 extern unsigned long iSeries_recal_tb
;
91 extern unsigned long iSeries_recal_titan
;
93 static unsigned long cmd_mem_limit
;
96 unsigned long absStart
;
98 unsigned long logicalStart
;
99 unsigned long logicalEnd
;
103 * Process the main store vpd to determine where the holes in memory are
104 * and return the number of physical blocks and fill in the array of
107 static unsigned long iSeries_process_Condor_mainstore_vpd(
108 struct MemoryBlock
*mb_array
, unsigned long max_entries
)
110 unsigned long holeFirstChunk
, holeSizeChunks
;
111 unsigned long numMemoryBlocks
= 1;
112 struct IoHriMainStoreSegment4
*msVpd
=
113 (struct IoHriMainStoreSegment4
*)xMsVpd
;
114 unsigned long holeStart
= msVpd
->nonInterleavedBlocksStartAdr
;
115 unsigned long holeEnd
= msVpd
->nonInterleavedBlocksEndAdr
;
116 unsigned long holeSize
= holeEnd
- holeStart
;
118 printk("Mainstore_VPD: Condor\n");
120 * Determine if absolute memory has any
121 * holes so that we can interpret the
122 * access map we get back from the hypervisor
125 mb_array
[0].logicalStart
= 0;
126 mb_array
[0].logicalEnd
= 0x100000000;
127 mb_array
[0].absStart
= 0;
128 mb_array
[0].absEnd
= 0x100000000;
132 holeStart
= holeStart
& 0x000fffffffffffff;
133 holeStart
= addr_to_chunk(holeStart
);
134 holeFirstChunk
= holeStart
;
135 holeSize
= addr_to_chunk(holeSize
);
136 holeSizeChunks
= holeSize
;
137 printk( "Main store hole: start chunk = %0lx, size = %0lx chunks\n",
138 holeFirstChunk
, holeSizeChunks
);
139 mb_array
[0].logicalEnd
= holeFirstChunk
;
140 mb_array
[0].absEnd
= holeFirstChunk
;
141 mb_array
[1].logicalStart
= holeFirstChunk
;
142 mb_array
[1].logicalEnd
= 0x100000000 - holeSizeChunks
;
143 mb_array
[1].absStart
= holeFirstChunk
+ holeSizeChunks
;
144 mb_array
[1].absEnd
= 0x100000000;
146 return numMemoryBlocks
;
149 #define MaxSegmentAreas 32
150 #define MaxSegmentAdrRangeBlocks 128
151 #define MaxAreaRangeBlocks 4
153 static unsigned long iSeries_process_Regatta_mainstore_vpd(
154 struct MemoryBlock
*mb_array
, unsigned long max_entries
)
156 struct IoHriMainStoreSegment5
*msVpdP
=
157 (struct IoHriMainStoreSegment5
*)xMsVpd
;
158 unsigned long numSegmentBlocks
= 0;
159 u32 existsBits
= msVpdP
->msAreaExists
;
160 unsigned long area_num
;
162 printk("Mainstore_VPD: Regatta\n");
164 for (area_num
= 0; area_num
< MaxSegmentAreas
; ++area_num
) {
165 unsigned long numAreaBlocks
;
166 struct IoHriMainStoreArea4
*currentArea
;
168 if (existsBits
& 0x80000000) {
169 unsigned long block_num
;
171 currentArea
= &msVpdP
->msAreaArray
[area_num
];
172 numAreaBlocks
= currentArea
->numAdrRangeBlocks
;
173 printk("ms_vpd: processing area %2ld blocks=%ld",
174 area_num
, numAreaBlocks
);
175 for (block_num
= 0; block_num
< numAreaBlocks
;
177 /* Process an address range block */
178 struct MemoryBlock tempBlock
;
182 (unsigned long)currentArea
->xAdrRangeBlock
[block_num
].blockStart
;
184 (unsigned long)currentArea
->xAdrRangeBlock
[block_num
].blockEnd
;
185 tempBlock
.logicalStart
= 0;
186 tempBlock
.logicalEnd
= 0;
187 printk("\n block %ld absStart=%016lx absEnd=%016lx",
188 block_num
, tempBlock
.absStart
,
191 for (i
= 0; i
< numSegmentBlocks
; ++i
) {
192 if (mb_array
[i
].absStart
==
196 if (i
== numSegmentBlocks
) {
197 if (numSegmentBlocks
== max_entries
)
198 panic("iSeries_process_mainstore_vpd: too many memory blocks");
199 mb_array
[numSegmentBlocks
] = tempBlock
;
202 printk(" (duplicate)");
208 /* Now sort the blocks found into ascending sequence */
209 if (numSegmentBlocks
> 1) {
212 for (m
= 0; m
< numSegmentBlocks
- 1; ++m
) {
213 for (n
= numSegmentBlocks
- 1; m
< n
; --n
) {
214 if (mb_array
[n
].absStart
<
215 mb_array
[n
-1].absStart
) {
216 struct MemoryBlock tempBlock
;
218 tempBlock
= mb_array
[n
];
219 mb_array
[n
] = mb_array
[n
-1];
220 mb_array
[n
-1] = tempBlock
;
226 * Assign "logical" addresses to each block. These
227 * addresses correspond to the hypervisor "bitmap" space.
228 * Convert all addresses into units of 256K chunks.
231 unsigned long i
, nextBitmapAddress
;
233 printk("ms_vpd: %ld sorted memory blocks\n", numSegmentBlocks
);
234 nextBitmapAddress
= 0;
235 for (i
= 0; i
< numSegmentBlocks
; ++i
) {
236 unsigned long length
= mb_array
[i
].absEnd
-
237 mb_array
[i
].absStart
;
239 mb_array
[i
].logicalStart
= nextBitmapAddress
;
240 mb_array
[i
].logicalEnd
= nextBitmapAddress
+ length
;
241 nextBitmapAddress
+= length
;
242 printk(" Bitmap range: %016lx - %016lx\n"
243 " Absolute range: %016lx - %016lx\n",
244 mb_array
[i
].logicalStart
,
245 mb_array
[i
].logicalEnd
,
246 mb_array
[i
].absStart
, mb_array
[i
].absEnd
);
247 mb_array
[i
].absStart
= addr_to_chunk(mb_array
[i
].absStart
&
249 mb_array
[i
].absEnd
= addr_to_chunk(mb_array
[i
].absEnd
&
251 mb_array
[i
].logicalStart
=
252 addr_to_chunk(mb_array
[i
].logicalStart
);
253 mb_array
[i
].logicalEnd
= addr_to_chunk(mb_array
[i
].logicalEnd
);
257 return numSegmentBlocks
;
260 static unsigned long iSeries_process_mainstore_vpd(struct MemoryBlock
*mb_array
,
261 unsigned long max_entries
)
264 unsigned long mem_blocks
= 0;
266 if (cpu_has_feature(CPU_FTR_SLB
))
267 mem_blocks
= iSeries_process_Regatta_mainstore_vpd(mb_array
,
270 mem_blocks
= iSeries_process_Condor_mainstore_vpd(mb_array
,
273 printk("Mainstore_VPD: numMemoryBlocks = %ld \n", mem_blocks
);
274 for (i
= 0; i
< mem_blocks
; ++i
) {
275 printk("Mainstore_VPD: block %3ld logical chunks %016lx - %016lx\n"
276 " abs chunks %016lx - %016lx\n",
277 i
, mb_array
[i
].logicalStart
, mb_array
[i
].logicalEnd
,
278 mb_array
[i
].absStart
, mb_array
[i
].absEnd
);
283 static void __init
iSeries_get_cmdline(void)
287 /* copy the command line parameter from the primary VSP */
288 HvCallEvent_dmaToSp(cmd_line
, 2 * 64* 1024, 256,
289 HvLpDma_Direction_RemoteToLocal
);
294 if (!*p
|| *p
== '\n')
301 static void __init
iSeries_init_early(void)
303 DBG(" -> iSeries_init_early()\n");
305 ppc64_interrupt_controller
= IC_ISERIES
;
307 #if defined(CONFIG_BLK_DEV_INITRD)
309 * If the init RAM disk has been configured and there is
310 * a non-zero starting address for it, set it up
313 initrd_start
= (unsigned long)__va(naca
.xRamDisk
);
314 initrd_end
= initrd_start
+ naca
.xRamDiskSize
* HW_PAGE_SIZE
;
315 initrd_below_start_ok
= 1; // ramdisk in kernel space
316 ROOT_DEV
= Root_RAM0
;
317 if (((rd_size
* 1024) / HW_PAGE_SIZE
) < naca
.xRamDiskSize
)
318 rd_size
= (naca
.xRamDiskSize
* HW_PAGE_SIZE
) / 1024;
320 #endif /* CONFIG_BLK_DEV_INITRD */
322 /* ROOT_DEV = MKDEV(VIODASD_MAJOR, 1); */
325 iSeries_recal_tb
= get_tb();
326 iSeries_recal_titan
= HvCallXm_loadTod();
329 * Initialize the hash table management pointers
334 * Initialize the DMA/TCE management
336 iommu_init_early_iSeries();
338 /* Initialize machine-dependency vectors */
342 if (itLpNaca
.xPirEnvironMode
== 0)
343 piranha_simulator
= 1;
345 /* Associate Lp Event Queue 0 with processor 0 */
346 HvCallEvent_setLpEventQueueInterruptProc(0, 0);
350 /* If we were passed an initrd, set the ROOT_DEV properly if the values
351 * look sensible. If not, clear initrd reference.
353 #ifdef CONFIG_BLK_DEV_INITRD
354 if (initrd_start
>= KERNELBASE
&& initrd_end
>= KERNELBASE
&&
355 initrd_end
> initrd_start
)
356 ROOT_DEV
= Root_RAM0
;
358 initrd_start
= initrd_end
= 0;
359 #endif /* CONFIG_BLK_DEV_INITRD */
361 DBG(" <- iSeries_init_early()\n");
364 struct mschunks_map mschunks_map
= {
365 /* XXX We don't use these, but Piranha might need them. */
366 .chunk_size
= MSCHUNKS_CHUNK_SIZE
,
367 .chunk_shift
= MSCHUNKS_CHUNK_SHIFT
,
368 .chunk_mask
= MSCHUNKS_OFFSET_MASK
,
370 EXPORT_SYMBOL(mschunks_map
);
372 void mschunks_alloc(unsigned long num_chunks
)
374 klimit
= _ALIGN(klimit
, sizeof(u32
));
375 mschunks_map
.mapping
= (u32
*)klimit
;
376 klimit
+= num_chunks
* sizeof(u32
);
377 mschunks_map
.num_chunks
= num_chunks
;
381 * The iSeries may have very large memories ( > 128 GB ) and a partition
382 * may get memory in "chunks" that may be anywhere in the 2**52 real
383 * address space. The chunks are 256K in size. To map this to the
384 * memory model Linux expects, the AS/400 specific code builds a
385 * translation table to translate what Linux thinks are "physical"
386 * addresses to the actual real addresses. This allows us to make
387 * it appear to Linux that we have contiguous memory starting at
388 * physical address zero while in fact this could be far from the truth.
389 * To avoid confusion, I'll let the words physical and/or real address
390 * apply to the Linux addresses while I'll use "absolute address" to
391 * refer to the actual hardware real address.
393 * build_iSeries_Memory_Map gets information from the Hypervisor and
394 * looks at the Main Store VPD to determine the absolute addresses
395 * of the memory that has been assigned to our partition and builds
396 * a table used to translate Linux's physical addresses to these
397 * absolute addresses. Absolute addresses are needed when
398 * communicating with the hypervisor (e.g. to build HPT entries)
400 * Returns the physical memory size
403 static unsigned long __init
build_iSeries_Memory_Map(void)
405 u32 loadAreaFirstChunk
, loadAreaLastChunk
, loadAreaSize
;
407 u32 hptFirstChunk
, hptLastChunk
, hptSizeChunks
, hptSizePages
;
408 u32 totalChunks
,moreChunks
;
409 u32 currChunk
, thisChunk
, absChunk
;
413 struct MemoryBlock mb
[32];
414 unsigned long numMemoryBlocks
, curBlock
;
416 /* Chunk size on iSeries is 256K bytes */
417 totalChunks
= (u32
)HvLpConfig_getMsChunks();
418 mschunks_alloc(totalChunks
);
421 * Get absolute address of our load area
422 * and map it to physical address 0
423 * This guarantees that the loadarea ends up at physical 0
424 * otherwise, it might not be returned by PLIC as the first
428 loadAreaFirstChunk
= (u32
)addr_to_chunk(itLpNaca
.xLoadAreaAddr
);
429 loadAreaSize
= itLpNaca
.xLoadAreaChunks
;
432 * Only add the pages already mapped here.
433 * Otherwise we might add the hpt pages
434 * The rest of the pages of the load area
435 * aren't in the HPT yet and can still
436 * be assigned an arbitrary physical address
438 if ((loadAreaSize
* 64) > HvPagesToMap
)
439 loadAreaSize
= HvPagesToMap
/ 64;
441 loadAreaLastChunk
= loadAreaFirstChunk
+ loadAreaSize
- 1;
444 * TODO Do we need to do something if the HPT is in the 64MB load area?
445 * This would be required if the itLpNaca.xLoadAreaChunks includes
449 printk("Mapping load area - physical addr = 0000000000000000\n"
450 " absolute addr = %016lx\n",
451 chunk_to_addr(loadAreaFirstChunk
));
452 printk("Load area size %dK\n", loadAreaSize
* 256);
454 for (nextPhysChunk
= 0; nextPhysChunk
< loadAreaSize
; ++nextPhysChunk
)
455 mschunks_map
.mapping
[nextPhysChunk
] =
456 loadAreaFirstChunk
+ nextPhysChunk
;
459 * Get absolute address of our HPT and remember it so
460 * we won't map it to any physical address
462 hptFirstChunk
= (u32
)addr_to_chunk(HvCallHpt_getHptAddress());
463 hptSizePages
= (u32
)HvCallHpt_getHptPages();
464 hptSizeChunks
= hptSizePages
>>
465 (MSCHUNKS_CHUNK_SHIFT
- HW_PAGE_SHIFT
);
466 hptLastChunk
= hptFirstChunk
+ hptSizeChunks
- 1;
468 printk("HPT absolute addr = %016lx, size = %dK\n",
469 chunk_to_addr(hptFirstChunk
), hptSizeChunks
* 256);
472 * Determine if absolute memory has any
473 * holes so that we can interpret the
474 * access map we get back from the hypervisor
477 numMemoryBlocks
= iSeries_process_mainstore_vpd(mb
, 32);
480 * Process the main store access map from the hypervisor
481 * to build up our physical -> absolute translation table
486 moreChunks
= totalChunks
;
489 map
= HvCallSm_get64BitsOfAccessMap(itLpNaca
.xLpIndex
,
491 thisChunk
= currChunk
;
493 chunkBit
= map
>> 63;
497 while (thisChunk
>= mb
[curBlock
].logicalEnd
) {
499 if (curBlock
>= numMemoryBlocks
)
500 panic("out of memory blocks");
502 if (thisChunk
< mb
[curBlock
].logicalStart
)
503 panic("memory block error");
505 absChunk
= mb
[curBlock
].absStart
+
506 (thisChunk
- mb
[curBlock
].logicalStart
);
507 if (((absChunk
< hptFirstChunk
) ||
508 (absChunk
> hptLastChunk
)) &&
509 ((absChunk
< loadAreaFirstChunk
) ||
510 (absChunk
> loadAreaLastChunk
))) {
511 mschunks_map
.mapping
[nextPhysChunk
] =
523 * main store size (in chunks) is
524 * totalChunks - hptSizeChunks
525 * which should be equal to
528 return chunk_to_addr(nextPhysChunk
);
534 static void __init
iSeries_setup_arch(void)
536 if (get_lppaca()->shared_proc
) {
537 ppc_md
.idle_loop
= iseries_shared_idle
;
538 printk(KERN_INFO
"Using shared processor idle loop\n");
540 ppc_md
.idle_loop
= iseries_dedicated_idle
;
541 printk(KERN_INFO
"Using dedicated idle loop\n");
544 /* Setup the Lp Event Queue */
545 setup_hvlpevent_queue();
547 printk("Max logical processors = %d\n",
548 itVpdAreas
.xSlicMaxLogicalProcs
);
549 printk("Max physical processors = %d\n",
550 itVpdAreas
.xSlicMaxPhysicalProcs
);
553 static void iSeries_show_cpuinfo(struct seq_file
*m
)
555 seq_printf(m
, "machine\t\t: 64-bit iSeries Logical Partition\n");
558 static void __init
iSeries_progress(char * st
, unsigned short code
)
560 printk("Progress: [%04x] - %s\n", (unsigned)code
, st
);
561 mf_display_progress(code
);
564 static void __init
iSeries_fixup_klimit(void)
567 * Change klimit to take into account any ram disk
568 * that may be included
571 klimit
= KERNELBASE
+ (u64
)naca
.xRamDisk
+
572 (naca
.xRamDiskSize
* HW_PAGE_SIZE
);
575 * No ram disk was included - check and see if there
576 * was an embedded system map. Change klimit to take
577 * into account any embedded system map
579 if (embedded_sysmap_end
)
580 klimit
= KERNELBASE
+ ((embedded_sysmap_end
+ 4095) &
585 static int __init
iSeries_src_init(void)
587 /* clear the progress line */
588 ppc_md
.progress(" ", 0xffff);
592 late_initcall(iSeries_src_init
);
594 static inline void process_iSeries_events(void)
596 asm volatile ("li 0,0x5555; sc" : : : "r0", "r3");
599 static void yield_shared_processor(void)
603 HvCall_setEnabledInterrupts(HvCall_MaskIPI
|
609 /* Compute future tb value when yield should expire */
610 HvCall_yieldProcessor(HvCall_YieldTimed
, tb
+tb_ticks_per_jiffy
);
613 * The decrementer stops during the yield. Force a fake decrementer
614 * here and let the timer_interrupt code sort out the actual time.
616 get_lppaca()->int_dword
.fields
.decr_int
= 1;
618 process_iSeries_events();
621 static void iseries_shared_idle(void)
624 while (!need_resched() && !hvlpevent_is_pending()) {
626 ppc64_runlatch_off();
628 /* Recheck with irqs off */
629 if (!need_resched() && !hvlpevent_is_pending())
630 yield_shared_processor();
638 if (hvlpevent_is_pending())
639 process_iSeries_events();
641 preempt_enable_no_resched();
647 static void iseries_dedicated_idle(void)
649 set_thread_flag(TIF_POLLING_NRFLAG
);
652 if (!need_resched()) {
653 while (!need_resched()) {
654 ppc64_runlatch_off();
657 if (hvlpevent_is_pending()) {
660 process_iSeries_events();
668 preempt_enable_no_resched();
675 void __init
iSeries_init_IRQ(void) { }
678 static int __init
iseries_probe(int platform
)
680 if (PLATFORM_ISERIES_LPAR
!= platform
)
683 ppc64_firmware_features
|= FW_FEATURE_ISERIES
;
684 ppc64_firmware_features
|= FW_FEATURE_LPAR
;
689 struct machdep_calls __initdata iseries_md
= {
690 .setup_arch
= iSeries_setup_arch
,
691 .show_cpuinfo
= iSeries_show_cpuinfo
,
692 .init_IRQ
= iSeries_init_IRQ
,
693 .get_irq
= iSeries_get_irq
,
694 .init_early
= iSeries_init_early
,
695 .pcibios_fixup
= iSeries_pci_final_fixup
,
696 .restart
= mf_reboot
,
697 .power_off
= mf_power_off
,
698 .halt
= mf_power_off
,
699 .get_boot_time
= iSeries_get_boot_time
,
700 .set_rtc_time
= iSeries_set_rtc_time
,
701 .get_rtc_time
= iSeries_get_rtc_time
,
702 .calibrate_decr
= generic_calibrate_decr
,
703 .progress
= iSeries_progress
,
704 .probe
= iseries_probe
,
705 /* XXX Implement enable_pmcs for iSeries */
709 unsigned char data
[PAGE_SIZE
];
713 struct iseries_flat_dt
{
714 struct boot_param_header header
;
720 struct iseries_flat_dt iseries_dt
;
722 void dt_init(struct iseries_flat_dt
*dt
)
724 dt
->header
.off_mem_rsvmap
=
725 offsetof(struct iseries_flat_dt
, reserve_map
);
726 dt
->header
.off_dt_struct
= offsetof(struct iseries_flat_dt
, dt
);
727 dt
->header
.off_dt_strings
= offsetof(struct iseries_flat_dt
, strings
);
728 dt
->header
.totalsize
= sizeof(struct iseries_flat_dt
);
729 dt
->header
.dt_strings_size
= sizeof(struct blob
);
731 /* There is no notion of hardware cpu id on iSeries */
732 dt
->header
.boot_cpuid_phys
= smp_processor_id();
734 dt
->dt
.next
= (unsigned long)&dt
->dt
.data
;
735 dt
->strings
.next
= (unsigned long)&dt
->strings
.data
;
737 dt
->header
.magic
= OF_DT_HEADER
;
738 dt
->header
.version
= 0x10;
739 dt
->header
.last_comp_version
= 0x10;
741 dt
->reserve_map
[0] = 0;
742 dt
->reserve_map
[1] = 0;
745 void dt_check_blob(struct blob
*b
)
747 if (b
->next
>= (unsigned long)&b
->next
) {
748 DBG("Ran out of space in flat device tree blob!\n");
753 void dt_push_u32(struct iseries_flat_dt
*dt
, u32 value
)
755 *((u32
*)dt
->dt
.next
) = value
;
756 dt
->dt
.next
+= sizeof(u32
);
758 dt_check_blob(&dt
->dt
);
761 void dt_push_u64(struct iseries_flat_dt
*dt
, u64 value
)
763 *((u64
*)dt
->dt
.next
) = value
;
764 dt
->dt
.next
+= sizeof(u64
);
766 dt_check_blob(&dt
->dt
);
769 unsigned long dt_push_bytes(struct blob
*blob
, char *data
, int len
)
771 unsigned long start
= blob
->next
- (unsigned long)blob
->data
;
773 memcpy((char *)blob
->next
, data
, len
);
774 blob
->next
= _ALIGN(blob
->next
+ len
, 4);
781 void dt_start_node(struct iseries_flat_dt
*dt
, char *name
)
783 dt_push_u32(dt
, OF_DT_BEGIN_NODE
);
784 dt_push_bytes(&dt
->dt
, name
, strlen(name
) + 1);
787 #define dt_end_node(dt) dt_push_u32(dt, OF_DT_END_NODE)
789 void dt_prop(struct iseries_flat_dt
*dt
, char *name
, char *data
, int len
)
791 unsigned long offset
;
793 dt_push_u32(dt
, OF_DT_PROP
);
795 /* Length of the data */
796 dt_push_u32(dt
, len
);
798 /* Put the property name in the string blob. */
799 offset
= dt_push_bytes(&dt
->strings
, name
, strlen(name
) + 1);
801 /* The offset of the properties name in the string blob. */
802 dt_push_u32(dt
, (u32
)offset
);
804 /* The actual data. */
805 dt_push_bytes(&dt
->dt
, data
, len
);
808 void dt_prop_str(struct iseries_flat_dt
*dt
, char *name
, char *data
)
810 dt_prop(dt
, name
, data
, strlen(data
) + 1); /* + 1 for NULL */
813 void dt_prop_u32(struct iseries_flat_dt
*dt
, char *name
, u32 data
)
815 dt_prop(dt
, name
, (char *)&data
, sizeof(u32
));
818 void dt_prop_u64(struct iseries_flat_dt
*dt
, char *name
, u64 data
)
820 dt_prop(dt
, name
, (char *)&data
, sizeof(u64
));
823 void dt_prop_u64_list(struct iseries_flat_dt
*dt
, char *name
, u64
*data
, int n
)
825 dt_prop(dt
, name
, (char *)data
, sizeof(u64
) * n
);
828 void dt_prop_u32_list(struct iseries_flat_dt
*dt
, char *name
, u32
*data
, int n
)
830 dt_prop(dt
, name
, (char *)data
, sizeof(u32
) * n
);
833 void dt_prop_empty(struct iseries_flat_dt
*dt
, char *name
)
835 dt_prop(dt
, name
, NULL
, 0);
838 void dt_cpus(struct iseries_flat_dt
*dt
)
840 unsigned char buf
[32];
842 unsigned int i
, index
;
843 struct IoHriProcessorVpd
*d
;
847 snprintf(buf
, 32, "PowerPC,%s", cur_cpu_spec
->cpu_name
);
848 p
= strchr(buf
, ' ');
849 if (!p
) p
= buf
+ strlen(buf
);
851 dt_start_node(dt
, "cpus");
852 dt_prop_u32(dt
, "#address-cells", 1);
853 dt_prop_u32(dt
, "#size-cells", 0);
855 pft_size
[0] = 0; /* NUMA CEC cookie, 0 for non NUMA */
856 pft_size
[1] = __ilog2(HvCallHpt_getHptPages() * HW_PAGE_SIZE
);
858 for (i
= 0; i
< NR_CPUS
; i
++) {
859 if (lppaca
[i
].dyn_proc_status
>= 2)
862 snprintf(p
, 32 - (p
- buf
), "@%d", i
);
863 dt_start_node(dt
, buf
);
865 dt_prop_str(dt
, "device_type", "cpu");
867 index
= lppaca
[i
].dyn_hv_phys_proc_index
;
868 d
= &xIoHriProcessorVpd
[index
];
870 dt_prop_u32(dt
, "i-cache-size", d
->xInstCacheSize
* 1024);
871 dt_prop_u32(dt
, "i-cache-line-size", d
->xInstCacheOperandSize
);
873 dt_prop_u32(dt
, "d-cache-size", d
->xDataL1CacheSizeKB
* 1024);
874 dt_prop_u32(dt
, "d-cache-line-size", d
->xDataCacheOperandSize
);
876 /* magic conversions to Hz copied from old code */
877 dt_prop_u32(dt
, "clock-frequency",
878 ((1UL << 34) * 1000000) / d
->xProcFreq
);
879 dt_prop_u32(dt
, "timebase-frequency",
880 ((1UL << 32) * 1000000) / d
->xTimeBaseFreq
);
882 dt_prop_u32(dt
, "reg", i
);
884 dt_prop_u32_list(dt
, "ibm,pft-size", pft_size
, 2);
892 void dt_model(struct iseries_flat_dt
*dt
)
894 char buf
[16] = "IBM,";
896 /* "IBM," + mfgId[2:3] + systemSerial[1:5] */
897 strne2a(buf
+ 4, xItExtVpdPanel
.mfgID
+ 2, 2);
898 strne2a(buf
+ 6, xItExtVpdPanel
.systemSerial
+ 1, 5);
900 dt_prop_str(dt
, "system-id", buf
);
902 /* "IBM," + machineType[0:4] */
903 strne2a(buf
+ 4, xItExtVpdPanel
.machineType
, 4);
905 dt_prop_str(dt
, "model", buf
);
907 dt_prop_str(dt
, "compatible", "IBM,iSeries");
910 void build_flat_dt(struct iseries_flat_dt
*dt
, unsigned long phys_mem_size
)
916 dt_start_node(dt
, "");
918 dt_prop_u32(dt
, "#address-cells", 2);
919 dt_prop_u32(dt
, "#size-cells", 2);
923 dt_start_node(dt
, "memory@0");
924 dt_prop_str(dt
, "name", "memory");
925 dt_prop_str(dt
, "device_type", "memory");
927 tmp
[1] = phys_mem_size
;
928 dt_prop_u64_list(dt
, "reg", tmp
, 2);
932 dt_start_node(dt
, "chosen");
933 dt_prop_u32(dt
, "linux,platform", PLATFORM_ISERIES_LPAR
);
935 dt_prop_u64(dt
, "linux,memory-limit", cmd_mem_limit
);
942 dt_push_u32(dt
, OF_DT_END
);
945 void * __init
iSeries_early_setup(void)
947 unsigned long phys_mem_size
;
949 iSeries_fixup_klimit();
952 * Initialize the table which translate Linux physical addresses to
953 * AS/400 absolute addresses
955 phys_mem_size
= build_iSeries_Memory_Map();
957 iSeries_get_cmdline();
959 /* Save unparsed command line copy for /proc/cmdline */
960 strlcpy(saved_command_line
, cmd_line
, COMMAND_LINE_SIZE
);
962 /* Parse early parameters, in particular mem=x */
965 build_flat_dt(&iseries_dt
, phys_mem_size
);
967 return (void *) __pa(&iseries_dt
);
971 * On iSeries we just parse the mem=X option from the command line.
972 * On pSeries it's a bit more complicated, see prom_init_mem()
974 static int __init
early_parsemem(char *p
)
977 cmd_mem_limit
= ALIGN(memparse(p
, &p
), PAGE_SIZE
);
980 early_param("mem", early_parsemem
);
982 static void hvputc(char c
)
987 HvCall_writeLogBuffer(&c
, 1);
990 void __init
udbg_init_iseries(void)