sched: s/sched_latency/sched_min_granularity
[usb.git] / arch / powerpc / platforms / iseries / setup.c
blob13a8b1908deda3c4c733003fd649701eba0c7cce
1 /*
2 * Copyright (c) 2000 Mike Corrigan <mikejc@us.ibm.com>
3 * Copyright (c) 1999-2000 Grant Erickson <grant@lcse.umn.edu>
5 * Description:
6 * Architecture- / platform-specific boot-time initialization code for
7 * the IBM iSeries LPAR. Adapted from original code by Grant Erickson and
8 * code by Gary Thomas, Cort Dougan <cort@fsmlabs.com>, and Dan Malek
9 * <dan@net4x.com>.
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * as published by the Free Software Foundation; either version
14 * 2 of the License, or (at your option) any later version.
17 #undef DEBUG
19 #include <linux/init.h>
20 #include <linux/threads.h>
21 #include <linux/smp.h>
22 #include <linux/param.h>
23 #include <linux/string.h>
24 #include <linux/seq_file.h>
25 #include <linux/kdev_t.h>
26 #include <linux/major.h>
27 #include <linux/root_dev.h>
28 #include <linux/kernel.h>
30 #include <asm/processor.h>
31 #include <asm/machdep.h>
32 #include <asm/page.h>
33 #include <asm/mmu.h>
34 #include <asm/pgtable.h>
35 #include <asm/mmu_context.h>
36 #include <asm/cputable.h>
37 #include <asm/sections.h>
38 #include <asm/iommu.h>
39 #include <asm/firmware.h>
40 #include <asm/system.h>
41 #include <asm/time.h>
42 #include <asm/paca.h>
43 #include <asm/cache.h>
44 #include <asm/sections.h>
45 #include <asm/abs_addr.h>
46 #include <asm/iseries/hv_lp_config.h>
47 #include <asm/iseries/hv_call_event.h>
48 #include <asm/iseries/hv_call_xm.h>
49 #include <asm/iseries/it_lp_queue.h>
50 #include <asm/iseries/mf.h>
51 #include <asm/iseries/hv_lp_event.h>
52 #include <asm/iseries/lpar_map.h>
53 #include <asm/udbg.h>
54 #include <asm/irq.h>
56 #include "naca.h"
57 #include "setup.h"
58 #include "irq.h"
59 #include "vpd_areas.h"
60 #include "processor_vpd.h"
61 #include "it_lp_naca.h"
62 #include "main_store.h"
63 #include "call_sm.h"
64 #include "call_hpt.h"
66 #ifdef DEBUG
67 #define DBG(fmt...) udbg_printf(fmt)
68 #else
69 #define DBG(fmt...)
70 #endif
72 /* Function Prototypes */
73 static unsigned long build_iSeries_Memory_Map(void);
74 static void iseries_shared_idle(void);
75 static void iseries_dedicated_idle(void);
76 #ifdef CONFIG_PCI
77 extern void iSeries_pci_final_fixup(void);
78 #else
79 static void iSeries_pci_final_fixup(void) { }
80 #endif
83 struct MemoryBlock {
84 unsigned long absStart;
85 unsigned long absEnd;
86 unsigned long logicalStart;
87 unsigned long logicalEnd;
91 * Process the main store vpd to determine where the holes in memory are
92 * and return the number of physical blocks and fill in the array of
93 * block data.
95 static unsigned long iSeries_process_Condor_mainstore_vpd(
96 struct MemoryBlock *mb_array, unsigned long max_entries)
98 unsigned long holeFirstChunk, holeSizeChunks;
99 unsigned long numMemoryBlocks = 1;
100 struct IoHriMainStoreSegment4 *msVpd =
101 (struct IoHriMainStoreSegment4 *)xMsVpd;
102 unsigned long holeStart = msVpd->nonInterleavedBlocksStartAdr;
103 unsigned long holeEnd = msVpd->nonInterleavedBlocksEndAdr;
104 unsigned long holeSize = holeEnd - holeStart;
106 printk("Mainstore_VPD: Condor\n");
108 * Determine if absolute memory has any
109 * holes so that we can interpret the
110 * access map we get back from the hypervisor
111 * correctly.
113 mb_array[0].logicalStart = 0;
114 mb_array[0].logicalEnd = 0x100000000;
115 mb_array[0].absStart = 0;
116 mb_array[0].absEnd = 0x100000000;
118 if (holeSize) {
119 numMemoryBlocks = 2;
120 holeStart = holeStart & 0x000fffffffffffff;
121 holeStart = addr_to_chunk(holeStart);
122 holeFirstChunk = holeStart;
123 holeSize = addr_to_chunk(holeSize);
124 holeSizeChunks = holeSize;
125 printk( "Main store hole: start chunk = %0lx, size = %0lx chunks\n",
126 holeFirstChunk, holeSizeChunks );
127 mb_array[0].logicalEnd = holeFirstChunk;
128 mb_array[0].absEnd = holeFirstChunk;
129 mb_array[1].logicalStart = holeFirstChunk;
130 mb_array[1].logicalEnd = 0x100000000 - holeSizeChunks;
131 mb_array[1].absStart = holeFirstChunk + holeSizeChunks;
132 mb_array[1].absEnd = 0x100000000;
134 return numMemoryBlocks;
137 #define MaxSegmentAreas 32
138 #define MaxSegmentAdrRangeBlocks 128
139 #define MaxAreaRangeBlocks 4
141 static unsigned long iSeries_process_Regatta_mainstore_vpd(
142 struct MemoryBlock *mb_array, unsigned long max_entries)
144 struct IoHriMainStoreSegment5 *msVpdP =
145 (struct IoHriMainStoreSegment5 *)xMsVpd;
146 unsigned long numSegmentBlocks = 0;
147 u32 existsBits = msVpdP->msAreaExists;
148 unsigned long area_num;
150 printk("Mainstore_VPD: Regatta\n");
152 for (area_num = 0; area_num < MaxSegmentAreas; ++area_num ) {
153 unsigned long numAreaBlocks;
154 struct IoHriMainStoreArea4 *currentArea;
156 if (existsBits & 0x80000000) {
157 unsigned long block_num;
159 currentArea = &msVpdP->msAreaArray[area_num];
160 numAreaBlocks = currentArea->numAdrRangeBlocks;
161 printk("ms_vpd: processing area %2ld blocks=%ld",
162 area_num, numAreaBlocks);
163 for (block_num = 0; block_num < numAreaBlocks;
164 ++block_num ) {
165 /* Process an address range block */
166 struct MemoryBlock tempBlock;
167 unsigned long i;
169 tempBlock.absStart =
170 (unsigned long)currentArea->xAdrRangeBlock[block_num].blockStart;
171 tempBlock.absEnd =
172 (unsigned long)currentArea->xAdrRangeBlock[block_num].blockEnd;
173 tempBlock.logicalStart = 0;
174 tempBlock.logicalEnd = 0;
175 printk("\n block %ld absStart=%016lx absEnd=%016lx",
176 block_num, tempBlock.absStart,
177 tempBlock.absEnd);
179 for (i = 0; i < numSegmentBlocks; ++i) {
180 if (mb_array[i].absStart ==
181 tempBlock.absStart)
182 break;
184 if (i == numSegmentBlocks) {
185 if (numSegmentBlocks == max_entries)
186 panic("iSeries_process_mainstore_vpd: too many memory blocks");
187 mb_array[numSegmentBlocks] = tempBlock;
188 ++numSegmentBlocks;
189 } else
190 printk(" (duplicate)");
192 printk("\n");
194 existsBits <<= 1;
196 /* Now sort the blocks found into ascending sequence */
197 if (numSegmentBlocks > 1) {
198 unsigned long m, n;
200 for (m = 0; m < numSegmentBlocks - 1; ++m) {
201 for (n = numSegmentBlocks - 1; m < n; --n) {
202 if (mb_array[n].absStart <
203 mb_array[n-1].absStart) {
204 struct MemoryBlock tempBlock;
206 tempBlock = mb_array[n];
207 mb_array[n] = mb_array[n-1];
208 mb_array[n-1] = tempBlock;
214 * Assign "logical" addresses to each block. These
215 * addresses correspond to the hypervisor "bitmap" space.
216 * Convert all addresses into units of 256K chunks.
219 unsigned long i, nextBitmapAddress;
221 printk("ms_vpd: %ld sorted memory blocks\n", numSegmentBlocks);
222 nextBitmapAddress = 0;
223 for (i = 0; i < numSegmentBlocks; ++i) {
224 unsigned long length = mb_array[i].absEnd -
225 mb_array[i].absStart;
227 mb_array[i].logicalStart = nextBitmapAddress;
228 mb_array[i].logicalEnd = nextBitmapAddress + length;
229 nextBitmapAddress += length;
230 printk(" Bitmap range: %016lx - %016lx\n"
231 " Absolute range: %016lx - %016lx\n",
232 mb_array[i].logicalStart,
233 mb_array[i].logicalEnd,
234 mb_array[i].absStart, mb_array[i].absEnd);
235 mb_array[i].absStart = addr_to_chunk(mb_array[i].absStart &
236 0x000fffffffffffff);
237 mb_array[i].absEnd = addr_to_chunk(mb_array[i].absEnd &
238 0x000fffffffffffff);
239 mb_array[i].logicalStart =
240 addr_to_chunk(mb_array[i].logicalStart);
241 mb_array[i].logicalEnd = addr_to_chunk(mb_array[i].logicalEnd);
245 return numSegmentBlocks;
248 static unsigned long iSeries_process_mainstore_vpd(struct MemoryBlock *mb_array,
249 unsigned long max_entries)
251 unsigned long i;
252 unsigned long mem_blocks = 0;
254 if (cpu_has_feature(CPU_FTR_SLB))
255 mem_blocks = iSeries_process_Regatta_mainstore_vpd(mb_array,
256 max_entries);
257 else
258 mem_blocks = iSeries_process_Condor_mainstore_vpd(mb_array,
259 max_entries);
261 printk("Mainstore_VPD: numMemoryBlocks = %ld \n", mem_blocks);
262 for (i = 0; i < mem_blocks; ++i) {
263 printk("Mainstore_VPD: block %3ld logical chunks %016lx - %016lx\n"
264 " abs chunks %016lx - %016lx\n",
265 i, mb_array[i].logicalStart, mb_array[i].logicalEnd,
266 mb_array[i].absStart, mb_array[i].absEnd);
268 return mem_blocks;
271 static void __init iSeries_get_cmdline(void)
273 char *p, *q;
275 /* copy the command line parameter from the primary VSP */
276 HvCallEvent_dmaToSp(cmd_line, 2 * 64* 1024, 256,
277 HvLpDma_Direction_RemoteToLocal);
279 p = cmd_line;
280 q = cmd_line + 255;
281 while(p < q) {
282 if (!*p || *p == '\n')
283 break;
284 ++p;
286 *p = 0;
289 static void __init iSeries_init_early(void)
291 DBG(" -> iSeries_init_early()\n");
293 /* Snapshot the timebase, for use in later recalibration */
294 iSeries_time_init_early();
297 * Initialize the DMA/TCE management
299 iommu_init_early_iSeries();
301 /* Initialize machine-dependency vectors */
302 #ifdef CONFIG_SMP
303 smp_init_iSeries();
304 #endif
306 /* Associate Lp Event Queue 0 with processor 0 */
307 HvCallEvent_setLpEventQueueInterruptProc(0, 0);
309 mf_init();
311 DBG(" <- iSeries_init_early()\n");
314 struct mschunks_map mschunks_map = {
315 /* XXX We don't use these, but Piranha might need them. */
316 .chunk_size = MSCHUNKS_CHUNK_SIZE,
317 .chunk_shift = MSCHUNKS_CHUNK_SHIFT,
318 .chunk_mask = MSCHUNKS_OFFSET_MASK,
320 EXPORT_SYMBOL(mschunks_map);
322 void mschunks_alloc(unsigned long num_chunks)
324 klimit = _ALIGN(klimit, sizeof(u32));
325 mschunks_map.mapping = (u32 *)klimit;
326 klimit += num_chunks * sizeof(u32);
327 mschunks_map.num_chunks = num_chunks;
331 * The iSeries may have very large memories ( > 128 GB ) and a partition
332 * may get memory in "chunks" that may be anywhere in the 2**52 real
333 * address space. The chunks are 256K in size. To map this to the
334 * memory model Linux expects, the AS/400 specific code builds a
335 * translation table to translate what Linux thinks are "physical"
336 * addresses to the actual real addresses. This allows us to make
337 * it appear to Linux that we have contiguous memory starting at
338 * physical address zero while in fact this could be far from the truth.
339 * To avoid confusion, I'll let the words physical and/or real address
340 * apply to the Linux addresses while I'll use "absolute address" to
341 * refer to the actual hardware real address.
343 * build_iSeries_Memory_Map gets information from the Hypervisor and
344 * looks at the Main Store VPD to determine the absolute addresses
345 * of the memory that has been assigned to our partition and builds
346 * a table used to translate Linux's physical addresses to these
347 * absolute addresses. Absolute addresses are needed when
348 * communicating with the hypervisor (e.g. to build HPT entries)
350 * Returns the physical memory size
353 static unsigned long __init build_iSeries_Memory_Map(void)
355 u32 loadAreaFirstChunk, loadAreaLastChunk, loadAreaSize;
356 u32 nextPhysChunk;
357 u32 hptFirstChunk, hptLastChunk, hptSizeChunks, hptSizePages;
358 u32 totalChunks,moreChunks;
359 u32 currChunk, thisChunk, absChunk;
360 u32 currDword;
361 u32 chunkBit;
362 u64 map;
363 struct MemoryBlock mb[32];
364 unsigned long numMemoryBlocks, curBlock;
366 /* Chunk size on iSeries is 256K bytes */
367 totalChunks = (u32)HvLpConfig_getMsChunks();
368 mschunks_alloc(totalChunks);
371 * Get absolute address of our load area
372 * and map it to physical address 0
373 * This guarantees that the loadarea ends up at physical 0
374 * otherwise, it might not be returned by PLIC as the first
375 * chunks
378 loadAreaFirstChunk = (u32)addr_to_chunk(itLpNaca.xLoadAreaAddr);
379 loadAreaSize = itLpNaca.xLoadAreaChunks;
382 * Only add the pages already mapped here.
383 * Otherwise we might add the hpt pages
384 * The rest of the pages of the load area
385 * aren't in the HPT yet and can still
386 * be assigned an arbitrary physical address
388 if ((loadAreaSize * 64) > HvPagesToMap)
389 loadAreaSize = HvPagesToMap / 64;
391 loadAreaLastChunk = loadAreaFirstChunk + loadAreaSize - 1;
394 * TODO Do we need to do something if the HPT is in the 64MB load area?
395 * This would be required if the itLpNaca.xLoadAreaChunks includes
396 * the HPT size
399 printk("Mapping load area - physical addr = 0000000000000000\n"
400 " absolute addr = %016lx\n",
401 chunk_to_addr(loadAreaFirstChunk));
402 printk("Load area size %dK\n", loadAreaSize * 256);
404 for (nextPhysChunk = 0; nextPhysChunk < loadAreaSize; ++nextPhysChunk)
405 mschunks_map.mapping[nextPhysChunk] =
406 loadAreaFirstChunk + nextPhysChunk;
409 * Get absolute address of our HPT and remember it so
410 * we won't map it to any physical address
412 hptFirstChunk = (u32)addr_to_chunk(HvCallHpt_getHptAddress());
413 hptSizePages = (u32)HvCallHpt_getHptPages();
414 hptSizeChunks = hptSizePages >>
415 (MSCHUNKS_CHUNK_SHIFT - HW_PAGE_SHIFT);
416 hptLastChunk = hptFirstChunk + hptSizeChunks - 1;
418 printk("HPT absolute addr = %016lx, size = %dK\n",
419 chunk_to_addr(hptFirstChunk), hptSizeChunks * 256);
422 * Determine if absolute memory has any
423 * holes so that we can interpret the
424 * access map we get back from the hypervisor
425 * correctly.
427 numMemoryBlocks = iSeries_process_mainstore_vpd(mb, 32);
430 * Process the main store access map from the hypervisor
431 * to build up our physical -> absolute translation table
433 curBlock = 0;
434 currChunk = 0;
435 currDword = 0;
436 moreChunks = totalChunks;
438 while (moreChunks) {
439 map = HvCallSm_get64BitsOfAccessMap(itLpNaca.xLpIndex,
440 currDword);
441 thisChunk = currChunk;
442 while (map) {
443 chunkBit = map >> 63;
444 map <<= 1;
445 if (chunkBit) {
446 --moreChunks;
447 while (thisChunk >= mb[curBlock].logicalEnd) {
448 ++curBlock;
449 if (curBlock >= numMemoryBlocks)
450 panic("out of memory blocks");
452 if (thisChunk < mb[curBlock].logicalStart)
453 panic("memory block error");
455 absChunk = mb[curBlock].absStart +
456 (thisChunk - mb[curBlock].logicalStart);
457 if (((absChunk < hptFirstChunk) ||
458 (absChunk > hptLastChunk)) &&
459 ((absChunk < loadAreaFirstChunk) ||
460 (absChunk > loadAreaLastChunk))) {
461 mschunks_map.mapping[nextPhysChunk] =
462 absChunk;
463 ++nextPhysChunk;
466 ++thisChunk;
468 ++currDword;
469 currChunk += 64;
473 * main store size (in chunks) is
474 * totalChunks - hptSizeChunks
475 * which should be equal to
476 * nextPhysChunk
478 return chunk_to_addr(nextPhysChunk);
482 * Document me.
484 static void __init iSeries_setup_arch(void)
486 if (get_lppaca()->shared_proc) {
487 ppc_md.idle_loop = iseries_shared_idle;
488 printk(KERN_DEBUG "Using shared processor idle loop\n");
489 } else {
490 ppc_md.idle_loop = iseries_dedicated_idle;
491 printk(KERN_DEBUG "Using dedicated idle loop\n");
494 /* Setup the Lp Event Queue */
495 setup_hvlpevent_queue();
497 printk("Max logical processors = %d\n",
498 itVpdAreas.xSlicMaxLogicalProcs);
499 printk("Max physical processors = %d\n",
500 itVpdAreas.xSlicMaxPhysicalProcs);
503 static void iSeries_show_cpuinfo(struct seq_file *m)
505 seq_printf(m, "machine\t\t: 64-bit iSeries Logical Partition\n");
508 static void __init iSeries_progress(char * st, unsigned short code)
510 printk("Progress: [%04x] - %s\n", (unsigned)code, st);
511 mf_display_progress(code);
514 static void __init iSeries_fixup_klimit(void)
517 * Change klimit to take into account any ram disk
518 * that may be included
520 if (naca.xRamDisk)
521 klimit = KERNELBASE + (u64)naca.xRamDisk +
522 (naca.xRamDiskSize * HW_PAGE_SIZE);
525 static int __init iSeries_src_init(void)
527 /* clear the progress line */
528 if (firmware_has_feature(FW_FEATURE_ISERIES))
529 ppc_md.progress(" ", 0xffff);
530 return 0;
533 late_initcall(iSeries_src_init);
535 static inline void process_iSeries_events(void)
537 asm volatile ("li 0,0x5555; sc" : : : "r0", "r3");
540 static void yield_shared_processor(void)
542 unsigned long tb;
544 HvCall_setEnabledInterrupts(HvCall_MaskIPI |
545 HvCall_MaskLpEvent |
546 HvCall_MaskLpProd |
547 HvCall_MaskTimeout);
549 tb = get_tb();
550 /* Compute future tb value when yield should expire */
551 HvCall_yieldProcessor(HvCall_YieldTimed, tb+tb_ticks_per_jiffy);
554 * The decrementer stops during the yield. Force a fake decrementer
555 * here and let the timer_interrupt code sort out the actual time.
557 get_lppaca()->int_dword.fields.decr_int = 1;
558 ppc64_runlatch_on();
559 process_iSeries_events();
562 static void iseries_shared_idle(void)
564 while (1) {
565 while (!need_resched() && !hvlpevent_is_pending()) {
566 local_irq_disable();
567 ppc64_runlatch_off();
569 /* Recheck with irqs off */
570 if (!need_resched() && !hvlpevent_is_pending())
571 yield_shared_processor();
573 HMT_medium();
574 local_irq_enable();
577 ppc64_runlatch_on();
579 if (hvlpevent_is_pending())
580 process_iSeries_events();
582 preempt_enable_no_resched();
583 schedule();
584 preempt_disable();
588 static void iseries_dedicated_idle(void)
590 set_thread_flag(TIF_POLLING_NRFLAG);
592 while (1) {
593 if (!need_resched()) {
594 while (!need_resched()) {
595 ppc64_runlatch_off();
596 HMT_low();
598 if (hvlpevent_is_pending()) {
599 HMT_medium();
600 ppc64_runlatch_on();
601 process_iSeries_events();
605 HMT_medium();
608 ppc64_runlatch_on();
609 preempt_enable_no_resched();
610 schedule();
611 preempt_disable();
615 #ifndef CONFIG_PCI
616 void __init iSeries_init_IRQ(void) { }
617 #endif
619 static void __iomem *iseries_ioremap(phys_addr_t address, unsigned long size,
620 unsigned long flags)
622 return (void __iomem *)address;
625 static void iseries_iounmap(volatile void __iomem *token)
629 static int __init iseries_probe(void)
631 unsigned long root = of_get_flat_dt_root();
632 if (!of_flat_dt_is_compatible(root, "IBM,iSeries"))
633 return 0;
635 hpte_init_iSeries();
636 /* iSeries does not support 16M pages */
637 cur_cpu_spec->cpu_features &= ~CPU_FTR_16M_PAGE;
639 return 1;
642 define_machine(iseries) {
643 .name = "iSeries",
644 .setup_arch = iSeries_setup_arch,
645 .show_cpuinfo = iSeries_show_cpuinfo,
646 .init_IRQ = iSeries_init_IRQ,
647 .get_irq = iSeries_get_irq,
648 .init_early = iSeries_init_early,
649 .pcibios_fixup = iSeries_pci_final_fixup,
650 .restart = mf_reboot,
651 .power_off = mf_power_off,
652 .halt = mf_power_off,
653 .get_boot_time = iSeries_get_boot_time,
654 .set_rtc_time = iSeries_set_rtc_time,
655 .get_rtc_time = iSeries_get_rtc_time,
656 .calibrate_decr = generic_calibrate_decr,
657 .progress = iSeries_progress,
658 .probe = iseries_probe,
659 .ioremap = iseries_ioremap,
660 .iounmap = iseries_iounmap,
661 /* XXX Implement enable_pmcs for iSeries */
664 void * __init iSeries_early_setup(void)
666 unsigned long phys_mem_size;
668 /* Identify CPU type. This is done again by the common code later
669 * on but calling this function multiple times is fine.
671 identify_cpu(0, mfspr(SPRN_PVR));
673 powerpc_firmware_features |= FW_FEATURE_ISERIES;
674 powerpc_firmware_features |= FW_FEATURE_LPAR;
676 iSeries_fixup_klimit();
679 * Initialize the table which translate Linux physical addresses to
680 * AS/400 absolute addresses
682 phys_mem_size = build_iSeries_Memory_Map();
684 iSeries_get_cmdline();
686 return (void *) __pa(build_flat_dt(phys_mem_size));
689 static void hvputc(char c)
691 if (c == '\n')
692 hvputc('\r');
694 HvCall_writeLogBuffer(&c, 1);
697 void __init udbg_init_iseries(void)
699 udbg_putc = hvputc;