| blob | 227fc76b6fc6ce6d27806891fc920d12f559549c |
1 /*
2 * CDDL HEADER START
3 *
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License (the "License").
6 * You may not use this file except in compliance with the License.
7 *
8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 * or http://www.opensolaris.org/os/licensing.
10 * See the License for the specific language governing permissions
11 * and limitations under the License.
12 *
13 * When distributing Covered Code, include this CDDL HEADER in each
14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 * If applicable, add the following below this CDDL HEADER, with the
16 * fields enclosed by brackets "[]" replaced with your own identifying
17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 *
19 * CDDL HEADER END
20 */
22 /*
23 * Copyright (c) 2006, 2010, Oracle and/or its affiliates. All rights reserved.
24 * Copyright 2018 Nexenta Systems, Inc. All rights reserved.
25 * Copyright (c) 2018, Joyent, Inc.
26 * Copyright 2018 OmniOS Community Edition (OmniOSce) Association.
27 */
29 /*
30 * AHCI (Advanced Host Controller Interface) SATA HBA Driver
31 *
32 * Power Management Support
33 * ------------------------
34 *
35 * At the moment, the ahci driver only implements suspend/resume to
36 * support Suspend to RAM on X86 feature. Device power management isn't
37 * implemented, link power management is disabled, and hot plug isn't
38 * allowed during the period from suspend to resume.
39 *
40 * For s/r support, the ahci driver only need to implement DDI_SUSPEND
41 * and DDI_RESUME entries, and don't need to take care of new requests
42 * sent down after suspend because the target driver (sd) has already
43 * handled these conditions, and blocked these requests. For the detailed
44 * information, please check with sdopen, sdclose and sdioctl routines.
45 *
46 *
47 * Enclosure Management Support
48 * ----------------------------
49 *
50 * The ahci driver has basic support for AHCI Enclosure Management (EM)
51 * services. The AHCI specification provides an area in the primary ahci BAR for
52 * posting data to send out to the enclosure management and provides a register
53 * that provides both information and control about this. While the
54 * specification allows for multiple forms of enclosure management, the only
55 * supported, and commonly found form, is the AHCI specified LED format. The LED
56 * format is often implemented as a one-way communication mechanism. Software
57 * can write out what it cares about into the aforementioned data buffer and
58 * then we wait for the transmission to be sent.
59 *
60 * This has some drawbacks. It means that we cannot know whether or not it has
61 * succeeded. This means we cannot ask hardware what it thinks the LEDs are
62 * set to. There's also the added unfortunate reality that firmware on the
63 * microcontroller driving this will often not show the LEDs if no drive is
64 * present and that actions taken may potentially cause this to get out of sync
65 * with what we expect it to be. For example, the specification does not
66 * describe what should happen if a drive is removed from the enclosure while
67 * this is set and what should happen when it returns. We can only infer that it
68 * should be the same.
69 *
70 * Because only a single command can be sent at any time and we don't want to
71 * interfere with controller I/O, we create a taskq dedicated to this that has a
72 * single thread. Both resets (which occur on attach and resume) and normal
73 * changes to the LED state will be driven through this taskq. Because the taskq
74 * has a single thread, this guarantees serial processing.
75 *
76 * Each userland-submitted task (basically not resets) has a reference counted
77 * task structure. This allows the thread that called it to be cancelled and
78 * have the system clean itself up. The user thread in ioctl blocks on a CV that
79 * can receive signals as it waits for completion. Note, there is no guarantee
80 * provided by the kernel that the first thread to enter the kernel will be the
81 * first one to change state.
82 */
84 #include <sys/note.h>
85 #include <sys/scsi/scsi.h>
86 #include <sys/pci.h>
87 #include <sys/disp.h>
88 #include <sys/sata/sata_hba.h>
89 #include <sys/sata/adapters/ahci/ahcireg.h>
90 #include <sys/sata/adapters/ahci/ahcivar.h>
92 /*
93 * FMA header files
94 */
95 #include <sys/ddifm.h>
96 #include <sys/fm/protocol.h>
97 #include <sys/fm/util.h>
98 #include <sys/fm/io/ddi.h>
100 /*
101 * EM Control header files
102 */
103 #include <sys/types.h>
104 #include <sys/file.h>
105 #include <sys/errno.h>
106 #include <sys/open.h>
107 #include <sys/cred.h>
108 #include <sys/ddi.h>
109 #include <sys/sunddi.h>
111 /*
112 * This is the string displayed by modinfo, etc.
113 */
116 /*
117 * Function prototypes for driver entry points
118 */
124 /*
125 * Function prototypes for SATA Framework interfaces
126 */
136 #if defined(__lock_lint)
138 #endif
140 /*
141 * FMA Prototypes
142 */
154 /*
155 * Local function prototypes
156 */
183 sata_device_t *);
185 sata_pmult_gscr_t *);
187 sata_device_t *);
191 sata_device_t *);
196 ahci_addr_t *);
217 ahci_addr_t *);
219 ahci_addr_t *);
221 ahci_addr_t *);
269 #if AHCI_DEBUG
271 #endif
280 /*
281 * DMA attributes for the data buffer
282 *
283 * dma_attr_addr_hi will be changed to 0xffffffffull if the HBA
284 * does not support 64-bit addressing
285 */
299 };
301 /*
302 * DMA attributes for the rcvd FIS
303 *
304 * dma_attr_addr_hi will be changed to 0xffffffffull if the HBA
305 * does not support 64-bit addressing
306 */
320 };
322 /*
323 * DMA attributes for the command list
324 *
325 * dma_attr_addr_hi will be changed to 0xffffffffull if the HBA
326 * does not support 64-bit addressing
327 */
341 };
343 /*
344 * DMA attributes for cmd tables
345 *
346 * dma_attr_addr_hi will be changed to 0xffffffffull if the HBA
347 * does not support 64-bit addressing
348 */
362 };
365 /* Device access attributes */
367 DDI_DEVICE_ATTR_V1,
368 DDI_STRUCTURE_LE_ACC,
369 DDI_STRICTORDER_ACC,
370 DDI_DEFAULT_ACC
371 };
386 };
389 SATA_TRAN_HOTPLUG_OPS_REV_1,
390 ahci_tran_hotplug_port_activate,
391 ahci_tran_hotplug_port_deactivate
392 };
400 };
403 MODREV_1,
405 NULL
406 };
408 /* The following variables are watchdog handler related */
412 /*
413 * This static variable indicates the size of command table,
414 * and it's changeable with prdt number, which ahci_dma_prdt_number
415 * indicates.
416 */
419 /*
420 * The below global variables are tunable via /etc/system
421 *
422 * ahci_dma_prdt_number
423 * ahci_msi_enabled
424 * ahci_buf_64bit_dma
425 * ahci_commu_64bit_dma
426 */
428 /* The number of Physical Region Descriptor Table(PRDT) in Command Table */
431 /* AHCI MSI is tunable */
434 /*
435 * 64-bit dma addressing for data buffer is tunable
436 *
437 * The variable controls only the below value:
438 * DBAU (upper 32-bits physical address of data block)
439 */
442 /*
443 * 64-bit dma addressing for communication system descriptors is tunable
444 *
445 * The variable controls the below three values:
446 *
447 * PxCLBU (upper 32-bits for the command list base physical address)
448 * PxFBU (upper 32-bits for the received FIS base physical address)
449 * CTBAU (upper 32-bits of command table base)
450 */
453 /*
454 * By default, 64-bit dma for data buffer will be disabled for AMD/ATI SB600
455 * chipset. If the users want to have a try with 64-bit dma, please change
456 * the below variable value to enable it.
457 */
460 /*
461 * By default, 64-bit dma for command buffer will be disabled for AMD/ATI
462 * SB600/700/710/750/800. If the users want to have a try with 64-bit dma,
463 * please change the below value to enable it.
464 */
467 /*
468 * These values control the default delay and default number of times to wait
469 * for an enclosure message to complete.
470 */
477 /*
478 * End of global tunable variable definition
479 */
481 #if AHCI_DEBUG
483 #else
485 #endif
488 #if AHCI_DEBUG
489 /* The following is needed for ahci_log() */
492 #endif
494 /* Opaque state pointer initialized by ddi_soft_state_init() */
497 /*
498 * ahci module initialization.
499 */
500 int
502 {
508 }
510 #if AHCI_DEBUG
512 #endif
515 #if AHCI_DEBUG
517 #endif
520 }
522 /* watchdog tick */
529 #if AHCI_DEBUG
531 #endif
534 }
538 err_out:
541 }
543 /*
544 * ahci module uninitialize.
545 */
546 int
548 {
554 }
556 /* Remove the resources allocated in _init(). */
558 #if AHCI_DEBUG
560 #endif
564 }
566 /*
567 * _info entry point
568 */
569 int
571 {
573 }
575 /*
576 * The attach entry point for dev_ops.
577 */
578 static int
580 {
592 #if AHCI_DEBUG
594 #endif
597 NULL);
605 /*
606 * During DDI_RESUME, the hardware state of the device
607 * (power may have been removed from the device) must be
608 * restored, allow pending requests to continue, and
609 * service new requests.
610 */
614 /*
615 * GHC.AE must be set to 1 before any other AHCI register
616 * is accessed
617 */
624 /* Restart watch thread */
632 /*
633 * Re-initialize the controller and enable the interrupts and
634 * restart all the ports.
635 *
636 * Note that so far we don't support hot-plug during
637 * suspend/resume.
638 */
641 "Failed to initialize the controller "
644 }
646 /*
647 * Reset the enclosure services.
648 */
659 }
663 /* Allocate soft state */
667 instance);
669 }
675 /* Initialize the cport/port mapping */
679 }
683 /* Initialize FMA properties */
688 /*
689 * Now map the AHCI base address; which includes global
690 * registers and port control registers
691 *
692 * According to the spec, the AHCI Base Address is BAR5,
693 * but BAR0-BAR4 are optional, so we need to check which
694 * rnumber is used for BAR5.
695 */
697 /*
698 * search through DDI "reg" property for the AHCI register set
699 */
704 instance);
706 }
708 /* AHCI Base Address is located at 0x24 offset */
713 }
719 instance);
721 }
726 rnumber,
734 instance);
736 }
740 /*
741 * GHC.AE must be set to 1 before any other AHCI register
742 * is accessed
743 */
750 /* Get the AHCI version information */
759 /* We don't support controllers whose versions are lower than 1.0 */
764 }
766 /* Get the HBA capabilities information */
771 cap_status);
773 /* CAP2 (HBA Capabilities Extended) is available since AHCI spec 1.2 */
777 /* Get the HBA capabilities extended information */
783 }
793 }
795 #if AHCI_DEBUG
796 /* Get the interface speed supported by the HBA */
807 }
808 #endif
810 /* Get the number of command slots supported by the HBA */
818 /* Get the bit map which indicates ports implemented by the HBA */
826 /* Max port number implemented */
833 /* Get the number of implemented ports by the HBA */
842 /* Check whether HBA supports 64bit DMA addressing */
848 }
850 /* Checking for the support of Port Multiplier */
856 /* Support FIS-based switching ? */
861 }
862 }
864 /* Checking for Support Command List Override */
869 }
871 /* Checking for Asynchronous Notification */
876 }
881 instance);
883 }
887 /*
888 * Check the pci configuration space, and set caps. We also
889 * handle the hardware defect in this function.
890 *
891 * For example, force ATI SB600 to use 32-bit dma addressing
892 * since it doesn't support 64-bit dma though its CAP register
893 * declares it support.
894 */
897 instance);
899 }
901 /*
902 * Disable the whole controller interrupts before adding
903 * interrupt handlers(s).
904 */
907 /* Get supported interrupt types */
910 instance);
912 }
916 intr_types);
919 /*
920 * Try MSI first, but fall back to FIXED if failed
921 */
923 DDI_SUCCESS) {
928 }
931 "MSI registration failed, "
933 }
937 DDI_SUCCESS) {
942 }
946 }
952 intr_done:
956 /* Initialize the controller mutex */
966 }
973 "ahci_attach: ahci_dma_prdt_number set by user is 0x%x,"
979 ahci_dma_prdt_number;
986 /*
987 * enable 64bit dma for data buffer for SB600 if
988 * sb600_buf_64bit_dma_disable is B_FALSE
989 */
997 }
999 /*
1000 * enable 64bit dma for command buffer for SB600/700/710/800
1001 * if sbxxx_commu_64bit_dma_disable is B_FALSE
1002 */
1015 }
1017 /* Allocate the ports structure */
1021 instance);
1023 }
1027 /*
1028 * Initialize the controller and ports.
1029 */
1033 instance);
1035 }
1039 /* Start one thread to check packet timeouts */
1050 }
1055 instance);
1057 }
1059 /* Check all handles at the end of the attach operation. */
1062 instance);
1064 }
1072 err_out:
1073 /* FMA message */
1079 }
1086 }
1090 }
1094 }
1098 }
1102 }
1106 }
1110 }
1114 }
1118 }
1121 }
1123 /*
1124 * The detach entry point for dev_ops.
1125 */
1126 static int
1128 {
1141 /* disable the interrupts for an uninterrupted detach */
1146 /* unregister from the sata framework. */
1153 }
1159 /* stop the watchdog handler */
1165 /* uninitialize the controller */
1168 /* remove the interrupts */
1171 /* deallocate the ports structures */
1174 /* destroy mutex */
1177 /* teardown the pci config */
1180 /* remove the reg maps. */
1183 /* release fma resource */
1186 /* free the soft state. */
1193 /*
1194 * The steps associated with suspension must include putting
1195 * the underlying device into a quiescent state so that it
1196 * will not generate interrupts or modify or access memory.
1197 */
1202 }
1208 /* stop the watchdog handler */
1212 }
1216 /*
1217 * drain the taskq
1218 */
1221 /*
1222 * Disable the interrupts and stop all the ports.
1223 */
1230 }
1231 }
1233 /*
1234 * The info entry point for dev_ops.
1235 *
1236 */
1237 static int
1240 {
1241 #ifndef __lock_lint
1247 dev_t dev;
1261 }
1267 }
1270 }
1272 /*
1273 * Registers the ahci with sata framework.
1274 */
1275 static int
1277 {
1285 /* Allocate memory for the sata_hba_tran */
1293 /* Report the number of implemented ports */
1297 /* Support ATAPI device */
1300 /* Get the data transfer capability for PIO command by the HBA */
1305 }
1307 /*
1308 * According to the AHCI spec, the ATA/ATAPI-7 queued feature set
1309 * is not supported by AHCI (including the READ QUEUED (EXT), WRITE
1310 * QUEUED (EXT), and SERVICE commands). Queued operations are
1311 * supported in AHCI using the READ FPDMA QUEUED and WRITE FPDMA
1312 * QUEUED commands when the HBA and device support native command
1313 * queuing(NCQ).
1314 *
1315 * SATA_CTLF_NCQ will be set to sata_tran_hba_features_support if the
1316 * CAP register of the HBA indicates NCQ is supported.
1317 *
1318 * SATA_CTLF_NCQ cannot be set if AHCI_CAP_NO_MCMDLIST_NONQUEUE is
1319 * set because the previous register content of PxCI can be re-written
1320 * in the register write.
1321 */
1328 }
1330 /* Support port multiplier? */
1333 SATA_CTLF_PORT_MULTIPLIER;
1335 /* Support FIS-based switching for port multiplier? */
1338 SATA_CTLF_PMULT_FBS;
1339 }
1340 }
1342 /* Report the number of command slots */
1350 #ifdef __lock_lint
1352 #endif
1353 /*
1354 * When SATA framework adds support for pwrmgt the
1355 * pwrmgt_ops needs to be updated
1356 */
1364 /* Attach it to SATA framework */
1372 }
1375 }
1377 /*
1378 * Unregisters the ahci with sata framework.
1379 */
1380 static int
1382 {
1386 /* Detach from the SATA framework. */
1388 DDI_SUCCESS) {
1390 }
1392 /* Deallocate sata_hba_tran. */
1401 }
1403 #define SET_PORTSTR(str, addrp) \
1404 if (AHCI_ADDR_IS_PORT(addrp)) \
1406 else if (AHCI_ADDR_IS_PMULT(addrp)) \
1408 else \
1410 (addrp)->aa_pmport);
1412 /*
1413 * ahci_tran_probe_port is called by SATA framework. It returns port state,
1414 * port status registers and an attached device type via sata_device
1415 * structure.
1416 *
1417 * We return the cached information from a previous hardware probe. The
1418 * actual hardware probing itself was done either from within
1419 * ahci_initialize_controller() during the driver attach or from a phy
1420 * ready change interrupt handler.
1421 */
1422 static int
1424 {
1452 /* port mutliplier is removed. */
1454 "ahci_tran_probe_port: "
1458 }
1460 /*
1461 * The sata_device may refer to
1462 * 1. A controller port.
1463 * A controller port should be ready here.
1464 * 2. A port multiplier.
1465 * SATA_ADDR_PMULT_SPEC - if it is not initialized yet, initialize
1466 * it and register the port multiplier to the framework.
1467 * SATA_ADDR_PMULT - check the status of all its device ports.
1468 * 3. A port multiplier port.
1469 * If it has not been initialized, initialized it.
1470 *
1471 * A port multiplier or a port multiplier port may require some
1472 * initialization because we cannot do these time-consuming jobs in an
1473 * interrupt context.
1474 */
1477 /* Initialize registers on a port multiplier */
1482 "ahci_tran_probe_port: "
1486 }
1488 /* Check pmports hotplug events */
1491 SATA_ADDR_DPMPORT)) {
1496 }
1497 }
1499 /* Update port state and device type */
1534 }
1547 /*
1548 * HBA driver only knows it's an ATAPI device, and don't know
1549 * it's CD/DVD, tape or ATAPI disk because the ATAPI device
1550 * type need to be determined by checking IDENTIFY PACKET
1551 * DEVICE data
1552 */
1562 /* Update the number of pmports. */
1569 portstr);
1576 portstr);
1580 /* we don't support any other device types */
1585 }
1587 out:
1588 /* Register update only fails while probing a pmult/pmport */
1596 }
1598 /* Check handles for the sata registers access */
1602 DDI_SERVICE_UNAFFECTED);
1604 }
1608 }
1610 /*
1611 * There are four operation modes in sata framework:
1612 * SATA_OPMODE_INTERRUPTS
1613 * SATA_OPMODE_POLLING
1614 * SATA_OPMODE_ASYNCH
1615 * SATA_OPMODE_SYNCH
1616 *
1617 * Their combined meanings as following:
1618 *
1619 * SATA_OPMODE_SYNCH
1620 * The command has to be completed before sata_tran_start functions returns.
1621 * Either interrupts or polling could be used - it's up to the driver.
1622 * Mode used currently for internal, sata-module initiated operations.
1623 *
1624 * SATA_OPMODE_SYNCH | SATA_OPMODE_INTERRUPTS
1625 * It is the same as the one above.
1626 *
1627 * SATA_OPMODE_SYNCH | SATA_OPMODE_POLLING
1628 * The command has to be completed before sata_tran_start function returns.
1629 * No interrupt used, polling only. This should be the mode used for scsi
1630 * packets with FLAG_NOINTR.
1631 *
1632 * SATA_OPMODE_ASYNCH | SATA_OPMODE_INTERRUPTS
1633 * The command may be queued (callback function specified). Interrupts could
1634 * be used. It's normal operation mode.
1635 */
1636 /*
1637 * Called by sata framework to transport a sata packet down stream.
1638 */
1639 static int
1641 {
1644 ahci_addr_t addr;
1662 /* Sanity check */
1673 "ahci_tran_start returning PORT_ERROR while "
1677 }
1680 SATA_STATE_READY)) {
1692 "ahci_tran_start returning PORT_ERROR "
1693 "while sub-link is not initialized "
1697 }
1698 }
1699 }
1704 /*
1705 * In case the target driver would send the packet before
1706 * sata framework can have the opportunity to process those
1707 * event reports.
1708 */
1715 "ahci_tran_start returning PORT_ERROR while "
1716 "port in FAILED/SHUTDOWN/PWROFF state: "
1720 }
1723 /*
1724 * ahci_intr_phyrdy_change() may have rendered it to
1725 * SATA_DTYPE_NONE.
1726 */
1734 "ahci_tran_start returning PORT_ERROR while "
1738 }
1740 /* R/W PMULT command will occupy the whole HBA port */
1743 "ahci_tran_start returning BUSY while "
1744 "executing READ/WRITE PORT-MULT command: "
1749 }
1753 "ahci_tran_start returning BUSY while "
1758 }
1760 /*
1761 * SATA HBA driver should remember that a device was reset and it
1762 * is supposed to reject any packets which do not specify either
1763 * SATA_IGNORE_DEV_RESET_STATE or SATA_CLEAR_DEV_RESET_STATE.
1764 *
1765 * This is to prevent a race condition when a device was arbitrarily
1766 * reset by the HBA driver (and lost it's setting) and a target
1767 * driver sending some commands to a device before the sata framework
1768 * has a chance to restore the device setting (such as cache enable/
1769 * disable or other resettable stuff).
1770 */
1771 /*
1772 * It is unnecessary to use specific flags to indicate
1773 * reset_in_progress for a pmport. While mopping, all command will be
1774 * mopped so that the entire HBA port is being dealt as a single
1775 * object.
1776 */
1780 "ahci_tran_start [CLEAR] the "
1782 }
1789 "ahci_tran_start returning BUSY while "
1793 }
1795 #ifdef AHCI_DEBUG
1800 }
1801 #endif
1806 "ahci_tran_start returning BUSY while "
1810 }
1814 DDI_SERVICE_UNAFFECTED);
1817 }
1821 /*
1822 * If a SYNC command to be executed in interrupt context,
1823 * bounce it back to sata module.
1824 */
1829 "ahci_tran_start returning BUSY while "
1830 "sending SYNC mode under interrupt context: "
1834 }
1836 /* We need to do the sync start now */
1840 }
1842 /* Async start, using interrupt */
1847 }
1848 }
1856 fail_out:
1857 /*
1858 * Failed to deliver packet to the controller.
1859 * Check if it's caused by invalid handles.
1860 */
1870 }
1876 }
1878 /*
1879 * SATA_OPMODE_SYNCH flag is set
1880 *
1881 * If SATA_OPMODE_POLLING flag is set, then we must poll the command
1882 * without interrupt, otherwise we can still use the interrupt.
1883 */
1884 static int
1887 {
1905 }
1907 pkt_timeout_ticks =
1911 /* Simulate the interrupt */
1933 }
1934 }
1944 #if AHCI_DEBUG
1945 /*
1946 * Note that the driver always uses the slot 0 to deliver
1947 * REQUEST SENSE or READ LOG EXT command
1948 */
1951 #endif
1958 }
1959 }
1961 /*
1962 * Searches for and claims a free command slot.
1963 *
1964 * Returns value:
1965 *
1966 * AHCI_FAILURE returned only if
1967 * 1. No empty slot left
1968 * 2. Non-queued command requested while queued command(s) is outstanding
1969 * 3. Queued command requested while non-queued command(s) is outstanding
1970 * 4. HBA doesn't support multiple-use of command list while already a
1971 * non-queued command is oustanding
1972 * 5. Queued command requested while some queued command(s) has been
1973 * outstanding on a different port multiplier port. (AHCI spec 1.2,
1974 * 9.1.2)
1975 *
1976 * claimed slot number returned if succeeded
1977 *
1978 * NOTE: it will always return slot 0 for following commands to simplify the
1979 * algorithm.
1980 * 1. REQUEST SENSE or READ LOG EXT command during error recovery process
1981 * 2. READ/WRITE PORTMULT command
1982 */
1983 static int
1986 {
1994 "ahciport_pending_tags = 0x%x "
1999 /*
2000 * According to the AHCI spec, system software is responsible to
2001 * ensure that queued and non-queued commands are not mixed in
2002 * the command list.
2003 */
2005 /* Non-NCQ command request */
2008 "ahci_claim_free_slot: there is still pending "
2009 "queued command(s) in the command list, "
2010 "so no available slot for the non-queued "
2013 }
2016 "ahci_claim_free_slot: there is still pending "
2017 "read/write port-mult command(s) in command list, "
2019 NULL);
2021 }
2025 "ahci_claim_free_slot: HBA cannot support multiple-"
2027 NULL);
2029 }
2033 /* NCQ command request */
2036 "ahci_claim_free_slot: there is still pending "
2037 "non-queued command(s) in the command list, "
2039 NULL);
2041 }
2043 /*
2044 * NCQ commands cannot be sent to different port multiplier
2045 * ports in Command-Based Switching mode
2046 */
2047 /*
2048 * NOTE: In Command-Based Switching mode, AHCI controller
2049 * usually reports a 'Handshake Error' when multiple NCQ
2050 * commands are outstanding simultaneously.
2051 */
2059 "ahci_claim_free_slot: there is still "
2060 "pending queued command(s) in the "
2061 "command list for another Port Multiplier "
2064 }
2065 }
2070 /* Error retrieval command request */
2072 "ahci_claim_free_slot: slot 0 is allocated for REQUEST "
2077 /*
2078 * An extra check on PxCI. Sometimes PxCI bits may not be
2079 * cleared during hot-plug or error recovery process.
2080 */
2086 "ahci_claim_free_slot: there is still pending "
2087 "command(s) in command list (0x%x/0x%x, PxCI %x),"
2091 port_cmd_issue);
2093 }
2096 "ahci_claim_free_slot: slot 0 is allocated for "
2100 }
2107 }
2109 /*
2110 * According to the AHCI spec, to allow a simple mechanism for the
2111 * HBA to map command list slots to queue entries, software must
2112 * match the tag number it uses to the slot it is placing the command
2113 * in. For example, if a queued command is placed in slot 5, the tag
2114 * for that command must be 5.
2115 */
2121 }
2122 }
2126 out:
2131 }
2133 /*
2134 * Builds the Command Table for the sata packet and delivers it to controller.
2135 *
2136 * Returns:
2137 * slot number if we can obtain a slot successfully
2138 * otherwise, return AHCI_FAILURE
2139 */
2140 static int
2143 {
2155 #if AHCI_DEBUG
2158 #endif
2169 /* Check if the command is a NCQ command */
2174 /*
2175 * When NCQ is support, system software must determine the
2176 * maximum tag allowed by the device and the HBA, and it
2177 * must use a value not beyond of the lower bound of the two.
2178 *
2179 * Sata module is going to calculate the qdepth and send
2180 * down to HBA driver via sata_cmd.
2181 */
2184 /*
2185 * At the moment, the driver doesn't support the dynamic
2186 * setting of the maximum ncq depth, and the value can be
2187 * set either during the attach or after hot-plug insertion.
2188 */
2192 "ahci_deliver_satapkt: port %d the max tags for "
2197 " port %d the max tag for NCQ command is "
2198 "requested to change from %d to %d, at the"
2199 " moment the driver doesn't support the "
2200 "dynamic change so it's going to "
2204 ncq_qdepth);
2205 }
2206 }
2207 }
2209 /* Check if the command is an error retrieval command */
2213 /* Check if the command is an read/write pmult command */
2217 /* Check if there is an empty command slot */
2223 }
2226 "ahci_deliver_satapkt enter: cmd_reg: 0x%x, cmd_slot: 0x%x, "
2233 /* For data transfer operations, it is the H2D Register FIS */
2234 h2d_register_fisp =
2239 /*
2240 * PMP field only make sense when target is a port multiplier or a
2241 * device behind a port multiplier. Otherwise should set it to 0.
2242 */
2254 /*
2255 * satacmd_addr_type will be 0 for the commands below:
2256 * ATAPI command
2257 * SATAC_IDLE_IM
2258 * SATAC_STANDBY_IM
2259 * SATAC_DOWNLOAD_MICROCODE
2260 * SATAC_FLUSH_CACHE
2261 * SATAC_SET_FEATURES
2262 * SATAC_SMART
2263 * SATAC_ID_PACKET_DEVICE
2264 * SATAC_ID_DEVICE
2265 * SATAC_READ_PORTMULT
2266 * SATAC_WRITE_PORTMULT
2267 */
2268 /* FALLTHRU */
2271 /* FALLTHRU */
2274 /* LBA[7:0] */
2277 /* LBA[15:8] */
2280 /* LBA[23:16] */
2283 /* LBA [27:24] (also called dev_head) */
2289 /* LBA[7:0] */
2292 /* LBA[15:8] */
2295 /* LBA[23:16] */
2298 /* LBA [31:24] */
2302 /* LBA [39:32] */
2306 /* LBA [47:40] */
2310 /* Set dev_head */
2314 /* Set the extended sector count and features */
2320 }
2322 /*
2323 * For NCQ command (READ/WRITE FPDMA QUEUED), sector count 7:0 is
2324 * filled into features field, and sector count 8:15 is filled into
2325 * features (exp) field. The hba driver doesn't need to anything
2326 * special with regard to this, since sata framework has already
2327 * done so.
2328 *
2329 * However the driver needs to make sure TAG is filled into sector
2330 * field.
2331 */
2335 }
2345 /* *** now fill the scatter gather list ******* */
2355 }
2361 /* The ACMD field is filled in for ATAPI command */
2364 SATA_ATAPI_MAX_CDB_LEN);
2365 }
2367 /* Set Command Header in Command List */
2372 /* Set the number of entries in the PRD table */
2375 /* Set the length of the command in the CFIS area */
2378 /*
2379 * PMP field only make sense when target is a port multiplier or a
2380 * device behind a port multiplier. Otherwise should set it to 0.
2381 */
2389 /* Set A bit if it is an ATAPI command */
2393 /* Set W bit if data is going to the device */
2397 /*
2398 * Set the prefetchable bit - this bit is only valid if the PRDTL
2399 * field is non-zero or the ATAPI 'A' bit is set in the command
2400 * header. This bit cannot be set when using native command
2401 * queuing commands or when using FIS-based switching with a Port
2402 * multiplier.
2403 */
2407 /*
2408 * Now remember the sata packet in ahciport_slot_pkts[].
2409 * Error retrieval command and r/w port multiplier command will
2410 * be stored specifically for each port.
2411 */
2416 /*
2417 * Keep the timeout value
2418 */
2421 /*
2422 * If the intial timout is less than 1 tick, then make it longer by
2423 * 1 tick to avoid immediate timeout
2424 */
2426 ahci_watchdog_timeout)
2428 ahci_watchdog_timeout;
2430 #if AHCI_DEBUG
2436 /* Dump the command header and table */
2446 /* Dump the H2D register FIS */
2452 /* Dump the ACMD register FIS */
2457 " ATAPI command: %2x %2x %2x %2x "
2464 /* Dump the PRDT */
2470 }
2471 }
2472 #endif
2477 ahci_cmd_table_size,
2478 DDI_DMA_SYNC_FORDEV);
2483 DDI_DMA_SYNC_FORDEV);
2490 DDI_SERVICE_UNAFFECTED);
2492 }
2494 /* Set the corresponding bit in the PxSACT.DS for queued command */
2499 }
2501 /* Indicate to the HBA that a command is active. */
2509 /* Make sure the command is started by the PxSACT/PxCI */
2513 DDI_SERVICE_UNAFFECTED);
2515 }
2518 }
2520 /*
2521 * Called by the sata framework to abort the previously sent packet(s).
2522 *
2523 * Reset device to abort commands.
2524 */
2525 static int
2527 {
2547 /*
2548 * If AHCI_PORT_FLAG_MOPPING flag is set, it means all the pending
2549 * commands are being mopped, therefore there is nothing else to do
2550 */
2553 "ahci_tran_abort: port %d is in "
2557 }
2559 /*
2560 * If AHCI_PORT_FLAG_RDWR_PMULT flag is set, it means a R/W PMULT
2561 * command is being executed so no other commands is outstanding,
2562 * nothing to do.
2563 */
2566 "ahci_tran_abort: port %d is reading/writing "
2570 }
2575 /*
2576 * In case the targer driver would send the request before
2577 * sata framework can have the opportunity to process those
2578 * event reports.
2579 */
2586 "ahci_tran_abort returning SATA_FAILURE while "
2587 "port in FAILED/SHUTDOWN/PWROFF state: "
2591 }
2594 /*
2595 * ahci_intr_phyrdy_change() may have rendered it to
2596 * AHCI_PORT_TYPE_NODEV.
2597 */
2605 "ahci_tran_abort returning SATA_FAILURE while "
2609 }
2621 /*
2622 * Aborting one specific packet, first search the
2623 * ahciport_slot_pkts[] list for matching spkt.
2624 */
2630 }
2631 }
2634 /* request packet is not on the pending list */
2636 "Cannot find the aborting pkt 0x%p on the "
2642 }
2645 }
2657 /*
2658 * To abort the packet(s), first we are trying to clear PxCMD.ST
2659 * to stop the port, and if the port can be stopped
2660 * successfully with PxTFD.STS.BSY and PxTFD.STS.DRQ cleared to '0',
2661 * then we just send back the aborted packet(s) with ABORTED flag
2662 * and then restart the port by setting PxCMD.ST and PxCMD.FRE.
2663 * If PxTFD.STS.BSY or PxTFD.STS.DRQ is set to '1', then we
2664 * perform a COMRESET.
2665 */
2669 /*
2670 * Compute which have finished and which need to be retried.
2671 *
2672 * The finished tags are ahciport_pending_tags/ahciport_pending_ncq_tags
2673 * minus the slot_status. The aborted_tags has to be deducted by
2674 * finished_tags since we can't possibly abort a tag which had finished
2675 * already.
2676 */
2687 ahci_portp,
2688 slot_status,
2691 aborted_tags,
2698 }
2700 /*
2701 * Used to do device reset and reject all the pending packets on a device
2702 * during the reset operation.
2703 *
2704 * NOTE: ONLY called by ahci_tran_reset_dport
2705 */
2706 static int
2709 {
2714 sata_device_t sdevice;
2722 /*
2723 * If AHCI_PORT_FLAG_MOPPING flag is set, it means all the pending
2724 * commands are being mopped, therefore there is nothing else to do
2725 */
2728 "ahci_reset_device_reject_pkts: port %d is in "
2731 }
2741 }
2746 "Try to do a port reset after software "
2751 "ahci_reset_device_reject_pkts: port %d "
2754 }
2755 }
2756 /* Set the reset in progress flag */
2762 /* Indicate to the framework that a reset has happened */
2768 SATA_DSTATE_PWR_ACTIVE;
2773 SATA_EVNT_DEVICE_RESET);
2779 /* Next try to mop the pending commands */
2790 ahci_portp,
2791 slot_status,
2798 }
2800 /*
2801 * Used to do device reset and reject all the pending packets on a device
2802 * during the reset operation.
2803 *
2804 * NOTE: ONLY called by ahci_tran_reset_dport
2805 */
2806 static int
2809 {
2813 sata_device_t sdevice;
2822 "ahci_reset_pmdevice_reject_pkts: port %d is in "
2825 }
2827 /* Checking for outstanding commands */
2836 }
2838 /* Issue SOFTWARE reset command. */
2842 "Try to do a port reset after software "
2845 }
2847 /* Set the reset in progress flag */
2853 /* Indicate to the framework that a reset has happened */
2859 else
2862 SATA_DSTATE_PWR_ACTIVE;
2867 SATA_EVNT_DEVICE_RESET);
2874 /* Next try to mop the pending commands */
2887 /*
2888 * NOTE: Because PxCI be only erased by unset PxCMD.ST bit, so even we
2889 * try to reset a single device behind a port multiplier will
2890 * terminate all the commands on that HBA port. We need mop these
2891 * commands as well.
2892 */
2894 ahci_portp,
2895 slot_status,
2902 }
2904 /*
2905 * Used to do port reset and reject all the pending packets on a port during
2906 * the reset operation.
2907 */
2908 static int
2911 {
2922 /*
2923 * If AHCI_PORT_FLAG_MOPPING flag is set, it means all the pending
2924 * commands are being mopped, therefore there is nothing else to do
2925 */
2928 "ahci_reset_port_reject_pkts: port %d is in "
2931 }
2944 }
2950 /* Clear mop flag */
2956 }
2968 ahci_portp,
2969 slot_status,
2976 }
2978 /*
2979 * Used to do hba reset and reject all the pending packets on all ports
2980 * during the reset operation.
2981 */
2982 static int
2984 {
3002 }
3028 }
3030 }
3034 }
3039 }
3044 /*
3045 * To prevent recursive enter to ahci_mop_commands, we need
3046 * check AHCI_PORT_FLAG_MOPPING flag.
3047 */
3050 "ahci_reset_hba_reject_pkts: port %d is in "
3054 }
3071 ahci_portp,
3078 }
3079 out:
3081 }
3083 /*
3084 * Called by sata framework to reset a port(s) or device.
3085 */
3086 static int
3088 {
3091 ahci_addr_t addr;
3109 /*
3110 * If we want to issue a COMRESET on a pmport, we need to
3111 * reject the outstanding commands on that pmport. According
3112 * to AHCI spec, PxCI register could only be cleared by
3113 * clearing PxCMD.ST, which will halt the controller port - as
3114 * well as other pmports.
3115 *
3116 * Therefore we directly reset the controller port for
3117 * simplicity. ahci_tran_probe_port() will handle reset stuff
3118 * like initializing the given pmport.
3119 */
3120 /* FALLTHRU */
3122 /* Port reset */
3136 /* FALLTHRU */
3138 /* Device reset */
3144 /*
3145 * software reset request must be sent to SATA_PMULT_HOSTPORT
3146 * if target is a port multiplier:
3147 */
3155 /*
3156 * In case the targer driver would send the request
3157 * before sata framework can have the opportunity to
3158 * process those event reports.
3159 */
3163 "ahci_tran_reset_dport returning SATA_FAILURE "
3164 "while port in FAILED/SHUTDOWN/PWROFF state: "
3169 }
3172 SATA_DTYPE_NONE) {
3173 /*
3174 * ahci_intr_phyrdy_change() may have rendered it to
3175 * AHCI_PORT_TYPE_NODEV.
3176 */
3182 "ahci_tran_reset_dport returning SATA_FAILURE "
3187 }
3195 }
3201 /* Reset the whole controller */
3209 }
3212 }
3214 /*
3215 * Called by sata framework to activate a port as part of hotplug.
3216 * (cfgadm -c connect satax/y)
3217 * Support port multiplier.
3218 */
3219 static int
3221 {
3224 ahci_addr_t addr;
3246 /* Enable the interrupts on the port */
3249 /*
3250 * Reset the port so that the PHY communication would be
3251 * re-established. But this reset is an internal operation
3252 * and the sata module doesn't need to know about it.
3253 * Moreover, the port with a device attached will be started
3254 * too.
3255 */
3259 NULL);
3261 /*
3262 * Need to check the link status and device status of the port
3263 * and consider raising power if the port was in D3 state
3264 */
3271 /* AHCI_ADDR_PMPORT */
3275 }
3283 }
3285 /*
3286 * Called by sata framework to deactivate a port as part of hotplug.
3287 * (cfgadm -c disconnect satax/y)
3288 * Support port multiplier.
3289 */
3290 static int
3292 {
3295 ahci_addr_t addr;
3317 /* Disable the interrupts on the port */
3322 /* First to abort all the pending commands */
3325 /* Then stop the port */
3328 }
3330 /* Next put the PHY offline */
3345 /* Re-enable the interrupts for the other pmports */
3347 }
3349 /* Update port state */
3357 }
3359 /*
3360 * To be used to mark all the outstanding pkts with SATA_PKT_ABORTED
3361 * when a device is unplugged or a port is deactivated.
3362 */
3363 static void
3366 {
3375 /* Read/write port multiplier command takes highest priority */
3380 }
3382 /*
3383 * When AHCI_PORT_FLAG_MOPPING is set, we need to check whether a
3384 * REQUEST SENSE command or READ LOG EXT command is delivered to HBA
3385 * to get the error data, if yes when the device is removed, the
3386 * command needs to be aborted too.
3387 */
3395 "ahci_reject_all_abort_pkts return directly "
3396 "port %d no needs to reject any outstanding "
3399 }
3400 }
3410 }
3412 out:
3413 /* No need to do mop when there is no outstanding commands */
3419 ahci_portp,
3420 slot_status,
3425 }
3426 }
3428 #if defined(__lock_lint)
3429 static int
3431 {
3433 }
3434 #endif
3436 /*
3437 * Initialize fma capabilities and register with IO fault services.
3438 */
3439 static void
3441 {
3442 /*
3443 * Need to change iblock to priority for new MSI intr
3444 */
3445 ddi_iblock_cookie_t fm_ibc;
3453 /* Only register with IO Fault Services if we have some capability */
3455 /* Adjust access and dma attributes for FMA */
3462 /*
3463 * Register capabilities with IO Fault Services.
3464 * ahcictl_fm_cap will be updated to indicate
3465 * capabilities actually supported (not requested.)
3466 */
3474 }
3475 /*
3476 * Initialize pci ereport capabilities if ereport
3477 * capable (should always be.)
3478 */
3482 }
3484 /*
3485 * Register error callback if error callback capable.
3486 */
3490 }
3494 }
3495 }
3497 /*
3498 * Releases fma capabilities and un-registers with IO fault services.
3499 */
3500 static void
3502 {
3503 /* Only unregister FMA capabilities if registered */
3505 /*
3506 * Un-register error callback if error callback capable.
3507 */
3510 }
3512 /*
3513 * Release any resources allocated by pci_ereport_setup()
3514 */
3518 }
3520 /* Unregister from IO Fault Services */
3523 /* Adjust access and dma attributes for FMA */
3532 }
3533 }
3535 /*ARGSUSED*/
3536 static int
3538 {
3539 /*
3540 * as the driver can always deal with an error in any dma or
3541 * access handle, we can just return the fme_status value.
3542 */
3545 }
3547 int
3549 {
3550 ddi_fm_error_t de;
3554 }
3556 int
3558 {
3559 ddi_fm_error_t de;
3563 }
3565 /*
3566 * Generate an ereport
3567 */
3568 void
3570 {
3580 }
3581 }
3583 /*
3584 * Check if all handles are correctly allocated.
3585 */
3586 static int
3588 {
3593 }
3607 }
3609 }
3612 }
3614 /*
3615 * Check the access handles for the controller. Note that
3616 * ahcictl_pci_conf_handle is only used in attach process.
3617 */
3618 static int
3620 {
3626 }
3628 }
3630 /*
3631 * Check the DMA handles and the access handles of a controller port.
3632 */
3633 static int
3635 {
3650 }
3655 }
3656 }
3658 }
3660 /*
3661 * Check the DMA handles and the access handles of a cmd table slot.
3662 */
3663 static int
3665 {
3673 }
3675 }
3677 /*
3678 * Allocate the ports structure, only called by ahci_attach
3679 */
3680 static int
3682 {
3690 /* Allocate structures only for the implemented ports */
3696 }
3704 }
3705 }
3710 err_out:
3714 }
3715 }
3719 }
3721 /*
3722 * Reverse of ahci_alloc_ports_state(), only called by ahci_detach
3723 */
3724 static void
3726 {
3731 /* if this port is implemented by the HBA */
3734 }
3736 }
3738 /*
3739 * Drain the taskq.
3740 */
3741 static void
3743 {
3750 }
3757 }
3758 }
3760 /*
3761 * Initialize the controller and all ports. And then try to start the ports
3762 * if there are devices attached.
3763 *
3764 * This routine can be called from three seperate cases: DDI_ATTACH,
3765 * PM_LEVEL_D0 and DDI_RESUME. The DDI_ATTACH case is different from
3766 * other two cases; device signature probing are attempted only during
3767 * DDI_ATTACH case.
3768 */
3769 static int
3771 {
3773 ahci_addr_t addr;
3779 /* Disable the whole controller interrupts */
3784 /* Initialize the implemented ports and structures */
3788 }
3793 /*
3794 * Ensure that the controller is not in the running state
3795 * by checking every implemented port's PxCMD register
3796 */
3802 "ahci_initialize_controller: failed to "
3804 /*
3805 * Set the port state to SATA_PSTATE_FAILED if
3806 * failed to initialize it.
3807 */
3809 }
3812 }
3814 /* Enable the whole controller interrupts */
3820 }
3822 /*
3823 * Reverse of ahci_initialize_controller()
3824 *
3825 * We only need to stop the ports and disable the interrupt.
3826 */
3827 static void
3829 {
3836 /* disable all the interrupts. */
3844 }
3848 /* Stop the port by clearing PxCMD.ST */
3851 /*
3852 * Here we must disable the port interrupt because
3853 * ahci_disable_all_intrs only clear GHC.IE, and IS
3854 * register will be still set if PxIE is enabled.
3855 * When ahci shares one IRQ with other drivers, the
3856 * intr handler may claim the intr mistakenly.
3857 */
3862 }
3863 }
3865 /*
3866 * ahci_alloc_pmult()
3867 * 1. Setting HBA port registers which are necessary for a port multiplier.
3868 * (Set PxCMD.PMA while PxCMD.ST is '0')
3869 * 2. Allocate ahci_pmult_info structure.
3870 *
3871 * NOTE: Must stop port before the function is called.
3872 */
3873 static void
3875 {
3884 /* The port must have been stopped before. */
3888 /* set PMA bit */
3894 "ahci_alloc_pmult: "
3896 }
3898 /* Allocate port multiplier information structure */
3902 }
3905 }
3907 /*
3908 * ahci_dealloc_pmult()
3909 * 1. Clearing related registers when a port multiplier is detached.
3910 * (Clear PxCMD.PMA while PxCMD.ST is '0')
3911 * 2. Deallocate ahci_pmult_info structure.
3912 *
3913 * NOTE: Must stop port before the function is called.
3914 */
3915 static void
3917 {
3927 /* Clear PMA bit */
3933 "ahci_dealloc_pmult: "
3935 }
3937 /* Release port multiplier information structure */
3942 }
3943 }
3945 /*
3946 * Staggered Spin-up.
3947 */
3948 static void
3950 {
3959 /* Check for staggered spin-up support */
3966 /* If PxCMD.SUD == 1, no staggered spin-up is needed */
3972 /* Set PxCMD.SUD */
3976 port_cmd_status);
3977 }
3979 /*
3980 * The routine is to initialize a port. First put the port in NotRunning
3981 * state, then enable port interrupt and clear Serror register. And under
3982 * AHCI_ATTACH case, find device signature and then try to start the port.
3983 *
3984 * Called by
3985 * 1. ahci_initialize_controller
3986 * 2. ahci_intr_phyrdy_change (hotplug)
3987 */
3988 static int
3991 {
3999 /* AHCI_ADDR_PORT: We've no idea of the attached device here. */
4002 /*
4003 * At the time being, only probe ports/devices and get the types of
4004 * attached devices during DDI_ATTACH. In fact, the device can be
4005 * changed during power state changes, but at the time being, we
4006 * don't support the situation.
4007 */
4011 /* check for DDI_RESUME case */
4018 }
4021 /*
4022 * During the resume, we need to set the PxCLB, PxCLBU, PxFB
4023 * and PxFBU registers in case these registers were cleared
4024 * during the suspend.
4025 */
4027 "ahci_initialize_port: port %d "
4028 "set PxCLB, PxCLBU, PxFB and PxFBU "
4032 AHCI_SUCCESS)
4034 }
4042 /*
4043 * Check whether the port is in NotRunning state, if not,
4044 * put the port in NotRunning state
4045 */
4048 AHCI_CMD_STATUS_CR |
4049 AHCI_CMD_STATUS_FRE |
4050 AHCI_CMD_STATUS_FR)) {
4053 }
4055 /* Make sure the drive is spun-up */
4058 /* Disable interrupt */
4061 /* Device is unknown at first */
4064 /* Disable the interface power management */
4072 /* Check physcial link status */
4076 /* Check interface status */
4080 /* Check whether port reset must be executed */
4083 /* Always reset port on RESUME */
4086 /* Something went wrong, we need do some reset things */
4089 /* Does port reset succeed on HBA port? */
4092 "ahci_initialize_port:"
4095 }
4097 /* Is port failed? */
4099 SATA_PSTATE_FAILED) {
4104 }
4105 }
4110 /*
4111 * Try to get the device signature if the port is not empty.
4112 */
4114 SATA_DTYPE_NONE)
4117 /* Return directly if no device connected */
4122 }
4124 /* If this is a port multiplier, we need do some initialization */
4129 }
4131 /* Try to start the port */
4137 }
4138 out:
4139 /* Enable port interrupts */
4143 }
4145 /*
4146 * Handle hardware defect, and check the capabilities. For example,
4147 * power management capabilty and MSI capability.
4148 */
4149 static int
4151 {
4153 #if AHCI_DEBUG
4155 ushort_t msimc;
4156 #endif
4161 PCI_CONF_VENID);
4165 PCI_CONF_DEVID);
4167 /*
4168 * Modify dma_attr_align of ahcictl_buffer_dma_attr. For VT8251, those
4169 * controllers with 0x00 revision id work on 4-byte aligned buffer,
4170 * which is a bug and was fixed after 0x00 revision id controllers.
4171 *
4172 * Moreover, VT8251 cannot use multiple command slots in the command
4173 * list for non-queued commands because the previous register content
4174 * of PxCI can be re-written in the register write, so a flag will be
4175 * set to record this defect - AHCI_CAP_NO_MCMDLIST_NONQUEUE.
4176 *
4177 * For VT8251, software reset also has the same defect as the below
4178 * AMD/ATI chipset. That is, software reset will get failed if 0xf
4179 * is filled in pmport field. Therefore, another software reset need
4180 * to be done with 0 filled in pmport field.
4181 */
4184 PCI_CONF_REVID);
4191 }
4195 "VT8251 cannot use multiple command lists for "
4199 }
4201 /*
4202 * AMD/ATI SB600 (0x1002,0x4380) AHCI chipset doesn't support 64-bit
4203 * DMA addressing for communication memory descriptors though S64A bit
4204 * of CAP register declares it supports. Even though 64-bit DMA for
4205 * data buffer works on ASUS M2A-VM with newer BIOS, three other
4206 * motherboards are known not, so both AHCI_CAP_BUF_32BIT_DMA and
4207 * AHCI_CAP_COMMU_32BIT_DMA are set for this controller.
4208 *
4209 * Due to certain hardware issue, the chipset must do port reset during
4210 * initialization, otherwise, when retrieving device signature,
4211 * software reset will get time out. So AHCI_CAP_INIT_PORT_RESET flag
4212 * need to set.
4213 *
4214 * For this chipset software reset will get failure if the pmport of
4215 * Register FIS was set with SATA_PMULT_HOSTPORT (0xf) and no port
4216 * multiplier is connected to the port. In order to fix the issue,
4217 * AHCI_CAP_SRST_NO_HOSTPORT flag need to be set, and once software
4218 * reset got failure, the driver will try to do another software reset
4219 * with pmport 0.
4220 */
4229 "ATI SB600 cannot do 64-bit DMA for both data buffer and "
4230 "communication memory descriptors though CAP indicates "
4234 NULL);
4236 "ATI SB600 will get software reset failure if pmport "
4238 }
4240 /*
4241 * AMD/ATI SB700/710/750/800 and SP5100 AHCI chipset share the same
4242 * vendor ID and device ID (0x1002,0x4391).
4243 *
4244 * SB700/750 AHCI chipset on some boards doesn't support 64-bit
4245 * DMA addressing for communication memory descriptors though S64A bit
4246 * of CAP register declares the support. However, it does support
4247 * 64-bit DMA for data buffer. So only AHCI_CAP_COMMU_32BIT_DMA is
4248 * set for this controller.
4249 *
4250 * SB710 has the same initialization issue as SB600, so it also need
4251 * a port reset. That is AHCI_CAP_INIT_PORT_RESET need to set for it.
4252 *
4253 * SB700 also has the same issue about software reset, and thus
4254 * AHCI_CAP_SRST_NO_HOSTPORT flag also is needed.
4255 */
4263 "ATI SB700/750 cannot do 64-bit DMA for communication "
4264 "memory descriptors though CAP indicates support, "
4268 NULL);
4270 "ATI SB700 will get software reset failure if pmport "
4272 }
4274 /*
4275 * Check if capabilities list is supported and if so,
4276 * get initial capabilities pointer and clear bits 0,1.
4277 */
4285 }
4287 /*
4288 * Walk capabilities if supported.
4289 */
4292 /*
4293 * Check that we haven't exceeded the maximum number of
4294 * capabilities and that the pointer is in a valid range.
4295 */
4300 }
4304 caps_ptr);
4306 }
4308 /*
4309 * Get next capability and check that it is valid.
4310 * For now, we only support power management.
4311 */
4313 caps_ptr);
4317 /* power management supported */
4320 /* Save PMCSR offset */
4323 #if AHCI_DEBUG
4331 "Power Management capability found PCI_PMCAP "
4335 "PCI Power Management Interface "
4337 #endif
4341 #if AHCI_DEBUG
4346 "Message Signaled Interrupt capability found "
4348 #endif
4382 }
4384 /*
4385 * Get next capabilities pointer and clear bits 0,1.
4386 */
4390 }
4393 }
4395 /*
4396 * Read/Write a register at port multiplier by SATA READ PORTMULT / SATA WRITE
4397 * PORTMULT command. SYNC & POLLING mode is used.
4398 */
4399 static int
4402 {
4404 ahci_addr_t pmult_addr;
4407 sata_device_t sata_device;
4422 /* Check the existence of the port multiplier */
4426 /* Request a READ/WRITE PORTMULT sata packet. */
4433 /*
4434 * Make sure no command is outstanding here. All R/W PMULT requests
4435 * come from
4436 *
4437 * 1. ahci_attach()
4438 * The port should be empty.
4439 *
4440 * 2. ahci_tran_probe_port()
4441 * Any request from SATA framework (via ahci_tran_start) should be
4442 * rejected if R/W PMULT command is outstanding.
4443 *
4444 * If we are doing mopping, do not check those flags because no
4445 * command will be actually outstanding.
4446 *
4447 * If the port has been occupied by any other commands, the probe
4448 * function will return a SATA_RETRY. SATA framework will retry
4449 * later.
4450 */
4456 }
4466 }
4468 /*
4469 * The port multiplier is gone. This may happen when
4470 * 1. Cutting off the power of an enclosure. The device lose the power
4471 * before port multiplier.
4472 * 2. Disconnecting the port multiplier during hot-plugging a sub-drive.
4473 *
4474 * The issued command should be aborted and the following command
4475 * should not be continued.
4476 */
4479 "READ/WRITE PMULT failed: "
4482 }
4489 /*
4490 * READ/WRITE PORTMULT command is intended to sent to the control port
4491 * of the port multiplier.
4492 */
4497 /* No interrupt here. Store the interrupt enable mask. */
4513 }
4515 /* Failed or not completed. */
4521 }
4522 out:
4523 /* Restore the interrupt mask */
4531 }
4533 static int
4536 {
4538 SATA_RDWR_PMULT_PKT_TYPE_READ);
4539 }
4541 static int
4544 {
4546 SATA_RDWR_PMULT_PKT_TYPE_WRITE);
4547 }
4549 #define READ_PMULT(addrp, r, pv, out) \
4550 if (ahci_read_pmult(ahci_ctlp, addrp, r, pv) != AHCI_SUCCESS) \
4551 goto out;
4553 #define WRITE_PMULT(addrp, r, v, out) \
4554 if (ahci_write_pmult(ahci_ctlp, addrp, r, v) != AHCI_SUCCESS) \
4555 goto out;
4557 /*
4558 * Update sata registers on port multiplier, including GSCR/PSCR registers.
4559 * ahci_update_pmult_gscr()
4560 * ahci_update_pmult_pscr()
4561 */
4562 static int
4565 {
4578 }
4580 static int
4583 {
4597 }
4599 /*
4600 * ahci_initialize_pmult()
4601 *
4602 * Initialize a port multiplier, including
4603 * 1. Enable FEATURES register at port multiplier. (SATA Chp.16)
4604 * 2. Redefine MASK register. (SATA Chap 16.?)
4605 */
4606 static int
4609 {
4610 sata_pmult_gscr_t sg;
4619 /*
4620 * Enable features of port multiplier. Currently only
4621 * Asynchronous Notification is enabled.
4622 */
4623 /* Check gscr64 for supported features. */
4628 "port %d: Port Multiplier supports "
4631 /* Write to gscr96 to enabled features */
4637 AHCI_SNOTIF_CLEAR_ALL);
4641 }
4643 /*
4644 * Now we need to update gscr33 register to enable hot-plug interrupt
4645 * for sub devices behind port multiplier.
4646 */
4651 /*
4652 * Fetch the number of device ports of the port multiplier
4653 */
4657 /* Register the port multiplier to SATA Framework. */
4669 /* Till now port-mult is successfully initialized */
4675 }
4677 /*
4678 * Initialize a port multiplier port. According to spec, firstly we need
4679 * issue a COMRESET, then a software reset to get its signature.
4680 *
4681 * NOTE: This function should only be called in ahci_probe_pmport()
4682 */
4683 static int
4686 {
4698 /* Check HBA port state */
4701 "ahci_initialize_pmport:"
4705 }
4709 }
4712 /* Checking for outstanding commands */
4721 }
4726 /* Clear status */
4729 /* Firstly assume an unknown device */
4734 /* port reset is necessary for port multiplier port */
4737 "ahci_initialize_pmport:"
4741 }
4743 /* Is port failed? */
4745 SATA_PSTATE_FAILED) {
4747 "ahci_initialize_pmport: port %d:%d failed. "
4751 }
4753 /* Is there any device attached? */
4756 /* Do not waste time on an empty port */
4758 "ahci_initialize_pmport: No device is found "
4762 }
4768 /*
4769 * Till now we can assure a device attached to that HBA port and work
4770 * correctly. Now try to get the device signature. This is an optional
4771 * step. If failed, unknown device is assumed, then SATA module will
4772 * continue to use IDENTIFY DEVICE to get the information of the
4773 * device.
4774 */
4779 out:
4780 /* Next try to mop the pending commands */
4790 ahci_portp,
4791 slot_status,
4797 /* Clear PxSNTF register if supported. */
4801 AHCI_SNOTIF_CLEAR_ALL);
4802 }
4807 }
4809 /*
4810 * ahci_probe_pmult()
4811 *
4812 * This function will be called to probe a port multiplier, which will
4813 * handle hotplug events on port multiplier ports.
4814 *
4815 * NOTE: Only called from ahci_tran_probe_port()
4816 */
4817 static int
4820 {
4821 sata_device_t sdevice;
4822 ahci_addr_t pmport_addr;
4831 /* The bits in GSCR32 refers to the pmport that has a hot-plug event. */
4838 /* no pending hot plug events. */
4846 /* Check previous device at that port */
4851 /* PxSStatus tells the presence of device. */
4856 SSTATUS_DET_DEVPRE_PHYCOM)
4859 /*
4860 * Clear PxSERR is critical. The transition from 0 to 1 will
4861 * emit a FIS which generates an asynchronous notification
4862 * event at controller. If we fail to clear the PxSERR, the
4863 * Async Notif events will no longer be activated on this
4864 * pmport.
4865 */
4878 dev_exists_now);
4882 /* Link (may) not change: Exist -> Exist * */
4884 "ahci_probe_pmult: port %d:%d "
4891 sata_tran_hba_dip,
4893 SATA_EVNT_LINK_LOST|
4894 SATA_EVNT_LINK_ESTABLISHED);
4897 /* Link change: None -> Exist */
4899 "ahci_probe_pmult: port %d:%d "
4902 /* Clear port state */
4904 SATA_STATE_UNKNOWN);
4906 "ahci_probe_pmult: port %d "
4912 sata_tran_hba_dip,
4914 SATA_EVNT_LINK_ESTABLISHED);
4916 }
4920 /* Link change: Exist -> None */
4922 "ahci_probe_pmult: port %d:%d "
4925 /* An existing device is lost. */
4927 SATA_STATE_UNKNOWN);
4929 SATA_DTYPE_NONE);
4934 sata_tran_hba_dip,
4936 SATA_EVNT_LINK_LOST);
4938 }
4939 }
4948 }
4950 /*
4951 * Probe and initialize a port multiplier port.
4952 * A port multiplier port could only be initilaizer here.
4953 */
4954 static int
4957 {
4960 ahci_addr_t addr_pmult;
4964 /*
4965 * Check the parent - port multiplier first.
4966 */
4968 /*
4969 * Parent port multiplier might have been removed. This event will be
4970 * ignored and failure.
4971 */
4975 "ahci_tran_probe_port: "
4979 }
4981 /* The port is ready? */
4985 "ahci_tran_probe_port: "
4990 AHCI_SUCCESS) {
4992 "ahci_tran_probe_port: "
4995 }
4996 }
4998 /*
4999 * If port-mult is restarted due to some reason, we need
5000 * re-initialized the PMult.
5001 */
5003 /* Initialize registers on a port multiplier */
5008 }
5010 /*
5011 * Then we check the port-mult port
5012 */
5013 /* Is this pmport initialized? */
5017 /* ahci_initialize_pmport() will set READY state */
5021 }
5024 }
5026 /*
5027 * AHCI device reset ...; a single device on one of the ports is reset,
5028 * but the HBA and physical communication remain intact. This is the
5029 * least intrusive.
5030 *
5031 * When issuing a software reset sequence, there should not be other
5032 * commands in the command list, so we will first clear and then re-set
5033 * PxCMD.ST to clear PxCI. And before issuing the software reset,
5034 * the port must be idle and PxTFD.STS.BSY and PxTFD.STS.DRQ must be
5035 * cleared unless command list override (PxCMD.CLO) is supported.
5036 */
5037 static int
5040 {
5055 /* First clear PxCMD.ST (AHCI v1.2 10.4.1) */
5061 }
5063 /* Check PxTFD.STS.BSY and PxTFD.STS.DRQ */
5071 "PxTFD.STS.BSY/DRQ is set (PxTFD=0x%x), "
5074 }
5076 /*
5077 * If HBA Support CLO, as Command List Override (CAP.SCLO is
5078 * set), PxCMD.CLO bit should be set before set PxCMD.ST, in
5079 * order to clear PxTFD.STS.BSY and PxTFD.STS.DRQ.
5080 */
5090 /* Waiting till PxCMD.SCLO bit is cleared */
5093 /* Wait for 10 millisec */
5096 /* We are effectively timing out after 1 sec. */
5101 }
5103 port_cmd_status =
5108 /* Re-check */
5115 port_task_file);
5117 }
5118 }
5120 /* Then start port */
5126 }
5128 /*
5129 * When ahci_port.ahciport_mop_in_progress is set, A non-zero
5130 * ahci_port.ahciport_pending_ncq_tags may fail
5131 * ahci_claim_free_slot(). Actually according to spec, by clearing
5132 * PxCMD.ST there is no command outstanding while executing software
5133 * reseting. Hence we directly use slot 0 instead of
5134 * ahci_claim_free_slot().
5135 */
5138 /* Now send the first H2D Register FIS with SRST set to 1 */
5142 h2d_register_fisp =
5149 /* Set Command Header in Command List */
5162 ahci_cmd_table_size,
5163 DDI_DMA_SYNC_FORDEV);
5168 DDI_DMA_SYNC_FORDEV);
5170 /* Indicate to the HBA that a command is active. */
5177 /* Loop till the first command is finished */
5182 /* We are effectively timing out after 1 sec. */
5185 "the first SRST FIS is timed out, "
5188 }
5189 /* Wait for 10 millisec */
5194 "ahci_software_reset: 1st loop count: %d, "
5198 /* According to ATA spec, we need wait at least 5 microsecs here. */
5201 /* Now send the second H2D Register FIS with SRST cleard to zero */
5205 h2d_register_fisp =
5211 /* Set Command Header in Command List */
5222 ahci_cmd_table_size,
5223 DDI_DMA_SYNC_FORDEV);
5228 DDI_DMA_SYNC_FORDEV);
5230 /* Indicate to the HBA that a command is active. */
5237 /* Loop till the second command is finished */
5242 /* We are effectively timing out after 1 sec. */
5245 "the second SRST FIS is timed out, "
5248 }
5250 /* Wait for 10 millisec */
5255 "ahci_software_reset: 2nd loop count: %d, "
5262 DDI_SERVICE_UNAFFECTED);
5264 }
5267 out:
5274 }
5276 /*
5277 * AHCI port reset ...; the physical communication between the HBA and device
5278 * on a port are disabled. This is more intrusive.
5279 *
5280 * When an HBA or port reset occurs, Phy communication is going to
5281 * be re-established with the device through a COMRESET followed by the
5282 * normal out-of-band communication sequence defined in Serial ATA. At
5283 * the end of reset, the device, if working properly, will send a D2H
5284 * Register FIS, which contains the device signature. When the HBA receives
5285 * this FIS, it updates PxTFD.STS and PxTFD.ERR register fields, and updates
5286 * the PxSIG register with the signature.
5287 *
5288 * NOTE: It is expected both PxCMD.ST and PxCMD.CR are cleared before the
5289 * function is called. If not, it is assumed the interface is in hung
5290 * condition.
5291 */
5292 static int
5295 {
5296 ahci_addr_t pmult_addr;
5308 /* Target is a port multiplier port? */
5312 /* Otherwise it must be an HBA port. */
5322 /*
5323 * According to the spec, SUD bit should be set here,
5324 * but JMicron JMB363 doesn't follow it, so print
5325 * a debug message.
5326 */
5337 port_scontrol);
5339 /* Enable PxCMD.FRE to read device */
5344 /*
5345 * The port enters P:StartComm state, and the HBA tells the link layer
5346 * to start communication, which involves sending COMRESET to the
5347 * device. And the HBA resets PxTFD.STS to 7Fh.
5348 *
5349 * Give time for COMRESET to percolate, according to the AHCI
5350 * spec, software shall wait at least 1 millisecond before
5351 * clearing PxSCTL.DET
5352 */
5355 /* Fetch the SCONTROL again and rewrite the DET part with 0 */
5361 port_scontrol);
5363 /*
5364 * When a COMINIT is received from the device, then the port enters
5365 * P:ComInit state. And HBA sets PxTFD.STS to FFh or 80h. HBA sets
5366 * PxSSTS.DET to 1h to indicate a device is detected but communication
5367 * is not yet established. HBA sets PxSERR.DIAG.X to '1' to indicate
5368 * a COMINIT has been received.
5369 */
5370 /*
5371 * The DET field is valid only if IPM field indicates
5372 * that the interface is in active state.
5373 */
5380 /*
5381 * If the interface is not active, the DET field
5382 * is considered not accurate. So we want to
5383 * continue looping.
5384 */
5386 }
5392 /*
5393 * We are effectively timing out after 0.1 sec.
5394 */
5396 }
5398 /* Wait for 10 millisec */
5400 }
5403 "ahci_port_reset: 1st loop count: %d, "
5408 /*
5409 * Either the port is not active or there
5410 * is no device present.
5411 */
5414 }
5416 /* Clear port serror register for the port */
5419 AHCI_SERROR_CLEAR_ALL);
5421 /*
5422 * Devices should return a FIS contains its signature to HBA after
5423 * COMINIT signal. Check whether a D2H Register FIS is received by
5424 * polling PxTFD.STS.
5425 */
5428 port_task_file =
5437 /*
5438 * We are effectively timing out after 11 sec.
5439 */
5441 "the device hardware has been initialized and "
5446 "port %d: some or all of BSY, DRQ and ERR in "
5447 "PxTFD.STS are not clear. We need another "
5450 /* Clear port serror register for the port */
5453 AHCI_SERROR_CLEAR_ALL);
5457 /* Try another software reset. */
5461 SATA_PSTATE_FAILED);
5463 }
5465 }
5467 /* Wait for 10 millisec */
5469 }
5472 "ahci_port_reset: 2nd loop count: %d, "
5476 /* Clear port serror register for the port */
5479 AHCI_SERROR_CLEAR_ALL);
5481 /* Set port as ready */
5488 }
5490 /*
5491 * COMRESET on a port multiplier port.
5492 *
5493 * NOTE: Only called in ahci_port_reset()
5494 */
5495 static int
5498 {
5510 /* Initialize pmport state */
5517 /* PxCMD.FRE should be set before. */
5524 /*
5525 * Give time for COMRESET to percolate, according to the AHCI
5526 * spec, software shall wait at least 1 millisecond before
5527 * clearing PxSCTL.DET
5528 */
5531 /*
5532 * Fetch the SCONTROL again and rewrite the DET part with 0
5533 * This will generate an Asychronous Notification events.
5534 */
5539 /*
5540 * The port enters P:StartComm state, and HBA tells link layer to
5541 * start communication, which involves sending COMRESET to device.
5542 * And the HBA resets PxTFD.STS to 7Fh.
5543 *
5544 * When a COMINIT is received from the device, then the port enters
5545 * P:ComInit state. And HBA sets PxTFD.STS to FFh or 80h. HBA sets
5546 * PxSSTS.DET to 1h to indicate a device is detected but communication
5547 * is not yet established. HBA sets PxSERR.DIAG.X to '1' to indicate
5548 * a COMINIT has been received.
5549 */
5550 /*
5551 * The DET field is valid only if IPM field indicates
5552 * that the interface is in active state.
5553 */
5559 /*
5560 * If the interface is not active, the DET field
5561 * is considered not accurate. So we want to
5562 * continue looping.
5563 */
5565 }
5568 /*
5569 * We are effectively timing out after 0.1 sec.
5570 */
5572 }
5574 /* Wait for 10 millisec */
5580 "ahci_pmport_reset: 1st loop count: %d, "
5586 /*
5587 * Either the port is not active or there
5588 * is no device present.
5589 */
5591 "ahci_pmport_reset: "
5596 }
5598 /* Now we can make sure there is a device connected to the port */
5599 /* COMINIT signal is supposed to be received (PxSERR.DIAG.X = '1') */
5609 }
5611 /*
5612 * After clear PxSERR register, we will receive a D2H FIS.
5613 * Normally this FIS will cause a IPMS error according to AHCI spec
5614 * v1.2 because there is no command outstanding for it. So we need
5615 * to ignore this error.
5616 */
5620 /* Now we need to check the D2H FIS by checking IPMS error. */
5627 /*
5628 * No D2H FIS received. This is possible according
5629 * to SATA 2.6 spec.
5630 */
5632 "PxIS.IPMS is not set, we need another "
5636 }
5638 /* Wait for 10 millisec */
5646 "ahci_pmport_reset: 2st loop count: %d, "
5650 /* Clear IPMS */
5653 AHCI_INTR_STATUS_IPMS);
5656 /* This pmport is now ready for ahci_tran_start() */
5665 /* IPMS flags might be set before. */
5671 }
5673 /*
5674 * AHCI HBA reset ...; the entire HBA is reset, and all ports are disabled.
5675 * This is the most intrusive.
5676 *
5677 * When an HBA reset occurs, Phy communication will be re-established with
5678 * the device through a COMRESET followed by the normal out-of-band
5679 * communication sequence defined in Serial ATA. At the end of reset, the
5680 * device, if working properly, will send a D2H Register FIS, which contains
5681 * the device signature. When the HBA receives this FIS, it updates PxTFD.STS
5682 * and PxTFD.ERR register fields, and updates the PxSIG register with the
5683 * signature.
5684 *
5685 * Remember to set GHC.AE to 1 before calling ahci_hba_reset.
5686 */
5687 static int
5689 {
5697 NULL);
5704 /* Setting GHC.HR to 1, remember GHC.AE is already set to 1 before */
5709 /*
5710 * Wait until HBA Reset complete or timeout
5711 */
5719 "ahci hba reset is timing out, "
5721 /* We are effectively timing out after 1 sec. */
5723 }
5725 /* Wait for 10 millisec */
5730 "ahci_hba_reset: 1st loop count: %d, "
5734 /* The hba is not reset for some reasons */
5739 }
5741 /*
5742 * HBA reset will clear (AHCI Spec v1.2 10.4.3) GHC.IE / GHC.AE
5743 */
5753 /* Only check implemented ports */
5756 }
5761 /* Make sure the drive is spun-up */
5766 AHCI_SUCCESS) {
5770 /*
5771 * Set the port state to SATA_PSTATE_FAILED if
5772 * failed to initialize it.
5773 */
5775 }
5778 }
5781 }
5783 /*
5784 * This routine is only called from AHCI_ATTACH or phyrdy change
5785 * case. It first calls software reset, then stop the port and try to
5786 * read PxSIG register to find the type of device attached to the port.
5787 *
5788 * The caller should make sure a valid device exists on specified port and
5789 * physical communication has been established so that the signature could
5790 * be retrieved by software reset.
5791 *
5792 * NOTE: The port interrupts should be disabled before the function is called.
5793 */
5794 static void
5797 {
5798 ahci_addr_t dev_addr;
5807 /*
5808 * If the HBA doesn't support port multiplier, then the driver
5809 * doesn't need to bother to check port multiplier device.
5810 *
5811 * The second port of ICH7 on ASUS P5W DH deluxe motherboard is
5812 * connected to Silicon Image 4723, to which the two sata drives
5813 * attached can be set with RAID1, RAID0 or Spanning mode.
5814 *
5815 * We found software reset will get failure if port multiplier address
5816 * 0xf is used by software reset, so just ignore the check since
5817 * ICH7 doesn't support port multiplier device at all.
5818 */
5824 /*
5825 * NOTE: when the ahci address is a HBA port, we do not know
5826 * it is a device or a port multiplier that attached. we need
5827 * try a software reset at port multiplier address (0xf
5828 * pmport)
5829 */
5836 }
5838 /* Assume it is unknown. */
5841 /* Issue a software reset to get the signature */
5845 /*
5846 * Try to do software reset again with pmport set with 0 if
5847 * the controller is set with AHCI_CAP_SRST_NO_HOSTPORT and
5848 * the original pmport is set with SATA_PMULT_HOSTPORT (0xf)
5849 */
5855 }
5859 "ahci_find_dev_signature: software reset failed "
5864 SATA_PSTATE_FAILED);
5866 }
5867 }
5869 /*
5870 * ahci_software_reset has started the port, so we need manually stop
5871 * the port again.
5872 */
5878 port);
5881 }
5882 }
5884 /* Now we can make sure that a valid signature is received. */
5896 }
5898 /* NOTE: Only support ATAPI device at controller port. */
5917 /* Port Multiplier cannot recursively attached. */
5928 }
5929 }
5931 /*
5932 * According to the spec, to reliably detect hot plug removals, software
5933 * must disable interface power management. Software should perform the
5934 * following initialization on a port after a device is attached:
5935 * Set PxSCTL.IPM to 3h to disable interface state transitions
5936 * Set PxCMD.ALPE to '0' to disable aggressive power management
5937 * Disable device initiated interface power management by SET FEATURE
5938 *
5939 * We can ignore the last item because by default the feature is disabled
5940 */
5941 static void
5943 {
5957 }
5959 /*
5960 * Start the port - set PxCMD.ST to 1, if PxCMD.FRE is not set
5961 * to 1, then set it firstly.
5962 *
5963 * Each port contains two major DMA engines. One DMA engine walks through
5964 * the command list, and is controlled by PxCMD.ST. The second DMA engine
5965 * copies received FISes into system memory, and is controlled by PxCMD.FRE.
5966 *
5967 * Software shall not set PxCMD.ST to '1' until it verifies that PxCMD.CR
5968 * is '0' and has set PxCMD.FRE is '1'. And software shall not clear
5969 * PxCMD.FRE while PxCMD.ST or PxCMD.CR is set '1'.
5970 *
5971 * Software shall not set PxCMD.ST to '1' unless a functional device is
5972 * present on the port(as determined by PxTFD.STS.BSY = '0',
5973 * PxTFD.STS.DRQ = '0', and PxSSTS.DET = 3h).
5974 */
5975 static int
5977 {
5989 }
5995 }
5997 /* First to set PxCMD.FRE before setting PxCMD.ST. */
6005 port_cmd_status);
6006 }
6015 port_cmd_status);
6023 }
6025 /*
6026 * Setup PxCLB, PxCLBU, PxFB, and PxFBU for particular port. First, we need
6027 * to make sure PxCMD.ST, PxCMD.CR, PxCMD.FRE, and PxCMD.FR are all cleared.
6028 * Then set PxCLB, PxCLBU, PxFB, and PxFBU.
6029 */
6030 static int
6032 {
6039 /* Step 1: Make sure both PxCMD.ST and PxCMD.CR are cleared. */
6047 }
6049 /* Step 2: Make sure both PxCMD.FRE and PxCMD.FR are cleared. */
6053 /* Clear PxCMD.FRE */
6057 port_cmd_status);
6059 /* Wait until PxCMD.FR is cleared */
6061 port_cmd_status =
6070 "ahci_setup_port_base_addresses: cannot "
6073 /*
6074 * We are effectively timing out after 0.5 sec.
6075 * This value is specified in AHCI spec.
6076 */
6078 }
6080 /* Wait for 1 millisec */
6082 }
6083 }
6085 /* Step 3: Config Port Command List Base Address */
6094 /* Step 4: Config Port Received FIS Base Address */
6104 }
6106 /*
6107 * Allocate the ahci_port_t including Received FIS and Command List.
6108 * The argument - port is the physical port number, and not logical
6109 * port number seen by the SATA framework.
6110 */
6111 static int
6113 {
6120 ahci_portp =
6126 /* Initialize the port condition variable */
6129 /* Initialize the port mutex */
6135 /*
6136 * Allocate memory for received FIS structure and
6137 * command list for this port
6138 */
6141 }
6145 }
6147 /* Setup PxCMD.CLB, PxCMD.CLBU, PxCMD.FB, and PxCMD.FBU */
6149 AHCI_SUCCESS) {
6151 }
6157 /* Create the taskq for the port */
6163 }
6165 /* Allocate the argument for the taskq */
6175 /* Initialize the done queue */
6184 err_case4:
6187 err_case3:
6190 err_case2:
6193 err_case1:
6201 }
6203 /*
6204 * Reverse of ahci_alloc_port_state().
6205 */
6206 static void
6208 {
6232 }
6234 /*
6235 * Allocates memory for the Received FIS Structure
6236 */
6237 static int
6239 {
6242 uint_t cookie_count;
6248 /* allocate rcvd FIS dma handle. */
6251 DDI_DMA_SLEEP,
6252 NULL,
6254 DDI_SUCCESS) {
6259 }
6262 rcvd_fis_size,
6264 DDI_DMA_CONSISTENT,
6265 DDI_DMA_SLEEP,
6266 NULL,
6273 /* error.. free the dma handle. */
6276 }
6279 NULL,
6281 rcvd_fis_size,
6283 DDI_DMA_SLEEP,
6284 NULL,
6290 /* error.. free the dma handle & free the memory. */
6294 }
6304 }
6306 /*
6307 * Deallocates the Received FIS Structure
6308 */
6309 static void
6311 {
6314 /* Unbind the cmd list dma handle first. */
6317 /* Then free the underlying memory. */
6320 /* Now free the handle itself. */
6322 }
6324 /*
6325 * Allocates memory for the Command List, which contains up to 32 entries.
6326 * Each entry contains a command header, which is a 32-byte structure that
6327 * includes the pointer to the command table.
6328 */
6329 static int
6331 {
6334 uint_t cookie_count;
6338 cmd_list_size =
6341 /* allocate cmd list dma handle. */
6344 DDI_DMA_SLEEP,
6345 NULL,
6351 }
6354 cmd_list_size,
6356 DDI_DMA_CONSISTENT,
6357 DDI_DMA_SLEEP,
6358 NULL,
6365 /* error.. free the dma handle. */
6368 }
6371 NULL,
6373 cmd_list_size,
6375 DDI_DMA_SLEEP,
6376 NULL,
6382 /* error.. free the dma handle & free the memory. */
6386 }
6398 }
6402 err_out:
6403 /* Unbind the cmd list dma handle first. */
6406 /* Then free the underlying memory. */
6409 /* Now free the handle itself. */
6413 }
6415 /*
6416 * Deallocates the Command List
6417 */
6418 static void
6420 {
6423 /* First dealloc command table */
6426 /* Unbind the cmd list dma handle first. */
6429 /* Then free the underlying memory. */
6432 /* Now free the handle itself. */
6434 }
6436 /*
6437 * Allocates memory for all Command Tables, which contains Command FIS,
6438 * ATAPI Command and Physical Region Descriptor Table.
6439 */
6440 static int
6442 {
6444 ddi_dma_cookie_t cmd_table_dma_cookie;
6445 uint_t cookie_count;
6455 /* Allocate cmd table dma handle. */
6458 DDI_DMA_SLEEP,
6459 NULL,
6461 DDI_SUCCESS) {
6467 }
6471 ahci_cmd_table_size,
6473 DDI_DMA_CONSISTENT,
6474 DDI_DMA_SLEEP,
6475 NULL,
6479 NULL) {
6484 /* error.. free the dma handle. */
6488 }
6492 NULL,
6494 ahci_cmd_table_size,
6496 DDI_DMA_SLEEP,
6497 NULL,
6503 /* error.. free the dma handle & free the memory. */
6509 }
6512 ahci_cmd_table_size);
6514 /* Config Port Command Table Base Address */
6519 #ifndef __lock_lint
6523 #endif
6524 }
6527 err_out:
6530 /* Unbind the cmd table dma handle first */
6534 /* Then free the underlying memory */
6538 /* Now free the handle itself */
6541 }
6544 }
6546 /*
6547 * Deallocates memory for all Command Tables.
6548 */
6549 static void
6551 {
6561 /* Unbind the cmd table dma handle first. */
6565 /* Then free the underlying memory. */
6569 /* Now free the handle itself. */
6572 }
6573 }
6575 /*
6576 * Update SATA registers at controller ports
6577 */
6578 static void
6581 {
6596 }
6598 /*
6599 * For poll mode, ahci_port_intr will be called to emulate the interrupt
6600 */
6601 static void
6603 {
6612 /* For SATA_OPMODE_POLLING commands */
6613 port_intr_enable =
6615 AHCI_INTR_STATUS_PSS |
6616 AHCI_INTR_STATUS_SDBS |
6617 AHCI_INTR_STATUS_UFS |
6618 AHCI_INTR_STATUS_PCS |
6619 AHCI_INTR_STATUS_PRCS |
6620 AHCI_INTR_STATUS_OFS |
6621 AHCI_INTR_STATUS_INFS |
6622 AHCI_INTR_STATUS_IFS |
6623 AHCI_INTR_STATUS_HBDS |
6624 AHCI_INTR_STATUS_HBFS |
6625 AHCI_INTR_STATUS_TFES);
6627 /*
6628 * port_intr_enable indicates that the corresponding interrrupt
6629 * reporting is enabled.
6630 */
6633 }
6635 /* IPMS error in port reset should be ignored according AHCI spec. */
6640 /*
6641 * port_intr_stats indicates that the corresponding interrupt
6642 * condition is active.
6643 */
6648 "ahci_port_intr: port %d, port_intr_status = 0x%x, "
6654 /*
6655 * Pending interrupt events are indicated by the PxIS register.
6656 * Make sure we don't miss any event.
6657 */
6660 DDI_SERVICE_UNAFFECTED);
6662 DDI_FME_VERSION);
6664 }
6666 /* First clear the port interrupts status */
6669 port_intr_status);
6671 /* Check the completed non-queued commands */
6673 AHCI_INTR_STATUS_PSS)) {
6676 }
6678 /* Check the completed queued commands */
6682 }
6684 /* Check the port connect change status interrupt bit */
6688 }
6690 /* Check the device mechanical presence status interrupt bit */
6694 }
6696 /* Check the PhyRdy change status interrupt bit */
6699 port);
6700 }
6702 /*
6703 * Check the non-fatal error interrupt bits, there are four
6704 * kinds of non-fatal errors at the time being:
6705 *
6706 * PxIS.UFS - Unknown FIS Error
6707 * PxIS.OFS - Overflow Error
6708 * PxIS.INFS - Interface Non-Fatal Error
6709 * PxIS.IPMS - Incorrect Port Multiplier Status Error
6710 *
6711 * For these non-fatal errors, the HBA can continue to operate,
6712 * so the driver just log the error messages.
6713 */
6715 AHCI_INTR_STATUS_OFS |
6716 AHCI_INTR_STATUS_IPMS |
6717 AHCI_INTR_STATUS_INFS)) {
6720 }
6722 /*
6723 * Check the fatal error interrupt bits, there are four kinds
6724 * of fatal errors for AHCI controllers:
6725 *
6726 * PxIS.HBFS - Host Bus Fatal Error
6727 * PxIS.HBDS - Host Bus Data Error
6728 * PxIS.IFS - Interface Fatal Error
6729 * PxIS.TFES - Task File Error
6730 *
6731 * The fatal error means the HBA can not recover from it by
6732 * itself, and it will try to abort the transfer, and the software
6733 * must intervene to restart the port.
6734 */
6736 AHCI_INTR_STATUS_HBDS |
6737 AHCI_INTR_STATUS_HBFS |
6738 AHCI_INTR_STATUS_TFES))
6742 /* Check the cold port detect interrupt bit */
6745 }
6747 /* Second clear the corresponding bit in IS.IPS */
6751 /* Try to recover at the end of the interrupt handler. */
6753 DDI_FM_OK) {
6755 DDI_SERVICE_UNAFFECTED);
6757 DDI_FME_VERSION);
6758 }
6759 }
6761 /*
6762 * Interrupt service handler
6763 */
6764 static uint_t
6766 {
6767 #ifndef __lock_lint
6769 #endif
6770 /* LINTED */
6776 /*
6777 * global_intr_status indicates that the corresponding port has
6778 * an interrupt pending.
6779 */
6784 /* The interrupt is not ours */
6786 }
6788 /*
6789 * Check the handle after reading global_intr_status - we don't want
6790 * to miss any port with pending interrupts.
6791 */
6793 DDI_FM_OK) {
6795 DDI_SERVICE_UNAFFECTED);
6797 DDI_FME_VERSION);
6799 }
6801 /* Loop for all the ports */
6805 }
6808 }
6812 /* Call ahci_port_intr */
6814 }
6817 }
6819 /*
6820 * For non-queued commands, when the corresponding bit in the PxCI register
6821 * is cleared, it means the command is completed successfully. And according
6822 * to the HBA state machine, there are three conditions which possibly will
6823 * try to clear the PxCI register bit.
6824 * 1. Receive one D2H Register FIS which is with 'I' bit set
6825 * 2. Update PIO Setup FIS
6826 * 3. Transmit a command and receive R_OK if CTBA.C is set (software reset)
6827 *
6828 * Process completed non-queued commands when the interrupt status bit -
6829 * AHCI_INTR_STATUS_DHRS or AHCI_INTR_STATUS_PSS is set.
6830 *
6831 * AHCI_INTR_STATUS_DHRS means a D2H Register FIS has been received
6832 * with the 'I' bit set. And the following commands will send thus
6833 * FIS with 'I' bit set upon the successful completion:
6834 * 1. Non-data commands
6835 * 2. DMA data-in command
6836 * 3. DMA data-out command
6837 * 4. PIO data-out command
6838 * 5. PACKET non-data commands
6839 * 6. PACKET PIO data-in command
6840 * 7. PACKET PIO data-out command
6841 * 8. PACKET DMA data-in command
6842 * 9. PACKET DMA data-out command
6843 *
6844 * AHCI_INTR_STATUS_PSS means a PIO Setup FIS has been received
6845 * with the 'I' bit set. And the following commands will send this
6846 * FIS upon the successful completion:
6847 * 1. PIO data-in command
6848 */
6849 static int
6852 {
6858 #if AHCI_DEBUG
6861 #endif
6868 /*
6869 * Spurious interrupt. Nothing to be done.
6870 */
6873 }
6878 /* If the PxCI corrupts, don't complete the commmands. */
6883 }
6886 /* Slot 0 is always used during error recovery */
6889 "ahci_intr_cmd_cmplt: port %d the sata pkt for error "
6895 "ahci_intr_cmd_cmplt: port %d the sata pkt for r/w "
6903 }
6906 "ahci_intr_cmd_cmplt: pending_tags = 0x%x, "
6909 finished_tags);
6917 "ahci_intr_cmd_cmplt: sending up pkt 0x%p "
6922 }
6930 "ahci_intr_cmd_cmplt: sending up pkt 0x%p "
6933 /* READ PORTMULT need copy out FIS content. */
6936 ahcirf_d2h_register_fis);
6940 }
6944 }
6950 }
6954 #if AHCI_DEBUG
6955 /*
6956 * For non-native queued commands, the PRD byte count field
6957 * shall contain an accurate count of the number of bytes
6958 * transferred for the command before the PxCI bit is cleared
6959 * to '0' for the command.
6960 *
6961 * The purpose of this field is to let software know how many
6962 * bytes transferred for a given operation in order to
6963 * determine if underflow occurred. When issuing native command
6964 * queuing commands, this field should not be used and is not
6965 * required to be valid since in this case underflow is always
6966 * illegal.
6967 *
6968 * For data reads, the HBA will update its PRD byte count with
6969 * the total number of bytes received from the last FIS, and
6970 * may be able to continue normally. For data writes, the
6971 * device will detect an error, and HBA most likely will get
6972 * a fatal error.
6973 *
6974 * Therefore, here just put code to debug part. And please
6975 * refer to the comment above ahci_intr_fatal_error for the
6976 * definition of underflow error.
6977 */
6978 cmd_dmacount =
6981 cmd_header =
6984 "ahci_intr_cmd_cmplt: port %d, "
6985 "PRD Byte Count = 0x%x, "
6988 cmd_dmacount);
6992 "ahci_intr_cmd_cmplt: port %d, "
6994 }
6995 }
6996 #endif
6998 /*
6999 * For SATAC_SMART command with SATA_SMART_RETURN_STATUS
7000 * feature, sata_special_regs flag will be set, and the
7001 * driver should copy the status and the other corresponding
7002 * register values in the D2H Register FIS received (It's
7003 * working on Non-data protocol) from the device back to
7004 * the sata_cmd.
7005 *
7006 * For every AHCI port, there is only one Received FIS
7007 * structure, which contains the FISes received from the
7008 * device, So we're trying to copy the content of D2H
7009 * Register FIS in the Received FIS structure back to
7010 * the sata_cmd.
7011 */
7014 ahcirf_d2h_register_fis);
7018 }
7021 "ahci_intr_cmd_cmplt: sending up pkt 0x%p "
7029 }
7030 out:
7040 }
7042 /*
7043 * AHCI_INTR_STATUS_SDBS means a Set Device Bits FIS has been received
7044 * with the 'I' bit set and has been copied into system memory. It will
7045 * be sent under the following situations:
7046 *
7047 * 1. NCQ command is completed
7048 *
7049 * The completion of NCQ commands (READ/WRITE FPDMA QUEUED) is performed
7050 * via the Set Device Bits FIS. When such event is generated, the software
7051 * needs to read PxSACT register and compares the current value to the
7052 * list of commands previously issue by software. ahciport_pending_ncq_tags
7053 * keeps the tags of previously issued commands.
7054 *
7055 * 2. Asynchronous Notification
7056 *
7057 * Asynchronous Notification is a feature in SATA spec 2.6.
7058 *
7059 * 1) ATAPI device will send a signal to the host when media is inserted or
7060 * removed and avoids polling the device for media changes. The signal
7061 * sent to the host is a Set Device Bits FIS with the 'I' and 'N' bits
7062 * set to '1'. At the moment, it's not supported yet.
7063 *
7064 * 2) Port multiplier will send a signal to the host when a hot plug event
7065 * has occured on a port multiplier port. It is used when command based
7066 * switching is employed. This is handled by ahci_intr_pmult_sntf_events()
7067 */
7068 static int
7071 {
7072 ahci_addr_t addr;
7077 /* Initialize HBA port address */
7080 /* NCQ plug handler */
7083 /* Check port multiplier's asynchronous notification events */
7087 }
7089 /* ATAPI events is not supported yet */
7092 }
7093 /*
7094 * NCQ interrupt handler. Called upon a NCQ command is completed.
7095 * Only be called from ahci_intr_set_device_bits().
7096 */
7097 static int
7100 {
7117 }
7119 /*
7120 * First the handler got which commands are finished by checking
7121 * PxSACT register
7122 */
7130 "ahci_intr_set_device_bits: port %d pending_ncq_tags = 0x%x "
7137 /*
7138 * For NCQ commands, the software can determine which command has
7139 * already been transmitted to the device by checking PxCI register.
7140 */
7147 /* If the PxSACT/PxCI corrupts, don't complete the NCQ commmands. */
7152 }
7155 "ahci_intr_set_device_bits: port %d pending_tags = 0x%x "
7162 /*
7163 * Clear ahciport_pending_tags bit when the corresponding command
7164 * is already sent down to the device.
7165 */
7170 }
7173 }
7175 next:
7180 }
7182 /* The command is certainly transmitted to the device */
7190 "ahci_intr_set_device_bits: sending up pkt 0x%p "
7198 }
7199 out:
7201 "ahci_intr_set_device_bits: port %d "
7211 }
7213 /*
7214 * Port multiplier asynchronous notification event handler. Called upon a
7215 * device is hot plugged/pulled.
7216 *
7217 * The async-notification event will only be recorded by ahcipmi_snotif_tags
7218 * here and will be handled by ahci_probe_pmult().
7219 *
7220 * NOTE: called only from ahci_port_intr().
7221 */
7222 static int
7225 {
7226 sata_device_t sdevice;
7231 /* no hot-plug while attaching process */
7236 }
7243 }
7252 AHCI_SNOTIF_CLEAR_ALL);
7257 }
7259 /* Port Multiplier sub-device hot-plug handler */
7263 }
7266 /* Not allowed to re-enter. */
7269 }
7273 /*
7274 * NOTE:
7275 * Even if Asynchronous Notification is supported (and enabled) by
7276 * both controller and the port multiplier, the content of PxSNTF
7277 * register is always set to 0x8000 by async notification event. We
7278 * need to check GSCR[32] on the port multiplier to find out the
7279 * owner of this event.
7280 * This is not accord with SATA spec 2.6 and needs further
7281 * clarification.
7282 */
7283 /* hot-plug will not reported while reseting. */
7290 }
7296 /*
7297 * Now we need do some necessary operation and inform SATA framework
7298 * that link/device events has happened.
7299 */
7307 /* Just reject packets, do not stop that port. */
7314 SATA_EVNT_PMULT_LINK_CHANGED);
7321 }
7323 /*
7324 * 1=Change in Current Connect Status. 0=No change in Current Connect Status.
7325 * This bit reflects the state of PxSERR.DIAG.X. This bit is only cleared
7326 * when PxSERR.DIAG.X is cleared. When PxSERR.DIAG.X is set to one, it
7327 * indicates a COMINIT signal was received.
7328 *
7329 * Hot plug insertion is detected by reception of a COMINIT signal from the
7330 * device. On reception of unsolicited COMINIT, the HBA shall generate a
7331 * COMRESET. If the COMINIT is in responce to a COMRESET, then the HBA shall
7332 * begin the normal communication negotiation sequence as outlined in the
7333 * Serial ATA 1.0a specification. When a COMRESET is sent to the device the
7334 * PxSSTS.DET field shall be cleared to 0h. When a COMINIT is received, the
7335 * PxSSTS.DET field shall be set to 1h. When the communication negotiation
7336 * sequence is complete and PhyRdy is true the PxSSTS.DET field shall be set
7337 * to 3h. Therefore, at the moment the ahci driver is going to check PhyRdy
7338 * to handle hot plug insertion. In this interrupt handler, just do nothing
7339 * but print some log message and clear the bit.
7340 */
7341 static int
7344 {
7345 #if AHCI_DEBUG
7347 #endif
7351 #if AHCI_DEBUG
7356 "ahci_intr_port_connect_change: port %d, "
7358 #endif
7360 /* Clear PxSERR.DIAG.X to clear the interrupt bit */
7363 SERROR_EXCHANGED_ERR);
7368 }
7370 /*
7371 * Hot Plug Operation for platforms that support Mechanical Presence
7372 * Switches.
7373 *
7374 * When set, it indicates that a mechanical presence switch attached to this
7375 * port has been opened or closed, which may lead to a change in the connection
7376 * state of the device. This bit is only valid if both CAP.SMPS and PxCMD.MPSP
7377 * are set to '1'.
7378 *
7379 * At the moment, this interrupt is not needed and disabled and we just log
7380 * the debug message.
7381 */
7382 static int
7385 {
7389 "ahci_intr_device_mechanical_presence_status enter, "
7402 "CAP.SMPS or PxCMD.MPSP is not set, so just ignore "
7403 "the interrupt: cap_status = 0x%x, "
7408 }
7410 #if AHCI_DEBUG
7413 "The mechanical presence switch is open: "
7418 "The mechanical presence switch is close: "
7421 }
7422 #endif
7427 }
7429 /*
7430 * Native Hot Plug Support.
7431 *
7432 * When set, it indicates that the internal PHYRDY signal changed state.
7433 * This bit reflects the state of PxSERR.DIAG.N.
7434 *
7435 * There are three kinds of conditions to generate this interrupt event:
7436 * 1. a device is inserted
7437 * 2. a device is disconnected
7438 * 3. when the link enters/exits a Partial or Slumber interface power
7439 * management state
7440 *
7441 * If inteface power management is enabled for a port, the PxSERR.DIAG.N
7442 * bit may be set due to the link entering the Partial or Slumber power
7443 * management state, rather than due to a hot plug insertion or removal
7444 * event. So far, the interface power management is disabled, so the
7445 * driver can reliably get removal detection notification via the
7446 * PxSERR.DIAG.N bit.
7447 */
7448 static int
7451 {
7453 sata_device_t sdevice;
7456 ahci_addr_t port_addr;
7461 /* Clear PxSERR.DIAG.N to clear the interrupt bit */
7465 SERROR_PHY_RDY_CHG);
7471 /* The whole controller setup is not yet done. */
7474 }
7479 /* SStatus tells the presence of device. */
7485 }
7489 }
7494 "ahci_intr_phyrdy_change: port %d "
7498 }
7512 /* Things are fine now. The loss was temporary. */
7514 "ahci_intr_phyrdy_change port %d "
7526 "ahci_intr_phyrdy_change: port %d "
7529 /*
7530 * A new device has been detected. The new device
7531 * might be a port multiplier instead of a drive, so
7532 * we cannot update the signature directly.
7533 */
7537 /* Try to start the port */
7542 "ahci_intr_phyrdy_change: port %d failed "
7544 }
7546 /* Clear the max queue depth for inserted device */
7553 SATA_EVNT_LINK_ESTABLISHED);
7556 }
7561 "ahci_intr_phyrdy_change: port %d "
7569 SATA_DTYPE_PMULT) {
7571 }
7573 /* An existing device is lost. */
7581 SATA_EVNT_LINK_LOST);
7583 }
7584 }
7590 }
7592 /*
7593 * PxIS.UFS - Unknown FIS Error
7594 *
7595 * This interrupt event means an unknown FIS was received and has been
7596 * copied into system memory. An unknown FIS is not considered an illegal
7597 * FIS, unless the length received is more than 64 bytes. If an unknown
7598 * FIS arrives with length <= 64 bytes, it is posted and the HBA continues
7599 * normal operation. If the unknown FIS is more than 64 bytes, then it
7600 * won't be posted to memory and PxSERR.ERR.P will be set, which is then
7601 * a fatal error.
7602 *
7603 * PxIS.IPMS - Incorrect Port Multiplier Status
7604 *
7605 * IPMS Indicates that the HBA received a FIS from a device that did not
7606 * have a command outstanding. The IPMS bit may be set during enumeration
7607 * of devices on a Port Multiplier due to the normal Port Multiplier
7608 * enumeration process. It is recommended that IPMS only be used after
7609 * enumeration is complete on the Port Multiplier (copied from spec).
7610 *
7611 * PxIS.OFS - Overflow Error
7612 *
7613 * Command list overflow is defined as software building a command table
7614 * that has fewer total bytes than the transaction given to the device.
7615 * On device writes, the HBA will run out of data, and on reads, there
7616 * will be no room to put the data.
7617 *
7618 * For an overflow on data read, either PIO or DMA, the HBA will set
7619 * PxIS.OFS, and the HBA will do a best effort to continue, and it's a
7620 * non-fatal error when the HBA can continues. Sometimes, it will cause
7621 * a fatal error and need the software to do something.
7622 *
7623 * For an overflow on data write, setting PxIS.OFS is optional for both
7624 * DMA and PIO, and it's a fatal error, and a COMRESET is required by
7625 * software to clean up from this serious error.
7626 *
7627 * PxIS.INFS - Interface Non-Fatal Error
7628 *
7629 * This interrupt event indicates that the HBA encountered an error on
7630 * the Serial ATA interface but was able to continue operation. The kind
7631 * of error usually occurred during a non-Data FIS, and under this condition
7632 * the FIS will be re-transmitted by HBA automatically.
7633 *
7634 * When the FMA is implemented, there should be a stat structure to
7635 * record how many every kind of error happens.
7636 */
7637 static int
7640 {
7642 #if AHCI_DEBUG
7651 #endif
7659 "ahci_intr_non_fatal_error: port %d, "
7668 /* Clear the interrupt bit by clearing PxSERR.DIAG.F */
7671 SERROR_FIS_TYPE);
7672 }
7674 #if AHCI_DEBUG
7678 }
7683 }
7688 }
7690 /*
7691 * Record the error occurred command's slot.
7692 */
7699 AHCI_CMD_STATUS_CCS_SHIFT;
7707 }
7711 "ahci_intr_non_fatal_error: pending_tags = 0x%x "
7716 "ahci_intr_non_fatal_error: port %d, "
7720 /*
7721 * PRD Byte Count field of command header is not
7722 * required to reflect the total number of bytes
7723 * transferred when an overflow occurs, so here
7724 * just log the value.
7725 */
7726 cmd_dmacount =
7732 "ahci_intr_non_fatal_error: port %d, "
7733 "PRD Byte Count = 0x%x, "
7736 cmd_dmacount);
7737 }
7738 }
7740 /*
7741 * For queued command, list those command which have already
7742 * been transmitted to the device and still not completed.
7743 */
7751 "ahci_intr_non_fatal_error: pending_ncq_tags = 0x%x "
7764 }
7769 "port %d, satapkt 0x%p is outstanding when "
7773 }
7774 }
7775 out:
7776 #endif
7780 }
7782 /*
7783 * According to the AHCI spec, the error types include system memory
7784 * errors, interface errors, port multiplier errors, device errors,
7785 * command list overflow, command list underflow, native command
7786 * queuing tag errors and pio data transfer errors.
7787 *
7788 * System memory errors such as target abort, master abort, and parity
7789 * may cause the host to stop, and they are serious errors and needed
7790 * to be recovered with software intervention. When system software
7791 * has given a pointer to the HBA that doesn't exist in physical memory,
7792 * a master/target abort error occurs, and PxIS.HBFS will be set. A
7793 * data error such as CRC or parity occurs, the HBA aborts the transfer
7794 * (if necessary) and PxIS.HBDS will be set.
7795 *
7796 * Interface errors are errors that occur due to electrical issues on
7797 * the interface, or protocol miscommunication between the device and
7798 * HBA, and the respective PxSERR register bit will be set. And PxIS.IFS
7799 * (fatal) or PxIS.INFS (non-fatal) will be set. The conditions that
7800 * causes PxIS.IFS/PxIS.INFS to be set are
7801 * 1. in PxSERR.ERR, P bit is set to '1'
7802 * 2. in PxSERR.DIAG, C or H bit is set to '1'
7803 * 3. PhyRdy drop unexpectly, N bit is set to '1'
7804 * If the error occurred during a non-data FIS, the FIS must be
7805 * retransmitted, and the error is non-fatal and PxIS.INFS is set. If
7806 * the error occurred during a data FIS, the transfer will stop, so
7807 * the error is fatal and PxIS.IFS is set.
7808 *
7809 * When a FIS arrives that updates the taskfile, the HBA checks to see
7810 * if PxTFD.STS.ERR is set. If yes, PxIS.TFES will be set and the HBA
7811 * stops processing any more commands.
7812 *
7813 * Command list overflow is defined as software building a command table
7814 * that has fewer total bytes than the transaction given to the device.
7815 * On device writes, the HBA will run out of data, and on reads, there
7816 * will be no room to put the data. For an overflow on data read, either
7817 * PIO or DMA, the HBA will set PxIS.OFS, and it's a non-fatal error.
7818 * For an overflow on data write, setting PxIS.OFS is optional for both
7819 * DMA and PIO, and a COMRESET is required by software to clean up from
7820 * this serious error.
7821 *
7822 * Command list underflow is defined as software building a command
7823 * table that has more total bytes than the transaction given to the
7824 * device. For data writes, both PIO and DMA, the device will detect
7825 * an error and end the transfer. And these errors are most likely going
7826 * to be fatal errors that will cause the port to be restarted. For
7827 * data reads, the HBA updates its PRD byte count, and may be
7828 * able to continue normally, but is not required to. And The HBA is
7829 * not required to detect underflow conditions for native command
7830 * queuing command.
7831 *
7832 * The HBA does not actively check incoming DMA Setup FISes to ensure
7833 * that the PxSACT register bit for that slot is set. Existing error
7834 * mechanisms, such as host bus failure, or bad protocol, are used to
7835 * recover from this case.
7836 *
7837 * In accordance with Serial ATA 1.0a, DATA FISes prior to the final
7838 * DATA FIS must be an integral number of Dwords. If the HBA receives
7839 * a request which is not an integral number of Dwords, the HBA
7840 * set PxSERR.ERR.P to '1', set PxIS.IFS to '1' and stop running until
7841 * software restarts the port. And the HBA ensures that the size
7842 * of the DATA FIS received during a PIO command matches the size in
7843 * the Transfer Cound field of the preceding PIO Setup FIS, if not, the
7844 * HBA sets PxSERR.ERR.P to '1', set PxIS.IFS to '1', and then
7845 * stop running until software restarts the port.
7846 */
7847 /*
7848 * the fatal errors include PxIS.IFS, PxIS.HBDS, PxIS.HBFS and PxIS.TFES.
7849 *
7850 * PxIS.IFS indicates that the hba encountered an error on the serial ata
7851 * interface which caused the transfer to stop.
7852 *
7853 * PxIS.HBDS indicates that the hba encountered a data error
7854 * (uncorrectable ecc/parity) when reading from or writing to system memory.
7855 *
7856 * PxIS.HBFS indicates that the hba encountered a host bus error that it
7857 * cannot recover from, such as a bad software pointer.
7858 *
7859 * PxIS.TFES is set whenever the status register is updated by the device
7860 * and the error bit (bit 0) is set.
7861 */
7862 static int
7865 {
7880 /*
7881 * ahci_intr_phyrdy_change() may have rendered it to
7882 * SATA_DTYPE_NONE.
7883 */
7886 "ahci_intr_fatal_error: port %d no device attached, "
7889 }
7895 "ahci_intr_fatal_error: port %d "
7903 }
7905 /*
7906 * Here we just log the fatal error info in interrupt context.
7907 * Misc recovery processing will be handled in task queue.
7908 */
7911 /*
7912 * Read PxCMD.CCS to determine the slot that the HBA
7913 * was processing when the error occurred.
7914 */
7919 AHCI_CMD_STATUS_CCS_SHIFT;
7924 "ahci_intr_fatal_error: spkt 0x%p is being "
7928 /*
7929 * Won't emit the error message if it is an IDENTIFY
7930 * DEVICE command sent to an ATAPI device.
7931 */
7934 SATAC_ID_DEVICE) &&
7938 /*
7939 * Won't emit the error message if it is an ATAPI PACKET
7940 * command
7941 */
7952 }
7953 }
7955 /* print the fatal error type */
7962 /* print PxSERR related error message */
7965 /* print task file register value */
7973 }
7974 }
7976 out1:
7977 /* Prepare the argument for the taskq */
7984 /* Start the taskq to handle error recovery */
7986 ahci_events_handler,
7991 }
7992 out0:
7996 }
7998 /*
7999 * Hot Plug Operation for platforms that support Cold Presence Detect.
8000 *
8001 * When set, a device status has changed as detected by the cold presence
8002 * detect logic. This bit can either be set due to a non-connected port
8003 * receiving a device, or a connected port having its device removed.
8004 * This bit is only valid if the port supports cold presence detect as
8005 * indicated by PxCMD.CPD set to '1'.
8006 *
8007 * At the moment, this interrupt is not needed and disabled and we just
8008 * log the debug message.
8009 */
8010 static int
8013 {
8015 sata_device_t sdevice;
8026 "port %d does not support cold presence detect, so "
8030 }
8048 SATA_EVNT_DEVICE_ATTACHED);
8058 SATA_EVNT_DEVICE_DETACHED);
8060 }
8065 }
8067 /*
8068 * Enable the interrupts for a particular port.
8069 */
8070 static void
8072 {
8078 /*
8079 * Clear port interrupt status before enabling interrupt
8080 */
8083 AHCI_PORT_INTR_MASK);
8085 /*
8086 * Clear the pending bit from IS.IPS
8087 */
8091 /*
8092 * Enable the following interrupts:
8093 * Device to Host Register FIS Interrupt (DHRS)
8094 * PIO Setup FIS Interrupt (PSS)
8095 * Set Device Bits Interrupt (SDBS)
8096 * Unknown FIS Interrupt (UFS)
8097 * Port Connect Change Status (PCS)
8098 * PhyRdy Change Status (PRCS)
8099 * Overflow Status (OFS)
8100 * Interface Non-fatal Error Status (INFS)
8101 * Interface Fatal Error Status (IFS)
8102 * Host Bus Data Error Status (HBDS)
8103 * Host Bus Fatal Error Status (HBFS)
8104 * Task File Error Status (TFES)
8105 */
8109 AHCI_INTR_STATUS_PSS |
8110 AHCI_INTR_STATUS_SDBS |
8111 AHCI_INTR_STATUS_UFS |
8112 AHCI_INTR_STATUS_DPS |
8113 AHCI_INTR_STATUS_PCS |
8114 AHCI_INTR_STATUS_PRCS |
8115 AHCI_INTR_STATUS_OFS |
8116 AHCI_INTR_STATUS_INFS |
8117 AHCI_INTR_STATUS_IFS |
8118 AHCI_INTR_STATUS_HBDS |
8119 AHCI_INTR_STATUS_HBFS |
8120 AHCI_INTR_STATUS_TFES));
8121 }
8123 /*
8124 * Enable interrupts for all the ports.
8125 */
8126 static void
8128 {
8142 }
8144 /*
8145 * Disable interrupts for a particular port.
8146 */
8147 static void
8149 {
8158 }
8160 /*
8161 * Disable interrupts for the whole HBA.
8162 *
8163 * The global bit is cleared, then all interrupt sources from all
8164 * ports are disabled.
8165 */
8166 static void
8168 {
8175 NULL);
8184 }
8186 /*
8187 * Handle FIXED or MSI interrupts.
8188 */
8189 /*
8190 * According to AHCI spec, the HBA may support several interrupt modes:
8191 * * pin based interrupts (FIXED)
8192 * * single MSI message interrupts
8193 * * multiple MSI based message interrupts
8194 *
8195 * For pin based interrupts, the software interrupt handler need to check IS
8196 * register to find out which port has pending interrupts. And then check
8197 * PxIS register to find out which interrupt events happened on that port.
8198 *
8199 * For single MSI message interrupts, MSICAP.MC.MSIE is set with '1', and
8200 * MSICAP.MC.MME is set with '0'. This mode is similar to pin based interrupts
8201 * in that software interrupt handler need to check IS register to determine
8202 * which port triggered the interrupts since it uses a single message for all
8203 * port interrupts.
8204 *
8205 * HBA may optionally support multiple MSI message for better performance. In
8206 * this mode, each port may have its own interrupt message, and thus generation
8207 * of interrupts is no longer controlled through the IS register. MSICAP.MC.MMC
8208 * represents a power-of-2 wrapper on the number of implemented ports, and
8209 * the mapping of ports to interrupts is done in a 1-1 relationship, up to the
8210 * maximum number of assigned interrupts. When the number of MSI messages
8211 * allocated is less than the number requested, then hardware may have two
8212 * implementation behaviors:
8213 * * assign each ports its own interrupt and then force all additional
8214 * ports to share the last interrupt message, and this condition is
8215 * indicated by clearing GHC.MRSM to '0'
8216 * * revert to single MSI mode, indicated by setting GHC.MRSM to '1'
8217 * When multiple-message MSI is enabled, hardware will still set IS register
8218 * as single message case. And this IS register may be used by software when
8219 * fewer than the requested number of messages is granted in order to determine
8220 * which port had the interrupt.
8221 *
8222 * Note: The current ahci driver only supports the first two interrupt modes:
8223 * pin based interrupts and single MSI message interrupts, and the reason
8224 * is indicated in below code.
8225 */
8226 static int
8228 {
8236 /* get number of interrupts. */
8240 "ddi_intr_get_nintrs() failed, "
8243 }
8245 /* get number of available interrupts. */
8249 "ddi_intr_get_navail() failed, "
8252 }
8254 #if AHCI_DEBUG
8259 }
8260 #endif
8262 /*
8263 * Note: So far Solaris restricts the maximum number of messages for
8264 * x86 to 2, that is avail is 2, so here we set the count with 1 to
8265 * force the driver to use single MSI message interrupt. In future if
8266 * Solaris remove the restriction, then we need to delete the below
8267 * code and try to use multiple interrupt routine to gain better
8268 * performance.
8269 */
8272 "force to use one interrupt routine though the "
8275 }
8277 /* Allocate an array of interrupt handles. */
8282 /* call ddi_intr_alloc(). */
8288 "ddi_intr_alloc() failed, rc %d count %d actual %d "
8293 }
8295 /* use interrupt count returned */
8296 #if AHCI_DEBUG
8300 }
8301 #endif
8305 /*
8306 * Get priority for first, assume remaining are all the same.
8307 */
8313 /* Free already allocated intr. */
8316 }
8321 }
8323 /* Test for high level interrupt. */
8328 /* Free already allocated intr. */
8331 }
8337 }
8339 /* Call ddi_intr_add_handler(). */
8346 /* Free already allocated intr. */
8350 }
8355 }
8356 }
8363 /* Free already allocated intr. */
8367 }
8372 }
8375 /* Call ddi_intr_block_enable() for MSI. */
8379 /* Call ddi_intr_enable() for FIXED or MSI non block enable. */
8383 }
8384 }
8387 }
8389 /*
8390 * Removes the registered interrupts irrespective of whether they
8391 * were legacy or MSI.
8392 *
8393 * NOTE: The controller interrupts must be disabled before calling
8394 * this routine.
8395 */
8396 static void
8398 {
8403 /* Disable all interrupts. */
8406 /* Call ddi_intr_block_disable(). */
8413 }
8414 }
8416 /* Call ddi_intr_remove_handler(). */
8421 }
8424 }
8426 /*
8427 * This routine tries to put port into P:NotRunning state by clearing
8428 * PxCMD.ST. HBA will clear PxCI to 0h, PxSACT to 0h, PxCMD.CCS to 0h
8429 * and PxCMD.CR to '0'.
8430 */
8431 static int
8434 {
8451 /* Wait until PxCMD.CR is cleared */
8454 port_cmd_status =
8460 "clearing port %d CMD.CR timeout, "
8462 port_cmd_status);
8463 /*
8464 * We are effectively timing out after 0.5 sec.
8465 * This value is specified in AHCI spec.
8466 */
8468 }
8470 /* Wait for 10 millisec */
8478 "ahci_put_port_into_notrunning_state: failed to clear "
8479 "PxCMD.CR to '0' after loop count: %d, and "
8484 "ahci_put_port_into_notrunning_state: succeeded to clear "
8485 "PxCMD.CR to '0' after loop count: %d, and "
8488 }
8489 }
8491 /*
8492 * First clear PxCMD.ST, and then check PxTFD. If both PxTFD.STS.BSY
8493 * and PxTFD.STS.DRQ cleared to '0', it means the device is in a
8494 * stable state, then set PxCMD.ST to '1' to start the port directly.
8495 * If PxTFD.STS.BSY or PxTFD.STS.DRQ is set to '1', then issue a
8496 * COMRESET to the device to put it in an idle state.
8497 *
8498 * The fifth argument returns whether the port reset is involved during
8499 * the process.
8500 *
8501 * The routine will be called under following scenarios:
8502 * + To reset the HBA
8503 * + To abort the packet(s)
8504 * + To reset the port
8505 * + To activate the port
8506 * + Fatal error recovery
8507 * + To abort the timeout packet(s)
8508 *
8509 * NOTES!!! During this procedure, PxSERR register will be cleared, and
8510 * according to the spec, the clearance of three bits will also clear
8511 * three interrupt status bits.
8512 * 1. PxSERR.DIAG.F will clear PxIS.UFS
8513 * 2. PxSERR.DIAG.X will clear PxIS.PCS
8514 * 3. PxSERR.DIAG.N will clear PxIS.PRCS
8515 *
8516 * Among these three interrupt events, the driver needs to take care of
8517 * PxIS.PRCS, which is the hot plug event. When the driver found out
8518 * a device was unplugged, it will call the interrupt handler.
8519 */
8520 static int
8523 {
8526 sata_device_t sdevice;
8528 ahci_addr_t addr_port;
8546 /* First clear PxCMD.ST */
8548 port);
8550 /*
8551 * If PxCMD.CR does not clear within a reasonable time, it
8552 * may assume the interface is in a hung condition and may
8553 * continue with issuing the port reset.
8554 */
8557 /* Then clear PxSERR */
8560 AHCI_SERROR_CLEAR_ALL);
8562 /* Then get PxTFD */
8566 /*
8567 * Check whether the device is in a stable status, if yes,
8568 * then start the port directly. However for ahci_tran_reset_dport,
8569 * we may have to perform a port reset.
8570 */
8575 reset:
8576 /*
8577 * If PxTFD.STS.BSY or PxTFD.STS.DRQ is set to '1', then issue
8578 * a COMRESET to the device
8579 */
8584 #ifdef AHCI_DEBUG
8588 port);
8589 #endif
8594 /* Indicate to the framework that a reset has happened. */
8598 /* Set the reset in progress flag */
8608 SATA_DSTATE_PWR_ACTIVE;
8614 SATA_EVNT_DEVICE_RESET);
8616 }
8622 }
8624 out:
8627 /* SStatus tells the presence of device. */
8633 }
8638 /* Check whether a hot plug event happened */
8641 "ahci_restart_port_wait_till_ready: port %d "
8645 "ahci_restart_port_wait_till_ready: port %d "
8652 }
8655 /* 0/1 -> 1 : device may change */
8656 /*
8657 * May be called by ahci_fatal_error_recovery_handler, so
8658 * don't issue software if the previous device is ATAPI.
8659 */
8663 /*
8664 * The COMRESET will make port multiplier enter legacy mode.
8665 * Issue a software reset to make it work again.
8666 */
8671 /*
8672 * Following codes are specific for the port multiplier
8673 */
8676 /* in case previous_dev_type is corrupt */
8680 }
8682 /* Device change: PMult -> Non-PMult */
8685 /*
8686 * This might happen because
8687 * 1. Software reset failed. Port multiplier is not correctly
8688 * enumerated.
8689 * 2. Another non-port-multiplier device is attached. Perhaps
8690 * the port multiplier was replaced by another device by
8691 * whatever reason, but AHCI driver missed hot-plug event.
8692 *
8693 * Now that the port has been initialized, we just need to
8694 * update the port structure according new device, then report
8695 * and wait SATA framework to probe new device.
8696 */
8698 /* Force to release pmult resource */
8709 SATA_DSTATE_PWR_ACTIVE;
8715 SATA_EVNT_DEVICE_RESET);
8724 }
8726 /* Device change: Non-PMult -> PMult */
8729 /* NOTE: The PxCMD.PMA may be cleared by HBA reset. */
8733 }
8737 /* Device (may) change: PMult -> PMult */
8738 /*
8739 * First initialize port multiplier. Set state to READY and wait for
8740 * probe entry point to initialize it
8741 */
8744 /*
8745 * It's a little complicated while target is a port multiplier. we
8746 * need to COMRESET all pmports behind that PMult otherwise those
8747 * sub-links between the PMult and the sub-devices will be in an
8748 * inactive state (indicated by PSCR0/PxSSTS) and the following access
8749 * to those sub-devices will be rejected by Link-Fatal-Error.
8750 */
8751 /*
8752 * The PxSNTF will be set soon after the pmult is plugged. While the
8753 * pmult itself is attaching, sata_hba_event_notfiy will fail. so we
8754 * simply mark every sub-port as 'unknown', then ahci_probe_pmport
8755 * will initialized it.
8756 */
8760 /* Report reset event. */
8769 SATA_EVNT_DEVICE_RESET);
8772 }
8774 /*
8775 * This routine may be called under four scenarios:
8776 * a) do the recovery from fatal error
8777 * b) or we need to timeout some commands
8778 * c) or we need to abort some commands
8779 * d) or we need reset device/port/controller
8780 *
8781 * In all these scenarios, we need to send any pending unfinished
8782 * commands up to sata framework.
8783 */
8784 static void
8792 {
8808 "ahci_mop_commands: failed_tags: 0x%x, "
8809 "timeout_tags: 0x%x aborted_tags: 0x%x, "
8813 #ifdef AHCI_DEBUG
8820 else
8822 }
8829 }
8830 #endif
8855 /*
8856 * When AHCI_PORT_FLAG_RQSENSE or AHCI_PORT_FLAG_RDLOGEXT is
8857 * set, it means REQUEST SENSE or READ LOG EXT command doesn't
8858 * complete successfully due to one of the following three
8859 * conditions:
8860 *
8861 * 1. Fatal error - failed_tags includes its slot
8862 * 2. Timed out - timeout_tags includes its slot
8863 * 3. Aborted when hot unplug - aborted_tags includes its
8864 * slot
8865 *
8866 * Please note that the command is always sent down in Slot 0
8867 */
8870 "ahci_mop_commands is called for port %d while "
8871 "REQUEST SENSE or READ LOG EXT for error retrieval "
8879 "ahci_mop_commands is called for port %d while "
8884 }
8886 #ifdef AHCI_DEBUG
8888 "ahci_mop_commands: finished_tags: 0x%x, "
8890 #endif
8892 /* Send up finished packets with SATA_PKT_COMPLETED */
8897 }
8906 /*
8907 * Cannot fetch the return register content since the port
8908 * was restarted, so the corresponding tag will be set to
8909 * aborted tags.
8910 */
8915 }
8919 tmp_slot);
8925 }
8927 /* Send up failed packets with SATA_PKT_DEV_ERROR. */
8939 }
8944 "ahci_mop_commands: sending up "
8949 }
8954 }
8965 tmp_slot);
8971 }
8973 /* Send up timeout packets with SATA_PKT_TIMEOUT. */
8985 }
8990 "ahci_mop_commands: sending up "
8995 }
9000 }
9011 tmp_slot);
9017 }
9019 /* Send up aborted packets with SATA_PKT_ABORTED */
9031 }
9037 "ahci_mop_commands: sending up "
9042 }
9047 }
9058 tmp_slot);
9064 }
9066 /* Send up reset packets with SATA_PKT_RESET. */
9073 "ahci_mop_commands: sending up "
9078 }
9083 }
9094 tmp_slot);
9100 }
9102 /* Send up unfinished packets with SATA_PKT_RESET */
9107 }
9118 tmp_slot);
9124 }
9133 }
9135 /*
9136 * This routine is going to first request a READ LOG EXT sata pkt from sata
9137 * module, and then deliver it to the HBA to get the ncq failure context.
9138 * The return value is the exactly failed tags.
9139 */
9140 static uint32_t
9143 {
9144 sata_device_t sdevice;
9146 ddi_dma_handle_t buf_dma_handle;
9147 ahci_addr_t addr;
9157 /* Prepare the sdevice data */
9164 /* Translate sata_device.satadev_addr -> ahci_addr */
9167 /*
9168 * Call the sata hba interface to get a rdlog spkt
9169 */
9171 loop:
9176 /* Sleep for a while */
9179 }
9180 /* Timed out after 1s */
9184 }
9188 /*
9189 * This flag is used to handle the specific error recovery when the
9190 * READ LOG EXT command gets a failure (fatal error or time-out).
9191 */
9194 /*
9195 * This start is not supposed to fail because after port is restarted,
9196 * the whole command list is empty.
9197 */
9202 /* Remove the flag after READ LOG EXT command is completed */
9206 /* Update the request log data */
9210 DDI_DMA_SYNC_FORKERNEL);
9212 ncq_err_page =
9216 /* Get the failed tag */
9219 "ahci_get_rdlogext_data: port %d "
9225 }
9236 }
9240 /* Fill out the error context */
9242 ncq_err_page);
9245 }
9246 }
9247 out:
9251 }
9253 /*
9254 * This routine is going to first request a REQUEST SENSE sata pkt from sata
9255 * module, and then deliver it to the HBA to get the sense data and copy
9256 * the sense data back to the orignal failed sata pkt, and free the REQUEST
9257 * SENSE sata pkt later.
9258 */
9259 static void
9262 {
9263 sata_device_t sdevice;
9266 ddi_dma_handle_t buf_dma_handle;
9267 ahci_addr_t addr;
9269 #if AHCI_DEBUG
9271 #endif
9276 /* Prepare the sdevice data */
9283 /* Translate sata_device.satadev_addr -> ahci_addr */
9288 /*
9289 * Call the sata hba interface to get a rs spkt
9290 */
9292 loop:
9297 /* Sleep for a while */
9301 }
9302 /* Timed out after 1s */
9306 }
9310 /*
9311 * This flag is used to handle the specific error recovery when the
9312 * REQUEST SENSE command gets a faiure (fatal error or time-out).
9313 */
9316 /*
9317 * This start is not supposed to fail because after port is restarted,
9318 * the whole command list is empty.
9319 */
9324 /* Remove the flag after REQUEST SENSE command is completed */
9328 /* Update the request sense data */
9332 DDI_DMA_SYNC_FORKERNEL);
9333 /* Copy the request sense data */
9337 SATA_ATAPI_MIN_RQSENSE_LEN);
9338 #if AHCI_DEBUG
9342 /* Dump the sense data */
9348 " es_code 0x%x es_class 0x%x "
9349 "es_key 0x%x es_add_code 0x%x "
9354 #endif
9355 }
9358 }
9360 /*
9361 * Fatal errors will cause the HBA to enter the ERR: Fatal state. To recover,
9362 * the port must be restarted. When the HBA detects thus error, it may try
9363 * to abort a transfer. And if the transfer was aborted, the device is
9364 * expected to send a D2H Register FIS with PxTFD.STS.ERR set to '1' and both
9365 * PxTFD.STS.BSY and PxTFD.STS.DRQ cleared to '0'. Then system software knows
9366 * that the device is in a stable status and transfers may be restarted without
9367 * issuing a COMRESET to the device. If PxTFD.STS.BSY or PxTFD.STS.DRQ is set,
9368 * then the software will send the COMRESET to do the port reset.
9369 *
9370 * Software should perform the appropriate error recovery actions based on
9371 * whether non-queued commands were being issued or natived command queuing
9372 * commands were being issued.
9373 *
9374 * And software will complete the command that had the error with error mark
9375 * to higher level software.
9376 *
9377 * Fatal errors include the following:
9378 * PxIS.IFS - Interface Fatal Error Status
9379 * PxIS.HBDS - Host Bus Data Error Status
9380 * PxIS.HBFS - Host Bus Fatal Error Status
9381 * PxIS.TFES - Task File Error Status
9382 */
9383 static void
9386 {
9395 #if AHCI_DEBUG
9397 #endif
9407 /* Port multiplier error */
9409 /* FBS code is neither completed nor tested. */
9413 /* Force a port reset */
9415 }
9420 /* Read PxCI to see which commands are still outstanding */
9424 /*
9425 * Read PxCMD.CCS to determine the slot that the HBA
9426 * was processing when the error occurred.
9427 */
9431 AHCI_CMD_STATUS_CCS_SHIFT;
9439 /* May happen when interface errors occur? */
9441 }
9442 }
9444 #if AHCI_DEBUG
9445 /*
9446 * Debugging purpose...
9447 */
9449 cmd_header =
9452 "ahci_fatal_error_recovery_handler: port %d, "
9453 "PRD Byte Count = 0x%x, "
9457 }
9458 #endif
9462 /* Fill out the status and error registers for PxIS.TFES */
9465 ahcirf_d2h_register_fis);
9467 /* Copy the error context back to the sata_cmd */
9469 }
9471 /* The failed command must be one of the outstanding commands */
9475 /* Update the sata registers, especially PxSERR register */
9480 /* Read PxSACT to see which commands are still outstanding */
9483 }
9484 next:
9486 #if AHCI_DEBUG
9487 /*
9488 * When AHCI_PORT_FLAG_RQSENSE or AHCI_PORT_FLAG_RDLOGEXT flag is
9489 * set, it means a fatal error happened after REQUEST SENSE command
9490 * or READ LOG EXT command is delivered to the HBA during the error
9491 * recovery process. At this time, the only outstanding command is
9492 * supposed to be REQUEST SENSE command or READ LOG EXT command.
9493 */
9496 "ahci_fatal_error_recovery_handler: port %d REQUEST SENSE "
9497 "command or READ LOG EXT command for error data retrieval "
9502 SCMD_REQUEST_SENSE ||
9504 SATAC_READ_LOG_EXT);
9505 }
9506 #endif
9519 else
9522 }
9524 /*
9525 * Won't retrieve error information:
9526 * 1. Port reset was involved to recover
9527 * 2. Device is gone
9528 * 3. IDENTIFY DEVICE command sent to ATAPI device
9529 * 4. REQUEST SENSE or READ LOG EXT command during error recovery
9530 */
9537 /*
9538 * Deliver READ LOG EXT to gather information about the error when
9539 * a COMRESET has not been performed as part of the error recovery
9540 * during NCQ command processing.
9541 */
9546 }
9548 /*
9549 * Deliver REQUEST SENSE for ATAPI command to gather information about
9550 * the error when a COMRESET has not been performed as part of the
9551 * error recovery.
9552 */
9555 out:
9557 "ahci_fatal_error_recovery_handler: port %d fatal error "
9558 "occurred slot_status = 0x%x, pending_tags = 0x%x, "
9564 ahci_portp,
9565 slot_status,
9570 }
9572 /*
9573 * Used to recovery a PMULT pmport fatal error under FIS-based switching.
9574 * 1. device specific.PxFBS.SDE=1
9575 * 2. Non Device specific.
9576 * Nothing will be done when Command-based switching is employed.
9577 *
9578 * Currently code is neither completed nor tested.
9579 */
9580 static void
9583 {
9584 #ifndef __lock_lint
9586 #endif
9589 ahci_addr_t addr;
9593 /* Nothing will be done under Command-based switching. */
9601 /* FBS is not enabled. */
9604 /* Problem's getting complicated now. */
9605 /*
9606 * If FIS-based switching is used, we need to check
9607 * the PxFBS to see the error type.
9608 */
9612 /* Refer to spec(v1.2) 9.3.6.1 */
9616 /*
9617 * Controller has paused commands for all other
9618 * sub-devices until PxFBS.DEC is set.
9619 */
9627 /*
9628 * Wait controller clear PxFBS.DEC,
9629 * then we can continue.
9630 */
9638 /*
9639 * Esclate the error. Follow
9640 * non-device specific error
9641 * procedure.
9642 */
9648 /*
9649 * Issue a software reset to ensure drive is in
9650 * a known state.
9651 */
9657 /* Process Non-Device Specific Error. */
9658 /* This will be handled later on. */
9660 }
9661 }
9662 /*
9663 * Handle events - fatal error recovery
9664 */
9665 static void
9667 {
9689 /*
9690 * ahci_intr_phyrdy_change() may have rendered it to
9691 * SATA_DTYPE_NONE.
9692 */
9695 "ahci_events_handler: port %d no device attached, "
9703 }
9706 }
9709 AHCI_INTR_STATUS_HBDS |
9710 AHCI_INTR_STATUS_HBFS |
9711 AHCI_INTR_STATUS_TFES))
9715 out:
9717 }
9719 /*
9720 * ahci_watchdog_handler() and ahci_do_sync_start will call us if they
9721 * detect there are some commands which are timed out.
9722 */
9723 static void
9726 {
9739 /* Read PxCI to see which commands are still outstanding */
9743 /* Read PxSACT to see which commands are still outstanding */
9746 }
9748 #if AHCI_DEBUG
9749 /*
9750 * When AHCI_PORT_FLAG_RQSENSE or AHCI_PORT_FLAG_RDLOGEXT flag is
9751 * set, it means a fatal error happened after REQUEST SENSE command
9752 * or READ LOG EXT command is delivered to the HBA during the error
9753 * recovery process. At this time, the only outstanding command is
9754 * supposed to be REQUEST SENSE command or READ LOG EXT command.
9755 */
9758 "ahci_timeout_pkts called while REQUEST SENSE "
9759 "command or READ LOG EXT command for error recovery "
9760 "timed out timeout_tags = 0x%x, slot_status = 0x%x, "
9768 "ahci_timeout_pkts called while executing R/W PMULT "
9772 }
9773 #endif
9781 /*
9782 * Re-identify timeout tags because some previously checked commands
9783 * could already complete.
9784 */
9791 "ahci_timeout_pkts: port %d, finished_tags = 0x%x, "
9792 "timeout_tags = 0x%x, port_cmd_issue = 0x%x, "
9802 "ahci_timeout_pkts: port %d, finished_tags = 0x%x, "
9803 "timeout_tags = 0x%x, port_sactive = 0x%x, "
9810 }
9813 ahci_portp,
9814 slot_status,
9821 }
9823 /*
9824 * Watchdog handler kicks in every 5 seconds to timeout any commands pending
9825 * for long time.
9826 */
9827 static void
9829 {
9850 }
9858 }
9860 /* Skip the check for those ports in error recovery */
9865 }
9876 current_slot =
9878 AHCI_CMD_STATUS_CCS_SHIFT;
9888 }
9895 }
9901 else
9906 /*
9907 * If a packet has survived for more than it's
9908 * max life cycles, it is a candidate for time
9909 * out.
9910 */
9912 ahci_watchdog_timeout;
9918 #if AHCI_DEBUG
9927 }
9928 #endif
9930 /*
9931 * We need to check whether the HBA has
9932 * begun to execute the command, if not,
9933 * then re-set the timer of the command.
9934 */
9939 ahci_portp->ahciport_slot_timeout \
9946 }
9947 }
9948 next:
9950 }
9959 }
9962 }
9964 /* Re-install the watchdog timeout handler */
9969 }
9972 }
9974 /*
9975 * Fill the error context into sata_cmd for non-queued command error.
9976 */
9977 static void
9979 {
9993 }
9994 }
9996 /*
9997 * Fill the ncq error page into sata_cmd for queued command error.
9998 */
9999 static void
10002 {
10014 }
10016 /*
10017 * Put the respective register value to sata_cmd_t for satacmd_flags.
10018 */
10019 static void
10021 {
10042 }
10044 static void
10047 {
10068 }
10070 static void
10073 {
10077 sata_cmd_t cmd;
10086 }
10093 "features_reg = 0x%x sec_count_msb = 0x%x "
10094 "lba_low_msb = 0x%x lba_mid_msb = 0x%x "
10095 "lba_high_msb = 0x%x sec_count_lsb = 0x%x "
10096 "lba_low_lsb = 0x%x lba_mid_lsb = 0x%x "
10097 "lba_high_lsb = 0x%x device_reg = 0x%x "
10106 }
10109 }
10110 }
10112 /*
10113 * Dump the serror message to the log.
10114 */
10115 static void
10118 {
10129 }
10134 }
10139 }
10144 }
10148 }
10152 }
10156 }
10160 }
10164 }
10168 }
10172 }
10176 }
10180 }
10184 }
10189 }
10193 }
10197 }
10211 /* sata trace debug */
10218 /* sata trace debug */
10220 }
10221 }
10223 /*
10224 * Translate the sata_address_t type into the ahci_addr_t type.
10225 * sata_device.satadev_addr structure is used as source.
10226 */
10227 static void
10230 {
10251 /* something went wrong */
10254 }
10255 }
10257 /*
10258 * This routine is to calculate the total number of ports implemented
10259 * by the HBA.
10260 */
10261 static int
10263 {
10269 num++;
10270 }
10273 }
10275 #if AHCI_DEBUG
10276 static void
10278 {
10290 }
10298 }
10299 #endif
10301 /*
10302 * quiesce(9E) entry point.
10303 *
10304 * This function is called when the system is single-threaded at high
10305 * PIL with preemption disabled. Therefore, this function must not be
10306 * blocked. Because no taskqs are running, there is no need for us to
10307 * take any action for enclosure services which are running in the
10308 * taskq context, especially as no interrupts are generated by it nor
10309 * are any messages expected to come in.
10310 *
10311 * This function returns DDI_SUCCESS on success, or DDI_FAILURE on failure.
10312 * DDI_FAILURE indicates an error condition and should almost never happen.
10313 */
10314 static int
10316 {
10327 #if AHCI_DEBUG
10329 #endif
10333 /* disable all the interrupts. */
10339 }
10343 /*
10344 * Stop the port by clearing PxCMD.ST
10345 *
10346 * Here we must disable the port interrupt because
10347 * ahci_disable_all_intrs only clear GHC.IE, and IS
10348 * register will be still set if PxIE is enabled.
10349 * When ahci shares one IRQ with other drivers, the
10350 * intr handler may claim the intr mistakenly.
10351 */
10355 }
10360 }
10362 /*
10363 * The function will add a sata packet to the done queue.
10364 */
10365 static void
10367 {
10371 /* set the reason for all packets */
10377 /*
10378 * only add to queue when mode is not synch and there is
10379 * completion callback
10380 */
10388 /*
10389 * for sync/non-poll mode, just call cv_broadcast
10390 */
10392 }
10394 /*
10395 * The function will call completion callback of sata packet on the
10396 * completed queue
10397 */
10398 static void
10400 {
10418 /* Call the callback */
10422 }
10425 }
10426 }
10428 /*
10429 * Sets the state for the specified port on the controller to desired state.
10430 * This must be run in the context of the enclosure taskq which ensures that
10431 * only one event is outstanding at any time.
10432 */
10433 static boolean_t
10435 {
10436 ahci_em_led_msg_t msg;
10437 ahci_em_msg_hdr_t hdr;
10447 }
10451 }
10456 }
10466 /*
10467 * First, make sure we can transmit. We should not have been placed in a
10468 * situation where an outstanding transmission is going on.
10469 */
10479 }
10500 }
10506 }
10511 uint_t aelta_op;
10512 ahci_em_led_state_t aelta_state;
10513 uint_t aelta_ret;
10514 kcondvar_t aelta_cv;
10515 uint_t aelta_ref;
10518 static void
10520 {
10524 }
10526 static void
10528 {
10531 ahci_em_led_state_t state;
10538 }
10556 }
10568 }
10574 }
10579 }
10580 }
10582 static void
10584 {
10588 /*
10589 * We've been asked to reset the device. The caller should have set the
10590 * resetting flag. Make sure that we don't have a request to quiesce.
10591 */
10598 }
10612 }
10622 }
10629 /*
10630 * Try to flush all the LEDs as part of reset. If it fails,
10631 * drive on.
10632 */
10643 }
10644 }
10650 }
10652 static boolean_t
10654 {
10657 /*
10658 * First make sure we actually have enclosure services and if so, that
10659 * we have the hardware support that we care about for this.
10660 */
10665 /*
10666 * Next, make sure that the buffer is large enough for us. We need two
10667 * dwords or 8 bytes. The location register is stored in dwords.
10668 */
10670 AHCI_EM_BUFFER_MIN) {
10672 }
10691 }
10700 }
10702 static int
10704 {
10706 ahci_ioc_em_get_t get;
10712 }
10718 }
10720 }
10727 }
10729 static int
10731 {
10733 ahci_ioc_em_set_t set;
10745 }
10748 AHCI_EM_LED_FAULT_ENABLE |
10751 }
10760 }
10765 }
10770 }
10779 /*
10780 * Initialize the reference count to two. One for us and one for the
10781 * taskq. This will be used in case we get canceled.
10782 */
10785 /*
10786 * Once dispatched, the task state is protected by our global mutex.
10787 */
10798 }
10799 }
10801 /*
10802 * Remove our reference count. If we were woken up because of a signal
10803 * then the taskq may still be dispatched. In which case we shouldn't
10804 * free this memory until it is done. In that case, the taskq will take
10805 * care of it.
10806 */
10813 }
10818 }
10821 }
10823 static int
10825 {
10832 }
10841 }
10843 }
10845 static void
10847 {
10855 }
10857 static void
10859 {
10865 }
10867 static void
10869 {
10876 }
10878 static void
10880 {
10883 }
10888 }