| blob | 475f8bd96e2e96c9f0648baf3b3158b142385690 |
1 /*
2 * CDDL HEADER START
3 *
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License (the "License").
6 * You may not use this file except in compliance with the License.
7 *
8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 * or http://www.opensolaris.org/os/licensing.
10 * See the License for the specific language governing permissions
11 * and limitations under the License.
12 *
13 * When distributing Covered Code, include this CDDL HEADER in each
14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 * If applicable, add the following below this CDDL HEADER, with the
16 * fields enclosed by brackets "[]" replaced with your own identifying
17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 *
19 * CDDL HEADER END
20 */
22 /*
23 * Copyright (c) 2006, 2010, Oracle and/or its affiliates. All rights reserved.
24 * Copyright 2018 Nexenta Systems, Inc. All rights reserved.
25 * Copyright (c) 2018, Joyent, Inc.
26 * Copyright 2018 OmniOS Community Edition (OmniOSce) Association.
27 */
29 /*
30 * AHCI (Advanced Host Controller Interface) SATA HBA Driver
31 *
32 * Power Management Support
33 * ------------------------
34 *
35 * At the moment, the ahci driver only implements suspend/resume to
36 * support Suspend to RAM on X86 feature. Device power management isn't
37 * implemented, link power management is disabled, and hot plug isn't
38 * allowed during the period from suspend to resume.
39 *
40 * For s/r support, the ahci driver only need to implement DDI_SUSPEND
41 * and DDI_RESUME entries, and don't need to take care of new requests
42 * sent down after suspend because the target driver (sd) has already
43 * handled these conditions, and blocked these requests. For the detailed
44 * information, please check with sdopen, sdclose and sdioctl routines.
45 *
46 *
47 * Enclosure Management Support
48 * ----------------------------
49 *
50 * The ahci driver has basic support for AHCI Enclosure Management (EM)
51 * services. The AHCI specification provides an area in the primary ahci BAR for
52 * posting data to send out to the enclosure management and provides a register
53 * that provides both information and control about this. While the
54 * specification allows for multiple forms of enclosure management, the only
55 * supported, and commonly found form, is the AHCI specified LED format. The LED
56 * format is often implemented as a one-way communication mechanism. Software
57 * can write out what it cares about into the aforementioned data buffer and
58 * then we wait for the transmission to be sent.
59 *
60 * This has some drawbacks. It means that we cannot know whether or not it has
61 * succeeded. This means we cannot ask hardware what it thinks the LEDs are
62 * set to. There's also the added unfortunate reality that firmware on the
63 * microcontroller driving this will often not show the LEDs if no drive is
64 * present and that actions taken may potentially cause this to get out of sync
65 * with what we expect it to be. For example, the specification does not
66 * describe what should happen if a drive is removed from the enclosure while
67 * this is set and what should happen when it returns. We can only infer that it
68 * should be the same.
69 *
70 * Because only a single command can be sent at any time and we don't want to
71 * interfere with controller I/O, we create a taskq dedicated to this that has a
72 * single thread. Both resets (which occur on attach and resume) and normal
73 * changes to the LED state will be driven through this taskq. Because the taskq
74 * has a single thread, this guarantees serial processing.
75 *
76 * Each userland-submitted task (basically not resets) has a reference counted
77 * task structure. This allows the thread that called it to be cancelled and
78 * have the system clean itself up. The user thread in ioctl blocks on a CV that
79 * can receive signals as it waits for completion. Note, there is no guarantee
80 * provided by the kernel that the first thread to enter the kernel will be the
81 * first one to change state.
82 */
84 #include <sys/note.h>
85 #include <sys/scsi/scsi.h>
86 #include <sys/pci.h>
87 #include <sys/disp.h>
88 #include <sys/sata/sata_hba.h>
89 #include <sys/sata/adapters/ahci/ahcireg.h>
90 #include <sys/sata/adapters/ahci/ahcivar.h>
92 /*
93 * FMA header files
94 */
95 #include <sys/ddifm.h>
96 #include <sys/fm/protocol.h>
97 #include <sys/fm/util.h>
98 #include <sys/fm/io/ddi.h>
100 /*
101 * EM Control header files
102 */
103 #include <sys/types.h>
104 #include <sys/file.h>
105 #include <sys/errno.h>
106 #include <sys/open.h>
107 #include <sys/cred.h>
108 #include <sys/ddi.h>
109 #include <sys/sunddi.h>
111 /*
112 * This is the string displayed by modinfo, etc.
113 */
116 /*
117 * Function prototypes for driver entry points
118 */
124 /*
125 * Function prototypes for SATA Framework interfaces
126 */
136 #if defined(__lock_lint)
138 #endif
140 /*
141 * FMA Prototypes
142 */
154 /*
155 * Local function prototypes
156 */
183 sata_device_t *);
185 sata_pmult_gscr_t *);
187 sata_device_t *);
191 sata_device_t *);
196 ahci_addr_t *);
217 ahci_addr_t *);
219 ahci_addr_t *);
221 ahci_addr_t *);
269 #if AHCI_DEBUG
271 #endif
280 /*
281 * DMA attributes for the data buffer
282 *
283 * dma_attr_addr_hi will be changed to 0xffffffffull if the HBA
284 * does not support 64-bit addressing
285 */
299 };
301 /*
302 * DMA attributes for the rcvd FIS
303 *
304 * dma_attr_addr_hi will be changed to 0xffffffffull if the HBA
305 * does not support 64-bit addressing
306 */
320 };
322 /*
323 * DMA attributes for the command list
324 *
325 * dma_attr_addr_hi will be changed to 0xffffffffull if the HBA
326 * does not support 64-bit addressing
327 */
341 };
343 /*
344 * DMA attributes for cmd tables
345 *
346 * dma_attr_addr_hi will be changed to 0xffffffffull if the HBA
347 * does not support 64-bit addressing
348 */
362 };
365 /* Device access attributes */
367 DDI_DEVICE_ATTR_V1,
368 DDI_STRUCTURE_LE_ACC,
369 DDI_STRICTORDER_ACC,
370 DDI_DEFAULT_ACC
371 };
386 };
389 SATA_TRAN_HOTPLUG_OPS_REV_1,
390 ahci_tran_hotplug_port_activate,
391 ahci_tran_hotplug_port_deactivate
392 };
400 };
403 MODREV_1,
405 NULL
406 };
408 /* The following variables are watchdog handler related */
412 /*
413 * This static variable indicates the size of command table,
414 * and it's changeable with prdt number, which ahci_dma_prdt_number
415 * indicates.
416 */
419 /*
420 * The below global variables are tunable via /etc/system
421 *
422 * ahci_dma_prdt_number
423 * ahci_msi_enabled
424 * ahci_buf_64bit_dma
425 * ahci_commu_64bit_dma
426 */
428 /* The number of Physical Region Descriptor Table(PRDT) in Command Table */
431 /* AHCI MSI is tunable */
434 /*
435 * 64-bit dma addressing for data buffer is tunable
436 *
437 * The variable controls only the below value:
438 * DBAU (upper 32-bits physical address of data block)
439 */
442 /*
443 * 64-bit dma addressing for communication system descriptors is tunable
444 *
445 * The variable controls the below three values:
446 *
447 * PxCLBU (upper 32-bits for the command list base physical address)
448 * PxFBU (upper 32-bits for the received FIS base physical address)
449 * CTBAU (upper 32-bits of command table base)
450 */
453 /*
454 * By default, 64-bit dma for data buffer will be disabled for AMD/ATI SB600
455 * chipset. If the users want to have a try with 64-bit dma, please change
456 * the below variable value to enable it.
457 */
460 /*
461 * By default, 64-bit dma for command buffer will be disabled for AMD/ATI
462 * SB600/700/710/750/800. If the users want to have a try with 64-bit dma,
463 * please change the below value to enable it.
464 */
467 /*
468 * These values control the default delay and default number of times to wait
469 * for an enclosure message to complete.
470 */
477 /*
478 * End of global tunable variable definition
479 */
481 #if AHCI_DEBUG
483 #else
485 #endif
488 #if AHCI_DEBUG
489 /* The following is needed for ahci_log() */
492 #endif
494 /* Opaque state pointer initialized by ddi_soft_state_init() */
497 /*
498 * ahci module initialization.
499 */
500 int
502 {
508 }
510 #if AHCI_DEBUG
512 #endif
515 #if AHCI_DEBUG
517 #endif
520 }
522 /* watchdog tick */
529 #if AHCI_DEBUG
531 #endif
534 }
538 err_out:
541 }
543 /*
544 * ahci module uninitialize.
545 */
546 int
548 {
554 }
556 /* Remove the resources allocated in _init(). */
558 #if AHCI_DEBUG
560 #endif
564 }
566 /*
567 * _info entry point
568 */
569 int
571 {
573 }
575 /*
576 * The attach entry point for dev_ops.
577 */
578 static int
580 {
592 #if AHCI_DEBUG
594 #endif
597 NULL);
605 /*
606 * During DDI_RESUME, the hardware state of the device
607 * (power may have been removed from the device) must be
608 * restored, allow pending requests to continue, and
609 * service new requests.
610 */
614 /*
615 * GHC.AE must be set to 1 before any other AHCI register
616 * is accessed
617 */
624 /* Restart watch thread */
632 /*
633 * Re-initialize the controller and enable the interrupts and
634 * restart all the ports.
635 *
636 * Note that so far we don't support hot-plug during
637 * suspend/resume.
638 */
641 "Failed to initialize the controller "
644 }
646 /*
647 * Reset the enclosure services.
648 */
659 }
663 /* Allocate soft state */
667 instance);
669 }
675 /* Initialize the cport/port mapping */
679 }
683 /* Initialize FMA properties */
688 /*
689 * Now map the AHCI base address; which includes global
690 * registers and port control registers
691 *
692 * According to the spec, the AHCI Base Address is BAR5,
693 * but BAR0-BAR4 are optional, so we need to check which
694 * rnumber is used for BAR5.
695 */
697 /*
698 * search through DDI "reg" property for the AHCI register set
699 */
704 instance);
706 }
708 /* AHCI Base Address is located at 0x24 offset */
713 }
719 instance);
721 }
726 rnumber,
734 instance);
736 }
740 /*
741 * GHC.AE must be set to 1 before any other AHCI register
742 * is accessed
743 */
750 /* Get the AHCI version information */
759 /* We don't support controllers whose versions are lower than 1.0 */
764 }
766 /* Get the HBA capabilities information */
771 cap_status);
773 /* CAP2 (HBA Capabilities Extended) is available since AHCI spec 1.2 */
777 /* Get the HBA capabilities extended information */
783 }
793 }
795 #if AHCI_DEBUG
796 /* Get the interface speed supported by the HBA */
807 }
808 #endif
810 /* Get the number of command slots supported by the HBA */
818 /* Get the bit map which indicates ports implemented by the HBA */
826 /* Max port number implemented */
833 /* Get the number of implemented ports by the HBA */
842 /* Check whether HBA supports 64bit DMA addressing */
848 }
850 /* Checking for the support of Port Multiplier */
856 /* Support FIS-based switching ? */
861 }
862 }
864 /* Checking for Support Command List Override */
869 }
871 /* Checking for Asynchronous Notification */
876 }
881 instance);
883 }
887 /*
888 * Check the pci configuration space, and set caps. We also
889 * handle the hardware defect in this function.
890 *
891 * For example, force ATI SB600 to use 32-bit dma addressing
892 * since it doesn't support 64-bit dma though its CAP register
893 * declares it support.
894 */
897 instance);
899 }
901 /*
902 * Disable the whole controller interrupts before adding
903 * interrupt handlers(s).
904 */
907 /* Get supported interrupt types */
910 instance);
912 }
916 intr_types);
919 /*
920 * Try MSI first, but fall back to FIXED if failed
921 */
923 DDI_SUCCESS) {
928 }
931 "MSI registration failed, "
933 }
937 DDI_SUCCESS) {
942 }
946 }
952 intr_done:
956 /* Initialize the controller mutex */
966 }
973 "ahci_attach: ahci_dma_prdt_number set by user is 0x%x,"
979 ahci_dma_prdt_number;
986 /*
987 * enable 64bit dma for data buffer for SB600 if
988 * sb600_buf_64bit_dma_disable is B_FALSE
989 */
997 }
999 /*
1000 * enable 64bit dma for command buffer for SB600/700/710/800
1001 * if sbxxx_commu_64bit_dma_disable is B_FALSE
1002 */
1015 }
1017 /* Allocate the ports structure */
1021 instance);
1023 }
1027 /*
1028 * Initialize the controller and ports.
1029 */
1033 instance);
1035 }
1039 /* Start one thread to check packet timeouts */
1050 }
1055 instance);
1057 }
1059 /* Check all handles at the end of the attach operation. */
1062 instance);
1064 }
1072 err_out:
1073 /* FMA message */
1079 }
1086 }
1090 }
1094 }
1098 }
1102 }
1106 }
1110 }
1114 }
1118 }
1121 }
1123 /*
1124 * The detach entry point for dev_ops.
1125 */
1126 static int
1128 {
1141 /* disable the interrupts for an uninterrupted detach */
1146 /* unregister from the sata framework. */
1153 }
1159 /* stop the watchdog handler */
1165 /* uninitialize the controller */
1168 /* remove the interrupts */
1171 /* deallocate the ports structures */
1174 /* destroy mutex */
1177 /* teardown the pci config */
1180 /* remove the reg maps. */
1183 /* release fma resource */
1186 /* free the soft state. */
1193 /*
1194 * The steps associated with suspension must include putting
1195 * the underlying device into a quiescent state so that it
1196 * will not generate interrupts or modify or access memory.
1197 */
1202 }
1208 /* stop the watchdog handler */
1212 }
1216 /*
1217 * drain the taskq
1218 */
1221 /*
1222 * Disable the interrupts and stop all the ports.
1223 */
1230 }
1231 }
1233 /*
1234 * The info entry point for dev_ops.
1235 *
1236 */
1237 static int
1239 {
1244 dev_t dev;
1258 }
1264 }
1267 }
1269 /*
1270 * Registers the ahci with sata framework.
1271 */
1272 static int
1274 {
1282 /* Allocate memory for the sata_hba_tran */
1290 /* Report the number of implemented ports */
1294 /* Support ATAPI device */
1297 /* Get the data transfer capability for PIO command by the HBA */
1302 }
1304 /*
1305 * According to the AHCI spec, the ATA/ATAPI-7 queued feature set
1306 * is not supported by AHCI (including the READ QUEUED (EXT), WRITE
1307 * QUEUED (EXT), and SERVICE commands). Queued operations are
1308 * supported in AHCI using the READ FPDMA QUEUED and WRITE FPDMA
1309 * QUEUED commands when the HBA and device support native command
1310 * queuing(NCQ).
1311 *
1312 * SATA_CTLF_NCQ will be set to sata_tran_hba_features_support if the
1313 * CAP register of the HBA indicates NCQ is supported.
1314 *
1315 * SATA_CTLF_NCQ cannot be set if AHCI_CAP_NO_MCMDLIST_NONQUEUE is
1316 * set because the previous register content of PxCI can be re-written
1317 * in the register write.
1318 */
1325 }
1327 /* Support port multiplier? */
1330 SATA_CTLF_PORT_MULTIPLIER;
1332 /* Support FIS-based switching for port multiplier? */
1335 SATA_CTLF_PMULT_FBS;
1336 }
1337 }
1339 /* Report the number of command slots */
1347 #ifdef __lock_lint
1349 #endif
1350 /*
1351 * When SATA framework adds support for pwrmgt the
1352 * pwrmgt_ops needs to be updated
1353 */
1361 /* Attach it to SATA framework */
1369 }
1372 }
1374 /*
1375 * Unregisters the ahci with sata framework.
1376 */
1377 static int
1379 {
1383 /* Detach from the SATA framework. */
1385 DDI_SUCCESS) {
1387 }
1389 /* Deallocate sata_hba_tran. */
1398 }
1400 #define SET_PORTSTR(str, addrp) \
1401 if (AHCI_ADDR_IS_PORT(addrp)) \
1403 else if (AHCI_ADDR_IS_PMULT(addrp)) \
1405 else \
1407 (addrp)->aa_pmport);
1409 /*
1410 * ahci_tran_probe_port is called by SATA framework. It returns port state,
1411 * port status registers and an attached device type via sata_device
1412 * structure.
1413 *
1414 * We return the cached information from a previous hardware probe. The
1415 * actual hardware probing itself was done either from within
1416 * ahci_initialize_controller() during the driver attach or from a phy
1417 * ready change interrupt handler.
1418 */
1419 static int
1421 {
1449 /* port mutliplier is removed. */
1451 "ahci_tran_probe_port: "
1455 }
1457 /*
1458 * The sata_device may refer to
1459 * 1. A controller port.
1460 * A controller port should be ready here.
1461 * 2. A port multiplier.
1462 * SATA_ADDR_PMULT_SPEC - if it is not initialized yet, initialize
1463 * it and register the port multiplier to the framework.
1464 * SATA_ADDR_PMULT - check the status of all its device ports.
1465 * 3. A port multiplier port.
1466 * If it has not been initialized, initialized it.
1467 *
1468 * A port multiplier or a port multiplier port may require some
1469 * initialization because we cannot do these time-consuming jobs in an
1470 * interrupt context.
1471 */
1474 /* Initialize registers on a port multiplier */
1479 "ahci_tran_probe_port: "
1483 }
1485 /* Check pmports hotplug events */
1488 SATA_ADDR_DPMPORT)) {
1493 }
1494 }
1496 /* Update port state and device type */
1531 }
1544 /*
1545 * HBA driver only knows it's an ATAPI device, and don't know
1546 * it's CD/DVD, tape or ATAPI disk because the ATAPI device
1547 * type need to be determined by checking IDENTIFY PACKET
1548 * DEVICE data
1549 */
1559 /* Update the number of pmports. */
1566 portstr);
1573 portstr);
1577 /* we don't support any other device types */
1582 }
1584 out:
1585 /* Register update only fails while probing a pmult/pmport */
1593 }
1595 /* Check handles for the sata registers access */
1599 DDI_SERVICE_UNAFFECTED);
1601 }
1605 }
1607 /*
1608 * There are four operation modes in sata framework:
1609 * SATA_OPMODE_INTERRUPTS
1610 * SATA_OPMODE_POLLING
1611 * SATA_OPMODE_ASYNCH
1612 * SATA_OPMODE_SYNCH
1613 *
1614 * Their combined meanings as following:
1615 *
1616 * SATA_OPMODE_SYNCH
1617 * The command has to be completed before sata_tran_start functions returns.
1618 * Either interrupts or polling could be used - it's up to the driver.
1619 * Mode used currently for internal, sata-module initiated operations.
1620 *
1621 * SATA_OPMODE_SYNCH | SATA_OPMODE_INTERRUPTS
1622 * It is the same as the one above.
1623 *
1624 * SATA_OPMODE_SYNCH | SATA_OPMODE_POLLING
1625 * The command has to be completed before sata_tran_start function returns.
1626 * No interrupt used, polling only. This should be the mode used for scsi
1627 * packets with FLAG_NOINTR.
1628 *
1629 * SATA_OPMODE_ASYNCH | SATA_OPMODE_INTERRUPTS
1630 * The command may be queued (callback function specified). Interrupts could
1631 * be used. It's normal operation mode.
1632 */
1633 /*
1634 * Called by sata framework to transport a sata packet down stream.
1635 */
1636 static int
1638 {
1641 ahci_addr_t addr;
1659 /* Sanity check */
1670 "ahci_tran_start returning PORT_ERROR while "
1674 }
1677 SATA_STATE_READY)) {
1689 "ahci_tran_start returning PORT_ERROR "
1690 "while sub-link is not initialized "
1694 }
1695 }
1696 }
1701 /*
1702 * In case the target driver would send the packet before
1703 * sata framework can have the opportunity to process those
1704 * event reports.
1705 */
1712 "ahci_tran_start returning PORT_ERROR while "
1713 "port in FAILED/SHUTDOWN/PWROFF state: "
1717 }
1720 /*
1721 * ahci_intr_phyrdy_change() may have rendered it to
1722 * SATA_DTYPE_NONE.
1723 */
1731 "ahci_tran_start returning PORT_ERROR while "
1735 }
1737 /* R/W PMULT command will occupy the whole HBA port */
1740 "ahci_tran_start returning BUSY while "
1741 "executing READ/WRITE PORT-MULT command: "
1746 }
1750 "ahci_tran_start returning BUSY while "
1755 }
1757 /*
1758 * SATA HBA driver should remember that a device was reset and it
1759 * is supposed to reject any packets which do not specify either
1760 * SATA_IGNORE_DEV_RESET_STATE or SATA_CLEAR_DEV_RESET_STATE.
1761 *
1762 * This is to prevent a race condition when a device was arbitrarily
1763 * reset by the HBA driver (and lost it's setting) and a target
1764 * driver sending some commands to a device before the sata framework
1765 * has a chance to restore the device setting (such as cache enable/
1766 * disable or other resettable stuff).
1767 */
1768 /*
1769 * It is unnecessary to use specific flags to indicate
1770 * reset_in_progress for a pmport. While mopping, all command will be
1771 * mopped so that the entire HBA port is being dealt as a single
1772 * object.
1773 */
1777 "ahci_tran_start [CLEAR] the "
1779 }
1786 "ahci_tran_start returning BUSY while "
1790 }
1792 #ifdef AHCI_DEBUG
1797 }
1798 #endif
1803 "ahci_tran_start returning BUSY while "
1807 }
1811 DDI_SERVICE_UNAFFECTED);
1814 }
1818 /*
1819 * If a SYNC command to be executed in interrupt context,
1820 * bounce it back to sata module.
1821 */
1826 "ahci_tran_start returning BUSY while "
1827 "sending SYNC mode under interrupt context: "
1831 }
1833 /* We need to do the sync start now */
1837 }
1839 /* Async start, using interrupt */
1844 }
1845 }
1853 fail_out:
1854 /*
1855 * Failed to deliver packet to the controller.
1856 * Check if it's caused by invalid handles.
1857 */
1867 }
1873 }
1875 /*
1876 * SATA_OPMODE_SYNCH flag is set
1877 *
1878 * If SATA_OPMODE_POLLING flag is set, then we must poll the command
1879 * without interrupt, otherwise we can still use the interrupt.
1880 */
1881 static int
1884 {
1902 }
1904 pkt_timeout_ticks =
1908 /* Simulate the interrupt */
1930 }
1931 }
1941 #if AHCI_DEBUG
1942 /*
1943 * Note that the driver always uses the slot 0 to deliver
1944 * REQUEST SENSE or READ LOG EXT command
1945 */
1948 #endif
1955 }
1956 }
1958 /*
1959 * Searches for and claims a free command slot.
1960 *
1961 * Returns value:
1962 *
1963 * AHCI_FAILURE returned only if
1964 * 1. No empty slot left
1965 * 2. Non-queued command requested while queued command(s) is outstanding
1966 * 3. Queued command requested while non-queued command(s) is outstanding
1967 * 4. HBA doesn't support multiple-use of command list while already a
1968 * non-queued command is oustanding
1969 * 5. Queued command requested while some queued command(s) has been
1970 * outstanding on a different port multiplier port. (AHCI spec 1.2,
1971 * 9.1.2)
1972 *
1973 * claimed slot number returned if succeeded
1974 *
1975 * NOTE: it will always return slot 0 for following commands to simplify the
1976 * algorithm.
1977 * 1. REQUEST SENSE or READ LOG EXT command during error recovery process
1978 * 2. READ/WRITE PORTMULT command
1979 */
1980 static int
1983 {
1991 "ahciport_pending_tags = 0x%x "
1996 /*
1997 * According to the AHCI spec, system software is responsible to
1998 * ensure that queued and non-queued commands are not mixed in
1999 * the command list.
2000 */
2002 /* Non-NCQ command request */
2005 "ahci_claim_free_slot: there is still pending "
2006 "queued command(s) in the command list, "
2007 "so no available slot for the non-queued "
2010 }
2013 "ahci_claim_free_slot: there is still pending "
2014 "read/write port-mult command(s) in command list, "
2016 NULL);
2018 }
2022 "ahci_claim_free_slot: HBA cannot support multiple-"
2024 NULL);
2026 }
2030 /* NCQ command request */
2033 "ahci_claim_free_slot: there is still pending "
2034 "non-queued command(s) in the command list, "
2036 NULL);
2038 }
2040 /*
2041 * NCQ commands cannot be sent to different port multiplier
2042 * ports in Command-Based Switching mode
2043 */
2044 /*
2045 * NOTE: In Command-Based Switching mode, AHCI controller
2046 * usually reports a 'Handshake Error' when multiple NCQ
2047 * commands are outstanding simultaneously.
2048 */
2056 "ahci_claim_free_slot: there is still "
2057 "pending queued command(s) in the "
2058 "command list for another Port Multiplier "
2061 }
2062 }
2067 /* Error retrieval command request */
2069 "ahci_claim_free_slot: slot 0 is allocated for REQUEST "
2074 /*
2075 * An extra check on PxCI. Sometimes PxCI bits may not be
2076 * cleared during hot-plug or error recovery process.
2077 */
2083 "ahci_claim_free_slot: there is still pending "
2084 "command(s) in command list (0x%x/0x%x, PxCI %x),"
2088 port_cmd_issue);
2090 }
2093 "ahci_claim_free_slot: slot 0 is allocated for "
2097 }
2104 }
2106 /*
2107 * According to the AHCI spec, to allow a simple mechanism for the
2108 * HBA to map command list slots to queue entries, software must
2109 * match the tag number it uses to the slot it is placing the command
2110 * in. For example, if a queued command is placed in slot 5, the tag
2111 * for that command must be 5.
2112 */
2118 }
2119 }
2123 out:
2128 }
2130 /*
2131 * Builds the Command Table for the sata packet and delivers it to controller.
2132 *
2133 * Returns:
2134 * slot number if we can obtain a slot successfully
2135 * otherwise, return AHCI_FAILURE
2136 */
2137 static int
2140 {
2152 #if AHCI_DEBUG
2155 #endif
2166 /* Check if the command is a NCQ command */
2171 /*
2172 * When NCQ is support, system software must determine the
2173 * maximum tag allowed by the device and the HBA, and it
2174 * must use a value not beyond of the lower bound of the two.
2175 *
2176 * Sata module is going to calculate the qdepth and send
2177 * down to HBA driver via sata_cmd.
2178 */
2181 /*
2182 * At the moment, the driver doesn't support the dynamic
2183 * setting of the maximum ncq depth, and the value can be
2184 * set either during the attach or after hot-plug insertion.
2185 */
2189 "ahci_deliver_satapkt: port %d the max tags for "
2194 " port %d the max tag for NCQ command is "
2195 "requested to change from %d to %d, at the"
2196 " moment the driver doesn't support the "
2197 "dynamic change so it's going to "
2201 ncq_qdepth);
2202 }
2203 }
2204 }
2206 /* Check if the command is an error retrieval command */
2210 /* Check if the command is an read/write pmult command */
2214 /* Check if there is an empty command slot */
2220 }
2223 "ahci_deliver_satapkt enter: cmd_reg: 0x%x, cmd_slot: 0x%x, "
2230 /* For data transfer operations, it is the H2D Register FIS */
2231 h2d_register_fisp =
2236 /*
2237 * PMP field only make sense when target is a port multiplier or a
2238 * device behind a port multiplier. Otherwise should set it to 0.
2239 */
2251 /*
2252 * satacmd_addr_type will be 0 for the commands below:
2253 * ATAPI command
2254 * SATAC_IDLE_IM
2255 * SATAC_STANDBY_IM
2256 * SATAC_DOWNLOAD_MICROCODE
2257 * SATAC_FLUSH_CACHE
2258 * SATAC_SET_FEATURES
2259 * SATAC_SMART
2260 * SATAC_ID_PACKET_DEVICE
2261 * SATAC_ID_DEVICE
2262 * SATAC_READ_PORTMULT
2263 * SATAC_WRITE_PORTMULT
2264 */
2265 /* FALLTHRU */
2268 /* FALLTHRU */
2271 /* LBA[7:0] */
2274 /* LBA[15:8] */
2277 /* LBA[23:16] */
2280 /* LBA [27:24] (also called dev_head) */
2286 /* LBA[7:0] */
2289 /* LBA[15:8] */
2292 /* LBA[23:16] */
2295 /* LBA [31:24] */
2299 /* LBA [39:32] */
2303 /* LBA [47:40] */
2307 /* Set dev_head */
2311 /* Set the extended sector count and features */
2317 }
2319 /*
2320 * For NCQ command (READ/WRITE FPDMA QUEUED), sector count 7:0 is
2321 * filled into features field, and sector count 8:15 is filled into
2322 * features (exp) field. The hba driver doesn't need to anything
2323 * special with regard to this, since sata framework has already
2324 * done so.
2325 *
2326 * However the driver needs to make sure TAG is filled into sector
2327 * field.
2328 */
2332 }
2342 /* *** now fill the scatter gather list ******* */
2352 }
2358 /* The ACMD field is filled in for ATAPI command */
2361 SATA_ATAPI_MAX_CDB_LEN);
2362 }
2364 /* Set Command Header in Command List */
2369 /* Set the number of entries in the PRD table */
2372 /* Set the length of the command in the CFIS area */
2375 /*
2376 * PMP field only make sense when target is a port multiplier or a
2377 * device behind a port multiplier. Otherwise should set it to 0.
2378 */
2386 /* Set A bit if it is an ATAPI command */
2390 /* Set W bit if data is going to the device */
2394 /*
2395 * Set the prefetchable bit - this bit is only valid if the PRDTL
2396 * field is non-zero or the ATAPI 'A' bit is set in the command
2397 * header. This bit cannot be set when using native command
2398 * queuing commands or when using FIS-based switching with a Port
2399 * multiplier.
2400 */
2404 /*
2405 * Now remember the sata packet in ahciport_slot_pkts[].
2406 * Error retrieval command and r/w port multiplier command will
2407 * be stored specifically for each port.
2408 */
2413 /*
2414 * Keep the timeout value
2415 */
2418 /*
2419 * If the intial timout is less than 1 tick, then make it longer by
2420 * 1 tick to avoid immediate timeout
2421 */
2423 ahci_watchdog_timeout)
2425 ahci_watchdog_timeout;
2427 #if AHCI_DEBUG
2433 /* Dump the command header and table */
2443 /* Dump the H2D register FIS */
2449 /* Dump the ACMD register FIS */
2454 " ATAPI command: %2x %2x %2x %2x "
2461 /* Dump the PRDT */
2467 }
2468 }
2469 #endif
2474 ahci_cmd_table_size,
2475 DDI_DMA_SYNC_FORDEV);
2480 DDI_DMA_SYNC_FORDEV);
2487 DDI_SERVICE_UNAFFECTED);
2489 }
2491 /* Set the corresponding bit in the PxSACT.DS for queued command */
2496 }
2498 /* Indicate to the HBA that a command is active. */
2506 /* Make sure the command is started by the PxSACT/PxCI */
2510 DDI_SERVICE_UNAFFECTED);
2512 }
2515 }
2517 /*
2518 * Called by the sata framework to abort the previously sent packet(s).
2519 *
2520 * Reset device to abort commands.
2521 */
2522 static int
2524 {
2544 /*
2545 * If AHCI_PORT_FLAG_MOPPING flag is set, it means all the pending
2546 * commands are being mopped, therefore there is nothing else to do
2547 */
2550 "ahci_tran_abort: port %d is in "
2554 }
2556 /*
2557 * If AHCI_PORT_FLAG_RDWR_PMULT flag is set, it means a R/W PMULT
2558 * command is being executed so no other commands is outstanding,
2559 * nothing to do.
2560 */
2563 "ahci_tran_abort: port %d is reading/writing "
2567 }
2572 /*
2573 * In case the targer driver would send the request before
2574 * sata framework can have the opportunity to process those
2575 * event reports.
2576 */
2583 "ahci_tran_abort returning SATA_FAILURE while "
2584 "port in FAILED/SHUTDOWN/PWROFF state: "
2588 }
2591 /*
2592 * ahci_intr_phyrdy_change() may have rendered it to
2593 * AHCI_PORT_TYPE_NODEV.
2594 */
2602 "ahci_tran_abort returning SATA_FAILURE while "
2606 }
2618 /*
2619 * Aborting one specific packet, first search the
2620 * ahciport_slot_pkts[] list for matching spkt.
2621 */
2627 }
2628 }
2631 /* request packet is not on the pending list */
2633 "Cannot find the aborting pkt 0x%p on the "
2639 }
2642 }
2654 /*
2655 * To abort the packet(s), first we are trying to clear PxCMD.ST
2656 * to stop the port, and if the port can be stopped
2657 * successfully with PxTFD.STS.BSY and PxTFD.STS.DRQ cleared to '0',
2658 * then we just send back the aborted packet(s) with ABORTED flag
2659 * and then restart the port by setting PxCMD.ST and PxCMD.FRE.
2660 * If PxTFD.STS.BSY or PxTFD.STS.DRQ is set to '1', then we
2661 * perform a COMRESET.
2662 */
2666 /*
2667 * Compute which have finished and which need to be retried.
2668 *
2669 * The finished tags are ahciport_pending_tags/ahciport_pending_ncq_tags
2670 * minus the slot_status. The aborted_tags has to be deducted by
2671 * finished_tags since we can't possibly abort a tag which had finished
2672 * already.
2673 */
2684 ahci_portp,
2685 slot_status,
2688 aborted_tags,
2695 }
2697 /*
2698 * Used to do device reset and reject all the pending packets on a device
2699 * during the reset operation.
2700 *
2701 * NOTE: ONLY called by ahci_tran_reset_dport
2702 */
2703 static int
2706 {
2711 sata_device_t sdevice;
2719 /*
2720 * If AHCI_PORT_FLAG_MOPPING flag is set, it means all the pending
2721 * commands are being mopped, therefore there is nothing else to do
2722 */
2725 "ahci_reset_device_reject_pkts: port %d is in "
2728 }
2738 }
2743 "Try to do a port reset after software "
2748 "ahci_reset_device_reject_pkts: port %d "
2751 }
2752 }
2753 /* Set the reset in progress flag */
2759 /* Indicate to the framework that a reset has happened */
2765 SATA_DSTATE_PWR_ACTIVE;
2770 SATA_EVNT_DEVICE_RESET);
2776 /* Next try to mop the pending commands */
2787 ahci_portp,
2788 slot_status,
2795 }
2797 /*
2798 * Used to do device reset and reject all the pending packets on a device
2799 * during the reset operation.
2800 *
2801 * NOTE: ONLY called by ahci_tran_reset_dport
2802 */
2803 static int
2806 {
2810 sata_device_t sdevice;
2819 "ahci_reset_pmdevice_reject_pkts: port %d is in "
2822 }
2824 /* Checking for outstanding commands */
2833 }
2835 /* Issue SOFTWARE reset command. */
2839 "Try to do a port reset after software "
2842 }
2844 /* Set the reset in progress flag */
2850 /* Indicate to the framework that a reset has happened */
2856 else
2859 SATA_DSTATE_PWR_ACTIVE;
2864 SATA_EVNT_DEVICE_RESET);
2871 /* Next try to mop the pending commands */
2884 /*
2885 * NOTE: Because PxCI be only erased by unset PxCMD.ST bit, so even we
2886 * try to reset a single device behind a port multiplier will
2887 * terminate all the commands on that HBA port. We need mop these
2888 * commands as well.
2889 */
2891 ahci_portp,
2892 slot_status,
2899 }
2901 /*
2902 * Used to do port reset and reject all the pending packets on a port during
2903 * the reset operation.
2904 */
2905 static int
2908 {
2919 /*
2920 * If AHCI_PORT_FLAG_MOPPING flag is set, it means all the pending
2921 * commands are being mopped, therefore there is nothing else to do
2922 */
2925 "ahci_reset_port_reject_pkts: port %d is in "
2928 }
2941 }
2947 /* Clear mop flag */
2953 }
2965 ahci_portp,
2966 slot_status,
2973 }
2975 /*
2976 * Used to do hba reset and reject all the pending packets on all ports
2977 * during the reset operation.
2978 */
2979 static int
2981 {
2999 }
3025 }
3027 }
3031 }
3036 }
3041 /*
3042 * To prevent recursive enter to ahci_mop_commands, we need
3043 * check AHCI_PORT_FLAG_MOPPING flag.
3044 */
3047 "ahci_reset_hba_reject_pkts: port %d is in "
3051 }
3068 ahci_portp,
3075 }
3076 out:
3078 }
3080 /*
3081 * Called by sata framework to reset a port(s) or device.
3082 */
3083 static int
3085 {
3088 ahci_addr_t addr;
3106 /*
3107 * If we want to issue a COMRESET on a pmport, we need to
3108 * reject the outstanding commands on that pmport. According
3109 * to AHCI spec, PxCI register could only be cleared by
3110 * clearing PxCMD.ST, which will halt the controller port - as
3111 * well as other pmports.
3112 *
3113 * Therefore we directly reset the controller port for
3114 * simplicity. ahci_tran_probe_port() will handle reset stuff
3115 * like initializing the given pmport.
3116 */
3117 /* FALLTHRU */
3119 /* Port reset */
3133 /* FALLTHRU */
3135 /* Device reset */
3141 /*
3142 * software reset request must be sent to SATA_PMULT_HOSTPORT
3143 * if target is a port multiplier:
3144 */
3152 /*
3153 * In case the targer driver would send the request
3154 * before sata framework can have the opportunity to
3155 * process those event reports.
3156 */
3160 "ahci_tran_reset_dport returning SATA_FAILURE "
3161 "while port in FAILED/SHUTDOWN/PWROFF state: "
3166 }
3169 SATA_DTYPE_NONE) {
3170 /*
3171 * ahci_intr_phyrdy_change() may have rendered it to
3172 * AHCI_PORT_TYPE_NODEV.
3173 */
3179 "ahci_tran_reset_dport returning SATA_FAILURE "
3184 }
3192 }
3198 /* Reset the whole controller */
3206 }
3209 }
3211 /*
3212 * Called by sata framework to activate a port as part of hotplug.
3213 * (cfgadm -c connect satax/y)
3214 * Support port multiplier.
3215 */
3216 static int
3218 {
3221 ahci_addr_t addr;
3243 /* Enable the interrupts on the port */
3246 /*
3247 * Reset the port so that the PHY communication would be
3248 * re-established. But this reset is an internal operation
3249 * and the sata module doesn't need to know about it.
3250 * Moreover, the port with a device attached will be started
3251 * too.
3252 */
3256 NULL);
3258 /*
3259 * Need to check the link status and device status of the port
3260 * and consider raising power if the port was in D3 state
3261 */
3268 /* AHCI_ADDR_PMPORT */
3272 }
3280 }
3282 /*
3283 * Called by sata framework to deactivate a port as part of hotplug.
3284 * (cfgadm -c disconnect satax/y)
3285 * Support port multiplier.
3286 */
3287 static int
3289 {
3292 ahci_addr_t addr;
3314 /* Disable the interrupts on the port */
3319 /* First to abort all the pending commands */
3322 /* Then stop the port */
3325 }
3327 /* Next put the PHY offline */
3342 /* Re-enable the interrupts for the other pmports */
3344 }
3346 /* Update port state */
3354 }
3356 /*
3357 * To be used to mark all the outstanding pkts with SATA_PKT_ABORTED
3358 * when a device is unplugged or a port is deactivated.
3359 */
3360 static void
3363 {
3372 /* Read/write port multiplier command takes highest priority */
3377 }
3379 /*
3380 * When AHCI_PORT_FLAG_MOPPING is set, we need to check whether a
3381 * REQUEST SENSE command or READ LOG EXT command is delivered to HBA
3382 * to get the error data, if yes when the device is removed, the
3383 * command needs to be aborted too.
3384 */
3392 "ahci_reject_all_abort_pkts return directly "
3393 "port %d no needs to reject any outstanding "
3396 }
3397 }
3407 }
3409 out:
3410 /* No need to do mop when there is no outstanding commands */
3416 ahci_portp,
3417 slot_status,
3422 }
3423 }
3425 #if defined(__lock_lint)
3426 static int
3428 {
3430 }
3431 #endif
3433 /*
3434 * Initialize fma capabilities and register with IO fault services.
3435 */
3436 static void
3438 {
3439 /*
3440 * Need to change iblock to priority for new MSI intr
3441 */
3442 ddi_iblock_cookie_t fm_ibc;
3450 /* Only register with IO Fault Services if we have some capability */
3452 /* Adjust access and dma attributes for FMA */
3459 /*
3460 * Register capabilities with IO Fault Services.
3461 * ahcictl_fm_cap will be updated to indicate
3462 * capabilities actually supported (not requested.)
3463 */
3471 }
3472 /*
3473 * Initialize pci ereport capabilities if ereport
3474 * capable (should always be.)
3475 */
3479 }
3481 /*
3482 * Register error callback if error callback capable.
3483 */
3487 }
3491 }
3492 }
3494 /*
3495 * Releases fma capabilities and un-registers with IO fault services.
3496 */
3497 static void
3499 {
3500 /* Only unregister FMA capabilities if registered */
3502 /*
3503 * Un-register error callback if error callback capable.
3504 */
3507 }
3509 /*
3510 * Release any resources allocated by pci_ereport_setup()
3511 */
3515 }
3517 /* Unregister from IO Fault Services */
3520 /* Adjust access and dma attributes for FMA */
3529 }
3530 }
3532 /*ARGSUSED*/
3533 static int
3535 {
3536 /*
3537 * as the driver can always deal with an error in any dma or
3538 * access handle, we can just return the fme_status value.
3539 */
3542 }
3544 int
3546 {
3547 ddi_fm_error_t de;
3551 }
3553 int
3555 {
3556 ddi_fm_error_t de;
3560 }
3562 /*
3563 * Generate an ereport
3564 */
3565 void
3567 {
3577 }
3578 }
3580 /*
3581 * Check if all handles are correctly allocated.
3582 */
3583 static int
3585 {
3590 }
3604 }
3606 }
3609 }
3611 /*
3612 * Check the access handles for the controller. Note that
3613 * ahcictl_pci_conf_handle is only used in attach process.
3614 */
3615 static int
3617 {
3623 }
3625 }
3627 /*
3628 * Check the DMA handles and the access handles of a controller port.
3629 */
3630 static int
3632 {
3647 }
3652 }
3653 }
3655 }
3657 /*
3658 * Check the DMA handles and the access handles of a cmd table slot.
3659 */
3660 static int
3662 {
3670 }
3672 }
3674 /*
3675 * Allocate the ports structure, only called by ahci_attach
3676 */
3677 static int
3679 {
3687 /* Allocate structures only for the implemented ports */
3693 }
3701 }
3702 }
3707 err_out:
3711 }
3712 }
3716 }
3718 /*
3719 * Reverse of ahci_alloc_ports_state(), only called by ahci_detach
3720 */
3721 static void
3723 {
3728 /* if this port is implemented by the HBA */
3731 }
3733 }
3735 /*
3736 * Drain the taskq.
3737 */
3738 static void
3740 {
3747 }
3754 }
3755 }
3757 /*
3758 * Initialize the controller and all ports. And then try to start the ports
3759 * if there are devices attached.
3760 *
3761 * This routine can be called from three seperate cases: DDI_ATTACH,
3762 * PM_LEVEL_D0 and DDI_RESUME. The DDI_ATTACH case is different from
3763 * other two cases; device signature probing are attempted only during
3764 * DDI_ATTACH case.
3765 */
3766 static int
3768 {
3770 ahci_addr_t addr;
3776 /* Disable the whole controller interrupts */
3781 /* Initialize the implemented ports and structures */
3785 }
3790 /*
3791 * Ensure that the controller is not in the running state
3792 * by checking every implemented port's PxCMD register
3793 */
3799 "ahci_initialize_controller: failed to "
3801 /*
3802 * Set the port state to SATA_PSTATE_FAILED if
3803 * failed to initialize it.
3804 */
3806 }
3809 }
3811 /* Enable the whole controller interrupts */
3817 }
3819 /*
3820 * Reverse of ahci_initialize_controller()
3821 *
3822 * We only need to stop the ports and disable the interrupt.
3823 */
3824 static void
3826 {
3833 /* disable all the interrupts. */
3841 }
3845 /* Stop the port by clearing PxCMD.ST */
3848 /*
3849 * Here we must disable the port interrupt because
3850 * ahci_disable_all_intrs only clear GHC.IE, and IS
3851 * register will be still set if PxIE is enabled.
3852 * When ahci shares one IRQ with other drivers, the
3853 * intr handler may claim the intr mistakenly.
3854 */
3859 }
3860 }
3862 /*
3863 * ahci_alloc_pmult()
3864 * 1. Setting HBA port registers which are necessary for a port multiplier.
3865 * (Set PxCMD.PMA while PxCMD.ST is '0')
3866 * 2. Allocate ahci_pmult_info structure.
3867 *
3868 * NOTE: Must stop port before the function is called.
3869 */
3870 static void
3872 {
3881 /* The port must have been stopped before. */
3885 /* set PMA bit */
3891 "ahci_alloc_pmult: "
3893 }
3895 /* Allocate port multiplier information structure */
3899 }
3902 }
3904 /*
3905 * ahci_dealloc_pmult()
3906 * 1. Clearing related registers when a port multiplier is detached.
3907 * (Clear PxCMD.PMA while PxCMD.ST is '0')
3908 * 2. Deallocate ahci_pmult_info structure.
3909 *
3910 * NOTE: Must stop port before the function is called.
3911 */
3912 static void
3914 {
3924 /* Clear PMA bit */
3930 "ahci_dealloc_pmult: "
3932 }
3934 /* Release port multiplier information structure */
3939 }
3940 }
3942 /*
3943 * Staggered Spin-up.
3944 */
3945 static void
3947 {
3956 /* Check for staggered spin-up support */
3963 /* If PxCMD.SUD == 1, no staggered spin-up is needed */
3969 /* Set PxCMD.SUD */
3973 port_cmd_status);
3974 }
3976 /*
3977 * The routine is to initialize a port. First put the port in NotRunning
3978 * state, then enable port interrupt and clear Serror register. And under
3979 * AHCI_ATTACH case, find device signature and then try to start the port.
3980 *
3981 * Called by
3982 * 1. ahci_initialize_controller
3983 * 2. ahci_intr_phyrdy_change (hotplug)
3984 */
3985 static int
3988 {
3996 /* AHCI_ADDR_PORT: We've no idea of the attached device here. */
3999 /*
4000 * At the time being, only probe ports/devices and get the types of
4001 * attached devices during DDI_ATTACH. In fact, the device can be
4002 * changed during power state changes, but at the time being, we
4003 * don't support the situation.
4004 */
4008 /* check for DDI_RESUME case */
4015 }
4018 /*
4019 * During the resume, we need to set the PxCLB, PxCLBU, PxFB
4020 * and PxFBU registers in case these registers were cleared
4021 * during the suspend.
4022 */
4024 "ahci_initialize_port: port %d "
4025 "set PxCLB, PxCLBU, PxFB and PxFBU "
4029 AHCI_SUCCESS)
4031 }
4039 /*
4040 * Check whether the port is in NotRunning state, if not,
4041 * put the port in NotRunning state
4042 */
4045 AHCI_CMD_STATUS_CR |
4046 AHCI_CMD_STATUS_FRE |
4047 AHCI_CMD_STATUS_FR)) {
4050 }
4052 /* Make sure the drive is spun-up */
4055 /* Disable interrupt */
4058 /* Device is unknown at first */
4061 /* Disable the interface power management */
4069 /* Check physcial link status */
4073 /* Check interface status */
4077 /* Check whether port reset must be executed */
4080 /* Always reset port on RESUME */
4083 /* Something went wrong, we need do some reset things */
4086 /* Does port reset succeed on HBA port? */
4089 "ahci_initialize_port:"
4092 }
4094 /* Is port failed? */
4096 SATA_PSTATE_FAILED) {
4101 }
4102 }
4107 /*
4108 * Try to get the device signature if the port is not empty.
4109 */
4111 SATA_DTYPE_NONE)
4114 /* Return directly if no device connected */
4119 }
4121 /* If this is a port multiplier, we need do some initialization */
4126 }
4128 /* Try to start the port */
4134 }
4135 out:
4136 /* Enable port interrupts */
4140 }
4142 /*
4143 * Handle hardware defect, and check the capabilities. For example,
4144 * power management capabilty and MSI capability.
4145 */
4146 static int
4148 {
4150 #if AHCI_DEBUG
4152 ushort_t msimc;
4153 #endif
4158 PCI_CONF_VENID);
4162 PCI_CONF_DEVID);
4164 /*
4165 * Modify dma_attr_align of ahcictl_buffer_dma_attr. For VT8251, those
4166 * controllers with 0x00 revision id work on 4-byte aligned buffer,
4167 * which is a bug and was fixed after 0x00 revision id controllers.
4168 *
4169 * Moreover, VT8251 cannot use multiple command slots in the command
4170 * list for non-queued commands because the previous register content
4171 * of PxCI can be re-written in the register write, so a flag will be
4172 * set to record this defect - AHCI_CAP_NO_MCMDLIST_NONQUEUE.
4173 *
4174 * For VT8251, software reset also has the same defect as the below
4175 * AMD/ATI chipset. That is, software reset will get failed if 0xf
4176 * is filled in pmport field. Therefore, another software reset need
4177 * to be done with 0 filled in pmport field.
4178 */
4181 PCI_CONF_REVID);
4188 }
4192 "VT8251 cannot use multiple command lists for "
4196 }
4198 /*
4199 * AMD/ATI SB600 (0x1002,0x4380) AHCI chipset doesn't support 64-bit
4200 * DMA addressing for communication memory descriptors though S64A bit
4201 * of CAP register declares it supports. Even though 64-bit DMA for
4202 * data buffer works on ASUS M2A-VM with newer BIOS, three other
4203 * motherboards are known not, so both AHCI_CAP_BUF_32BIT_DMA and
4204 * AHCI_CAP_COMMU_32BIT_DMA are set for this controller.
4205 *
4206 * Due to certain hardware issue, the chipset must do port reset during
4207 * initialization, otherwise, when retrieving device signature,
4208 * software reset will get time out. So AHCI_CAP_INIT_PORT_RESET flag
4209 * need to set.
4210 *
4211 * For this chipset software reset will get failure if the pmport of
4212 * Register FIS was set with SATA_PMULT_HOSTPORT (0xf) and no port
4213 * multiplier is connected to the port. In order to fix the issue,
4214 * AHCI_CAP_SRST_NO_HOSTPORT flag need to be set, and once software
4215 * reset got failure, the driver will try to do another software reset
4216 * with pmport 0.
4217 */
4226 "ATI SB600 cannot do 64-bit DMA for both data buffer and "
4227 "communication memory descriptors though CAP indicates "
4231 NULL);
4233 "ATI SB600 will get software reset failure if pmport "
4235 }
4237 /*
4238 * AMD/ATI SB700/710/750/800 and SP5100 AHCI chipset share the same
4239 * vendor ID and device ID (0x1002,0x4391).
4240 *
4241 * SB700/750 AHCI chipset on some boards doesn't support 64-bit
4242 * DMA addressing for communication memory descriptors though S64A bit
4243 * of CAP register declares the support. However, it does support
4244 * 64-bit DMA for data buffer. So only AHCI_CAP_COMMU_32BIT_DMA is
4245 * set for this controller.
4246 *
4247 * SB710 has the same initialization issue as SB600, so it also need
4248 * a port reset. That is AHCI_CAP_INIT_PORT_RESET need to set for it.
4249 *
4250 * SB700 also has the same issue about software reset, and thus
4251 * AHCI_CAP_SRST_NO_HOSTPORT flag also is needed.
4252 */
4260 "ATI SB700/750 cannot do 64-bit DMA for communication "
4261 "memory descriptors though CAP indicates support, "
4265 NULL);
4267 "ATI SB700 will get software reset failure if pmport "
4269 }
4271 /*
4272 * Check if capabilities list is supported and if so,
4273 * get initial capabilities pointer and clear bits 0,1.
4274 */
4282 }
4284 /*
4285 * Walk capabilities if supported.
4286 */
4289 /*
4290 * Check that we haven't exceeded the maximum number of
4291 * capabilities and that the pointer is in a valid range.
4292 */
4297 }
4301 caps_ptr);
4303 }
4305 /*
4306 * Get next capability and check that it is valid.
4307 * For now, we only support power management.
4308 */
4310 caps_ptr);
4314 /* power management supported */
4317 /* Save PMCSR offset */
4320 #if AHCI_DEBUG
4328 "Power Management capability found PCI_PMCAP "
4332 "PCI Power Management Interface "
4334 #endif
4338 #if AHCI_DEBUG
4343 "Message Signaled Interrupt capability found "
4345 #endif
4379 }
4381 /*
4382 * Get next capabilities pointer and clear bits 0,1.
4383 */
4387 }
4390 }
4392 /*
4393 * Read/Write a register at port multiplier by SATA READ PORTMULT / SATA WRITE
4394 * PORTMULT command. SYNC & POLLING mode is used.
4395 */
4396 static int
4399 {
4401 ahci_addr_t pmult_addr;
4404 sata_device_t sata_device;
4419 /* Check the existence of the port multiplier */
4423 /* Request a READ/WRITE PORTMULT sata packet. */
4430 /*
4431 * Make sure no command is outstanding here. All R/W PMULT requests
4432 * come from
4433 *
4434 * 1. ahci_attach()
4435 * The port should be empty.
4436 *
4437 * 2. ahci_tran_probe_port()
4438 * Any request from SATA framework (via ahci_tran_start) should be
4439 * rejected if R/W PMULT command is outstanding.
4440 *
4441 * If we are doing mopping, do not check those flags because no
4442 * command will be actually outstanding.
4443 *
4444 * If the port has been occupied by any other commands, the probe
4445 * function will return a SATA_RETRY. SATA framework will retry
4446 * later.
4447 */
4453 }
4463 }
4465 /*
4466 * The port multiplier is gone. This may happen when
4467 * 1. Cutting off the power of an enclosure. The device lose the power
4468 * before port multiplier.
4469 * 2. Disconnecting the port multiplier during hot-plugging a sub-drive.
4470 *
4471 * The issued command should be aborted and the following command
4472 * should not be continued.
4473 */
4476 "READ/WRITE PMULT failed: "
4479 }
4486 /*
4487 * READ/WRITE PORTMULT command is intended to sent to the control port
4488 * of the port multiplier.
4489 */
4494 /* No interrupt here. Store the interrupt enable mask. */
4510 }
4512 /* Failed or not completed. */
4518 }
4519 out:
4520 /* Restore the interrupt mask */
4528 }
4530 static int
4533 {
4535 SATA_RDWR_PMULT_PKT_TYPE_READ);
4536 }
4538 static int
4541 {
4543 SATA_RDWR_PMULT_PKT_TYPE_WRITE);
4544 }
4546 #define READ_PMULT(addrp, r, pv, out) \
4547 if (ahci_read_pmult(ahci_ctlp, addrp, r, pv) != AHCI_SUCCESS) \
4548 goto out;
4550 #define WRITE_PMULT(addrp, r, v, out) \
4551 if (ahci_write_pmult(ahci_ctlp, addrp, r, v) != AHCI_SUCCESS) \
4552 goto out;
4554 /*
4555 * Update sata registers on port multiplier, including GSCR/PSCR registers.
4556 * ahci_update_pmult_gscr()
4557 * ahci_update_pmult_pscr()
4558 */
4559 static int
4562 {
4575 }
4577 static int
4580 {
4594 }
4596 /*
4597 * ahci_initialize_pmult()
4598 *
4599 * Initialize a port multiplier, including
4600 * 1. Enable FEATURES register at port multiplier. (SATA Chp.16)
4601 * 2. Redefine MASK register. (SATA Chap 16.?)
4602 */
4603 static int
4606 {
4607 sata_pmult_gscr_t sg;
4616 /*
4617 * Enable features of port multiplier. Currently only
4618 * Asynchronous Notification is enabled.
4619 */
4620 /* Check gscr64 for supported features. */
4625 "port %d: Port Multiplier supports "
4628 /* Write to gscr96 to enabled features */
4634 AHCI_SNOTIF_CLEAR_ALL);
4638 }
4640 /*
4641 * Now we need to update gscr33 register to enable hot-plug interrupt
4642 * for sub devices behind port multiplier.
4643 */
4648 /*
4649 * Fetch the number of device ports of the port multiplier
4650 */
4654 /* Register the port multiplier to SATA Framework. */
4666 /* Till now port-mult is successfully initialized */
4672 }
4674 /*
4675 * Initialize a port multiplier port. According to spec, firstly we need
4676 * issue a COMRESET, then a software reset to get its signature.
4677 *
4678 * NOTE: This function should only be called in ahci_probe_pmport()
4679 */
4680 static int
4683 {
4695 /* Check HBA port state */
4698 "ahci_initialize_pmport:"
4702 }
4706 }
4709 /* Checking for outstanding commands */
4718 }
4723 /* Clear status */
4726 /* Firstly assume an unknown device */
4731 /* port reset is necessary for port multiplier port */
4734 "ahci_initialize_pmport:"
4738 }
4740 /* Is port failed? */
4742 SATA_PSTATE_FAILED) {
4744 "ahci_initialize_pmport: port %d:%d failed. "
4748 }
4750 /* Is there any device attached? */
4753 /* Do not waste time on an empty port */
4755 "ahci_initialize_pmport: No device is found "
4759 }
4765 /*
4766 * Till now we can assure a device attached to that HBA port and work
4767 * correctly. Now try to get the device signature. This is an optional
4768 * step. If failed, unknown device is assumed, then SATA module will
4769 * continue to use IDENTIFY DEVICE to get the information of the
4770 * device.
4771 */
4776 out:
4777 /* Next try to mop the pending commands */
4787 ahci_portp,
4788 slot_status,
4794 /* Clear PxSNTF register if supported. */
4798 AHCI_SNOTIF_CLEAR_ALL);
4799 }
4804 }
4806 /*
4807 * ahci_probe_pmult()
4808 *
4809 * This function will be called to probe a port multiplier, which will
4810 * handle hotplug events on port multiplier ports.
4811 *
4812 * NOTE: Only called from ahci_tran_probe_port()
4813 */
4814 static int
4817 {
4818 sata_device_t sdevice;
4819 ahci_addr_t pmport_addr;
4828 /* The bits in GSCR32 refers to the pmport that has a hot-plug event. */
4835 /* no pending hot plug events. */
4843 /* Check previous device at that port */
4848 /* PxSStatus tells the presence of device. */
4853 SSTATUS_DET_DEVPRE_PHYCOM)
4856 /*
4857 * Clear PxSERR is critical. The transition from 0 to 1 will
4858 * emit a FIS which generates an asynchronous notification
4859 * event at controller. If we fail to clear the PxSERR, the
4860 * Async Notif events will no longer be activated on this
4861 * pmport.
4862 */
4875 dev_exists_now);
4879 /* Link (may) not change: Exist -> Exist * */
4881 "ahci_probe_pmult: port %d:%d "
4888 sata_tran_hba_dip,
4890 SATA_EVNT_LINK_LOST|
4891 SATA_EVNT_LINK_ESTABLISHED);
4894 /* Link change: None -> Exist */
4896 "ahci_probe_pmult: port %d:%d "
4899 /* Clear port state */
4901 SATA_STATE_UNKNOWN);
4903 "ahci_probe_pmult: port %d "
4909 sata_tran_hba_dip,
4911 SATA_EVNT_LINK_ESTABLISHED);
4913 }
4917 /* Link change: Exist -> None */
4919 "ahci_probe_pmult: port %d:%d "
4922 /* An existing device is lost. */
4924 SATA_STATE_UNKNOWN);
4926 SATA_DTYPE_NONE);
4931 sata_tran_hba_dip,
4933 SATA_EVNT_LINK_LOST);
4935 }
4936 }
4945 }
4947 /*
4948 * Probe and initialize a port multiplier port.
4949 * A port multiplier port could only be initilaizer here.
4950 */
4951 static int
4954 {
4957 ahci_addr_t addr_pmult;
4961 /*
4962 * Check the parent - port multiplier first.
4963 */
4965 /*
4966 * Parent port multiplier might have been removed. This event will be
4967 * ignored and failure.
4968 */
4972 "ahci_tran_probe_port: "
4976 }
4978 /* The port is ready? */
4982 "ahci_tran_probe_port: "
4987 AHCI_SUCCESS) {
4989 "ahci_tran_probe_port: "
4992 }
4993 }
4995 /*
4996 * If port-mult is restarted due to some reason, we need
4997 * re-initialized the PMult.
4998 */
5000 /* Initialize registers on a port multiplier */
5005 }
5007 /*
5008 * Then we check the port-mult port
5009 */
5010 /* Is this pmport initialized? */
5014 /* ahci_initialize_pmport() will set READY state */
5018 }
5021 }
5023 /*
5024 * AHCI device reset ...; a single device on one of the ports is reset,
5025 * but the HBA and physical communication remain intact. This is the
5026 * least intrusive.
5027 *
5028 * When issuing a software reset sequence, there should not be other
5029 * commands in the command list, so we will first clear and then re-set
5030 * PxCMD.ST to clear PxCI. And before issuing the software reset,
5031 * the port must be idle and PxTFD.STS.BSY and PxTFD.STS.DRQ must be
5032 * cleared unless command list override (PxCMD.CLO) is supported.
5033 */
5034 static int
5037 {
5052 /* First clear PxCMD.ST (AHCI v1.2 10.4.1) */
5058 }
5060 /* Check PxTFD.STS.BSY and PxTFD.STS.DRQ */
5068 "PxTFD.STS.BSY/DRQ is set (PxTFD=0x%x), "
5071 }
5073 /*
5074 * If HBA Support CLO, as Command List Override (CAP.SCLO is
5075 * set), PxCMD.CLO bit should be set before set PxCMD.ST, in
5076 * order to clear PxTFD.STS.BSY and PxTFD.STS.DRQ.
5077 */
5087 /* Waiting till PxCMD.SCLO bit is cleared */
5090 /* Wait for 10 millisec */
5093 /* We are effectively timing out after 1 sec. */
5098 }
5100 port_cmd_status =
5105 /* Re-check */
5112 port_task_file);
5114 }
5115 }
5117 /* Then start port */
5123 }
5125 /*
5126 * When ahci_port.ahciport_mop_in_progress is set, A non-zero
5127 * ahci_port.ahciport_pending_ncq_tags may fail
5128 * ahci_claim_free_slot(). Actually according to spec, by clearing
5129 * PxCMD.ST there is no command outstanding while executing software
5130 * reseting. Hence we directly use slot 0 instead of
5131 * ahci_claim_free_slot().
5132 */
5135 /* Now send the first H2D Register FIS with SRST set to 1 */
5139 h2d_register_fisp =
5146 /* Set Command Header in Command List */
5159 ahci_cmd_table_size,
5160 DDI_DMA_SYNC_FORDEV);
5165 DDI_DMA_SYNC_FORDEV);
5167 /* Indicate to the HBA that a command is active. */
5174 /* Loop till the first command is finished */
5179 /* We are effectively timing out after 1 sec. */
5182 "the first SRST FIS is timed out, "
5185 }
5186 /* Wait for 10 millisec */
5191 "ahci_software_reset: 1st loop count: %d, "
5195 /* According to ATA spec, we need wait at least 5 microsecs here. */
5198 /* Now send the second H2D Register FIS with SRST cleard to zero */
5202 h2d_register_fisp =
5208 /* Set Command Header in Command List */
5219 ahci_cmd_table_size,
5220 DDI_DMA_SYNC_FORDEV);
5225 DDI_DMA_SYNC_FORDEV);
5227 /* Indicate to the HBA that a command is active. */
5234 /* Loop till the second command is finished */
5239 /* We are effectively timing out after 1 sec. */
5242 "the second SRST FIS is timed out, "
5245 }
5247 /* Wait for 10 millisec */
5252 "ahci_software_reset: 2nd loop count: %d, "
5259 DDI_SERVICE_UNAFFECTED);
5261 }
5264 out:
5271 }
5273 /*
5274 * AHCI port reset ...; the physical communication between the HBA and device
5275 * on a port are disabled. This is more intrusive.
5276 *
5277 * When an HBA or port reset occurs, Phy communication is going to
5278 * be re-established with the device through a COMRESET followed by the
5279 * normal out-of-band communication sequence defined in Serial ATA. At
5280 * the end of reset, the device, if working properly, will send a D2H
5281 * Register FIS, which contains the device signature. When the HBA receives
5282 * this FIS, it updates PxTFD.STS and PxTFD.ERR register fields, and updates
5283 * the PxSIG register with the signature.
5284 *
5285 * NOTE: It is expected both PxCMD.ST and PxCMD.CR are cleared before the
5286 * function is called. If not, it is assumed the interface is in hung
5287 * condition.
5288 */
5289 static int
5292 {
5293 ahci_addr_t pmult_addr;
5305 /* Target is a port multiplier port? */
5309 /* Otherwise it must be an HBA port. */
5319 /*
5320 * According to the spec, SUD bit should be set here,
5321 * but JMicron JMB363 doesn't follow it, so print
5322 * a debug message.
5323 */
5334 port_scontrol);
5336 /* Enable PxCMD.FRE to read device */
5341 /*
5342 * The port enters P:StartComm state, and the HBA tells the link layer
5343 * to start communication, which involves sending COMRESET to the
5344 * device. And the HBA resets PxTFD.STS to 7Fh.
5345 *
5346 * Give time for COMRESET to percolate, according to the AHCI
5347 * spec, software shall wait at least 1 millisecond before
5348 * clearing PxSCTL.DET
5349 */
5352 /* Fetch the SCONTROL again and rewrite the DET part with 0 */
5358 port_scontrol);
5360 /*
5361 * When a COMINIT is received from the device, then the port enters
5362 * P:ComInit state. And HBA sets PxTFD.STS to FFh or 80h. HBA sets
5363 * PxSSTS.DET to 1h to indicate a device is detected but communication
5364 * is not yet established. HBA sets PxSERR.DIAG.X to '1' to indicate
5365 * a COMINIT has been received.
5366 */
5367 /*
5368 * The DET field is valid only if IPM field indicates
5369 * that the interface is in active state.
5370 */
5377 /*
5378 * If the interface is not active, the DET field
5379 * is considered not accurate. So we want to
5380 * continue looping.
5381 */
5383 }
5389 /*
5390 * We are effectively timing out after 0.1 sec.
5391 */
5393 }
5395 /* Wait for 10 millisec */
5397 }
5400 "ahci_port_reset: 1st loop count: %d, "
5405 /*
5406 * Either the port is not active or there
5407 * is no device present.
5408 */
5411 }
5413 /* Clear port serror register for the port */
5416 AHCI_SERROR_CLEAR_ALL);
5418 /*
5419 * Devices should return a FIS contains its signature to HBA after
5420 * COMINIT signal. Check whether a D2H Register FIS is received by
5421 * polling PxTFD.STS.
5422 */
5425 port_task_file =
5434 /*
5435 * We are effectively timing out after 11 sec.
5436 */
5438 "the device hardware has been initialized and "
5443 "port %d: some or all of BSY, DRQ and ERR in "
5444 "PxTFD.STS are not clear. We need another "
5447 /* Clear port serror register for the port */
5450 AHCI_SERROR_CLEAR_ALL);
5454 /* Try another software reset. */
5458 SATA_PSTATE_FAILED);
5460 }
5462 }
5464 /* Wait for 10 millisec */
5466 }
5469 "ahci_port_reset: 2nd loop count: %d, "
5473 /* Clear port serror register for the port */
5476 AHCI_SERROR_CLEAR_ALL);
5478 /* Set port as ready */
5485 }
5487 /*
5488 * COMRESET on a port multiplier port.
5489 *
5490 * NOTE: Only called in ahci_port_reset()
5491 */
5492 static int
5495 {
5507 /* Initialize pmport state */
5514 /* PxCMD.FRE should be set before. */
5521 /*
5522 * Give time for COMRESET to percolate, according to the AHCI
5523 * spec, software shall wait at least 1 millisecond before
5524 * clearing PxSCTL.DET
5525 */
5528 /*
5529 * Fetch the SCONTROL again and rewrite the DET part with 0
5530 * This will generate an Asychronous Notification events.
5531 */
5536 /*
5537 * The port enters P:StartComm state, and HBA tells link layer to
5538 * start communication, which involves sending COMRESET to device.
5539 * And the HBA resets PxTFD.STS to 7Fh.
5540 *
5541 * When a COMINIT is received from the device, then the port enters
5542 * P:ComInit state. And HBA sets PxTFD.STS to FFh or 80h. HBA sets
5543 * PxSSTS.DET to 1h to indicate a device is detected but communication
5544 * is not yet established. HBA sets PxSERR.DIAG.X to '1' to indicate
5545 * a COMINIT has been received.
5546 */
5547 /*
5548 * The DET field is valid only if IPM field indicates
5549 * that the interface is in active state.
5550 */
5556 /*
5557 * If the interface is not active, the DET field
5558 * is considered not accurate. So we want to
5559 * continue looping.
5560 */
5562 }
5565 /*
5566 * We are effectively timing out after 0.1 sec.
5567 */
5569 }
5571 /* Wait for 10 millisec */
5577 "ahci_pmport_reset: 1st loop count: %d, "
5583 /*
5584 * Either the port is not active or there
5585 * is no device present.
5586 */
5588 "ahci_pmport_reset: "
5593 }
5595 /* Now we can make sure there is a device connected to the port */
5596 /* COMINIT signal is supposed to be received (PxSERR.DIAG.X = '1') */
5606 }
5608 /*
5609 * After clear PxSERR register, we will receive a D2H FIS.
5610 * Normally this FIS will cause a IPMS error according to AHCI spec
5611 * v1.2 because there is no command outstanding for it. So we need
5612 * to ignore this error.
5613 */
5617 /* Now we need to check the D2H FIS by checking IPMS error. */
5624 /*
5625 * No D2H FIS received. This is possible according
5626 * to SATA 2.6 spec.
5627 */
5629 "PxIS.IPMS is not set, we need another "
5633 }
5635 /* Wait for 10 millisec */
5643 "ahci_pmport_reset: 2st loop count: %d, "
5647 /* Clear IPMS */
5650 AHCI_INTR_STATUS_IPMS);
5653 /* This pmport is now ready for ahci_tran_start() */
5662 /* IPMS flags might be set before. */
5668 }
5670 /*
5671 * AHCI HBA reset ...; the entire HBA is reset, and all ports are disabled.
5672 * This is the most intrusive.
5673 *
5674 * When an HBA reset occurs, Phy communication will be re-established with
5675 * the device through a COMRESET followed by the normal out-of-band
5676 * communication sequence defined in Serial ATA. At the end of reset, the
5677 * device, if working properly, will send a D2H Register FIS, which contains
5678 * the device signature. When the HBA receives this FIS, it updates PxTFD.STS
5679 * and PxTFD.ERR register fields, and updates the PxSIG register with the
5680 * signature.
5681 *
5682 * Remember to set GHC.AE to 1 before calling ahci_hba_reset.
5683 */
5684 static int
5686 {
5694 NULL);
5701 /* Setting GHC.HR to 1, remember GHC.AE is already set to 1 before */
5706 /*
5707 * Wait until HBA Reset complete or timeout
5708 */
5716 "ahci hba reset is timing out, "
5718 /* We are effectively timing out after 1 sec. */
5720 }
5722 /* Wait for 10 millisec */
5727 "ahci_hba_reset: 1st loop count: %d, "
5731 /* The hba is not reset for some reasons */
5736 }
5738 /*
5739 * HBA reset will clear (AHCI Spec v1.2 10.4.3) GHC.IE / GHC.AE
5740 */
5750 /* Only check implemented ports */
5753 }
5758 /* Make sure the drive is spun-up */
5763 AHCI_SUCCESS) {
5767 /*
5768 * Set the port state to SATA_PSTATE_FAILED if
5769 * failed to initialize it.
5770 */
5772 }
5775 }
5778 }
5780 /*
5781 * This routine is only called from AHCI_ATTACH or phyrdy change
5782 * case. It first calls software reset, then stop the port and try to
5783 * read PxSIG register to find the type of device attached to the port.
5784 *
5785 * The caller should make sure a valid device exists on specified port and
5786 * physical communication has been established so that the signature could
5787 * be retrieved by software reset.
5788 *
5789 * NOTE: The port interrupts should be disabled before the function is called.
5790 */
5791 static void
5794 {
5795 ahci_addr_t dev_addr;
5804 /*
5805 * If the HBA doesn't support port multiplier, then the driver
5806 * doesn't need to bother to check port multiplier device.
5807 *
5808 * The second port of ICH7 on ASUS P5W DH deluxe motherboard is
5809 * connected to Silicon Image 4723, to which the two sata drives
5810 * attached can be set with RAID1, RAID0 or Spanning mode.
5811 *
5812 * We found software reset will get failure if port multiplier address
5813 * 0xf is used by software reset, so just ignore the check since
5814 * ICH7 doesn't support port multiplier device at all.
5815 */
5821 /*
5822 * NOTE: when the ahci address is a HBA port, we do not know
5823 * it is a device or a port multiplier that attached. we need
5824 * try a software reset at port multiplier address (0xf
5825 * pmport)
5826 */
5833 }
5835 /* Assume it is unknown. */
5838 /* Issue a software reset to get the signature */
5842 /*
5843 * Try to do software reset again with pmport set with 0 if
5844 * the controller is set with AHCI_CAP_SRST_NO_HOSTPORT and
5845 * the original pmport is set with SATA_PMULT_HOSTPORT (0xf)
5846 */
5852 }
5856 "ahci_find_dev_signature: software reset failed "
5861 SATA_PSTATE_FAILED);
5863 }
5864 }
5866 /*
5867 * ahci_software_reset has started the port, so we need manually stop
5868 * the port again.
5869 */
5875 port);
5878 }
5879 }
5881 /* Now we can make sure that a valid signature is received. */
5893 }
5895 /* NOTE: Only support ATAPI device at controller port. */
5914 /* Port Multiplier cannot recursively attached. */
5925 }
5926 }
5928 /*
5929 * According to the spec, to reliably detect hot plug removals, software
5930 * must disable interface power management. Software should perform the
5931 * following initialization on a port after a device is attached:
5932 * Set PxSCTL.IPM to 3h to disable interface state transitions
5933 * Set PxCMD.ALPE to '0' to disable aggressive power management
5934 * Disable device initiated interface power management by SET FEATURE
5935 *
5936 * We can ignore the last item because by default the feature is disabled
5937 */
5938 static void
5940 {
5954 }
5956 /*
5957 * Start the port - set PxCMD.ST to 1, if PxCMD.FRE is not set
5958 * to 1, then set it firstly.
5959 *
5960 * Each port contains two major DMA engines. One DMA engine walks through
5961 * the command list, and is controlled by PxCMD.ST. The second DMA engine
5962 * copies received FISes into system memory, and is controlled by PxCMD.FRE.
5963 *
5964 * Software shall not set PxCMD.ST to '1' until it verifies that PxCMD.CR
5965 * is '0' and has set PxCMD.FRE is '1'. And software shall not clear
5966 * PxCMD.FRE while PxCMD.ST or PxCMD.CR is set '1'.
5967 *
5968 * Software shall not set PxCMD.ST to '1' unless a functional device is
5969 * present on the port(as determined by PxTFD.STS.BSY = '0',
5970 * PxTFD.STS.DRQ = '0', and PxSSTS.DET = 3h).
5971 */
5972 static int
5974 {
5986 }
5992 }
5994 /* First to set PxCMD.FRE before setting PxCMD.ST. */
6002 port_cmd_status);
6003 }
6012 port_cmd_status);
6020 }
6022 /*
6023 * Setup PxCLB, PxCLBU, PxFB, and PxFBU for particular port. First, we need
6024 * to make sure PxCMD.ST, PxCMD.CR, PxCMD.FRE, and PxCMD.FR are all cleared.
6025 * Then set PxCLB, PxCLBU, PxFB, and PxFBU.
6026 */
6027 static int
6029 {
6036 /* Step 1: Make sure both PxCMD.ST and PxCMD.CR are cleared. */
6044 }
6046 /* Step 2: Make sure both PxCMD.FRE and PxCMD.FR are cleared. */
6050 /* Clear PxCMD.FRE */
6054 port_cmd_status);
6056 /* Wait until PxCMD.FR is cleared */
6058 port_cmd_status =
6067 "ahci_setup_port_base_addresses: cannot "
6070 /*
6071 * We are effectively timing out after 0.5 sec.
6072 * This value is specified in AHCI spec.
6073 */
6075 }
6077 /* Wait for 1 millisec */
6079 }
6080 }
6082 /* Step 3: Config Port Command List Base Address */
6091 /* Step 4: Config Port Received FIS Base Address */
6101 }
6103 /*
6104 * Allocate the ahci_port_t including Received FIS and Command List.
6105 * The argument - port is the physical port number, and not logical
6106 * port number seen by the SATA framework.
6107 */
6108 static int
6110 {
6117 ahci_portp =
6123 /* Initialize the port condition variable */
6126 /* Initialize the port mutex */
6132 /*
6133 * Allocate memory for received FIS structure and
6134 * command list for this port
6135 */
6138 }
6142 }
6144 /* Setup PxCMD.CLB, PxCMD.CLBU, PxCMD.FB, and PxCMD.FBU */
6146 AHCI_SUCCESS) {
6148 }
6154 /* Create the taskq for the port */
6160 }
6162 /* Allocate the argument for the taskq */
6172 /* Initialize the done queue */
6181 err_case4:
6184 err_case3:
6187 err_case2:
6190 err_case1:
6198 }
6200 /*
6201 * Reverse of ahci_alloc_port_state().
6202 */
6203 static void
6205 {
6229 }
6231 /*
6232 * Allocates memory for the Received FIS Structure
6233 */
6234 static int
6236 {
6239 uint_t cookie_count;
6245 /* allocate rcvd FIS dma handle. */
6248 DDI_DMA_SLEEP,
6249 NULL,
6251 DDI_SUCCESS) {
6256 }
6259 rcvd_fis_size,
6261 DDI_DMA_CONSISTENT,
6262 DDI_DMA_SLEEP,
6263 NULL,
6270 /* error.. free the dma handle. */
6273 }
6276 NULL,
6278 rcvd_fis_size,
6280 DDI_DMA_SLEEP,
6281 NULL,
6287 /* error.. free the dma handle & free the memory. */
6291 }
6301 }
6303 /*
6304 * Deallocates the Received FIS Structure
6305 */
6306 static void
6308 {
6311 /* Unbind the cmd list dma handle first. */
6314 /* Then free the underlying memory. */
6317 /* Now free the handle itself. */
6319 }
6321 /*
6322 * Allocates memory for the Command List, which contains up to 32 entries.
6323 * Each entry contains a command header, which is a 32-byte structure that
6324 * includes the pointer to the command table.
6325 */
6326 static int
6328 {
6331 uint_t cookie_count;
6335 cmd_list_size =
6338 /* allocate cmd list dma handle. */
6341 DDI_DMA_SLEEP,
6342 NULL,
6348 }
6351 cmd_list_size,
6353 DDI_DMA_CONSISTENT,
6354 DDI_DMA_SLEEP,
6355 NULL,
6362 /* error.. free the dma handle. */
6365 }
6368 NULL,
6370 cmd_list_size,
6372 DDI_DMA_SLEEP,
6373 NULL,
6379 /* error.. free the dma handle & free the memory. */
6383 }
6395 }
6399 err_out:
6400 /* Unbind the cmd list dma handle first. */
6403 /* Then free the underlying memory. */
6406 /* Now free the handle itself. */
6410 }
6412 /*
6413 * Deallocates the Command List
6414 */
6415 static void
6417 {
6420 /* First dealloc command table */
6423 /* Unbind the cmd list dma handle first. */
6426 /* Then free the underlying memory. */
6429 /* Now free the handle itself. */
6431 }
6433 /*
6434 * Allocates memory for all Command Tables, which contains Command FIS,
6435 * ATAPI Command and Physical Region Descriptor Table.
6436 */
6437 static int
6439 {
6441 ddi_dma_cookie_t cmd_table_dma_cookie;
6442 uint_t cookie_count;
6452 /* Allocate cmd table dma handle. */
6455 DDI_DMA_SLEEP,
6456 NULL,
6458 DDI_SUCCESS) {
6464 }
6468 ahci_cmd_table_size,
6470 DDI_DMA_CONSISTENT,
6471 DDI_DMA_SLEEP,
6472 NULL,
6481 /* error.. free the dma handle. */
6485 }
6489 NULL,
6491 ahci_cmd_table_size,
6493 DDI_DMA_SLEEP,
6494 NULL,
6500 /* error.. free the dma handle & free the memory. */
6506 }
6509 ahci_cmd_table_size);
6511 /* Config Port Command Table Base Address */
6516 #ifndef __lock_lint
6520 #endif
6521 }
6524 err_out:
6527 /* Unbind the cmd table dma handle first */
6531 /* Then free the underlying memory */
6535 /* Now free the handle itself */
6538 }
6541 }
6543 /*
6544 * Deallocates memory for all Command Tables.
6545 */
6546 static void
6548 {
6558 /* Unbind the cmd table dma handle first. */
6562 /* Then free the underlying memory. */
6566 /* Now free the handle itself. */
6569 }
6570 }
6572 /*
6573 * Update SATA registers at controller ports
6574 */
6575 static void
6578 {
6593 }
6595 /*
6596 * For poll mode, ahci_port_intr will be called to emulate the interrupt
6597 */
6598 static void
6600 {
6609 /* For SATA_OPMODE_POLLING commands */
6610 port_intr_enable =
6612 AHCI_INTR_STATUS_PSS |
6613 AHCI_INTR_STATUS_SDBS |
6614 AHCI_INTR_STATUS_UFS |
6615 AHCI_INTR_STATUS_PCS |
6616 AHCI_INTR_STATUS_PRCS |
6617 AHCI_INTR_STATUS_OFS |
6618 AHCI_INTR_STATUS_INFS |
6619 AHCI_INTR_STATUS_IFS |
6620 AHCI_INTR_STATUS_HBDS |
6621 AHCI_INTR_STATUS_HBFS |
6622 AHCI_INTR_STATUS_TFES);
6624 /*
6625 * port_intr_enable indicates that the corresponding interrrupt
6626 * reporting is enabled.
6627 */
6630 }
6632 /* IPMS error in port reset should be ignored according AHCI spec. */
6637 /*
6638 * port_intr_stats indicates that the corresponding interrupt
6639 * condition is active.
6640 */
6645 "ahci_port_intr: port %d, port_intr_status = 0x%x, "
6651 /*
6652 * Pending interrupt events are indicated by the PxIS register.
6653 * Make sure we don't miss any event.
6654 */
6657 DDI_SERVICE_UNAFFECTED);
6659 DDI_FME_VERSION);
6661 }
6663 /* First clear the port interrupts status */
6666 port_intr_status);
6668 /* Check the completed non-queued commands */
6670 AHCI_INTR_STATUS_PSS)) {
6673 }
6675 /* Check the completed queued commands */
6679 }
6681 /* Check the port connect change status interrupt bit */
6685 }
6687 /* Check the device mechanical presence status interrupt bit */
6691 }
6693 /* Check the PhyRdy change status interrupt bit */
6696 port);
6697 }
6699 /*
6700 * Check the non-fatal error interrupt bits, there are four
6701 * kinds of non-fatal errors at the time being:
6702 *
6703 * PxIS.UFS - Unknown FIS Error
6704 * PxIS.OFS - Overflow Error
6705 * PxIS.INFS - Interface Non-Fatal Error
6706 * PxIS.IPMS - Incorrect Port Multiplier Status Error
6707 *
6708 * For these non-fatal errors, the HBA can continue to operate,
6709 * so the driver just log the error messages.
6710 */
6712 AHCI_INTR_STATUS_OFS |
6713 AHCI_INTR_STATUS_IPMS |
6714 AHCI_INTR_STATUS_INFS)) {
6717 }
6719 /*
6720 * Check the fatal error interrupt bits, there are four kinds
6721 * of fatal errors for AHCI controllers:
6722 *
6723 * PxIS.HBFS - Host Bus Fatal Error
6724 * PxIS.HBDS - Host Bus Data Error
6725 * PxIS.IFS - Interface Fatal Error
6726 * PxIS.TFES - Task File Error
6727 *
6728 * The fatal error means the HBA can not recover from it by
6729 * itself, and it will try to abort the transfer, and the software
6730 * must intervene to restart the port.
6731 */
6733 AHCI_INTR_STATUS_HBDS |
6734 AHCI_INTR_STATUS_HBFS |
6735 AHCI_INTR_STATUS_TFES))
6739 /* Check the cold port detect interrupt bit */
6742 }
6744 /* Second clear the corresponding bit in IS.IPS */
6748 /* Try to recover at the end of the interrupt handler. */
6750 DDI_FM_OK) {
6752 DDI_SERVICE_UNAFFECTED);
6754 DDI_FME_VERSION);
6755 }
6756 }
6758 /*
6759 * Interrupt service handler
6760 */
6761 static uint_t
6763 {
6764 #ifndef __lock_lint
6766 #endif
6767 /* LINTED */
6773 /*
6774 * global_intr_status indicates that the corresponding port has
6775 * an interrupt pending.
6776 */
6781 /* The interrupt is not ours */
6783 }
6785 /*
6786 * Check the handle after reading global_intr_status - we don't want
6787 * to miss any port with pending interrupts.
6788 */
6790 DDI_FM_OK) {
6792 DDI_SERVICE_UNAFFECTED);
6794 DDI_FME_VERSION);
6796 }
6798 /* Loop for all the ports */
6802 }
6805 }
6809 /* Call ahci_port_intr */
6811 }
6814 }
6816 /*
6817 * For non-queued commands, when the corresponding bit in the PxCI register
6818 * is cleared, it means the command is completed successfully. And according
6819 * to the HBA state machine, there are three conditions which possibly will
6820 * try to clear the PxCI register bit.
6821 * 1. Receive one D2H Register FIS which is with 'I' bit set
6822 * 2. Update PIO Setup FIS
6823 * 3. Transmit a command and receive R_OK if CTBA.C is set (software reset)
6824 *
6825 * Process completed non-queued commands when the interrupt status bit -
6826 * AHCI_INTR_STATUS_DHRS or AHCI_INTR_STATUS_PSS is set.
6827 *
6828 * AHCI_INTR_STATUS_DHRS means a D2H Register FIS has been received
6829 * with the 'I' bit set. And the following commands will send thus
6830 * FIS with 'I' bit set upon the successful completion:
6831 * 1. Non-data commands
6832 * 2. DMA data-in command
6833 * 3. DMA data-out command
6834 * 4. PIO data-out command
6835 * 5. PACKET non-data commands
6836 * 6. PACKET PIO data-in command
6837 * 7. PACKET PIO data-out command
6838 * 8. PACKET DMA data-in command
6839 * 9. PACKET DMA data-out command
6840 *
6841 * AHCI_INTR_STATUS_PSS means a PIO Setup FIS has been received
6842 * with the 'I' bit set. And the following commands will send this
6843 * FIS upon the successful completion:
6844 * 1. PIO data-in command
6845 */
6846 static int
6849 {
6855 #if AHCI_DEBUG
6858 #endif
6865 /*
6866 * Spurious interrupt. Nothing to be done.
6867 */
6870 }
6875 /* If the PxCI corrupts, don't complete the commmands. */
6880 }
6883 /* Slot 0 is always used during error recovery */
6886 "ahci_intr_cmd_cmplt: port %d the sata pkt for error "
6892 "ahci_intr_cmd_cmplt: port %d the sata pkt for r/w "
6900 }
6903 "ahci_intr_cmd_cmplt: pending_tags = 0x%x, "
6906 finished_tags);
6914 "ahci_intr_cmd_cmplt: sending up pkt 0x%p "
6919 }
6927 "ahci_intr_cmd_cmplt: sending up pkt 0x%p "
6930 /* READ PORTMULT need copy out FIS content. */
6933 ahcirf_d2h_register_fis);
6937 }
6941 }
6947 }
6951 #if AHCI_DEBUG
6952 /*
6953 * For non-native queued commands, the PRD byte count field
6954 * shall contain an accurate count of the number of bytes
6955 * transferred for the command before the PxCI bit is cleared
6956 * to '0' for the command.
6957 *
6958 * The purpose of this field is to let software know how many
6959 * bytes transferred for a given operation in order to
6960 * determine if underflow occurred. When issuing native command
6961 * queuing commands, this field should not be used and is not
6962 * required to be valid since in this case underflow is always
6963 * illegal.
6964 *
6965 * For data reads, the HBA will update its PRD byte count with
6966 * the total number of bytes received from the last FIS, and
6967 * may be able to continue normally. For data writes, the
6968 * device will detect an error, and HBA most likely will get
6969 * a fatal error.
6970 *
6971 * Therefore, here just put code to debug part. And please
6972 * refer to the comment above ahci_intr_fatal_error for the
6973 * definition of underflow error.
6974 */
6975 cmd_dmacount =
6978 cmd_header =
6981 "ahci_intr_cmd_cmplt: port %d, "
6982 "PRD Byte Count = 0x%x, "
6985 cmd_dmacount);
6989 "ahci_intr_cmd_cmplt: port %d, "
6991 }
6992 }
6993 #endif
6995 /*
6996 * For SATAC_SMART command with SATA_SMART_RETURN_STATUS
6997 * feature, sata_special_regs flag will be set, and the
6998 * driver should copy the status and the other corresponding
6999 * register values in the D2H Register FIS received (It's
7000 * working on Non-data protocol) from the device back to
7001 * the sata_cmd.
7002 *
7003 * For every AHCI port, there is only one Received FIS
7004 * structure, which contains the FISes received from the
7005 * device, So we're trying to copy the content of D2H
7006 * Register FIS in the Received FIS structure back to
7007 * the sata_cmd.
7008 */
7011 ahcirf_d2h_register_fis);
7015 }
7018 "ahci_intr_cmd_cmplt: sending up pkt 0x%p "
7026 }
7027 out:
7037 }
7039 /*
7040 * AHCI_INTR_STATUS_SDBS means a Set Device Bits FIS has been received
7041 * with the 'I' bit set and has been copied into system memory. It will
7042 * be sent under the following situations:
7043 *
7044 * 1. NCQ command is completed
7045 *
7046 * The completion of NCQ commands (READ/WRITE FPDMA QUEUED) is performed
7047 * via the Set Device Bits FIS. When such event is generated, the software
7048 * needs to read PxSACT register and compares the current value to the
7049 * list of commands previously issue by software. ahciport_pending_ncq_tags
7050 * keeps the tags of previously issued commands.
7051 *
7052 * 2. Asynchronous Notification
7053 *
7054 * Asynchronous Notification is a feature in SATA spec 2.6.
7055 *
7056 * 1) ATAPI device will send a signal to the host when media is inserted or
7057 * removed and avoids polling the device for media changes. The signal
7058 * sent to the host is a Set Device Bits FIS with the 'I' and 'N' bits
7059 * set to '1'. At the moment, it's not supported yet.
7060 *
7061 * 2) Port multiplier will send a signal to the host when a hot plug event
7062 * has occured on a port multiplier port. It is used when command based
7063 * switching is employed. This is handled by ahci_intr_pmult_sntf_events()
7064 */
7065 static int
7068 {
7069 ahci_addr_t addr;
7074 /* Initialize HBA port address */
7077 /* NCQ plug handler */
7080 /* Check port multiplier's asynchronous notification events */
7084 }
7086 /* ATAPI events is not supported yet */
7089 }
7090 /*
7091 * NCQ interrupt handler. Called upon a NCQ command is completed.
7092 * Only be called from ahci_intr_set_device_bits().
7093 */
7094 static int
7097 {
7114 }
7116 /*
7117 * First the handler got which commands are finished by checking
7118 * PxSACT register
7119 */
7127 "ahci_intr_set_device_bits: port %d pending_ncq_tags = 0x%x "
7134 /*
7135 * For NCQ commands, the software can determine which command has
7136 * already been transmitted to the device by checking PxCI register.
7137 */
7144 /* If the PxSACT/PxCI corrupts, don't complete the NCQ commmands. */
7149 }
7152 "ahci_intr_set_device_bits: port %d pending_tags = 0x%x "
7159 /*
7160 * Clear ahciport_pending_tags bit when the corresponding command
7161 * is already sent down to the device.
7162 */
7167 }
7170 }
7172 next:
7177 }
7179 /* The command is certainly transmitted to the device */
7187 "ahci_intr_set_device_bits: sending up pkt 0x%p "
7195 }
7196 out:
7198 "ahci_intr_set_device_bits: port %d "
7208 }
7210 /*
7211 * Port multiplier asynchronous notification event handler. Called upon a
7212 * device is hot plugged/pulled.
7213 *
7214 * The async-notification event will only be recorded by ahcipmi_snotif_tags
7215 * here and will be handled by ahci_probe_pmult().
7216 *
7217 * NOTE: called only from ahci_port_intr().
7218 */
7219 static int
7222 {
7223 sata_device_t sdevice;
7228 /* no hot-plug while attaching process */
7233 }
7240 }
7249 AHCI_SNOTIF_CLEAR_ALL);
7254 }
7256 /* Port Multiplier sub-device hot-plug handler */
7260 }
7263 /* Not allowed to re-enter. */
7266 }
7270 /*
7271 * NOTE:
7272 * Even if Asynchronous Notification is supported (and enabled) by
7273 * both controller and the port multiplier, the content of PxSNTF
7274 * register is always set to 0x8000 by async notification event. We
7275 * need to check GSCR[32] on the port multiplier to find out the
7276 * owner of this event.
7277 * This is not accord with SATA spec 2.6 and needs further
7278 * clarification.
7279 */
7280 /* hot-plug will not reported while reseting. */
7287 }
7293 /*
7294 * Now we need do some necessary operation and inform SATA framework
7295 * that link/device events has happened.
7296 */
7304 /* Just reject packets, do not stop that port. */
7311 SATA_EVNT_PMULT_LINK_CHANGED);
7318 }
7320 /*
7321 * 1=Change in Current Connect Status. 0=No change in Current Connect Status.
7322 * This bit reflects the state of PxSERR.DIAG.X. This bit is only cleared
7323 * when PxSERR.DIAG.X is cleared. When PxSERR.DIAG.X is set to one, it
7324 * indicates a COMINIT signal was received.
7325 *
7326 * Hot plug insertion is detected by reception of a COMINIT signal from the
7327 * device. On reception of unsolicited COMINIT, the HBA shall generate a
7328 * COMRESET. If the COMINIT is in responce to a COMRESET, then the HBA shall
7329 * begin the normal communication negotiation sequence as outlined in the
7330 * Serial ATA 1.0a specification. When a COMRESET is sent to the device the
7331 * PxSSTS.DET field shall be cleared to 0h. When a COMINIT is received, the
7332 * PxSSTS.DET field shall be set to 1h. When the communication negotiation
7333 * sequence is complete and PhyRdy is true the PxSSTS.DET field shall be set
7334 * to 3h. Therefore, at the moment the ahci driver is going to check PhyRdy
7335 * to handle hot plug insertion. In this interrupt handler, just do nothing
7336 * but print some log message and clear the bit.
7337 */
7338 static int
7341 {
7342 #if AHCI_DEBUG
7344 #endif
7348 #if AHCI_DEBUG
7353 "ahci_intr_port_connect_change: port %d, "
7355 #endif
7357 /* Clear PxSERR.DIAG.X to clear the interrupt bit */
7360 SERROR_EXCHANGED_ERR);
7365 }
7367 /*
7368 * Hot Plug Operation for platforms that support Mechanical Presence
7369 * Switches.
7370 *
7371 * When set, it indicates that a mechanical presence switch attached to this
7372 * port has been opened or closed, which may lead to a change in the connection
7373 * state of the device. This bit is only valid if both CAP.SMPS and PxCMD.MPSP
7374 * are set to '1'.
7375 *
7376 * At the moment, this interrupt is not needed and disabled and we just log
7377 * the debug message.
7378 */
7379 static int
7382 {
7386 "ahci_intr_device_mechanical_presence_status enter, "
7399 "CAP.SMPS or PxCMD.MPSP is not set, so just ignore "
7400 "the interrupt: cap_status = 0x%x, "
7405 }
7407 #if AHCI_DEBUG
7410 "The mechanical presence switch is open: "
7415 "The mechanical presence switch is close: "
7418 }
7419 #endif
7424 }
7426 /*
7427 * Native Hot Plug Support.
7428 *
7429 * When set, it indicates that the internal PHYRDY signal changed state.
7430 * This bit reflects the state of PxSERR.DIAG.N.
7431 *
7432 * There are three kinds of conditions to generate this interrupt event:
7433 * 1. a device is inserted
7434 * 2. a device is disconnected
7435 * 3. when the link enters/exits a Partial or Slumber interface power
7436 * management state
7437 *
7438 * If inteface power management is enabled for a port, the PxSERR.DIAG.N
7439 * bit may be set due to the link entering the Partial or Slumber power
7440 * management state, rather than due to a hot plug insertion or removal
7441 * event. So far, the interface power management is disabled, so the
7442 * driver can reliably get removal detection notification via the
7443 * PxSERR.DIAG.N bit.
7444 */
7445 static int
7448 {
7450 sata_device_t sdevice;
7453 ahci_addr_t port_addr;
7458 /* Clear PxSERR.DIAG.N to clear the interrupt bit */
7462 SERROR_PHY_RDY_CHG);
7468 /* The whole controller setup is not yet done. */
7471 }
7476 /* SStatus tells the presence of device. */
7482 }
7486 }
7491 "ahci_intr_phyrdy_change: port %d "
7495 }
7509 /* Things are fine now. The loss was temporary. */
7511 "ahci_intr_phyrdy_change port %d "
7523 "ahci_intr_phyrdy_change: port %d "
7526 /*
7527 * A new device has been detected. The new device
7528 * might be a port multiplier instead of a drive, so
7529 * we cannot update the signature directly.
7530 */
7534 /* Try to start the port */
7539 "ahci_intr_phyrdy_change: port %d failed "
7541 }
7543 /* Clear the max queue depth for inserted device */
7550 SATA_EVNT_LINK_ESTABLISHED);
7553 }
7558 "ahci_intr_phyrdy_change: port %d "
7566 SATA_DTYPE_PMULT) {
7568 }
7570 /* An existing device is lost. */
7578 SATA_EVNT_LINK_LOST);
7580 }
7581 }
7587 }
7589 /*
7590 * PxIS.UFS - Unknown FIS Error
7591 *
7592 * This interrupt event means an unknown FIS was received and has been
7593 * copied into system memory. An unknown FIS is not considered an illegal
7594 * FIS, unless the length received is more than 64 bytes. If an unknown
7595 * FIS arrives with length <= 64 bytes, it is posted and the HBA continues
7596 * normal operation. If the unknown FIS is more than 64 bytes, then it
7597 * won't be posted to memory and PxSERR.ERR.P will be set, which is then
7598 * a fatal error.
7599 *
7600 * PxIS.IPMS - Incorrect Port Multiplier Status
7601 *
7602 * IPMS Indicates that the HBA received a FIS from a device that did not
7603 * have a command outstanding. The IPMS bit may be set during enumeration
7604 * of devices on a Port Multiplier due to the normal Port Multiplier
7605 * enumeration process. It is recommended that IPMS only be used after
7606 * enumeration is complete on the Port Multiplier (copied from spec).
7607 *
7608 * PxIS.OFS - Overflow Error
7609 *
7610 * Command list overflow is defined as software building a command table
7611 * that has fewer total bytes than the transaction given to the device.
7612 * On device writes, the HBA will run out of data, and on reads, there
7613 * will be no room to put the data.
7614 *
7615 * For an overflow on data read, either PIO or DMA, the HBA will set
7616 * PxIS.OFS, and the HBA will do a best effort to continue, and it's a
7617 * non-fatal error when the HBA can continues. Sometimes, it will cause
7618 * a fatal error and need the software to do something.
7619 *
7620 * For an overflow on data write, setting PxIS.OFS is optional for both
7621 * DMA and PIO, and it's a fatal error, and a COMRESET is required by
7622 * software to clean up from this serious error.
7623 *
7624 * PxIS.INFS - Interface Non-Fatal Error
7625 *
7626 * This interrupt event indicates that the HBA encountered an error on
7627 * the Serial ATA interface but was able to continue operation. The kind
7628 * of error usually occurred during a non-Data FIS, and under this condition
7629 * the FIS will be re-transmitted by HBA automatically.
7630 *
7631 * When the FMA is implemented, there should be a stat structure to
7632 * record how many every kind of error happens.
7633 */
7634 static int
7637 {
7639 #if AHCI_DEBUG
7648 #endif
7656 "ahci_intr_non_fatal_error: port %d, "
7665 /* Clear the interrupt bit by clearing PxSERR.DIAG.F */
7668 SERROR_FIS_TYPE);
7669 }
7671 #if AHCI_DEBUG
7675 }
7680 }
7685 }
7687 /*
7688 * Record the error occurred command's slot.
7689 */
7696 AHCI_CMD_STATUS_CCS_SHIFT;
7704 }
7708 "ahci_intr_non_fatal_error: pending_tags = 0x%x "
7713 "ahci_intr_non_fatal_error: port %d, "
7717 /*
7718 * PRD Byte Count field of command header is not
7719 * required to reflect the total number of bytes
7720 * transferred when an overflow occurs, so here
7721 * just log the value.
7722 */
7723 cmd_dmacount =
7729 "ahci_intr_non_fatal_error: port %d, "
7730 "PRD Byte Count = 0x%x, "
7733 cmd_dmacount);
7734 }
7735 }
7737 /*
7738 * For queued command, list those command which have already
7739 * been transmitted to the device and still not completed.
7740 */
7748 "ahci_intr_non_fatal_error: pending_ncq_tags = 0x%x "
7761 }
7766 "port %d, satapkt 0x%p is outstanding when "
7770 }
7771 }
7772 out:
7773 #endif
7777 }
7779 /*
7780 * According to the AHCI spec, the error types include system memory
7781 * errors, interface errors, port multiplier errors, device errors,
7782 * command list overflow, command list underflow, native command
7783 * queuing tag errors and pio data transfer errors.
7784 *
7785 * System memory errors such as target abort, master abort, and parity
7786 * may cause the host to stop, and they are serious errors and needed
7787 * to be recovered with software intervention. When system software
7788 * has given a pointer to the HBA that doesn't exist in physical memory,
7789 * a master/target abort error occurs, and PxIS.HBFS will be set. A
7790 * data error such as CRC or parity occurs, the HBA aborts the transfer
7791 * (if necessary) and PxIS.HBDS will be set.
7792 *
7793 * Interface errors are errors that occur due to electrical issues on
7794 * the interface, or protocol miscommunication between the device and
7795 * HBA, and the respective PxSERR register bit will be set. And PxIS.IFS
7796 * (fatal) or PxIS.INFS (non-fatal) will be set. The conditions that
7797 * causes PxIS.IFS/PxIS.INFS to be set are
7798 * 1. in PxSERR.ERR, P bit is set to '1'
7799 * 2. in PxSERR.DIAG, C or H bit is set to '1'
7800 * 3. PhyRdy drop unexpectly, N bit is set to '1'
7801 * If the error occurred during a non-data FIS, the FIS must be
7802 * retransmitted, and the error is non-fatal and PxIS.INFS is set. If
7803 * the error occurred during a data FIS, the transfer will stop, so
7804 * the error is fatal and PxIS.IFS is set.
7805 *
7806 * When a FIS arrives that updates the taskfile, the HBA checks to see
7807 * if PxTFD.STS.ERR is set. If yes, PxIS.TFES will be set and the HBA
7808 * stops processing any more commands.
7809 *
7810 * Command list overflow is defined as software building a command table
7811 * that has fewer total bytes than the transaction given to the device.
7812 * On device writes, the HBA will run out of data, and on reads, there
7813 * will be no room to put the data. For an overflow on data read, either
7814 * PIO or DMA, the HBA will set PxIS.OFS, and it's a non-fatal error.
7815 * For an overflow on data write, setting PxIS.OFS is optional for both
7816 * DMA and PIO, and a COMRESET is required by software to clean up from
7817 * this serious error.
7818 *
7819 * Command list underflow is defined as software building a command
7820 * table that has more total bytes than the transaction given to the
7821 * device. For data writes, both PIO and DMA, the device will detect
7822 * an error and end the transfer. And these errors are most likely going
7823 * to be fatal errors that will cause the port to be restarted. For
7824 * data reads, the HBA updates its PRD byte count, and may be
7825 * able to continue normally, but is not required to. And The HBA is
7826 * not required to detect underflow conditions for native command
7827 * queuing command.
7828 *
7829 * The HBA does not actively check incoming DMA Setup FISes to ensure
7830 * that the PxSACT register bit for that slot is set. Existing error
7831 * mechanisms, such as host bus failure, or bad protocol, are used to
7832 * recover from this case.
7833 *
7834 * In accordance with Serial ATA 1.0a, DATA FISes prior to the final
7835 * DATA FIS must be an integral number of Dwords. If the HBA receives
7836 * a request which is not an integral number of Dwords, the HBA
7837 * set PxSERR.ERR.P to '1', set PxIS.IFS to '1' and stop running until
7838 * software restarts the port. And the HBA ensures that the size
7839 * of the DATA FIS received during a PIO command matches the size in
7840 * the Transfer Cound field of the preceding PIO Setup FIS, if not, the
7841 * HBA sets PxSERR.ERR.P to '1', set PxIS.IFS to '1', and then
7842 * stop running until software restarts the port.
7843 */
7844 /*
7845 * the fatal errors include PxIS.IFS, PxIS.HBDS, PxIS.HBFS and PxIS.TFES.
7846 *
7847 * PxIS.IFS indicates that the hba encountered an error on the serial ata
7848 * interface which caused the transfer to stop.
7849 *
7850 * PxIS.HBDS indicates that the hba encountered a data error
7851 * (uncorrectable ecc/parity) when reading from or writing to system memory.
7852 *
7853 * PxIS.HBFS indicates that the hba encountered a host bus error that it
7854 * cannot recover from, such as a bad software pointer.
7855 *
7856 * PxIS.TFES is set whenever the status register is updated by the device
7857 * and the error bit (bit 0) is set.
7858 */
7859 static int
7862 {
7877 /*
7878 * ahci_intr_phyrdy_change() may have rendered it to
7879 * SATA_DTYPE_NONE.
7880 */
7883 "ahci_intr_fatal_error: port %d no device attached, "
7886 }
7892 "ahci_intr_fatal_error: port %d "
7900 }
7902 /*
7903 * Here we just log the fatal error info in interrupt context.
7904 * Misc recovery processing will be handled in task queue.
7905 */
7908 /*
7909 * Read PxCMD.CCS to determine the slot that the HBA
7910 * was processing when the error occurred.
7911 */
7916 AHCI_CMD_STATUS_CCS_SHIFT;
7921 "ahci_intr_fatal_error: spkt 0x%p is being "
7925 /*
7926 * Won't emit the error message if it is an IDENTIFY
7927 * DEVICE command sent to an ATAPI device.
7928 */
7931 SATAC_ID_DEVICE) &&
7935 /*
7936 * Won't emit the error message if it is an ATAPI PACKET
7937 * command
7938 */
7949 }
7950 }
7952 /* print the fatal error type */
7959 /* print PxSERR related error message */
7962 /* print task file register value */
7970 }
7971 }
7973 out1:
7974 /* Prepare the argument for the taskq */
7981 /* Start the taskq to handle error recovery */
7983 ahci_events_handler,
7988 }
7989 out0:
7993 }
7995 /*
7996 * Hot Plug Operation for platforms that support Cold Presence Detect.
7997 *
7998 * When set, a device status has changed as detected by the cold presence
7999 * detect logic. This bit can either be set due to a non-connected port
8000 * receiving a device, or a connected port having its device removed.
8001 * This bit is only valid if the port supports cold presence detect as
8002 * indicated by PxCMD.CPD set to '1'.
8003 *
8004 * At the moment, this interrupt is not needed and disabled and we just
8005 * log the debug message.
8006 */
8007 static int
8010 {
8012 sata_device_t sdevice;
8023 "port %d does not support cold presence detect, so "
8027 }
8045 SATA_EVNT_DEVICE_ATTACHED);
8055 SATA_EVNT_DEVICE_DETACHED);
8057 }
8062 }
8064 /*
8065 * Enable the interrupts for a particular port.
8066 */
8067 static void
8069 {
8075 /*
8076 * Clear port interrupt status before enabling interrupt
8077 */
8080 AHCI_PORT_INTR_MASK);
8082 /*
8083 * Clear the pending bit from IS.IPS
8084 */
8088 /*
8089 * Enable the following interrupts:
8090 * Device to Host Register FIS Interrupt (DHRS)
8091 * PIO Setup FIS Interrupt (PSS)
8092 * Set Device Bits Interrupt (SDBS)
8093 * Unknown FIS Interrupt (UFS)
8094 * Port Connect Change Status (PCS)
8095 * PhyRdy Change Status (PRCS)
8096 * Overflow Status (OFS)
8097 * Interface Non-fatal Error Status (INFS)
8098 * Interface Fatal Error Status (IFS)
8099 * Host Bus Data Error Status (HBDS)
8100 * Host Bus Fatal Error Status (HBFS)
8101 * Task File Error Status (TFES)
8102 */
8106 AHCI_INTR_STATUS_PSS |
8107 AHCI_INTR_STATUS_SDBS |
8108 AHCI_INTR_STATUS_UFS |
8109 AHCI_INTR_STATUS_DPS |
8110 AHCI_INTR_STATUS_PCS |
8111 AHCI_INTR_STATUS_PRCS |
8112 AHCI_INTR_STATUS_OFS |
8113 AHCI_INTR_STATUS_INFS |
8114 AHCI_INTR_STATUS_IFS |
8115 AHCI_INTR_STATUS_HBDS |
8116 AHCI_INTR_STATUS_HBFS |
8117 AHCI_INTR_STATUS_TFES));
8118 }
8120 /*
8121 * Enable interrupts for all the ports.
8122 */
8123 static void
8125 {
8139 }
8141 /*
8142 * Disable interrupts for a particular port.
8143 */
8144 static void
8146 {
8155 }
8157 /*
8158 * Disable interrupts for the whole HBA.
8159 *
8160 * The global bit is cleared, then all interrupt sources from all
8161 * ports are disabled.
8162 */
8163 static void
8165 {
8172 NULL);
8181 }
8183 /*
8184 * Handle FIXED or MSI interrupts.
8185 */
8186 /*
8187 * According to AHCI spec, the HBA may support several interrupt modes:
8188 * * pin based interrupts (FIXED)
8189 * * single MSI message interrupts
8190 * * multiple MSI based message interrupts
8191 *
8192 * For pin based interrupts, the software interrupt handler need to check IS
8193 * register to find out which port has pending interrupts. And then check
8194 * PxIS register to find out which interrupt events happened on that port.
8195 *
8196 * For single MSI message interrupts, MSICAP.MC.MSIE is set with '1', and
8197 * MSICAP.MC.MME is set with '0'. This mode is similar to pin based interrupts
8198 * in that software interrupt handler need to check IS register to determine
8199 * which port triggered the interrupts since it uses a single message for all
8200 * port interrupts.
8201 *
8202 * HBA may optionally support multiple MSI message for better performance. In
8203 * this mode, each port may have its own interrupt message, and thus generation
8204 * of interrupts is no longer controlled through the IS register. MSICAP.MC.MMC
8205 * represents a power-of-2 wrapper on the number of implemented ports, and
8206 * the mapping of ports to interrupts is done in a 1-1 relationship, up to the
8207 * maximum number of assigned interrupts. When the number of MSI messages
8208 * allocated is less than the number requested, then hardware may have two
8209 * implementation behaviors:
8210 * * assign each ports its own interrupt and then force all additional
8211 * ports to share the last interrupt message, and this condition is
8212 * indicated by clearing GHC.MRSM to '0'
8213 * * revert to single MSI mode, indicated by setting GHC.MRSM to '1'
8214 * When multiple-message MSI is enabled, hardware will still set IS register
8215 * as single message case. And this IS register may be used by software when
8216 * fewer than the requested number of messages is granted in order to determine
8217 * which port had the interrupt.
8218 *
8219 * Note: The current ahci driver only supports the first two interrupt modes:
8220 * pin based interrupts and single MSI message interrupts, and the reason
8221 * is indicated in below code.
8222 */
8223 static int
8225 {
8233 /* get number of interrupts. */
8237 "ddi_intr_get_nintrs() failed, "
8240 }
8242 /* get number of available interrupts. */
8246 "ddi_intr_get_navail() failed, "
8249 }
8251 #if AHCI_DEBUG
8256 }
8257 #endif
8259 /*
8260 * Note: So far Solaris restricts the maximum number of messages for
8261 * x86 to 2, that is avail is 2, so here we set the count with 1 to
8262 * force the driver to use single MSI message interrupt. In future if
8263 * Solaris remove the restriction, then we need to delete the below
8264 * code and try to use multiple interrupt routine to gain better
8265 * performance.
8266 */
8269 "force to use one interrupt routine though the "
8272 }
8274 /* Allocate an array of interrupt handles. */
8279 /* call ddi_intr_alloc(). */
8285 "ddi_intr_alloc() failed, rc %d count %d actual %d "
8290 }
8292 /* use interrupt count returned */
8293 #if AHCI_DEBUG
8297 }
8298 #endif
8302 /*
8303 * Get priority for first, assume remaining are all the same.
8304 */
8310 /* Free already allocated intr. */
8313 }
8318 }
8320 /* Test for high level interrupt. */
8325 /* Free already allocated intr. */
8328 }
8334 }
8336 /* Call ddi_intr_add_handler(). */
8343 /* Free already allocated intr. */
8347 }
8352 }
8353 }
8360 /* Free already allocated intr. */
8364 }
8369 }
8372 /* Call ddi_intr_block_enable() for MSI. */
8376 /* Call ddi_intr_enable() for FIXED or MSI non block enable. */
8380 }
8381 }
8384 }
8386 /*
8387 * Removes the registered interrupts irrespective of whether they
8388 * were legacy or MSI.
8389 *
8390 * NOTE: The controller interrupts must be disabled before calling
8391 * this routine.
8392 */
8393 static void
8395 {
8400 /* Disable all interrupts. */
8403 /* Call ddi_intr_block_disable(). */
8410 }
8411 }
8413 /* Call ddi_intr_remove_handler(). */
8418 }
8421 }
8423 /*
8424 * This routine tries to put port into P:NotRunning state by clearing
8425 * PxCMD.ST. HBA will clear PxCI to 0h, PxSACT to 0h, PxCMD.CCS to 0h
8426 * and PxCMD.CR to '0'.
8427 */
8428 static int
8431 {
8448 /* Wait until PxCMD.CR is cleared */
8451 port_cmd_status =
8457 "clearing port %d CMD.CR timeout, "
8459 port_cmd_status);
8460 /*
8461 * We are effectively timing out after 0.5 sec.
8462 * This value is specified in AHCI spec.
8463 */
8465 }
8467 /* Wait for 10 millisec */
8475 "ahci_put_port_into_notrunning_state: failed to clear "
8476 "PxCMD.CR to '0' after loop count: %d, and "
8481 "ahci_put_port_into_notrunning_state: succeeded to clear "
8482 "PxCMD.CR to '0' after loop count: %d, and "
8485 }
8486 }
8488 /*
8489 * First clear PxCMD.ST, and then check PxTFD. If both PxTFD.STS.BSY
8490 * and PxTFD.STS.DRQ cleared to '0', it means the device is in a
8491 * stable state, then set PxCMD.ST to '1' to start the port directly.
8492 * If PxTFD.STS.BSY or PxTFD.STS.DRQ is set to '1', then issue a
8493 * COMRESET to the device to put it in an idle state.
8494 *
8495 * The fifth argument returns whether the port reset is involved during
8496 * the process.
8497 *
8498 * The routine will be called under following scenarios:
8499 * + To reset the HBA
8500 * + To abort the packet(s)
8501 * + To reset the port
8502 * + To activate the port
8503 * + Fatal error recovery
8504 * + To abort the timeout packet(s)
8505 *
8506 * NOTES!!! During this procedure, PxSERR register will be cleared, and
8507 * according to the spec, the clearance of three bits will also clear
8508 * three interrupt status bits.
8509 * 1. PxSERR.DIAG.F will clear PxIS.UFS
8510 * 2. PxSERR.DIAG.X will clear PxIS.PCS
8511 * 3. PxSERR.DIAG.N will clear PxIS.PRCS
8512 *
8513 * Among these three interrupt events, the driver needs to take care of
8514 * PxIS.PRCS, which is the hot plug event. When the driver found out
8515 * a device was unplugged, it will call the interrupt handler.
8516 */
8517 static int
8520 {
8523 sata_device_t sdevice;
8525 ahci_addr_t addr_port;
8543 /* First clear PxCMD.ST */
8545 port);
8547 /*
8548 * If PxCMD.CR does not clear within a reasonable time, it
8549 * may assume the interface is in a hung condition and may
8550 * continue with issuing the port reset.
8551 */
8554 /* Then clear PxSERR */
8557 AHCI_SERROR_CLEAR_ALL);
8559 /* Then get PxTFD */
8563 /*
8564 * Check whether the device is in a stable status, if yes,
8565 * then start the port directly. However for ahci_tran_reset_dport,
8566 * we may have to perform a port reset.
8567 */
8572 reset:
8573 /*
8574 * If PxTFD.STS.BSY or PxTFD.STS.DRQ is set to '1', then issue
8575 * a COMRESET to the device
8576 */
8581 #ifdef AHCI_DEBUG
8585 port);
8586 #endif
8591 /* Indicate to the framework that a reset has happened. */
8595 /* Set the reset in progress flag */
8605 SATA_DSTATE_PWR_ACTIVE;
8611 SATA_EVNT_DEVICE_RESET);
8613 }
8619 }
8621 out:
8624 /* SStatus tells the presence of device. */
8630 }
8635 /* Check whether a hot plug event happened */
8638 "ahci_restart_port_wait_till_ready: port %d "
8642 "ahci_restart_port_wait_till_ready: port %d "
8649 }
8652 /* 0/1 -> 1 : device may change */
8653 /*
8654 * May be called by ahci_fatal_error_recovery_handler, so
8655 * don't issue software if the previous device is ATAPI.
8656 */
8660 /*
8661 * The COMRESET will make port multiplier enter legacy mode.
8662 * Issue a software reset to make it work again.
8663 */
8668 /*
8669 * Following codes are specific for the port multiplier
8670 */
8673 /* in case previous_dev_type is corrupt */
8677 }
8679 /* Device change: PMult -> Non-PMult */
8682 /*
8683 * This might happen because
8684 * 1. Software reset failed. Port multiplier is not correctly
8685 * enumerated.
8686 * 2. Another non-port-multiplier device is attached. Perhaps
8687 * the port multiplier was replaced by another device by
8688 * whatever reason, but AHCI driver missed hot-plug event.
8689 *
8690 * Now that the port has been initialized, we just need to
8691 * update the port structure according new device, then report
8692 * and wait SATA framework to probe new device.
8693 */
8695 /* Force to release pmult resource */
8706 SATA_DSTATE_PWR_ACTIVE;
8712 SATA_EVNT_DEVICE_RESET);
8721 }
8723 /* Device change: Non-PMult -> PMult */
8726 /* NOTE: The PxCMD.PMA may be cleared by HBA reset. */
8730 }
8734 /* Device (may) change: PMult -> PMult */
8735 /*
8736 * First initialize port multiplier. Set state to READY and wait for
8737 * probe entry point to initialize it
8738 */
8741 /*
8742 * It's a little complicated while target is a port multiplier. we
8743 * need to COMRESET all pmports behind that PMult otherwise those
8744 * sub-links between the PMult and the sub-devices will be in an
8745 * inactive state (indicated by PSCR0/PxSSTS) and the following access
8746 * to those sub-devices will be rejected by Link-Fatal-Error.
8747 */
8748 /*
8749 * The PxSNTF will be set soon after the pmult is plugged. While the
8750 * pmult itself is attaching, sata_hba_event_notfiy will fail. so we
8751 * simply mark every sub-port as 'unknown', then ahci_probe_pmport
8752 * will initialized it.
8753 */
8757 /* Report reset event. */
8766 SATA_EVNT_DEVICE_RESET);
8769 }
8771 /*
8772 * This routine may be called under four scenarios:
8773 * a) do the recovery from fatal error
8774 * b) or we need to timeout some commands
8775 * c) or we need to abort some commands
8776 * d) or we need reset device/port/controller
8777 *
8778 * In all these scenarios, we need to send any pending unfinished
8779 * commands up to sata framework.
8780 */
8781 static void
8789 {
8805 "ahci_mop_commands: failed_tags: 0x%x, "
8806 "timeout_tags: 0x%x aborted_tags: 0x%x, "
8810 #ifdef AHCI_DEBUG
8817 else
8819 }
8826 }
8827 #endif
8852 /*
8853 * When AHCI_PORT_FLAG_RQSENSE or AHCI_PORT_FLAG_RDLOGEXT is
8854 * set, it means REQUEST SENSE or READ LOG EXT command doesn't
8855 * complete successfully due to one of the following three
8856 * conditions:
8857 *
8858 * 1. Fatal error - failed_tags includes its slot
8859 * 2. Timed out - timeout_tags includes its slot
8860 * 3. Aborted when hot unplug - aborted_tags includes its
8861 * slot
8862 *
8863 * Please note that the command is always sent down in Slot 0
8864 */
8867 "ahci_mop_commands is called for port %d while "
8868 "REQUEST SENSE or READ LOG EXT for error retrieval "
8876 "ahci_mop_commands is called for port %d while "
8881 }
8883 #ifdef AHCI_DEBUG
8885 "ahci_mop_commands: finished_tags: 0x%x, "
8887 #endif
8889 /* Send up finished packets with SATA_PKT_COMPLETED */
8894 }
8903 /*
8904 * Cannot fetch the return register content since the port
8905 * was restarted, so the corresponding tag will be set to
8906 * aborted tags.
8907 */
8912 }
8916 tmp_slot);
8922 }
8924 /* Send up failed packets with SATA_PKT_DEV_ERROR. */
8936 }
8941 "ahci_mop_commands: sending up "
8946 }
8951 }
8962 tmp_slot);
8968 }
8970 /* Send up timeout packets with SATA_PKT_TIMEOUT. */
8982 }
8987 "ahci_mop_commands: sending up "
8992 }
8997 }
9008 tmp_slot);
9014 }
9016 /* Send up aborted packets with SATA_PKT_ABORTED */
9028 }
9034 "ahci_mop_commands: sending up "
9039 }
9044 }
9055 tmp_slot);
9061 }
9063 /* Send up reset packets with SATA_PKT_RESET. */
9070 "ahci_mop_commands: sending up "
9075 }
9080 }
9091 tmp_slot);
9097 }
9099 /* Send up unfinished packets with SATA_PKT_RESET */
9104 }
9115 tmp_slot);
9121 }
9130 }
9132 /*
9133 * This routine is going to first request a READ LOG EXT sata pkt from sata
9134 * module, and then deliver it to the HBA to get the ncq failure context.
9135 * The return value is the exactly failed tags.
9136 */
9137 static uint32_t
9140 {
9141 sata_device_t sdevice;
9143 ddi_dma_handle_t buf_dma_handle;
9144 ahci_addr_t addr;
9154 /* Prepare the sdevice data */
9161 /* Translate sata_device.satadev_addr -> ahci_addr */
9164 /*
9165 * Call the sata hba interface to get a rdlog spkt
9166 */
9168 loop:
9173 /* Sleep for a while */
9176 }
9177 /* Timed out after 1s */
9181 }
9185 /*
9186 * This flag is used to handle the specific error recovery when the
9187 * READ LOG EXT command gets a failure (fatal error or time-out).
9188 */
9191 /*
9192 * This start is not supposed to fail because after port is restarted,
9193 * the whole command list is empty.
9194 */
9199 /* Remove the flag after READ LOG EXT command is completed */
9203 /* Update the request log data */
9207 DDI_DMA_SYNC_FORKERNEL);
9209 ncq_err_page =
9213 /* Get the failed tag */
9216 "ahci_get_rdlogext_data: port %d "
9222 }
9233 }
9237 /* Fill out the error context */
9239 ncq_err_page);
9242 }
9243 }
9244 out:
9248 }
9250 /*
9251 * This routine is going to first request a REQUEST SENSE sata pkt from sata
9252 * module, and then deliver it to the HBA to get the sense data and copy
9253 * the sense data back to the orignal failed sata pkt, and free the REQUEST
9254 * SENSE sata pkt later.
9255 */
9256 static void
9259 {
9260 sata_device_t sdevice;
9263 ddi_dma_handle_t buf_dma_handle;
9264 ahci_addr_t addr;
9266 #if AHCI_DEBUG
9268 #endif
9273 /* Prepare the sdevice data */
9280 /* Translate sata_device.satadev_addr -> ahci_addr */
9285 /*
9286 * Call the sata hba interface to get a rs spkt
9287 */
9289 loop:
9294 /* Sleep for a while */
9298 }
9299 /* Timed out after 1s */
9303 }
9307 /*
9308 * This flag is used to handle the specific error recovery when the
9309 * REQUEST SENSE command gets a faiure (fatal error or time-out).
9310 */
9313 /*
9314 * This start is not supposed to fail because after port is restarted,
9315 * the whole command list is empty.
9316 */
9321 /* Remove the flag after REQUEST SENSE command is completed */
9325 /* Update the request sense data */
9329 DDI_DMA_SYNC_FORKERNEL);
9330 /* Copy the request sense data */
9334 SATA_ATAPI_MIN_RQSENSE_LEN);
9335 #if AHCI_DEBUG
9339 /* Dump the sense data */
9345 " es_code 0x%x es_class 0x%x "
9346 "es_key 0x%x es_add_code 0x%x "
9351 #endif
9352 }
9355 }
9357 /*
9358 * Fatal errors will cause the HBA to enter the ERR: Fatal state. To recover,
9359 * the port must be restarted. When the HBA detects thus error, it may try
9360 * to abort a transfer. And if the transfer was aborted, the device is
9361 * expected to send a D2H Register FIS with PxTFD.STS.ERR set to '1' and both
9362 * PxTFD.STS.BSY and PxTFD.STS.DRQ cleared to '0'. Then system software knows
9363 * that the device is in a stable status and transfers may be restarted without
9364 * issuing a COMRESET to the device. If PxTFD.STS.BSY or PxTFD.STS.DRQ is set,
9365 * then the software will send the COMRESET to do the port reset.
9366 *
9367 * Software should perform the appropriate error recovery actions based on
9368 * whether non-queued commands were being issued or natived command queuing
9369 * commands were being issued.
9370 *
9371 * And software will complete the command that had the error with error mark
9372 * to higher level software.
9373 *
9374 * Fatal errors include the following:
9375 * PxIS.IFS - Interface Fatal Error Status
9376 * PxIS.HBDS - Host Bus Data Error Status
9377 * PxIS.HBFS - Host Bus Fatal Error Status
9378 * PxIS.TFES - Task File Error Status
9379 */
9380 static void
9383 {
9392 #if AHCI_DEBUG
9394 #endif
9404 /* Port multiplier error */
9406 /* FBS code is neither completed nor tested. */
9410 /* Force a port reset */
9412 }
9417 /* Read PxCI to see which commands are still outstanding */
9421 /*
9422 * Read PxCMD.CCS to determine the slot that the HBA
9423 * was processing when the error occurred.
9424 */
9428 AHCI_CMD_STATUS_CCS_SHIFT;
9436 /* May happen when interface errors occur? */
9438 }
9439 }
9441 #if AHCI_DEBUG
9442 /*
9443 * Debugging purpose...
9444 */
9446 cmd_header =
9449 "ahci_fatal_error_recovery_handler: port %d, "
9450 "PRD Byte Count = 0x%x, "
9454 }
9455 #endif
9459 /* Fill out the status and error registers for PxIS.TFES */
9462 ahcirf_d2h_register_fis);
9464 /* Copy the error context back to the sata_cmd */
9466 }
9468 /* The failed command must be one of the outstanding commands */
9472 /* Update the sata registers, especially PxSERR register */
9477 /* Read PxSACT to see which commands are still outstanding */
9480 }
9481 next:
9483 #if AHCI_DEBUG
9484 /*
9485 * When AHCI_PORT_FLAG_RQSENSE or AHCI_PORT_FLAG_RDLOGEXT flag is
9486 * set, it means a fatal error happened after REQUEST SENSE command
9487 * or READ LOG EXT command is delivered to the HBA during the error
9488 * recovery process. At this time, the only outstanding command is
9489 * supposed to be REQUEST SENSE command or READ LOG EXT command.
9490 */
9493 "ahci_fatal_error_recovery_handler: port %d REQUEST SENSE "
9494 "command or READ LOG EXT command for error data retrieval "
9499 SCMD_REQUEST_SENSE ||
9501 SATAC_READ_LOG_EXT);
9502 }
9503 #endif
9516 else
9519 }
9521 /*
9522 * Won't retrieve error information:
9523 * 1. Port reset was involved to recover
9524 * 2. Device is gone
9525 * 3. IDENTIFY DEVICE command sent to ATAPI device
9526 * 4. REQUEST SENSE or READ LOG EXT command during error recovery
9527 */
9534 /*
9535 * Deliver READ LOG EXT to gather information about the error when
9536 * a COMRESET has not been performed as part of the error recovery
9537 * during NCQ command processing.
9538 */
9543 }
9545 /*
9546 * Deliver REQUEST SENSE for ATAPI command to gather information about
9547 * the error when a COMRESET has not been performed as part of the
9548 * error recovery.
9549 */
9552 out:
9554 "ahci_fatal_error_recovery_handler: port %d fatal error "
9555 "occurred slot_status = 0x%x, pending_tags = 0x%x, "
9561 ahci_portp,
9562 slot_status,
9567 }
9569 /*
9570 * Used to recovery a PMULT pmport fatal error under FIS-based switching.
9571 * 1. device specific.PxFBS.SDE=1
9572 * 2. Non Device specific.
9573 * Nothing will be done when Command-based switching is employed.
9574 *
9575 * Currently code is neither completed nor tested.
9576 */
9577 static void
9580 {
9581 #ifndef __lock_lint
9583 #endif
9586 ahci_addr_t addr;
9590 /* Nothing will be done under Command-based switching. */
9598 /* FBS is not enabled. */
9601 /* Problem's getting complicated now. */
9602 /*
9603 * If FIS-based switching is used, we need to check
9604 * the PxFBS to see the error type.
9605 */
9609 /* Refer to spec(v1.2) 9.3.6.1 */
9613 /*
9614 * Controller has paused commands for all other
9615 * sub-devices until PxFBS.DEC is set.
9616 */
9624 /*
9625 * Wait controller clear PxFBS.DEC,
9626 * then we can continue.
9627 */
9635 /*
9636 * Esclate the error. Follow
9637 * non-device specific error
9638 * procedure.
9639 */
9645 /*
9646 * Issue a software reset to ensure drive is in
9647 * a known state.
9648 */
9654 /* Process Non-Device Specific Error. */
9655 /* This will be handled later on. */
9657 }
9658 }
9659 /*
9660 * Handle events - fatal error recovery
9661 */
9662 static void
9664 {
9686 /*
9687 * ahci_intr_phyrdy_change() may have rendered it to
9688 * SATA_DTYPE_NONE.
9689 */
9692 "ahci_events_handler: port %d no device attached, "
9700 }
9703 }
9706 AHCI_INTR_STATUS_HBDS |
9707 AHCI_INTR_STATUS_HBFS |
9708 AHCI_INTR_STATUS_TFES))
9712 out:
9714 }
9716 /*
9717 * ahci_watchdog_handler() and ahci_do_sync_start will call us if they
9718 * detect there are some commands which are timed out.
9719 */
9720 static void
9723 {
9736 /* Read PxCI to see which commands are still outstanding */
9740 /* Read PxSACT to see which commands are still outstanding */
9743 }
9745 #if AHCI_DEBUG
9746 /*
9747 * When AHCI_PORT_FLAG_RQSENSE or AHCI_PORT_FLAG_RDLOGEXT flag is
9748 * set, it means a fatal error happened after REQUEST SENSE command
9749 * or READ LOG EXT command is delivered to the HBA during the error
9750 * recovery process. At this time, the only outstanding command is
9751 * supposed to be REQUEST SENSE command or READ LOG EXT command.
9752 */
9755 "ahci_timeout_pkts called while REQUEST SENSE "
9756 "command or READ LOG EXT command for error recovery "
9757 "timed out timeout_tags = 0x%x, slot_status = 0x%x, "
9765 "ahci_timeout_pkts called while executing R/W PMULT "
9769 }
9770 #endif
9778 /*
9779 * Re-identify timeout tags because some previously checked commands
9780 * could already complete.
9781 */
9788 "ahci_timeout_pkts: port %d, finished_tags = 0x%x, "
9789 "timeout_tags = 0x%x, port_cmd_issue = 0x%x, "
9799 "ahci_timeout_pkts: port %d, finished_tags = 0x%x, "
9800 "timeout_tags = 0x%x, port_sactive = 0x%x, "
9807 }
9810 ahci_portp,
9811 slot_status,
9818 }
9820 /*
9821 * Watchdog handler kicks in every 5 seconds to timeout any commands pending
9822 * for long time.
9823 */
9824 static void
9826 {
9847 }
9855 }
9857 /* Skip the check for those ports in error recovery */
9862 }
9873 current_slot =
9875 AHCI_CMD_STATUS_CCS_SHIFT;
9885 }
9892 }
9898 else
9903 /*
9904 * If a packet has survived for more than it's
9905 * max life cycles, it is a candidate for time
9906 * out.
9907 */
9909 ahci_watchdog_timeout;
9915 #if AHCI_DEBUG
9924 }
9925 #endif
9927 /*
9928 * We need to check whether the HBA has
9929 * begun to execute the command, if not,
9930 * then re-set the timer of the command.
9931 */
9936 ahci_portp->ahciport_slot_timeout \
9943 }
9944 }
9945 next:
9947 }
9956 }
9959 }
9961 /* Re-install the watchdog timeout handler */
9966 }
9969 }
9971 /*
9972 * Fill the error context into sata_cmd for non-queued command error.
9973 */
9974 static void
9976 {
9990 }
9991 }
9993 /*
9994 * Fill the ncq error page into sata_cmd for queued command error.
9995 */
9996 static void
9999 {
10011 }
10013 /*
10014 * Put the respective register value to sata_cmd_t for satacmd_flags.
10015 */
10016 static void
10018 {
10039 }
10041 static void
10044 {
10065 }
10067 static void
10070 {
10074 sata_cmd_t cmd;
10083 }
10090 "features_reg = 0x%x sec_count_msb = 0x%x "
10091 "lba_low_msb = 0x%x lba_mid_msb = 0x%x "
10092 "lba_high_msb = 0x%x sec_count_lsb = 0x%x "
10093 "lba_low_lsb = 0x%x lba_mid_lsb = 0x%x "
10094 "lba_high_lsb = 0x%x device_reg = 0x%x "
10103 }
10106 }
10107 }
10109 /*
10110 * Dump the serror message to the log.
10111 */
10112 static void
10115 {
10126 }
10131 }
10136 }
10141 }
10145 }
10149 }
10153 }
10157 }
10161 }
10165 }
10169 }
10173 }
10177 }
10181 }
10186 }
10190 }
10194 }
10208 /* sata trace debug */
10215 /* sata trace debug */
10217 }
10218 }
10220 /*
10221 * Translate the sata_address_t type into the ahci_addr_t type.
10222 * sata_device.satadev_addr structure is used as source.
10223 */
10224 static void
10227 {
10248 /* something went wrong */
10251 }
10252 }
10254 /*
10255 * This routine is to calculate the total number of ports implemented
10256 * by the HBA.
10257 */
10258 static int
10260 {
10266 num++;
10267 }
10270 }
10272 #if AHCI_DEBUG
10273 static void
10275 {
10287 }
10295 }
10296 #endif
10298 /*
10299 * quiesce(9E) entry point.
10300 *
10301 * This function is called when the system is single-threaded at high
10302 * PIL with preemption disabled. Therefore, this function must not be
10303 * blocked. Because no taskqs are running, there is no need for us to
10304 * take any action for enclosure services which are running in the
10305 * taskq context, especially as no interrupts are generated by it nor
10306 * are any messages expected to come in.
10307 *
10308 * This function returns DDI_SUCCESS on success, or DDI_FAILURE on failure.
10309 * DDI_FAILURE indicates an error condition and should almost never happen.
10310 */
10311 static int
10313 {
10324 #if AHCI_DEBUG
10326 #endif
10330 /* disable all the interrupts. */
10336 }
10340 /*
10341 * Stop the port by clearing PxCMD.ST
10342 *
10343 * Here we must disable the port interrupt because
10344 * ahci_disable_all_intrs only clear GHC.IE, and IS
10345 * register will be still set if PxIE is enabled.
10346 * When ahci shares one IRQ with other drivers, the
10347 * intr handler may claim the intr mistakenly.
10348 */
10352 }
10357 }
10359 /*
10360 * The function will add a sata packet to the done queue.
10361 */
10362 static void
10364 {
10368 /* set the reason for all packets */
10374 /*
10375 * only add to queue when mode is not synch and there is
10376 * completion callback
10377 */
10385 /*
10386 * for sync/non-poll mode, just call cv_broadcast
10387 */
10389 }
10391 /*
10392 * The function will call completion callback of sata packet on the
10393 * completed queue
10394 */
10395 static void
10397 {
10415 /* Call the callback */
10419 }
10422 }
10423 }
10425 /*
10426 * Sets the state for the specified port on the controller to desired state.
10427 * This must be run in the context of the enclosure taskq which ensures that
10428 * only one event is outstanding at any time.
10429 */
10430 static boolean_t
10432 {
10433 ahci_em_led_msg_t msg;
10434 ahci_em_msg_hdr_t hdr;
10444 }
10448 }
10453 }
10463 /*
10464 * First, make sure we can transmit. We should not have been placed in a
10465 * situation where an outstanding transmission is going on.
10466 */
10476 }
10497 }
10503 }
10508 uint_t aelta_op;
10509 ahci_em_led_state_t aelta_state;
10510 uint_t aelta_ret;
10511 kcondvar_t aelta_cv;
10512 uint_t aelta_ref;
10515 static void
10517 {
10521 }
10523 static void
10525 {
10528 ahci_em_led_state_t state;
10535 }
10553 }
10565 }
10571 }
10576 }
10577 }
10579 static void
10581 {
10585 /*
10586 * We've been asked to reset the device. The caller should have set the
10587 * resetting flag. Make sure that we don't have a request to quiesce.
10588 */
10595 }
10609 }
10619 }
10626 /*
10627 * Try to flush all the LEDs as part of reset. If it fails,
10628 * drive on.
10629 */
10640 }
10641 }
10647 }
10649 static boolean_t
10651 {
10654 /*
10655 * First make sure we actually have enclosure services and if so, that
10656 * we have the hardware support that we care about for this.
10657 */
10662 /*
10663 * Next, make sure that the buffer is large enough for us. We need two
10664 * dwords or 8 bytes. The location register is stored in dwords.
10665 */
10667 AHCI_EM_BUFFER_MIN) {
10669 }
10688 }
10697 }
10699 static int
10701 {
10703 ahci_ioc_em_get_t get;
10709 }
10715 }
10717 }
10724 }
10726 static int
10728 {
10730 ahci_ioc_em_set_t set;
10742 }
10745 AHCI_EM_LED_FAULT_ENABLE |
10748 }
10757 }
10762 }
10767 }
10776 /*
10777 * Initialize the reference count to two. One for us and one for the
10778 * taskq. This will be used in case we get canceled.
10779 */
10782 /*
10783 * Once dispatched, the task state is protected by our global mutex.
10784 */
10795 }
10796 }
10798 /*
10799 * Remove our reference count. If we were woken up because of a signal
10800 * then the taskq may still be dispatched. In which case we shouldn't
10801 * free this memory until it is done. In that case, the taskq will take
10802 * care of it.
10803 */
10810 }
10815 }
10818 }
10820 static int
10822 {
10829 }
10838 }
10840 }
10842 static void
10844 {
10852 }
10854 static void
10856 {
10862 }
10864 static void
10866 {
10873 }
10875 static void
10877 {
10880 }
10885 }