Add more signals to main.plt to try to debug why A1 goes i->0 not when clk_a is rising.
commit04642079629d5c8e4b7c8e77a0534a1fcb2d8d4f
authorJeff Connelly <shellreef+git@gmail.com>
Sat, 10 May 2008 19:46:41 +0000 (10 12:46 -0700)
committerJeff Connelly <shellreef+git@gmail.com>
Sat, 10 May 2008 19:46:41 +0000 (10 12:46 -0700)
treee4015071cc14a6bf477b5f5e66ba05ff32e710af
parent0fca23473c92af5839913f02eb71f4ef59590e7d
Add more signals to main.plt to try to debug why A1 goes i->0 not when clk_a is rising.
circuits/main.plt