6 full_library_folder: "c:\program files\freepcb\lib"
\r
7 CAM_folder: "Z:\trinary\code\bb\CAM-dtflop-ms2"
\r
8 ses_file_path: "Z:\trinary\code\bb\dtflop-ms2_test.ses"
\r
9 SMT_connect_copper: "0"
\r
11 dsn_bounds_poly: "0"
\r
12 dsn_signals_poly: "0"
\r
13 autosave_interval: 0
\r
14 netlist_import_flags: 451
\r
17 visible_grid_spacing: 25400000.000000
\r
18 visible_grid_item: 100MIL
\r
19 visible_grid_item: 125MIL
\r
20 visible_grid_item: 200MIL
\r
21 visible_grid_item: 250MIL
\r
22 visible_grid_item: 400MIL
\r
23 visible_grid_item: 500MIL
\r
24 visible_grid_item: 1000MIL
\r
25 visible_grid_item: 1MM
\r
26 visible_grid_item: 2MM
\r
27 visible_grid_item: 2.5MM
\r
28 visible_grid_item: 4MM
\r
29 visible_grid_item: 5MM
\r
30 visible_grid_item: 10MM
\r
31 visible_grid_item: 20MM
\r
32 visible_grid_item: 25MM
\r
33 visible_grid_item: 40MM
\r
34 visible_grid_item: 50MM
\r
35 visible_grid_item: 100MM
\r
37 placement_grid_spacing: 2540000.000000
\r
38 placement_grid_item: 10MIL
\r
39 placement_grid_item: 20MIL
\r
40 placement_grid_item: 25MIL
\r
41 placement_grid_item: 40MIL
\r
42 placement_grid_item: 50MIL
\r
43 placement_grid_item: 100MIL
\r
44 placement_grid_item: 200MIL
\r
45 placement_grid_item: 250MIL
\r
46 placement_grid_item: 400MIL
\r
47 placement_grid_item: 500MIL
\r
48 placement_grid_item: 1000MIL
\r
49 placement_grid_item: 0.1MM
\r
50 placement_grid_item: 0.2MM
\r
51 placement_grid_item: 0.25MM
\r
52 placement_grid_item: 0.4MM
\r
53 placement_grid_item: 0.5MM
\r
54 placement_grid_item: 1MM
\r
55 placement_grid_item: 2MM
\r
56 placement_grid_item: 2.5MM
\r
57 placement_grid_item: 4MM
\r
58 placement_grid_item: 5MM
\r
59 placement_grid_item: 10MM
\r
61 routing_grid_spacing: 635000.000000
\r
62 routing_grid_item: 1MIL
\r
63 routing_grid_item: 2MIL
\r
64 routing_grid_item: 2.5MIL
\r
65 routing_grid_item: 3.33330709MIL
\r
66 routing_grid_item: 4MIL
\r
67 routing_grid_item: 5MIL
\r
68 routing_grid_item: 6.66637795MIL
\r
69 routing_grid_item: 10MIL
\r
70 routing_grid_item: 12.5MIL
\r
71 routing_grid_item: 16.66637795MIL
\r
72 routing_grid_item: 20MIL
\r
73 routing_grid_item: 25MIL
\r
74 routing_grid_item: 40MIL
\r
75 routing_grid_item: 50MIL
\r
76 routing_grid_item: 0.01MM
\r
77 routing_grid_item: 0.02MM
\r
78 routing_grid_item: 0.04MM
\r
79 routing_grid_item: 0.05MM
\r
80 routing_grid_item: 0.1MM
\r
81 routing_grid_item: 0.2MM
\r
82 routing_grid_item: 0.25MM
\r
83 routing_grid_item: 0.4MM
\r
84 routing_grid_item: 0.5MM
\r
85 routing_grid_item: 1MM
\r
86 routing_grid_item: 2MM
\r
87 routing_grid_item: 2.5MM
\r
88 routing_grid_item: 4MM
\r
89 routing_grid_item: 5MM
\r
90 routing_grid_item: 10MM
\r
94 fp_visible_grid_spacing: 5080000.000000
\r
95 fp_visible_grid_item: 100MIL
\r
96 fp_visible_grid_item: 125MIL
\r
97 fp_visible_grid_item: 200MIL
\r
98 fp_visible_grid_item: 250MIL
\r
99 fp_visible_grid_item: 400MIL
\r
100 fp_visible_grid_item: 500MIL
\r
101 fp_visible_grid_item: 1000MIL
\r
102 fp_visible_grid_item: 1MM
\r
103 fp_visible_grid_item: 2MM
\r
104 fp_visible_grid_item: 2.5MM
\r
105 fp_visible_grid_item: 4MM
\r
106 fp_visible_grid_item: 5MM
\r
107 fp_visible_grid_item: 10MM
\r
108 fp_visible_grid_item: 20MM
\r
109 fp_visible_grid_item: 25MM
\r
110 fp_visible_grid_item: 40MM
\r
111 fp_visible_grid_item: 50MM
\r
112 fp_visible_grid_item: 100MM
\r
114 fp_placement_grid_spacing: 2540000.000000
\r
115 fp_placement_grid_item: 10MIL
\r
116 fp_placement_grid_item: 20MIL
\r
117 fp_placement_grid_item: 25MIL
\r
118 fp_placement_grid_item: 40MIL
\r
119 fp_placement_grid_item: 50MIL
\r
120 fp_placement_grid_item: 100MIL
\r
121 fp_placement_grid_item: 200MIL
\r
122 fp_placement_grid_item: 250MIL
\r
123 fp_placement_grid_item: 400MIL
\r
124 fp_placement_grid_item: 500MIL
\r
125 fp_placement_grid_item: 1000MIL
\r
126 fp_placement_grid_item: 0.1MM
\r
127 fp_placement_grid_item: 0.2MM
\r
128 fp_placement_grid_item: 0.25MM
\r
129 fp_placement_grid_item: 0.4MM
\r
130 fp_placement_grid_item: 0.5MM
\r
131 fp_placement_grid_item: 1MM
\r
132 fp_placement_grid_item: 2MM
\r
133 fp_placement_grid_item: 2.5MM
\r
134 fp_placement_grid_item: 4MM
\r
135 fp_placement_grid_item: 5MM
\r
136 fp_placement_grid_item: 10MM
\r
140 fill_clearance: 254000
\r
141 mask_clearance: 203200
\r
142 thermal_width: 254000
\r
143 min_silkscreen_width: 127000
\r
144 board_outline_width: 127000
\r
145 hole_clearance: 381000
\r
146 pilot_diameter: 254000
\r
147 annular_ring_for_pins: 177800
\r
148 annular_ring_for_vias: 127000
\r
149 shrink_paste_mask: 0
\r
151 cam_layers: 7340093
\r
160 drc_check_unrouted: 1
\r
161 drc_trace_width: 254000
\r
162 drc_pad_pad: 254000
\r
163 drc_pad_trace: 254000
\r
164 drc_trace_trace: 254000
\r
165 drc_hole_copper: 381000
\r
166 drc_annular_ring_pins: 177800
\r
167 drc_annular_ring_vias: 127000
\r
168 drc_board_edge_copper: 635000
\r
169 drc_board_edge_hole: 635000
\r
170 drc_hole_hole: 635000
\r
171 drc_copper_copper: 254000
\r
173 default_trace_width: 254000
\r
174 default_via_pad_width: 711200
\r
175 default_via_hole_width: 355600
\r
177 width_menu_item: 1 152400 711200 355600
\r
178 width_menu_item: 2 203200 711200 355600
\r
179 width_menu_item: 3 254000 711200 355600
\r
180 width_menu_item: 4 304800 711200 355600
\r
181 width_menu_item: 5 381000 711200 355600
\r
182 width_menu_item: 6 508000 711200 355600
\r
183 width_menu_item: 7 635000 711200 355600
\r
186 layer_info: "selection" 0 255 255 255 1
\r
187 layer_info: "background" 1 0 0 0 1
\r
188 layer_info: "visible grid" 2 255 255 255 1
\r
189 layer_info: "highlight" 3 255 255 255 1
\r
190 layer_info: "DRC error" 4 255 128 64 1
\r
191 layer_info: "board outline" 5 0 0 255 1
\r
192 layer_info: "rat line" 6 255 0 255 1
\r
193 layer_info: "top silk" 7 255 255 0 1
\r
194 layer_info: "bottom silk" 8 255 192 192 1
\r
195 layer_info: "top sm cutout" 9 160 160 160 1
\r
196 layer_info: "bot sm cutout" 10 95 95 95 1
\r
197 layer_info: "thru pad" 11 0 0 255 1
\r
198 layer_info: "top copper" 12 0 255 0 1
\r
199 layer_info: "bottom copper" 13 255 0 0 1
\r
205 source: "DIGIKEY CATALOG NO. 941, PAGE 64"
\r
207 sel_rect: -58 -35 658 335
\r
208 ref_text: 50 -100 150 270 7
\r
209 centroid: 0 300 150
\r
210 outline_polyline: 7 -50 50
\r
211 next_corner: 650 50 0
\r
212 next_corner: 650 250 0
\r
213 next_corner: -50 250 0
\r
215 outline_polyline: 7 -50 100
\r
216 next_corner: 0 100 0
\r
217 next_corner: 0 200 0
\r
218 next_corner: -50 200 0
\r
222 top_pad: 2 55 27 27 0
\r
223 inner_pad: 1 55 27 27 0
\r
224 bottom_pad: 2 55 27 27 0
\r
225 pin: "2" 28 100 0 0
\r
226 top_pad: 1 55 27 27 0
\r
227 inner_pad: 1 55 27 27 0
\r
228 bottom_pad: 1 55 27 27 0
\r
229 pin: "3" 28 200 0 0
\r
230 top_pad: 1 55 27 27 0
\r
231 inner_pad: 1 55 27 27 0
\r
232 bottom_pad: 1 55 27 27 0
\r
233 pin: "4" 28 300 0 0
\r
234 top_pad: 1 55 27 27 0
\r
235 inner_pad: 1 55 27 27 0
\r
236 bottom_pad: 1 55 27 27 0
\r
237 pin: "5" 28 400 0 0
\r
238 top_pad: 1 55 27 27 0
\r
239 inner_pad: 1 55 27 27 0
\r
240 bottom_pad: 1 55 27 27 0
\r
241 pin: "6" 28 500 0 0
\r
242 top_pad: 1 55 27 27 0
\r
243 inner_pad: 1 55 27 27 0
\r
244 bottom_pad: 1 55 27 27 0
\r
245 pin: "7" 28 600 0 0
\r
246 top_pad: 1 55 27 27 0
\r
247 inner_pad: 1 55 27 27 0
\r
248 bottom_pad: 1 55 27 27 0
\r
249 pin: "8" 28 600 300 0
\r
250 top_pad: 1 55 27 27 0
\r
251 inner_pad: 1 55 27 27 0
\r
252 bottom_pad: 1 55 27 27 0
\r
253 pin: "9" 28 500 300 0
\r
254 top_pad: 1 55 27 27 0
\r
255 inner_pad: 1 55 27 27 0
\r
256 bottom_pad: 1 55 27 27 0
\r
257 pin: "10" 28 400 300 0
\r
258 top_pad: 1 55 27 27 0
\r
259 inner_pad: 1 55 27 27 0
\r
260 bottom_pad: 1 55 27 27 0
\r
261 pin: "11" 28 300 300 0
\r
262 top_pad: 1 55 27 27 0
\r
263 inner_pad: 1 55 27 27 0
\r
264 bottom_pad: 1 55 27 27 0
\r
265 pin: "12" 28 200 300 0
\r
266 top_pad: 1 55 27 27 0
\r
267 inner_pad: 1 55 27 27 0
\r
268 bottom_pad: 1 55 27 27 0
\r
269 pin: "13" 28 100 300 0
\r
270 top_pad: 1 55 27 27 0
\r
271 inner_pad: 1 55 27 27 0
\r
272 bottom_pad: 1 55 27 27 0
\r
273 pin: "14" 28 0 300 0
\r
274 top_pad: 1 55 27 27 0
\r
275 inner_pad: 1 55 27 27 0
\r
276 bottom_pad: 1 55 27 27 0
\r
280 source: "PRINTED CIRCUIT DESIGN METHODS PAGE 411"
\r
282 sel_rect: -33 -33 333 133
\r
283 ref_text: 50 150 160 0 7
\r
287 top_pad: 2 50 25 25 0
\r
288 inner_pad: 1 50 25 25 0
\r
289 bottom_pad: 2 50 25 25 0
\r
290 pin: "2" 28 0 100 0
\r
291 top_pad: 1 50 25 25 0
\r
292 inner_pad: 1 50 25 25 0
\r
293 bottom_pad: 1 50 25 25 0
\r
294 pin: "3" 28 100 0 0
\r
295 top_pad: 1 50 25 25 0
\r
296 inner_pad: 1 50 25 25 0
\r
297 bottom_pad: 1 50 25 25 0
\r
298 pin: "4" 28 100 100 0
\r
299 top_pad: 1 50 25 25 0
\r
300 inner_pad: 1 50 25 25 0
\r
301 bottom_pad: 1 50 25 25 0
\r
302 pin: "5" 28 200 0 0
\r
303 top_pad: 1 50 25 25 0
\r
304 inner_pad: 1 50 25 25 0
\r
305 bottom_pad: 1 50 25 25 0
\r
306 pin: "6" 28 200 100 0
\r
307 top_pad: 1 50 25 25 0
\r
308 inner_pad: 1 50 25 25 0
\r
309 bottom_pad: 1 50 25 25 0
\r
310 pin: "7" 28 300 0 0
\r
311 top_pad: 1 50 25 25 0
\r
312 inner_pad: 1 50 25 25 0
\r
313 bottom_pad: 1 50 25 25 0
\r
314 pin: "8" 28 300 100 0
\r
315 top_pad: 1 50 25 25 0
\r
316 inner_pad: 1 50 25 25 0
\r
317 bottom_pad: 1 50 25 25 0
\r
319 name: "18X2HDR-100"
\r
321 source: "PRINTED CIRCUIT DESIGN METHODS PAGE 411"
\r
323 sel_rect: -33 -33 1733 133
\r
324 ref_text: 50 850 160 0 7
\r
328 top_pad: 2 50 25 25 0
\r
329 inner_pad: 1 50 25 25 0
\r
330 bottom_pad: 2 50 25 25 0
\r
331 pin: "2" 28 0 100 0
\r
332 top_pad: 1 50 25 25 0
\r
333 inner_pad: 1 50 25 25 0
\r
334 bottom_pad: 1 50 25 25 0
\r
335 pin: "3" 28 100 0 0
\r
336 top_pad: 1 50 25 25 0
\r
337 inner_pad: 1 50 25 25 0
\r
338 bottom_pad: 1 50 25 25 0
\r
339 pin: "4" 28 100 100 0
\r
340 top_pad: 1 50 25 25 0
\r
341 inner_pad: 1 50 25 25 0
\r
342 bottom_pad: 1 50 25 25 0
\r
343 pin: "5" 28 200 0 0
\r
344 top_pad: 1 50 25 25 0
\r
345 inner_pad: 1 50 25 25 0
\r
346 bottom_pad: 1 50 25 25 0
\r
347 pin: "6" 28 200 100 0
\r
348 top_pad: 1 50 25 25 0
\r
349 inner_pad: 1 50 25 25 0
\r
350 bottom_pad: 1 50 25 25 0
\r
351 pin: "7" 28 300 0 0
\r
352 top_pad: 1 50 25 25 0
\r
353 inner_pad: 1 50 25 25 0
\r
354 bottom_pad: 1 50 25 25 0
\r
355 pin: "8" 28 300 100 0
\r
356 top_pad: 1 50 25 25 0
\r
357 inner_pad: 1 50 25 25 0
\r
358 bottom_pad: 1 50 25 25 0
\r
359 pin: "9" 28 400 0 0
\r
360 top_pad: 1 50 25 25 0
\r
361 inner_pad: 1 50 25 25 0
\r
362 bottom_pad: 1 50 25 25 0
\r
363 pin: "10" 28 400 100 0
\r
364 top_pad: 1 50 25 25 0
\r
365 inner_pad: 1 50 25 25 0
\r
366 bottom_pad: 1 50 25 25 0
\r
367 pin: "11" 28 500 0 0
\r
368 top_pad: 1 50 25 25 0
\r
369 inner_pad: 1 50 25 25 0
\r
370 bottom_pad: 1 50 25 25 0
\r
371 pin: "12" 28 500 100 0
\r
372 top_pad: 1 50 25 25 0
\r
373 inner_pad: 1 50 25 25 0
\r
374 bottom_pad: 1 50 25 25 0
\r
375 pin: "13" 28 600 0 0
\r
376 top_pad: 1 50 25 25 0
\r
377 inner_pad: 1 50 25 25 0
\r
378 bottom_pad: 1 50 25 25 0
\r
379 pin: "14" 28 600 100 0
\r
380 top_pad: 1 50 25 25 0
\r
381 inner_pad: 1 50 25 25 0
\r
382 bottom_pad: 1 50 25 25 0
\r
383 pin: "15" 28 700 0 0
\r
384 top_pad: 1 50 25 25 0
\r
385 inner_pad: 1 50 25 25 0
\r
386 bottom_pad: 1 50 25 25 0
\r
387 pin: "16" 28 700 100 0
\r
388 top_pad: 1 50 25 25 0
\r
389 inner_pad: 1 50 25 25 0
\r
390 bottom_pad: 1 50 25 25 0
\r
391 pin: "17" 28 800 0 0
\r
392 top_pad: 1 50 25 25 0
\r
393 inner_pad: 1 50 25 25 0
\r
394 bottom_pad: 1 50 25 25 0
\r
395 pin: "18" 28 800 100 0
\r
396 top_pad: 1 50 25 25 0
\r
397 inner_pad: 1 50 25 25 0
\r
398 bottom_pad: 1 50 25 25 0
\r
399 pin: "19" 28 900 0 0
\r
400 top_pad: 1 50 25 25 0
\r
401 inner_pad: 1 50 25 25 0
\r
402 bottom_pad: 1 50 25 25 0
\r
403 pin: "20" 28 900 100 0
\r
404 top_pad: 1 50 25 25 0
\r
405 inner_pad: 1 50 25 25 0
\r
406 bottom_pad: 1 50 25 25 0
\r
407 pin: "21" 28 1000 0 0
\r
408 top_pad: 1 50 25 25 0
\r
409 inner_pad: 1 50 25 25 0
\r
410 bottom_pad: 1 50 25 25 0
\r
411 pin: "22" 28 1000 100 0
\r
412 top_pad: 1 50 25 25 0
\r
413 inner_pad: 1 50 25 25 0
\r
414 bottom_pad: 1 50 25 25 0
\r
415 pin: "23" 28 1100 0 0
\r
416 top_pad: 1 50 25 25 0
\r
417 inner_pad: 1 50 25 25 0
\r
418 bottom_pad: 1 50 25 25 0
\r
419 pin: "24" 28 1100 100 0
\r
420 top_pad: 1 50 25 25 0
\r
421 inner_pad: 1 50 25 25 0
\r
422 bottom_pad: 1 50 25 25 0
\r
423 pin: "25" 28 1200 0 0
\r
424 top_pad: 1 50 25 25 0
\r
425 inner_pad: 1 50 25 25 0
\r
426 bottom_pad: 1 50 25 25 0
\r
427 pin: "26" 28 1200 100 0
\r
428 top_pad: 1 50 25 25 0
\r
429 inner_pad: 1 50 25 25 0
\r
430 bottom_pad: 1 50 25 25 0
\r
431 pin: "27" 28 1300 0 0
\r
432 top_pad: 1 50 25 25 0
\r
433 inner_pad: 1 50 25 25 0
\r
434 bottom_pad: 1 50 25 25 0
\r
435 pin: "28" 28 1300 100 0
\r
436 top_pad: 1 50 25 25 0
\r
437 inner_pad: 1 50 25 25 0
\r
438 bottom_pad: 1 50 25 25 0
\r
439 pin: "29" 28 1400 0 0
\r
440 top_pad: 1 50 25 25 0
\r
441 inner_pad: 1 50 25 25 0
\r
442 bottom_pad: 1 50 25 25 0
\r
443 pin: "30" 28 1400 100 0
\r
444 top_pad: 1 50 25 25 0
\r
445 inner_pad: 1 50 25 25 0
\r
446 bottom_pad: 1 50 25 25 0
\r
447 pin: "31" 28 1500 0 0
\r
448 top_pad: 1 50 25 25 0
\r
449 inner_pad: 1 50 25 25 0
\r
450 bottom_pad: 1 50 25 25 0
\r
451 pin: "32" 28 1500 100 0
\r
452 top_pad: 1 50 25 25 0
\r
453 inner_pad: 1 50 25 25 0
\r
454 bottom_pad: 1 50 25 25 0
\r
455 pin: "33" 28 1600 0 0
\r
456 top_pad: 1 50 25 25 0
\r
457 inner_pad: 1 50 25 25 0
\r
458 bottom_pad: 1 50 25 25 0
\r
459 pin: "34" 28 1600 100 0
\r
460 top_pad: 1 50 25 25 0
\r
461 inner_pad: 1 50 25 25 0
\r
462 bottom_pad: 1 50 25 25 0
\r
463 pin: "35" 28 1700 0 0
\r
464 top_pad: 1 50 25 25 0
\r
465 inner_pad: 1 50 25 25 0
\r
466 bottom_pad: 1 50 25 25 0
\r
467 pin: "36" 28 1700 100 0
\r
468 top_pad: 1 50 25 25 0
\r
469 inner_pad: 1 50 25 25 0
\r
470 bottom_pad: 1 50 25 25 0
\r
474 source: "DIGITAL PRINTED CIRCUIT DESIGN & DRAFTING, PAGE 408"
\r
476 sel_rect: -45 -57 545 57
\r
477 ref_text: 50 250 99 0 7
\r
479 outline_polyline: 7 109 49
\r
480 next_corner: 391 49 0
\r
481 next_corner: 391 -49 0
\r
482 next_corner: 109 -49 0
\r
486 top_pad: 1 75 37 37 0
\r
487 inner_pad: 1 75 37 37 0
\r
488 bottom_pad: 1 75 37 37 0
\r
489 pin: "2" 35 500 0 0
\r
490 top_pad: 1 75 37 37 0
\r
491 inner_pad: 1 75 37 37 0
\r
492 bottom_pad: 1 75 37 37 0
\r
496 source: "PRINTED CIRCUIT DESIGN METHODS PAGE 411"
\r
498 sel_rect: -33 -33 533 133
\r
499 ref_text: 50 250 160 0 7
\r
503 top_pad: 2 50 25 25 0
\r
504 inner_pad: 1 50 25 25 0
\r
505 bottom_pad: 2 50 25 25 0
\r
506 pin: "2" 28 0 100 0
\r
507 top_pad: 1 50 25 25 0
\r
508 inner_pad: 1 50 25 25 0
\r
509 bottom_pad: 1 50 25 25 0
\r
510 pin: "3" 28 100 0 0
\r
511 top_pad: 1 50 25 25 0
\r
512 inner_pad: 1 50 25 25 0
\r
513 bottom_pad: 1 50 25 25 0
\r
514 pin: "4" 28 100 100 0
\r
515 top_pad: 1 50 25 25 0
\r
516 inner_pad: 1 50 25 25 0
\r
517 bottom_pad: 1 50 25 25 0
\r
518 pin: "5" 28 200 0 0
\r
519 top_pad: 1 50 25 25 0
\r
520 inner_pad: 1 50 25 25 0
\r
521 bottom_pad: 1 50 25 25 0
\r
522 pin: "6" 28 200 100 0
\r
523 top_pad: 1 50 25 25 0
\r
524 inner_pad: 1 50 25 25 0
\r
525 bottom_pad: 1 50 25 25 0
\r
526 pin: "7" 28 300 0 0
\r
527 top_pad: 1 50 25 25 0
\r
528 inner_pad: 1 50 25 25 0
\r
529 bottom_pad: 1 50 25 25 0
\r
530 pin: "8" 28 300 100 0
\r
531 top_pad: 1 50 25 25 0
\r
532 inner_pad: 1 50 25 25 0
\r
533 bottom_pad: 1 50 25 25 0
\r
534 pin: "9" 28 400 0 0
\r
535 top_pad: 1 50 25 25 0
\r
536 inner_pad: 1 50 25 25 0
\r
537 bottom_pad: 1 50 25 25 0
\r
538 pin: "10" 28 400 100 0
\r
539 top_pad: 1 50 25 25 0
\r
540 inner_pad: 1 50 25 25 0
\r
541 bottom_pad: 1 50 25 25 0
\r
542 pin: "11" 28 500 0 0
\r
543 top_pad: 1 50 25 25 0
\r
544 inner_pad: 1 50 25 25 0
\r
545 bottom_pad: 1 50 25 25 0
\r
546 pin: "12" 28 500 100 0
\r
547 top_pad: 1 50 25 25 0
\r
548 inner_pad: 1 50 25 25 0
\r
549 bottom_pad: 1 50 25 25 0
\r
554 corner: 1 -558800000 533400000 0
\r
555 corner: 2 -558800000 535940000 0
\r
556 corner: 3 -355600000 535940000 0
\r
557 corner: 4 -355600000 375920000 0
\r
558 corner: 5 -558800000 375920000 0
\r
560 [solder_mask_cutouts]
\r
565 part: IC_0_CD4007_1
\r
566 ref_text: 1270000 177800 270 -2540000 -1270000
\r
567 package: "14DIP300"
\r
569 pos: -555625000 529590000 0 90 0
\r
571 part: IC_6_CD4007_1
\r
572 ref_text: 1270000 177800 270 -2540000 -3810000
\r
573 package: "14DIP300"
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577 part: IC_5_CD4007_1
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578 ref_text: 1270000 177800 270 -2540000 -6350000
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579 package: "14DIP300"
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584 ref_text: 1270000 177800 270 -2540000 -3810000
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585 package: "14DIP300"
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758 ref_text: 1270000 177800 0 2540000 6604000
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760 shape: "4X2HDR-100"
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761 pos: -468630000 495300000 0 0 0
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764 ref_text: 1270000 177800 270 -2540000 -1270000
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765 package: "14DIP300"
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767 pos: -555625000 453390000 0 90 0
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769 part: IC_6_CD4007_2
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770 ref_text: 1270000 177800 270 -2540000 -3810000
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771 package: "14DIP300"
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773 pos: -489585000 402590000 0 90 0
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775 part: IC_5_CD4007_2
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776 ref_text: 1270000 177800 270 -2540000 -6350000
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777 package: "14DIP300"
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779 pos: -467995000 402590000 0 90 0
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781 part: IC_1_CD4007_2
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782 ref_text: 1270000 177800 270 -2540000 -3810000
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783 package: "14DIP300"
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785 pos: -534035000 453390000 0 90 0
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787 part: IC_2_CD4007_2
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788 ref_text: 1270000 177800 270 -2540000 -3810000
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789 package: "14DIP300"
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791 pos: -513715000 453390000 0 90 0
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793 part: IC_3_CD4007_2
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794 ref_text: 1270000 177800 270 -2540000 -3810000
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795 package: "14DIP300"
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797 pos: -490855000 453390000 0 90 0
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799 part: IC_4_CD4007_2
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800 ref_text: 1270000 177800 270 -2540000 -6350000
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801 package: "14DIP300"
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806 ref_text: 1270000 177800 270 -2540000 -3810000
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807 package: "14DIP300"
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812 ref_text: 1270000 177800 270 -2540000 -3810000
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813 package: "14DIP300"
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817 part: X_IC_9_CD4007_2
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956 ref_text: 1270000 177800 0 2540000 6604000
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958 shape: "4X2HDR-100"
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961 part: IC_0_CD4007_3
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963 package: "14DIP300"
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965 pos: -454025000 529590000 0 90 0
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967 part: IC_6_CD4007_3
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969 package: "14DIP300"
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1005 package: "14DIP300"
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1156 shape: "4X2HDR-100"
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1191 package: "14DIP300"
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1197 package: "14DIP300"
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1213 part: X_IC_9_CD4007_4
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1349 pos: -438785000 402590000 0 90 0
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1358 ref_text: 635000 177800 0 23495000 -1905000
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1360 shape: "18X2HDR-100"
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1364 ref_text: 1270000 177800 0 13970000 254000
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1366 shape: "6X2HDR-100"
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1367 pos: -483235000 379095000 0 0 0
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1371 net: "3" 2 1 0 0 0 0 1
\r
1374 connect: 1 1 0 1 0
\r
1375 vtx: 1 -447675000 379095000 11 0 0 0 0
\r
1376 seg: 1 12 254000 0 0
\r
1377 vtx: 2 -447675000 381635000 11 0 0 0 0
\r
1379 net: "C2" 2 1 0 0 0 0 1
\r
1382 connect: 1 1 0 1 0
\r
1383 vtx: 1 -429895000 379095000 11 0 0 0 0
\r
1384 seg: 1 12 254000 0 0
\r
1385 vtx: 2 -429895000 381635000 11 0 0 0 0
\r
1387 net: "D3" 2 1 0 0 0 0 1
\r
1390 connect: 1 1 0 1 0
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1391 vtx: 1 -424815000 379095000 11 0 0 0 0
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1392 seg: 1 12 254000 0 0
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1393 vtx: 2 -424815000 381635000 11 0 0 0 0
\r
1395 net: "0_$G0" 2 1 0 635000 711200 355600 1
\r
1398 connect: 1 1 0 1 0
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1399 vtx: 1 -466090000 497840000 11 0 0 0 0
\r
1400 seg: 1 13 635000 0 0
\r
1401 vtx: 2 -466090000 495300000 11 0 0 0 0
\r
1403 net: "Xff$XMaster$XXgatebot$NI" 2 1 0 0 0 0 1
\r
1404 pin: 1 IC_1_CD4007_1.4
\r
1405 pin: 2 IC_1_CD4007_1.8
\r
1406 connect: 1 1 0 1 0
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1407 vtx: 1 -526415000 514350000 11 0 0 0 0
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1408 seg: 1 12 254000 0 0
\r
1409 vtx: 2 -534035000 521970000 11 0 0 0 0
\r
1411 net: "Xff$XMaster$X_Xlatch$NP" 3 2 0 0 0 0 1
\r
1412 pin: 1 IC_6_CD4007_1.1
\r
1413 pin: 2 IC_6_CD4007_1.13
\r
1415 connect: 1 1 0 3 0
\r
1416 vtx: 1 -481965000 476250000 11 0 0 0 0
\r
1417 seg: 1 13 254000 0 0
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1418 vtx: 2 -485584500 476250000 0 0 0 0 0
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1419 seg: 2 13 254000 0 0
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1420 vtx: 3 -488124500 478790000 0 0 0 0 0
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1421 seg: 3 13 254000 0 0
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1422 vtx: 4 -489585000 478790000 11 0 0 0 0
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1423 connect: 2 2 0 3 0
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1424 vtx: 1 -473075000 488950000 11 0 0 0 0
\r
1425 seg: 1 12 254000 0 0
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1426 vtx: 2 -477964500 488950000 0 0 0 0 0
\r
1427 seg: 2 12 254000 0 0
\r
1428 vtx: 3 -488124500 478790000 0 0 0 0 0
\r
1429 seg: 3 12 254000 0 0
\r
1430 vtx: 4 -489585000 478790000 11 0 0 0 0
\r
1432 net: "Xff$XSlave$Q_storage" 3 2 0 0 0 0 1
\r
1433 pin: 1 IC_3_CD4007_1.3
\r
1436 connect: 1 1 0 5 0
\r
1437 vtx: 1 -525145000 488950000 11 0 0 0 0
\r
1438 seg: 1 12 254000 0 0
\r
1439 vtx: 2 -525145000 493922304 0 0 0 0 0
\r
1440 seg: 2 12 254000 0 0
\r
1441 vtx: 3 -509482852 509584452 0 0 0 0 0
\r
1442 seg: 3 12 254000 0 0
\r
1443 vtx: 4 -507649226 509584452 0 0 711200 355600 0
\r
1444 seg: 4 13 254000 0 0
\r
1445 vtx: 5 -492723678 524510000 0 0 0 0 0
\r
1446 seg: 5 13 254000 0 0
\r
1447 vtx: 6 -490855000 524510000 11 0 0 0 0
\r
1448 connect: 2 2 1 2 0
\r
1449 vtx: 1 -520065000 478790000 11 0 0 0 0
\r
1450 seg: 1 13 254000 0 0
\r
1451 vtx: 2 -525145000 483870000 0 0 0 0 0
\r
1452 seg: 2 13 254000 0 0
\r
1453 vtx: 3 -525145000 488950000 11 0 0 0 0
\r
1455 net: "Xff$XMaster$XXlatch$NP_$G1" 3 2 0 0 0 0 1
\r
1456 pin: 1 IC_0_CD4007_2.1
\r
1457 pin: 2 IC_0_CD4007_2.13
\r
1459 connect: 1 1 0 3 0
\r
1460 vtx: 1 -548005000 450850000 11 0 0 0 0
\r
1461 seg: 1 13 254000 0 0
\r
1462 vtx: 2 -550307764 453152764 0 0 0 0 0
\r
1463 seg: 2 13 254000 0 0
\r
1464 vtx: 3 -555625000 453152764 0 0 0 0 16580
\r
1465 seg: 3 13 254000 0 0
\r
1466 vtx: 4 -555625000 453390000 11 0 0 0 0
\r
1467 connect: 2 2 -1 4 0
\r
1468 vtx: 1 -542925000 427990000 11 0 0 0 0
\r
1469 seg: 1 13 254000 0 0
\r
1470 vtx: 2 -547534592 427990000 0 0 0 0 0
\r
1471 seg: 2 13 254000 0 0
\r
1472 vtx: 3 -557101248 437556910 0 0 0 0 0
\r
1473 seg: 3 13 254000 0 0
\r
1474 vtx: 4 -557101248 451676516 0 0 0 0 0
\r
1475 seg: 4 13 254000 0 0
\r
1476 vtx: 5 -555625000 453152764 0 0 0 0 16580
\r
1478 net: "Q_$G1" 4 3 0 0 0 0 1
\r
1479 pin: 1 IC_4_CD4007_2.3
\r
1483 connect: 1 2 0 3 0
\r
1484 vtx: 1 -489585000 427990000 11 0 0 0 0
\r
1485 seg: 1 12 254000 0 0
\r
1486 vtx: 2 -489585000 428262542 0 0 0 0 0
\r
1487 seg: 2 12 254000 0 0
\r
1488 vtx: 3 -469537542 448310000 0 0 0 0 0
\r
1489 seg: 3 12 254000 0 0
\r
1490 vtx: 4 -467995000 448310000 11 0 0 0 0
\r
1491 connect: 2 2 1 2 0
\r
1492 vtx: 1 -489585000 427990000 11 0 0 0 0
\r
1493 seg: 1 13 254000 0 0
\r
1494 vtx: 2 -497205000 435610000 0 0 0 0 0
\r
1495 seg: 2 13 254000 0 0
\r
1496 vtx: 3 -497205000 440690000 11 0 0 0 0
\r
1497 connect: 3 3 2 3 0
\r
1498 vtx: 1 -461010000 421640000 11 0 0 0 0
\r
1499 seg: 1 12 254000 0 0
\r
1500 vtx: 2 -464752436 425382690 0 0 0 0 0
\r
1501 seg: 2 12 254000 0 0
\r
1502 vtx: 3 -486977436 425382690 0 0 0 0 0
\r
1503 seg: 3 12 254000 0 0
\r
1504 vtx: 4 -489585000 427990000 11 0 0 0 0
\r
1506 net: "Xff$XSlave$_D_$G1_$G2" 3 2 0 0 0 0 1
\r
1507 pin: 1 IC_7_CD4007_3.6
\r
1510 connect: 1 2 0 5 0
\r
1511 vtx: 1 -418465000 496570000 11 0 0 0 0
\r
1512 seg: 1 13 254000 0 0
\r
1513 vtx: 2 -416280600 494385600 0 0 0 0 0
\r
1514 seg: 2 13 254000 0 0
\r
1515 vtx: 3 -416280600 482243384 0 0 711200 355600 0
\r
1516 seg: 3 12 254000 0 0
\r
1517 vtx: 4 -413473138 479435922 0 0 0 0 0
\r
1518 seg: 4 12 254000 0 0
\r
1519 vtx: 5 -413473138 468718138 0 0 0 0 0
\r
1520 seg: 5 12 254000 0 0
\r
1521 vtx: 6 -410845000 466090000 11 0 0 0 0
\r
1522 connect: 2 2 1 3 0
\r
1523 vtx: 1 -418465000 496570000 11 0 0 0 0
\r
1524 seg: 1 12 254000 0 0
\r
1525 vtx: 2 -415223198 493328198 0 0 0 0 0
\r
1526 seg: 2 12 254000 0 0
\r
1527 vtx: 3 -393633198 493328198 0 0 0 0 0
\r
1528 seg: 3 12 254000 0 0
\r
1529 vtx: 4 -389255000 488950000 11 0 0 0 0
\r
1531 net: "Xff$XSlave$XXgatetop$NN_$G1_$G2" 2 1 0 0 0 0 1
\r
1532 pin: 1 IC_8_CD4007_3.9
\r
1534 connect: 1 1 0 1 0
\r
1535 vtx: 1 -418465000 466090000 11 0 0 0 0
\r
1536 seg: 1 12 254000 0 0
\r
1537 vtx: 2 -424815000 466090000 11 0 0 0 0
\r
1539 net: "Xff$XMaster$XXstiD$PTI_Out_$G1_$G2" 2 1 0 0 0 0 1
\r
1540 pin: 1 IC_2_CD4007_3.13
\r
1542 connect: 1 1 0 3 0
\r
1543 vtx: 1 -407035000 504190000 11 0 0 0 0
\r
1544 seg: 1 13 254000 0 0
\r
1545 vtx: 2 -407166826 504321826 0 0 0 0 0
\r
1546 seg: 2 13 254000 0 0
\r
1547 vtx: 3 -407166826 524378174 0 0 0 0 0
\r
1548 seg: 3 13 254000 0 0
\r
1549 vtx: 4 -404495000 527050000 11 0 0 0 0
\r
1551 net: "Xff$XMaster$X_Xlatch$NP_$G1_$G2" 3 2 0 0 0 0 1
\r
1552 pin: 1 IC_6_CD4007_3.1
\r
1553 pin: 2 IC_6_CD4007_3.13
\r
1555 connect: 1 1 0 3 0
\r
1556 vtx: 1 -380365000 476250000 11 0 0 0 0
\r
1557 seg: 1 13 254000 0 0
\r
1558 vtx: 2 -383984500 476250000 0 0 0 0 0
\r
1559 seg: 2 13 254000 0 0
\r
1560 vtx: 3 -386524500 478790000 0 0 0 0 0
\r
1561 seg: 3 13 254000 0 0
\r
1562 vtx: 4 -387985000 478790000 11 0 0 0 0
\r
1563 connect: 2 2 0 3 0
\r
1564 vtx: 1 -371475000 488950000 11 0 0 0 0
\r
1565 seg: 1 12 254000 0 0
\r
1566 vtx: 2 -376364500 488950000 0 0 0 0 0
\r
1567 seg: 2 12 254000 0 0
\r
1568 vtx: 3 -386524500 478790000 0 0 0 0 0
\r
1569 seg: 3 12 254000 0 0
\r
1570 vtx: 4 -387985000 478790000 11 0 0 0 0
\r
1572 net: "Xff$XSlave$XXgatetop$NI_$G1_$G2" 2 1 0 0 0 0 1
\r
1573 pin: 1 IC_8_CD4007_3.4
\r
1574 pin: 2 IC_8_CD4007_3.8
\r
1575 connect: 1 1 0 1 0
\r
1576 vtx: 1 -424815000 463550000 11 0 0 0 0
\r
1577 seg: 1 13 254000 0 0
\r
1578 vtx: 2 -432435000 471170000 11 0 0 0 0
\r
1580 net: "Q_$G1_$G3" 4 3 0 0 0 0 1
\r
1581 pin: 1 IC_4_CD4007_4.3
\r
1585 connect: 1 2 0 3 0
\r
1586 vtx: 1 -387985000 427990000 11 0 0 0 0
\r
1587 seg: 1 12 254000 0 0
\r
1588 vtx: 2 -387985000 428262542 0 0 0 0 0
\r
1589 seg: 2 12 254000 0 0
\r
1590 vtx: 3 -367937542 448310000 0 0 0 0 0
\r
1591 seg: 3 12 254000 0 0
\r
1592 vtx: 4 -366395000 448310000 11 0 0 0 0
\r
1593 connect: 2 2 1 2 0
\r
1594 vtx: 1 -387985000 427990000 11 0 0 0 0
\r
1595 seg: 1 13 254000 0 0
\r
1596 vtx: 2 -395605000 435610000 0 0 0 0 0
\r
1597 seg: 2 13 254000 0 0
\r
1598 vtx: 3 -395605000 440690000 11 0 0 0 0
\r
1599 connect: 3 3 2 3 0
\r
1600 vtx: 1 -359410000 421640000 11 0 0 0 0
\r
1601 seg: 1 12 254000 0 0
\r
1602 vtx: 2 -363152436 425382690 0 0 0 0 0
\r
1603 seg: 2 12 254000 0 0
\r
1604 vtx: 3 -385377436 425382690 0 0 0 0 0
\r
1605 seg: 3 12 254000 0 0
\r
1606 vtx: 4 -387985000 427990000 11 0 0 0 0
\r
1608 net: "Xff$XXstiCLK$NTI_Out_$G1_$G3" 2 1 0 0 0 0 1
\r
1609 pin: 1 X_IC_9_CD4007_4.8
\r
1611 connect: 1 1 0 2 0
\r
1612 vtx: 1 -438785000 389890000 11 0 0 0 0
\r
1613 seg: 1 12 254000 0 0
\r
1614 vtx: 2 -441325000 387350000 0 0 0 0 0
\r
1615 seg: 2 12 254000 0 0
\r
1616 vtx: 3 -446405000 387350000 11 0 0 0 0
\r
1618 net: "Xff$XSlave$XXlatch$NI_$G1_$G3" 2 1 0 0 0 0 1
\r
1619 pin: 1 IC_3_CD4007_4.4
\r
1620 pin: 2 IC_3_CD4007_4.8
\r
1621 connect: 1 1 0 1 0
\r
1622 vtx: 1 -381635000 438150000 11 0 0 0 0
\r
1623 seg: 1 13 254000 0 0
\r
1624 vtx: 2 -389255000 445770000 11 0 0 0 0
\r
1626 net: "Xff$XXstiCLK$PTI_Out_$G1_$G3" 2 1 0 0 0 0 1
\r
1627 pin: 1 X_IC_9_CD4007_4.13
\r
1629 connect: 1 1 0 2 0
\r
1630 vtx: 1 -454025000 412750000 11 0 0 0 0
\r
1631 seg: 1 12 254000 0 0
\r
1632 vtx: 2 -454025000 407670000 0 0 0 0 0
\r
1633 seg: 2 12 254000 0 0
\r
1634 vtx: 3 -446405000 400050000 11 0 0 0 0
\r
1636 net: "Xff$between_$G1_$G3" 5 4 0 0 0 0 1
\r
1637 pin: 1 IC_6_CD4007_4.3
\r
1638 pin: 2 IC_2_CD4007_4.3
\r
1639 pin: 3 IC_8_CD4007_4.3
\r
1642 connect: 1 4 0 3 0
\r
1643 vtx: 1 -405765000 412750000 11 0 0 0 0
\r
1644 seg: 1 13 254000 0 0
\r
1645 vtx: 2 -405765000 409055062 0 0 0 0 0
\r
1646 seg: 2 13 254000 0 0
\r
1647 vtx: 3 -394219938 397510000 0 0 0 0 0
\r
1648 seg: 3 13 254000 0 0
\r
1649 vtx: 4 -387985000 397510000 11 0 0 0 0
\r
1650 connect: 2 3 1 10 0
\r
1651 vtx: 1 -454025000 427990000 11 0 0 0 0
\r
1652 seg: 1 13 254000 0 0
\r
1653 vtx: 2 -454025000 423020744 0 0 0 0 0
\r
1654 seg: 2 13 254000 0 0
\r
1655 vtx: 3 -442031120 411026864 0 0 0 0 0
\r
1656 seg: 3 13 254000 0 0
\r
1657 vtx: 4 -439752740 411026864 0 0 0 0 23622
\r
1658 seg: 4 13 254000 0 0
\r
1659 vtx: 5 -439752740 411679898 0 0 0 0 0
\r
1660 seg: 5 13 254000 0 0
\r
1661 vtx: 6 -436828692 414603692 0 0 0 0 0
\r
1662 seg: 6 13 254000 0 0
\r
1663 vtx: 7 -429311308 414603692 0 0 0 0 0
\r
1664 seg: 7 13 254000 0 0
\r
1665 vtx: 8 -421640254 422274746 0 0 0 0 0
\r
1666 seg: 8 13 254000 0 0
\r
1667 vtx: 9 -410636974 422274746 0 0 0 0 15148
\r
1668 seg: 9 13 254000 0 0
\r
1669 vtx: 10 -410636974 446831974 0 0 0 0 0
\r
1670 seg: 10 13 254000 0 0
\r
1671 vtx: 11 -412115000 448310000 11 0 0 0 0
\r
1672 connect: 3 4 -1 3 0
\r
1673 vtx: 1 -405765000 412750000 11 0 0 0 0
\r
1674 seg: 1 13 254000 0 0
\r
1675 vtx: 2 -405765000 417728146 0 0 0 0 0
\r
1676 seg: 2 13 254000 0 0
\r
1677 vtx: 3 -410311346 422274746 0 0 0 0 0
\r
1678 seg: 3 13 254000 0 0
\r
1679 vtx: 4 -410636974 422274746 0 0 0 0 15148
\r
1680 connect: 4 2 -1 3 0
\r
1681 vtx: 1 -432435000 397510000 11 0 0 0 0
\r
1682 seg: 1 13 254000 0 0
\r
1683 vtx: 2 -435326028 400401028 0 0 0 0 0
\r
1684 seg: 2 13 254000 0 0
\r
1685 vtx: 3 -435326028 406600152 0 0 0 0 0
\r
1686 seg: 3 13 254000 0 0
\r
1687 vtx: 4 -439752740 411026864 0 0 0 0 23622
\r
1689 net: "Xff$XSlave$XXlatch$NN_$G1_$G3" 2 1 0 0 0 0 1
\r
1690 pin: 1 IC_3_CD4007_4.9
\r
1692 connect: 1 1 0 2 0
\r
1693 vtx: 1 -400685000 427990000 11 0 0 0 0
\r
1694 seg: 1 12 254000 0 0
\r
1695 vtx: 2 -394335000 427990000 0 0 0 0 0
\r
1696 seg: 2 12 254000 0 0
\r
1697 vtx: 3 -381635000 440690000 11 0 0 0 0
\r
1699 net: "4" 2 1 0 0 0 0 1
\r
1702 connect: 1 1 0 1 0
\r
1703 vtx: 1 -450215000 379095000 11 0 0 0 0
\r
1704 seg: 1 12 254000 0 0
\r
1705 vtx: 2 -450215000 381635000 11 0 0 0 0
\r
1707 net: "C3" 2 1 0 0 0 0 1
\r
1710 connect: 1 1 0 1 0
\r
1711 vtx: 1 -422275000 379095000 11 0 0 0 0
\r
1712 seg: 1 12 254000 0 0
\r
1713 vtx: 2 -422275000 381635000 11 0 0 0 0
\r
1715 net: "D4" 2 1 0 0 0 0 1
\r
1718 connect: 1 1 0 1 0
\r
1719 vtx: 1 -417195000 379095000 11 0 0 0 0
\r
1720 seg: 1 12 254000 0 0
\r
1721 vtx: 2 -417195000 381635000 11 0 0 0 0
\r
1723 net: "Xff$XMaster$XXlatch$NI" 2 1 0 0 0 0 1
\r
1724 pin: 1 IC_0_CD4007_1.4
\r
1725 pin: 2 IC_0_CD4007_1.8
\r
1726 connect: 1 1 0 1 0
\r
1727 vtx: 1 -548005000 514350000 11 0 0 0 0
\r
1728 seg: 1 13 254000 0 0
\r
1729 vtx: 2 -555625000 521970000 11 0 0 0 0
\r
1731 net: "Xff$_CLK" 4 3 0 0 0 0 1
\r
1732 pin: 1 IC_5_CD4007_1.6
\r
1733 pin: 2 IC_1_CD4007_1.3
\r
1736 connect: 1 3 0 7 0
\r
1737 vtx: 1 -540385000 478790000 11 0 0 0 0
\r
1738 seg: 1 12 254000 0 0
\r
1739 vtx: 2 -538030928 481144072 0 0 0 0 24205
\r
1740 seg: 2 12 254000 0 0
\r
1741 vtx: 3 -526703036 481144072 0 0 0 0 0
\r
1742 seg: 3 12 254000 0 0
\r
1743 vtx: 4 -518350500 472791536 0 0 0 0 0
\r
1744 seg: 4 12 254000 0 0
\r
1745 vtx: 5 -518350500 466118956 0 0 0 0 0
\r
1746 seg: 5 12 254000 0 0
\r
1747 vtx: 6 -512535170 460303626 0 0 0 0 0
\r
1748 seg: 6 12 254000 0 0
\r
1749 vtx: 7 -473781374 460303626 0 0 0 0 0
\r
1750 seg: 7 12 254000 0 0
\r
1751 vtx: 8 -467995000 466090000 11 0 0 0 0
\r
1752 connect: 2 2 1 3 0
\r
1753 vtx: 1 -542925000 488950000 11 0 0 0 0
\r
1754 seg: 1 13 254000 0 0
\r
1755 vtx: 2 -532571452 499303548 0 0 0 0 0
\r
1756 seg: 2 13 254000 0 0
\r
1757 vtx: 3 -532571452 523046452 0 0 0 0 0
\r
1758 seg: 3 13 254000 0 0
\r
1759 vtx: 4 -534035000 524510000 11 0 0 0 0
\r
1760 connect: 3 2 -1 2 0
\r
1761 vtx: 1 -542925000 488950000 11 0 0 0 0
\r
1762 seg: 1 12 254000 0 0
\r
1763 vtx: 2 -542925000 486038144 0 0 0 0 0
\r
1764 seg: 2 12 254000 0 0
\r
1765 vtx: 3 -538030928 481144072 0 0 0 0 24205
\r
1767 net: "Xff$XSlave$XXlatch$NN" 2 1 0 0 0 0 1
\r
1768 pin: 1 IC_3_CD4007_1.9
\r
1770 connect: 1 1 0 2 0
\r
1771 vtx: 1 -502285000 504190000 11 0 0 0 0
\r
1772 seg: 1 12 254000 0 0
\r
1773 vtx: 2 -495935000 504190000 0 0 0 0 0
\r
1774 seg: 2 12 254000 0 0
\r
1775 vtx: 3 -483235000 516890000 11 0 0 0 0
\r
1777 net: "Xff$XSlave$XXgatebot$NI" 2 1 0 0 0 0 1
\r
1778 pin: 1 IC_7_CD4007_1.4
\r
1779 pin: 2 IC_7_CD4007_1.8
\r
1780 connect: 1 1 0 1 0
\r
1781 vtx: 1 -504825000 463550000 11 0 0 0 0
\r
1782 seg: 1 12 254000 0 0
\r
1783 vtx: 2 -512445000 471170000 11 0 0 0 0
\r
1785 net: "Xff$XSlave$XXlatch$NP_$G1" 3 2 0 0 0 0 1
\r
1786 pin: 1 IC_3_CD4007_2.1
\r
1787 pin: 2 IC_3_CD4007_2.13
\r
1789 connect: 1 1 0 3 0
\r
1790 vtx: 1 -483235000 450850000 11 0 0 0 0
\r
1791 seg: 1 12 254000 0 0
\r
1792 vtx: 2 -486854500 450850000 0 0 0 0 0
\r
1793 seg: 2 12 254000 0 0
\r
1794 vtx: 3 -489394500 453390000 0 0 0 0 0
\r
1795 seg: 3 12 254000 0 0
\r
1796 vtx: 4 -490855000 453390000 11 0 0 0 0
\r
1797 connect: 2 2 0 1 0
\r
1798 vtx: 1 -497205000 453390000 11 0 0 0 0
\r
1799 seg: 1 12 254000 0 0
\r
1800 vtx: 2 -490855000 453390000 11 0 0 0 0
\r
1802 net: "Xff$XMaster$XXgatetop$NP_$G1" 3 2 0 0 0 0 1
\r
1803 pin: 1 IC_5_CD4007_2.1
\r
1804 pin: 2 IC_5_CD4007_2.13
\r
1806 connect: 1 2 0 3 0
\r
1807 vtx: 1 -478155000 420370000 11 0 0 0 0
\r
1808 seg: 1 13 254000 0 0
\r
1809 vtx: 2 -478155000 414210500 0 0 0 0 0
\r
1810 seg: 2 13 254000 0 0
\r
1811 vtx: 3 -467995000 404050500 0 0 0 0 0
\r
1812 seg: 3 13 254000 0 0
\r
1813 vtx: 4 -467995000 402590000 11 0 0 0 0
\r
1814 connect: 2 1 0 3 0
\r
1815 vtx: 1 -460375000 400050000 11 0 0 0 0
\r
1816 seg: 1 12 254000 0 0
\r
1817 vtx: 2 -463994500 400050000 0 0 0 0 0
\r
1818 seg: 2 12 254000 0 0
\r
1819 vtx: 3 -466534500 402590000 0 0 0 0 0
\r
1820 seg: 3 12 254000 0 0
\r
1821 vtx: 4 -467995000 402590000 11 0 0 0 0
\r
1823 net: "Xff$XMaster$_D_$G1" 3 2 0 0 0 0 1
\r
1824 pin: 1 IC_1_CD4007_2.6
\r
1827 connect: 1 2 0 3 0
\r
1828 vtx: 1 -518795000 440690000 11 0 0 0 0
\r
1829 seg: 1 12 254000 0 0
\r
1830 vtx: 2 -522795500 436689500 0 0 0 0 0
\r
1831 seg: 2 12 254000 0 0
\r
1832 vtx: 3 -530034500 436689500 0 0 0 0 0
\r
1833 seg: 3 12 254000 0 0
\r
1834 vtx: 4 -534035000 440690000 11 0 0 0 0
\r
1835 connect: 2 2 1 2 0
\r
1836 vtx: 1 -518795000 440690000 11 0 0 0 0
\r
1837 seg: 1 13 254000 0 0
\r
1838 vtx: 2 -518795000 430530000 0 0 0 0 0
\r
1839 seg: 2 13 254000 0 0
\r
1840 vtx: 3 -521335000 427990000 11 0 0 0 0
\r
1842 net: "0_$G1" 2 1 0 0 0 0 1
\r
1845 connect: 1 1 0 1 0
\r
1846 vtx: 1 -466090000 421640000 11 0 0 0 0
\r
1847 seg: 1 13 254000 0 0
\r
1848 vtx: 2 -466090000 419100000 11 0 0 0 0
\r
1850 net: "Xff$XMaster$Q_storage_$G1" 3 2 0 0 0 0 1
\r
1851 pin: 1 IC_0_CD4007_2.3
\r
1854 connect: 1 1 0 11 0
\r
1855 vtx: 1 -490855000 420370000 11 0 0 0 0
\r
1856 seg: 1 12 254000 0 0
\r
1857 vtx: 2 -489135928 418650928 0 0 0 0 0
\r
1858 seg: 2 12 254000 0 0
\r
1859 vtx: 3 -489135928 412029656 0 0 0 0 0
\r
1860 seg: 3 12 254000 0 0
\r
1861 vtx: 4 -491971330 409194254 0 0 0 0 0
\r
1862 seg: 4 12 254000 0 0
\r
1863 vtx: 5 -526551398 409194254 0 0 0 0 0
\r
1864 seg: 5 12 254000 0 0
\r
1865 vtx: 6 -532450548 415093404 0 0 0 0 0
\r
1866 seg: 6 12 254000 0 0
\r
1867 vtx: 7 -532450548 417400486 0 0 0 0 0
\r
1868 seg: 7 12 254000 0 0
\r
1869 vtx: 8 -540385000 425334684 0 0 0 0 0
\r
1870 seg: 8 12 254000 0 0
\r
1871 vtx: 9 -540385000 427887892 0 0 0 0 0
\r
1872 seg: 9 12 254000 0 0
\r
1873 vtx: 10 -551815000 439317892 0 0 0 0 0
\r
1874 seg: 10 12 254000 0 0
\r
1875 vtx: 11 -551815000 444500000 0 0 0 0 0
\r
1876 seg: 11 12 254000 0 0
\r
1877 vtx: 12 -555625000 448310000 11 0 0 0 0
\r
1878 connect: 2 2 1 2 0
\r
1879 vtx: 1 -475615000 402590000 11 0 0 0 0
\r
1880 seg: 1 13 254000 0 0
\r
1881 vtx: 2 -475615000 405130000 0 0 0 0 0
\r
1882 seg: 2 13 254000 0 0
\r
1883 vtx: 3 -490855000 420370000 11 0 0 0 0
\r
1885 net: "Xff$NC_01_$G1" 3 2 0 0 0 0 1
\r
1886 pin: 1 IC_0_CD4007_2.6
\r
1889 connect: 1 2 0 3 0
\r
1890 vtx: 1 -537845000 420370000 11 0 0 0 0
\r
1891 seg: 1 12 254000 0 0
\r
1892 vtx: 2 -552704000 435229000 0 0 0 0 0
\r
1893 seg: 2 12 254000 0 0
\r
1894 vtx: 3 -552704000 437769000 0 0 0 0 0
\r
1895 seg: 3 12 254000 0 0
\r
1896 vtx: 4 -555625000 440690000 11 0 0 0 0
\r
1897 connect: 2 2 1 4 0
\r
1898 vtx: 1 -537845000 420370000 11 0 0 0 0
\r
1899 seg: 1 12 254000 0 0
\r
1900 vtx: 2 -537845000 419229032 0 0 0 0 0
\r
1901 seg: 2 12 254000 0 0
\r
1902 vtx: 3 -526921222 408305254 0 0 0 0 0
\r
1903 seg: 3 12 254000 0 0
\r
1904 vtx: 4 -490219746 408305254 0 0 0 0 0
\r
1905 seg: 4 12 254000 0 0
\r
1906 vtx: 5 -485775000 412750000 11 0 0 0 0
\r
1908 net: "Xff$XMaster$XXstiD$NTI_Out_$G1_$G2" 2 1 0 0 0 0 1
\r
1909 pin: 1 IC_2_CD4007_3.8
\r
1911 connect: 1 1 0 5 0
\r
1912 vtx: 1 -417195000 529590000 11 0 0 0 0
\r
1913 seg: 1 12 254000 0 0
\r
1914 vtx: 2 -415734500 531050500 0 0 0 0 0
\r
1915 seg: 2 12 254000 0 0
\r
1916 vtx: 3 -411099508 531050500 0 0 0 0 0
\r
1917 seg: 3 12 254000 0 0
\r
1918 vtx: 4 -406382728 526333720 0 0 0 0 0
\r
1919 seg: 4 12 254000 0 0
\r
1920 vtx: 5 -406382728 516237728 0 0 0 0 0
\r
1921 seg: 5 12 254000 0 0
\r
1922 vtx: 6 -404495000 514350000 11 0 0 0 0
\r
1924 net: "Xff$XSlave$_Q_storage_$G1_$G2" 3 2 0 0 0 0 1
\r
1925 pin: 1 IC_4_CD4007_3.6
\r
1928 connect: 1 1 0 5 0
\r
1929 vtx: 1 -398145000 496570000 11 0 0 0 0
\r
1930 seg: 1 13 254000 0 0
\r
1931 vtx: 2 -396875000 495300000 0 0 0 0 30429
\r
1932 seg: 2 13 254000 0 0
\r
1933 vtx: 3 -393775184 498399816 0 0 0 0 0
\r
1934 seg: 3 13 254000 0 0
\r
1935 vtx: 4 -387532118 498399816 0 0 0 0 0
\r
1936 seg: 4 13 254000 0 0
\r
1937 vtx: 5 -369041680 516890000 0 0 0 0 0
\r
1938 seg: 5 13 254000 0 0
\r
1939 vtx: 6 -366395000 516890000 11 0 0 0 0
\r
1940 connect: 2 2 -1 1 0
\r
1941 vtx: 1 -396875000 478790000 11 0 0 0 0
\r
1942 seg: 1 13 254000 0 0
\r
1943 vtx: 2 -396875000 495300000 0 0 0 0 30429
\r
1945 net: "Xff$XSlave$_D_$G1_$G3" 3 2 0 0 0 0 1
\r
1946 pin: 1 IC_7_CD4007_4.6
\r
1949 connect: 1 2 0 5 0
\r
1950 vtx: 1 -418465000 420370000 11 0 0 0 0
\r
1951 seg: 1 13 254000 0 0
\r
1952 vtx: 2 -416280600 418185600 0 0 0 0 0
\r
1953 seg: 2 13 254000 0 0
\r
1954 vtx: 3 -416280600 406043384 0 0 711200 355600 0
\r
1955 seg: 3 12 254000 0 0
\r
1956 vtx: 4 -413473138 403235922 0 0 0 0 0
\r
1957 seg: 4 12 254000 0 0
\r
1958 vtx: 5 -413473138 392518138 0 0 0 0 0
\r
1959 seg: 5 12 254000 0 0
\r
1960 vtx: 6 -410845000 389890000 11 0 0 0 0
\r
1961 connect: 2 2 1 3 0
\r
1962 vtx: 1 -418465000 420370000 11 0 0 0 0
\r
1963 seg: 1 12 254000 0 0
\r
1964 vtx: 2 -415223198 417128198 0 0 0 0 0
\r
1965 seg: 2 12 254000 0 0
\r
1966 vtx: 3 -393633198 417128198 0 0 0 0 0
\r
1967 seg: 3 12 254000 0 0
\r
1968 vtx: 4 -389255000 412750000 11 0 0 0 0
\r
1970 net: "Xff$XSlave$XXgatetop$NN_$G1_$G3" 2 1 0 0 0 0 1
\r
1971 pin: 1 IC_8_CD4007_4.9
\r
1973 connect: 1 1 0 1 0
\r
1974 vtx: 1 -418465000 389890000 11 0 0 0 0
\r
1975 seg: 1 12 254000 0 0
\r
1976 vtx: 2 -424815000 389890000 11 0 0 0 0
\r
1978 net: "Xff$XMaster$XXstiD$PTI_Out_$G1_$G3" 2 1 0 0 0 0 1
\r
1979 pin: 1 IC_2_CD4007_4.13
\r
1981 connect: 1 1 0 3 0
\r
1982 vtx: 1 -407035000 427990000 11 0 0 0 0
\r
1983 seg: 1 13 254000 0 0
\r
1984 vtx: 2 -407166826 428121826 0 0 0 0 0
\r
1985 seg: 2 13 254000 0 0
\r
1986 vtx: 3 -407166826 448178174 0 0 0 0 0
\r
1987 seg: 3 13 254000 0 0
\r
1988 vtx: 4 -404495000 450850000 11 0 0 0 0
\r
1990 net: "Xff$XMaster$X_Xlatch$NP_$G1_$G3" 3 2 0 0 0 0 1
\r
1991 pin: 1 IC_6_CD4007_4.1
\r
1992 pin: 2 IC_6_CD4007_4.13
\r
1994 connect: 1 1 0 3 0
\r
1995 vtx: 1 -380365000 400050000 11 0 0 0 0
\r
1996 seg: 1 13 254000 0 0
\r
1997 vtx: 2 -383984500 400050000 0 0 0 0 0
\r
1998 seg: 2 13 254000 0 0
\r
1999 vtx: 3 -386524500 402590000 0 0 0 0 0
\r
2000 seg: 3 13 254000 0 0
\r
2001 vtx: 4 -387985000 402590000 11 0 0 0 0
\r
2002 connect: 2 2 0 3 0
\r
2003 vtx: 1 -371475000 412750000 11 0 0 0 0
\r
2004 seg: 1 12 254000 0 0
\r
2005 vtx: 2 -376364500 412750000 0 0 0 0 0
\r
2006 seg: 2 12 254000 0 0
\r
2007 vtx: 3 -386524500 402590000 0 0 0 0 0
\r
2008 seg: 3 12 254000 0 0
\r
2009 vtx: 4 -387985000 402590000 11 0 0 0 0
\r
2011 net: "Xff$XSlave$XXgatetop$NI_$G1_$G3" 2 1 0 0 0 0 1
\r
2012 pin: 1 IC_8_CD4007_4.4
\r
2013 pin: 2 IC_8_CD4007_4.8
\r
2014 connect: 1 1 0 1 0
\r
2015 vtx: 1 -424815000 387350000 11 0 0 0 0
\r
2016 seg: 1 13 254000 0 0
\r
2017 vtx: 2 -432435000 394970000 11 0 0 0 0
\r
2019 net: "Q1" 2 1 0 0 0 0 1
\r
2022 connect: 1 1 0 1 0
\r
2023 vtx: 1 -434975000 379095000 11 0 0 0 0
\r
2024 seg: 1 12 254000 0 0
\r
2025 vtx: 2 -434975000 381635000 11 0 0 0 0
\r
2027 net: "C4" 2 1 0 0 0 0 1
\r
2030 connect: 1 1 0 1 0
\r
2031 vtx: 1 -414655000 379095000 11 0 0 0 0
\r
2032 seg: 1 12 254000 0 0
\r
2033 vtx: 2 -414655000 381635000 11 0 0 0 0
\r
2035 net: "Xff$XSlave$XXgatebot$NI_$G1" 2 1 0 0 0 0 1
\r
2036 pin: 1 IC_7_CD4007_2.4
\r
2037 pin: 2 IC_7_CD4007_2.8
\r
2038 connect: 1 1 0 1 0
\r
2039 vtx: 1 -504825000 387350000 11 0 0 0 0
\r
2040 seg: 1 12 254000 0 0
\r
2041 vtx: 2 -512445000 394970000 11 0 0 0 0
\r
2043 net: "Xff$XMaster$XXgatebot$NN_$G1" 2 1 0 0 0 0 1
\r
2044 pin: 1 IC_1_CD4007_2.9
\r
2046 connect: 1 1 0 3 0
\r
2047 vtx: 1 -525145000 427990000 11 0 0 0 0
\r
2048 seg: 1 13 254000 0 0
\r
2049 vtx: 2 -524948658 428186342 0 0 0 0 0
\r
2050 seg: 2 13 254000 0 0
\r
2051 vtx: 3 -524948658 439223658 0 0 0 0 0
\r
2052 seg: 3 13 254000 0 0
\r
2053 vtx: 4 -526415000 440690000 11 0 0 0 0
\r
2055 net: "$G_Vss_$G1_$G2" 12 11 0 0 0 0 1
\r
2056 pin: 1 IC_0_CD4007_3.7
\r
2057 pin: 2 IC_6_CD4007_3.7
\r
2058 pin: 3 IC_5_CD4007_3.7
\r
2059 pin: 4 IC_1_CD4007_3.7
\r
2060 pin: 5 IC_2_CD4007_3.4
\r
2061 pin: 6 IC_2_CD4007_3.7
\r
2062 pin: 7 IC_3_CD4007_3.7
\r
2063 pin: 8 IC_4_CD4007_3.7
\r
2064 pin: 9 IC_8_CD4007_3.7
\r
2065 pin: 10 IC_7_CD4007_3.7
\r
2066 pin: 11 X_IC_9_CD4007_3.7
\r
2068 connect: 1 3 0 5 0
\r
2069 vtx: 1 -432435000 514350000 11 0 0 0 0
\r
2070 seg: 1 13 254000 0 0
\r
2071 vtx: 2 -436693310 518608310 0 0 0 0 0
\r
2072 seg: 2 13 254000 0 0
\r
2073 vtx: 3 -440010550 518608310 0 0 0 0 0
\r
2074 seg: 3 13 254000 0 0
\r
2075 vtx: 4 -445730122 512888992 0 0 0 0 0
\r
2076 seg: 4 13 254000 0 0
\r
2077 vtx: 5 -452563738 512888992 0 0 0 0 0
\r
2078 seg: 5 13 254000 0 0
\r
2079 vtx: 6 -454025000 514350000 11 0 0 0 0
\r
2080 connect: 2 7 1 14 0
\r
2081 vtx: 1 -366395000 514350000 11 0 0 0 0
\r
2082 seg: 1 13 254000 0 0
\r
2083 vtx: 2 -372725188 508019812 0 0 0 0 0
\r
2084 seg: 2 13 254000 0 0
\r
2085 vtx: 3 -373192548 508019812 0 0 0 0 24107
\r
2086 seg: 3 13 254000 0 0
\r
2087 vtx: 4 -373192548 503470926 0 0 0 0 0
\r
2088 seg: 4 13 254000 0 0
\r
2089 vtx: 5 -372641876 502920254 0 0 0 0 32499
\r
2090 seg: 5 13 254000 0 0
\r
2091 vtx: 6 -378269754 497292630 0 0 0 0 0
\r
2092 seg: 6 13 254000 0 0
\r
2093 vtx: 7 -378269754 489299504 0 0 0 0 0
\r
2094 seg: 7 13 254000 0 0
\r
2095 vtx: 8 -372295928 483325678 0 0 0 0 0
\r
2096 seg: 8 13 254000 0 0
\r
2097 vtx: 9 -372295928 468636604 0 0 0 0 14945
\r
2098 seg: 9 13 254000 0 0
\r
2099 vtx: 10 -373896128 468636604 0 0 0 0 0
\r
2100 seg: 10 13 254000 0 0
\r
2101 vtx: 11 -375960386 466572346 0 0 0 0 0
\r
2102 seg: 11 13 254000 0 0
\r
2103 vtx: 12 -375960386 465889086 0 0 0 0 0
\r
2104 seg: 12 13 254000 0 0
\r
2105 vtx: 13 -379769624 462079848 0 0 0 0 0
\r
2106 seg: 13 13 254000 0 0
\r
2107 vtx: 14 -386514848 462079848 0 0 0 0 0
\r
2108 seg: 14 13 254000 0 0
\r
2109 vtx: 15 -387985000 463550000 11 0 0 0 0
\r
2110 connect: 3 9 1 3 0
\r
2111 vtx: 1 -410845000 463550000 11 0 0 0 0
\r
2112 seg: 1 12 254000 0 0
\r
2113 vtx: 2 -409382468 462087468 0 0 0 0 0
\r
2114 seg: 2 12 254000 0 0
\r
2115 vtx: 3 -389447532 462087468 0 0 0 0 0
\r
2116 seg: 3 12 254000 0 0
\r
2117 vtx: 4 -387985000 463550000 11 0 0 0 0
\r
2118 connect: 4 5 3 3 0
\r
2119 vtx: 1 -412115000 514350000 11 0 0 0 0
\r
2120 seg: 1 12 254000 0 0
\r
2121 vtx: 2 -414466024 511998976 0 0 0 0 0
\r
2122 seg: 2 12 254000 0 0
\r
2123 vtx: 3 -430083976 511998976 0 0 0 0 0
\r
2124 seg: 3 12 254000 0 0
\r
2125 vtx: 4 -432435000 514350000 11 0 0 0 0
\r
2126 connect: 5 5 4 5 0
\r
2127 vtx: 1 -412115000 514350000 11 0 0 0 0
\r
2128 seg: 1 12 254000 0 0
\r
2129 vtx: 2 -413594804 515829804 0 0 0 0 0
\r
2130 seg: 2 12 254000 0 0
\r
2131 vtx: 3 -413594804 520042140 0 0 0 0 0
\r
2132 seg: 3 12 254000 0 0
\r
2133 vtx: 4 -412127192 521509752 0 0 0 0 18104
\r
2134 seg: 4 12 254000 0 0
\r
2135 vtx: 5 -412115000 521521944 0 0 0 0 0
\r
2136 seg: 5 12 254000 0 0
\r
2137 vtx: 6 -412115000 521970000 11 0 0 0 0
\r
2138 connect: 6 9 8 3 0
\r
2139 vtx: 1 -410845000 463550000 11 0 0 0 0
\r
2140 seg: 1 13 254000 0 0
\r
2141 vtx: 2 -413200088 461194912 0 0 0 0 0
\r
2142 seg: 2 13 254000 0 0
\r
2143 vtx: 3 -430079912 461194912 0 0 0 0 0
\r
2144 seg: 3 13 254000 0 0
\r
2145 vtx: 4 -432435000 463550000 11 0 0 0 0
\r
2146 connect: 7 10 8 3 0
\r
2147 vtx: 1 -454025000 463550000 11 0 0 0 0
\r
2148 seg: 1 13 254000 0 0
\r
2149 vtx: 2 -452564500 462089500 0 0 0 0 0
\r
2150 seg: 2 13 254000 0 0
\r
2151 vtx: 3 -433895500 462089500 0 0 0 0 0
\r
2152 seg: 3 13 254000 0 0
\r
2153 vtx: 4 -432435000 463550000 11 0 0 0 0
\r
2154 connect: 8 11 -1 2 0
\r
2155 vtx: 1 -367030000 497840000 11 0 0 0 0
\r
2156 seg: 1 13 254000 0 0
\r
2157 vtx: 2 -367561622 497840000 0 0 0 0 0
\r
2158 seg: 2 13 254000 0 0
\r
2159 vtx: 3 -372641876 502920254 0 0 0 0 32499
\r
2160 connect: 9 6 -1 4 0
\r
2161 vtx: 1 -389255000 514350000 11 0 0 0 0
\r
2162 seg: 1 13 254000 0 0
\r
2163 vtx: 2 -382924812 508019812 0 0 0 0 0
\r
2164 seg: 2 13 254000 0 0
\r
2165 vtx: 3 -382840738 508019812 0 0 711200 355600 0
\r
2166 seg: 3 12 254000 0 0
\r
2167 vtx: 4 -376028712 508019812 0 0 711200 355600 0
\r
2168 seg: 4 13 254000 0 0
\r
2169 vtx: 5 -373192548 508019812 0 0 0 0 24107
\r
2170 connect: 10 2 -1 2 0
\r
2171 vtx: 1 -366395000 463550000 11 0 0 0 0
\r
2172 seg: 1 13 254000 0 0
\r
2173 vtx: 2 -371481604 468636604 0 0 0 0 0
\r
2174 seg: 2 13 254000 0 0
\r
2175 vtx: 3 -372295928 468636604 0 0 0 0 14945
\r
2176 connect: 11 6 -1 5 0
\r
2177 vtx: 1 -389255000 514350000 11 0 0 0 0
\r
2178 seg: 1 12 254000 0 0
\r
2179 vtx: 2 -390719564 512885436 0 0 0 0 0
\r
2180 seg: 2 12 254000 0 0
\r
2181 vtx: 3 -405095964 512885436 0 0 0 0 0
\r
2182 seg: 3 12 254000 0 0
\r
2183 vtx: 4 -407447242 515236714 0 0 0 0 0
\r
2184 seg: 4 12 254000 0 0
\r
2185 vtx: 5 -407447242 516829802 0 0 0 0 0
\r
2186 seg: 5 12 254000 0 0
\r
2187 vtx: 6 -412127192 521509752 0 0 0 0 18104
\r
2189 net: "Xff$XMaster$XXstiD$NTI_Out_$G1_$G3" 2 1 0 0 0 0 1
\r
2190 pin: 1 IC_2_CD4007_4.8
\r
2192 connect: 1 1 0 5 0
\r
2193 vtx: 1 -417195000 453390000 11 0 0 0 0
\r
2194 seg: 1 12 254000 0 0
\r
2195 vtx: 2 -415734500 454850500 0 0 0 0 0
\r
2196 seg: 2 12 254000 0 0
\r
2197 vtx: 3 -411099508 454850500 0 0 0 0 0
\r
2198 seg: 3 12 254000 0 0
\r
2199 vtx: 4 -406382728 450133720 0 0 0 0 0
\r
2200 seg: 4 12 254000 0 0
\r
2201 vtx: 5 -406382728 440037728 0 0 0 0 0
\r
2202 seg: 5 12 254000 0 0
\r
2203 vtx: 6 -404495000 438150000 11 0 0 0 0
\r
2205 net: "Xff$XSlave$_Q_storage_$G1_$G3" 3 2 0 0 0 0 1
\r
2206 pin: 1 IC_4_CD4007_4.6
\r
2209 connect: 1 1 0 5 0
\r
2210 vtx: 1 -398145000 420370000 11 0 0 0 0
\r
2211 seg: 1 13 254000 0 0
\r
2212 vtx: 2 -396875000 419100000 0 0 0 0 31310
\r
2213 seg: 2 13 254000 0 0
\r
2214 vtx: 3 -393775184 422199816 0 0 0 0 0
\r
2215 seg: 3 13 254000 0 0
\r
2216 vtx: 4 -387532118 422199816 0 0 0 0 0
\r
2217 seg: 4 13 254000 0 0
\r
2218 vtx: 5 -369041680 440690000 0 0 0 0 0
\r
2219 seg: 5 13 254000 0 0
\r
2220 vtx: 6 -366395000 440690000 11 0 0 0 0
\r
2221 connect: 2 2 -1 1 0
\r
2222 vtx: 1 -396875000 402590000 11 0 0 0 0
\r
2223 seg: 1 13 254000 0 0
\r
2224 vtx: 2 -396875000 419100000 0 0 0 0 31310
\r
2226 net: "Q2" 2 1 0 0 0 0 1
\r
2229 connect: 1 1 0 1 0
\r
2230 vtx: 1 -427355000 379095000 11 0 0 0 0
\r
2231 seg: 1 12 254000 0 0
\r
2232 vtx: 2 -427355000 381635000 11 0 0 0 0
\r
2234 net: "D_$G0" 3 2 0 0 0 0 1
\r
2235 pin: 1 IC_5_CD4007_1.3
\r
2236 pin: 2 IC_2_CD4007_1.6
\r
2238 connect: 1 2 0 5 0
\r
2239 vtx: 1 -463550000 497840000 11 0 0 0 0
\r
2240 seg: 1 13 254000 0 0
\r
2241 vtx: 2 -462152746 499237254 0 0 0 0 0
\r
2242 seg: 2 13 254000 0 0
\r
2243 vtx: 3 -460427832 499237254 0 0 0 0 0
\r
2244 seg: 3 13 254000 0 0
\r
2245 vtx: 4 -459611222 498420644 0 0 0 0 0
\r
2246 seg: 4 13 254000 0 0
\r
2247 vtx: 5 -459611222 482093778 0 0 0 0 0
\r
2248 seg: 5 13 254000 0 0
\r
2249 vtx: 6 -467995000 473710000 11 0 0 0 0
\r
2250 connect: 2 2 1 6 0
\r
2251 vtx: 1 -463550000 497840000 11 0 0 0 0
\r
2252 seg: 1 12 254000 0 0
\r
2253 vtx: 2 -466403436 500693436 0 0 0 0 0
\r
2254 seg: 2 12 254000 0 0
\r
2255 vtx: 3 -501219470 500693436 0 0 0 0 0
\r
2256 seg: 3 12 254000 0 0
\r
2257 vtx: 4 -506531626 506005846 0 0 0 0 0
\r
2258 seg: 4 12 254000 0 0
\r
2259 vtx: 5 -506531626 510047494 0 0 0 0 0
\r
2260 seg: 5 12 254000 0 0
\r
2261 vtx: 6 -513374132 516890000 0 0 0 0 0
\r
2262 seg: 6 12 254000 0 0
\r
2263 vtx: 7 -513715000 516890000 11 0 0 0 0
\r
2265 net: "Xff$XSlave$XXlatch$NP" 3 2 0 0 0 0 1
\r
2266 pin: 1 IC_3_CD4007_1.1
\r
2267 pin: 2 IC_3_CD4007_1.13
\r
2269 connect: 1 1 0 3 0
\r
2270 vtx: 1 -483235000 527050000 11 0 0 0 0
\r
2271 seg: 1 12 254000 0 0
\r
2272 vtx: 2 -486854500 527050000 0 0 0 0 0
\r
2273 seg: 2 12 254000 0 0
\r
2274 vtx: 3 -489394500 529590000 0 0 0 0 0
\r
2275 seg: 3 12 254000 0 0
\r
2276 vtx: 4 -490855000 529590000 11 0 0 0 0
\r
2277 connect: 2 2 0 1 0
\r
2278 vtx: 1 -497205000 529590000 11 0 0 0 0
\r
2279 seg: 1 12 254000 0 0
\r
2280 vtx: 2 -490855000 529590000 11 0 0 0 0
\r
2282 net: "Xff$XSlave$_Q_storage" 3 2 0 0 0 0 1
\r
2283 pin: 1 IC_4_CD4007_1.6
\r
2286 connect: 1 1 0 5 0
\r
2287 vtx: 1 -499745000 496570000 11 0 0 0 0
\r
2288 seg: 1 13 254000 0 0
\r
2289 vtx: 2 -498475000 495300000 0 0 0 0 11071
\r
2290 seg: 2 13 254000 0 0
\r
2291 vtx: 3 -495375184 498399816 0 0 0 0 0
\r
2292 seg: 3 13 254000 0 0
\r
2293 vtx: 4 -489132118 498399816 0 0 0 0 0
\r
2294 seg: 4 13 254000 0 0
\r
2295 vtx: 5 -470641680 516890000 0 0 0 0 0
\r
2296 seg: 5 13 254000 0 0
\r
2297 vtx: 6 -467995000 516890000 11 0 0 0 0
\r
2298 connect: 2 2 -1 1 0
\r
2299 vtx: 1 -498475000 478790000 11 0 0 0 0
\r
2300 seg: 1 13 254000 0 0
\r
2301 vtx: 2 -498475000 495300000 0 0 0 0 11071
\r
2303 net: "Xff$XMaster$XXgatetop$NI" 2 1 0 0 0 0 1
\r
2304 pin: 1 IC_5_CD4007_1.4
\r
2305 pin: 2 IC_5_CD4007_1.8
\r
2306 connect: 1 1 0 1 0
\r
2307 vtx: 1 -460375000 463550000 11 0 0 0 0
\r
2308 seg: 1 12 254000 0 0
\r
2309 vtx: 2 -467995000 471170000 11 0 0 0 0
\r
2311 net: "Xff$XSlave$_D_$G1" 3 2 0 0 0 0 1
\r
2312 pin: 1 IC_7_CD4007_2.6
\r
2315 connect: 1 2 0 5 0
\r
2316 vtx: 1 -520065000 420370000 11 0 0 0 0
\r
2317 seg: 1 13 254000 0 0
\r
2318 vtx: 2 -517880600 418185600 0 0 0 0 0
\r
2319 seg: 2 13 254000 0 0
\r
2320 vtx: 3 -517880600 406043384 0 0 711200 355600 0
\r
2321 seg: 3 12 254000 0 0
\r
2322 vtx: 4 -515073138 403235922 0 0 0 0 0
\r
2323 seg: 4 12 254000 0 0
\r
2324 vtx: 5 -515073138 392518138 0 0 0 0 0
\r
2325 seg: 5 12 254000 0 0
\r
2326 vtx: 6 -512445000 389890000 11 0 0 0 0
\r
2327 connect: 2 2 1 3 0
\r
2328 vtx: 1 -520065000 420370000 11 0 0 0 0
\r
2329 seg: 1 12 254000 0 0
\r
2330 vtx: 2 -516823198 417128198 0 0 0 0 0
\r
2331 seg: 2 12 254000 0 0
\r
2332 vtx: 3 -495233198 417128198 0 0 0 0 0
\r
2333 seg: 3 12 254000 0 0
\r
2334 vtx: 4 -490855000 412750000 11 0 0 0 0
\r
2336 net: "Xff$XSlave$X_Xlatch$NI_$G1" 2 1 0 0 0 0 1
\r
2337 pin: 1 IC_4_CD4007_2.4
\r
2338 pin: 2 IC_4_CD4007_2.8
\r
2339 connect: 1 1 0 1 0
\r
2340 vtx: 1 -460375000 438150000 11 0 0 0 0
\r
2341 seg: 1 12 254000 0 0
\r
2342 vtx: 2 -467995000 445770000 11 0 0 0 0
\r
2344 net: "Xff$XMaster$XXgatebot$NP_$G1_$G2" 3 2 0 0 0 0 1
\r
2345 pin: 1 IC_1_CD4007_3.1
\r
2346 pin: 2 IC_1_CD4007_3.13
\r
2348 connect: 1 2 0 1 0
\r
2349 vtx: 1 -438785000 529590000 11 0 0 0 0
\r
2350 seg: 1 12 254000 0 0
\r
2351 vtx: 2 -432435000 529590000 11 0 0 0 0
\r
2352 connect: 2 1 0 3 0
\r
2353 vtx: 1 -424815000 527050000 11 0 0 0 0
\r
2354 seg: 1 13 254000 0 0
\r
2355 vtx: 2 -428434500 527050000 0 0 0 0 0
\r
2356 seg: 2 13 254000 0 0
\r
2357 vtx: 3 -430974500 529590000 0 0 0 0 0
\r
2358 seg: 3 13 254000 0 0
\r
2359 vtx: 4 -432435000 529590000 11 0 0 0 0
\r
2361 net: "$G_Vss_$G1_$G3" 12 11 0 0 0 0 1
\r
2362 pin: 1 IC_0_CD4007_4.7
\r
2363 pin: 2 IC_6_CD4007_4.7
\r
2364 pin: 3 IC_5_CD4007_4.7
\r
2365 pin: 4 IC_1_CD4007_4.7
\r
2366 pin: 5 IC_2_CD4007_4.4
\r
2367 pin: 6 IC_2_CD4007_4.7
\r
2368 pin: 7 IC_3_CD4007_4.7
\r
2369 pin: 8 IC_4_CD4007_4.7
\r
2370 pin: 9 IC_8_CD4007_4.7
\r
2371 pin: 10 IC_7_CD4007_4.7
\r
2372 pin: 11 X_IC_9_CD4007_4.7
\r
2374 connect: 1 3 0 5 0
\r
2375 vtx: 1 -432435000 438150000 11 0 0 0 0
\r
2376 seg: 1 13 254000 0 0
\r
2377 vtx: 2 -436693310 442408310 0 0 0 0 0
\r
2378 seg: 2 13 254000 0 0
\r
2379 vtx: 3 -440010550 442408310 0 0 0 0 0
\r
2380 seg: 3 13 254000 0 0
\r
2381 vtx: 4 -445730122 436688992 0 0 0 0 0
\r
2382 seg: 4 13 254000 0 0
\r
2383 vtx: 5 -452563738 436688992 0 0 0 0 0
\r
2384 seg: 5 13 254000 0 0
\r
2385 vtx: 6 -454025000 438150000 11 0 0 0 0
\r
2386 connect: 2 7 1 14 0
\r
2387 vtx: 1 -366395000 438150000 11 0 0 0 0
\r
2388 seg: 1 13 254000 0 0
\r
2389 vtx: 2 -372725188 431819812 0 0 0 0 0
\r
2390 seg: 2 13 254000 0 0
\r
2391 vtx: 3 -373192548 431819812 0 0 0 0 677
\r
2392 seg: 3 13 254000 0 0
\r
2393 vtx: 4 -373192548 427270926 0 0 0 0 0
\r
2394 seg: 4 13 254000 0 0
\r
2395 vtx: 5 -372641876 426720254 0 0 0 0 23717
\r
2396 seg: 5 13 254000 0 0
\r
2397 vtx: 6 -378269754 421092630 0 0 0 0 0
\r
2398 seg: 6 13 254000 0 0
\r
2399 vtx: 7 -378269754 413099504 0 0 0 0 0
\r
2400 seg: 7 13 254000 0 0
\r
2401 vtx: 8 -372295928 407125678 0 0 0 0 0
\r
2402 seg: 8 13 254000 0 0
\r
2403 vtx: 9 -372295928 392436604 0 0 0 0 31711
\r
2404 seg: 9 13 254000 0 0
\r
2405 vtx: 10 -373896128 392436604 0 0 0 0 0
\r
2406 seg: 10 13 254000 0 0
\r
2407 vtx: 11 -375960386 390372346 0 0 0 0 0
\r
2408 seg: 11 13 254000 0 0
\r
2409 vtx: 12 -375960386 389689086 0 0 0 0 0
\r
2410 seg: 12 13 254000 0 0
\r
2411 vtx: 13 -379769624 385879848 0 0 0 0 0
\r
2412 seg: 13 13 254000 0 0
\r
2413 vtx: 14 -386514848 385879848 0 0 0 0 0
\r
2414 seg: 14 13 254000 0 0
\r
2415 vtx: 15 -387985000 387350000 11 0 0 0 0
\r
2416 connect: 3 9 1 3 0
\r
2417 vtx: 1 -410845000 387350000 11 0 0 0 0
\r
2418 seg: 1 12 254000 0 0
\r
2419 vtx: 2 -409382468 385887468 0 0 0 0 0
\r
2420 seg: 2 12 254000 0 0
\r
2421 vtx: 3 -389447532 385887468 0 0 0 0 0
\r
2422 seg: 3 12 254000 0 0
\r
2423 vtx: 4 -387985000 387350000 11 0 0 0 0
\r
2424 connect: 4 5 3 3 0
\r
2425 vtx: 1 -412115000 438150000 11 0 0 0 0
\r
2426 seg: 1 12 254000 0 0
\r
2427 vtx: 2 -414466024 435798976 0 0 0 0 0
\r
2428 seg: 2 12 254000 0 0
\r
2429 vtx: 3 -430083976 435798976 0 0 0 0 0
\r
2430 seg: 3 12 254000 0 0
\r
2431 vtx: 4 -432435000 438150000 11 0 0 0 0
\r
2432 connect: 5 5 4 5 0
\r
2433 vtx: 1 -412115000 438150000 11 0 0 0 0
\r
2434 seg: 1 12 254000 0 0
\r
2435 vtx: 2 -413594804 439629804 0 0 0 0 0
\r
2436 seg: 2 12 254000 0 0
\r
2437 vtx: 3 -413594804 443842140 0 0 0 0 0
\r
2438 seg: 3 12 254000 0 0
\r
2439 vtx: 4 -412127192 445309752 0 0 0 0 32428
\r
2440 seg: 4 12 254000 0 0
\r
2441 vtx: 5 -412115000 445321944 0 0 0 0 0
\r
2442 seg: 5 12 254000 0 0
\r
2443 vtx: 6 -412115000 445770000 11 0 0 0 0
\r
2444 connect: 6 9 8 3 0
\r
2445 vtx: 1 -410845000 387350000 11 0 0 0 0
\r
2446 seg: 1 13 254000 0 0
\r
2447 vtx: 2 -413200088 384994912 0 0 0 0 0
\r
2448 seg: 2 13 254000 0 0
\r
2449 vtx: 3 -430079912 384994912 0 0 0 0 0
\r
2450 seg: 3 13 254000 0 0
\r
2451 vtx: 4 -432435000 387350000 11 0 0 0 0
\r
2452 connect: 7 10 8 3 0
\r
2453 vtx: 1 -454025000 387350000 11 0 0 0 0
\r
2454 seg: 1 13 254000 0 0
\r
2455 vtx: 2 -452564500 385889500 0 0 0 0 0
\r
2456 seg: 2 13 254000 0 0
\r
2457 vtx: 3 -433895500 385889500 0 0 0 0 0
\r
2458 seg: 3 13 254000 0 0
\r
2459 vtx: 4 -432435000 387350000 11 0 0 0 0
\r
2460 connect: 8 11 -1 2 0
\r
2461 vtx: 1 -367030000 421640000 11 0 0 0 0
\r
2462 seg: 1 13 254000 0 0
\r
2463 vtx: 2 -367561622 421640000 0 0 0 0 0
\r
2464 seg: 2 13 254000 0 0
\r
2465 vtx: 3 -372641876 426720254 0 0 0 0 23717
\r
2466 connect: 9 6 -1 4 0
\r
2467 vtx: 1 -389255000 438150000 11 0 0 0 0
\r
2468 seg: 1 13 254000 0 0
\r
2469 vtx: 2 -382924812 431819812 0 0 0 0 0
\r
2470 seg: 2 13 254000 0 0
\r
2471 vtx: 3 -382840738 431819812 0 0 711200 355600 0
\r
2472 seg: 3 12 254000 0 0
\r
2473 vtx: 4 -376028712 431819812 0 0 711200 355600 0
\r
2474 seg: 4 13 254000 0 0
\r
2475 vtx: 5 -373192548 431819812 0 0 0 0 677
\r
2476 connect: 10 2 -1 2 0
\r
2477 vtx: 1 -366395000 387350000 11 0 0 0 0
\r
2478 seg: 1 13 254000 0 0
\r
2479 vtx: 2 -371481604 392436604 0 0 0 0 0
\r
2480 seg: 2 13 254000 0 0
\r
2481 vtx: 3 -372295928 392436604 0 0 0 0 31711
\r
2482 connect: 11 6 -1 5 0
\r
2483 vtx: 1 -389255000 438150000 11 0 0 0 0
\r
2484 seg: 1 12 254000 0 0
\r
2485 vtx: 2 -390719564 436685436 0 0 0 0 0
\r
2486 seg: 2 12 254000 0 0
\r
2487 vtx: 3 -405095964 436685436 0 0 0 0 0
\r
2488 seg: 3 12 254000 0 0
\r
2489 vtx: 4 -407447242 439036714 0 0 0 0 0
\r
2490 seg: 4 12 254000 0 0
\r
2491 vtx: 5 -407447242 440629802 0 0 0 0 0
\r
2492 seg: 5 12 254000 0 0
\r
2493 vtx: 6 -412127192 445309752 0 0 0 0 32428
\r
2495 net: "Q3" 2 1 0 0 0 0 1
\r
2498 connect: 1 1 0 1 0
\r
2499 vtx: 1 -419735000 379095000 11 0 0 0 0
\r
2500 seg: 1 12 254000 0 0
\r
2501 vtx: 2 -419735000 381635000 11 0 0 0 0
\r
2503 net: "Xff$XSlave$X_Xlatch$NN" 2 1 0 0 0 0 1
\r
2504 pin: 1 IC_4_CD4007_1.9
\r
2506 connect: 1 1 0 5 0
\r
2507 vtx: 1 -474345000 516890000 11 0 0 0 0
\r
2508 seg: 1 12 254000 0 0
\r
2509 vtx: 2 -470339166 512884166 0 0 0 0 0
\r
2510 seg: 2 12 254000 0 0
\r
2511 vtx: 3 -459761082 512884166 0 0 0 0 0
\r
2512 seg: 3 12 254000 0 0
\r
2513 vtx: 4 -458911706 513733542 0 0 0 0 0
\r
2514 seg: 4 12 254000 0 0
\r
2515 vtx: 5 -458911706 515426706 0 0 0 0 0
\r
2516 seg: 5 12 254000 0 0
\r
2517 vtx: 6 -460375000 516890000 11 0 0 0 0
\r
2519 net: "Xff$XSlave$XXgatetop$NI" 2 1 0 0 0 0 1
\r
2520 pin: 1 IC_8_CD4007_1.4
\r
2521 pin: 2 IC_8_CD4007_1.8
\r
2522 connect: 1 1 0 1 0
\r
2523 vtx: 1 -526415000 463550000 11 0 0 0 0
\r
2524 seg: 1 13 254000 0 0
\r
2525 vtx: 2 -534035000 471170000 11 0 0 0 0
\r
2527 net: "D_$G1" 3 2 0 0 0 0 1
\r
2528 pin: 1 IC_5_CD4007_2.3
\r
2529 pin: 2 IC_2_CD4007_2.6
\r
2531 connect: 1 2 0 5 0
\r
2532 vtx: 1 -463550000 421640000 11 0 0 0 0
\r
2533 seg: 1 13 254000 0 0
\r
2534 vtx: 2 -462152746 423037254 0 0 0 0 0
\r
2535 seg: 2 13 254000 0 0
\r
2536 vtx: 3 -460427832 423037254 0 0 0 0 0
\r
2537 seg: 3 13 254000 0 0
\r
2538 vtx: 4 -459611222 422220644 0 0 0 0 0
\r
2539 seg: 4 13 254000 0 0
\r
2540 vtx: 5 -459611222 405893778 0 0 0 0 0
\r
2541 seg: 5 13 254000 0 0
\r
2542 vtx: 6 -467995000 397510000 11 0 0 0 0
\r
2543 connect: 2 2 1 6 0
\r
2544 vtx: 1 -463550000 421640000 11 0 0 0 0
\r
2545 seg: 1 12 254000 0 0
\r
2546 vtx: 2 -466403436 424493436 0 0 0 0 0
\r
2547 seg: 2 12 254000 0 0
\r
2548 vtx: 3 -501219470 424493436 0 0 0 0 0
\r
2549 seg: 3 12 254000 0 0
\r
2550 vtx: 4 -506531626 429805846 0 0 0 0 0
\r
2551 seg: 4 12 254000 0 0
\r
2552 vtx: 5 -506531626 433847494 0 0 0 0 0
\r
2553 seg: 5 12 254000 0 0
\r
2554 vtx: 6 -513374132 440690000 0 0 0 0 0
\r
2555 seg: 6 12 254000 0 0
\r
2556 vtx: 7 -513715000 440690000 11 0 0 0 0
\r
2558 net: "Xff$_CLK_$G1" 4 3 0 0 0 0 1
\r
2559 pin: 1 IC_5_CD4007_2.6
\r
2560 pin: 2 IC_1_CD4007_2.3
\r
2563 connect: 1 3 0 7 0
\r
2564 vtx: 1 -540385000 402590000 11 0 0 0 0
\r
2565 seg: 1 12 254000 0 0
\r
2566 vtx: 2 -538030928 404944072 0 0 0 0 24936
\r
2567 seg: 2 12 254000 0 0
\r
2568 vtx: 3 -526703036 404944072 0 0 0 0 0
\r
2569 seg: 3 12 254000 0 0
\r
2570 vtx: 4 -518350500 396591536 0 0 0 0 0
\r
2571 seg: 4 12 254000 0 0
\r
2572 vtx: 5 -518350500 389918956 0 0 0 0 0
\r
2573 seg: 5 12 254000 0 0
\r
2574 vtx: 6 -512535170 384103626 0 0 0 0 0
\r
2575 seg: 6 12 254000 0 0
\r
2576 vtx: 7 -473781374 384103626 0 0 0 0 0
\r
2577 seg: 7 12 254000 0 0
\r
2578 vtx: 8 -467995000 389890000 11 0 0 0 0
\r
2579 connect: 2 2 1 3 0
\r
2580 vtx: 1 -542925000 412750000 11 0 0 0 0
\r
2581 seg: 1 13 254000 0 0
\r
2582 vtx: 2 -532571452 423103548 0 0 0 0 0
\r
2583 seg: 2 13 254000 0 0
\r
2584 vtx: 3 -532571452 446846452 0 0 0 0 0
\r
2585 seg: 3 13 254000 0 0
\r
2586 vtx: 4 -534035000 448310000 11 0 0 0 0
\r
2587 connect: 3 2 -1 2 0
\r
2588 vtx: 1 -542925000 412750000 11 0 0 0 0
\r
2589 seg: 1 12 254000 0 0
\r
2590 vtx: 2 -542925000 409838144 0 0 0 0 0
\r
2591 seg: 2 12 254000 0 0
\r
2592 vtx: 3 -538030928 404944072 0 0 0 0 24936
\r
2594 net: "Xff$XMaster$XXstiD$NTI_Out_$G1" 2 1 0 0 0 0 1
\r
2595 pin: 1 IC_2_CD4007_2.8
\r
2597 connect: 1 1 0 5 0
\r
2598 vtx: 1 -518795000 453390000 11 0 0 0 0
\r
2599 seg: 1 12 254000 0 0
\r
2600 vtx: 2 -517334500 454850500 0 0 0 0 0
\r
2601 seg: 2 12 254000 0 0
\r
2602 vtx: 3 -512699508 454850500 0 0 0 0 0
\r
2603 seg: 3 12 254000 0 0
\r
2604 vtx: 4 -507982728 450133720 0 0 0 0 0
\r
2605 seg: 4 12 254000 0 0
\r
2606 vtx: 5 -507982728 440037728 0 0 0 0 0
\r
2607 seg: 5 12 254000 0 0
\r
2608 vtx: 6 -506095000 438150000 11 0 0 0 0
\r
2610 net: "Xff$XMaster$XXgatebot$NP_$G1" 3 2 0 0 0 0 1
\r
2611 pin: 1 IC_1_CD4007_2.1
\r
2612 pin: 2 IC_1_CD4007_2.13
\r
2614 connect: 1 2 0 1 0
\r
2615 vtx: 1 -540385000 453390000 11 0 0 0 0
\r
2616 seg: 1 12 254000 0 0
\r
2617 vtx: 2 -534035000 453390000 11 0 0 0 0
\r
2618 connect: 2 1 0 3 0
\r
2619 vtx: 1 -526415000 450850000 11 0 0 0 0
\r
2620 seg: 1 13 254000 0 0
\r
2621 vtx: 2 -530034500 450850000 0 0 0 0 0
\r
2622 seg: 2 13 254000 0 0
\r
2623 vtx: 3 -532574500 453390000 0 0 0 0 0
\r
2624 seg: 3 13 254000 0 0
\r
2625 vtx: 4 -534035000 453390000 11 0 0 0 0
\r
2627 net: "Xff$XSlave$XXstiD$PTI_Out_$G1" 2 1 0 0 0 0 1
\r
2628 pin: 1 IC_2_CD4007_2.1
\r
2630 connect: 1 1 0 4 0
\r
2631 vtx: 1 -503555000 412750000 11 0 0 0 0
\r
2632 seg: 1 13 254000 0 0
\r
2633 vtx: 2 -503555000 419739826 0 0 0 0 0
\r
2634 seg: 2 13 254000 0 0
\r
2635 vtx: 3 -510356612 426541438 0 0 0 0 0
\r
2636 seg: 3 13 254000 0 0
\r
2637 vtx: 4 -510356612 450031612 0 0 0 0 0
\r
2638 seg: 4 13 254000 0 0
\r
2639 vtx: 5 -513715000 453390000 11 0 0 0 0
\r
2641 net: "Xff$XSlave$XXgatetop$NN_$G1" 2 1 0 0 0 0 1
\r
2642 pin: 1 IC_8_CD4007_2.9
\r
2644 connect: 1 1 0 1 0
\r
2645 vtx: 1 -520065000 389890000 11 0 0 0 0
\r
2646 seg: 1 12 254000 0 0
\r
2647 vtx: 2 -526415000 389890000 11 0 0 0 0
\r
2649 net: "Xff$XSlave$X_Xlatch$NP_$G1_$G2" 3 2 0 0 0 0 1
\r
2650 pin: 1 IC_4_CD4007_3.1
\r
2651 pin: 2 IC_4_CD4007_3.13
\r
2653 connect: 1 1 0 3 0
\r
2654 vtx: 1 -358775000 527050000 11 0 0 0 0
\r
2655 seg: 1 13 254000 0 0
\r
2656 vtx: 2 -364033308 527050000 0 0 0 0 24369
\r
2657 seg: 2 13 254000 0 0
\r
2658 vtx: 3 -366395000 529411692 0 0 0 0 0
\r
2659 seg: 3 13 254000 0 0
\r
2660 vtx: 4 -366395000 529590000 11 0 0 0 0
\r
2661 connect: 2 2 -1 2 0
\r
2662 vtx: 1 -371475000 504190000 11 0 0 0 0
\r
2663 seg: 1 13 254000 0 0
\r
2664 vtx: 2 -364033308 511631692 0 0 0 0 0
\r
2665 seg: 2 13 254000 0 0
\r
2666 vtx: 3 -364033308 527050000 0 0 0 0 24369
\r
2668 net: "Xff$XMaster$XXgatebot$NP_$G1_$G3" 3 2 0 0 0 0 1
\r
2669 pin: 1 IC_1_CD4007_4.1
\r
2670 pin: 2 IC_1_CD4007_4.13
\r
2672 connect: 1 2 0 1 0
\r
2673 vtx: 1 -438785000 453390000 11 0 0 0 0
\r
2674 seg: 1 12 254000 0 0
\r
2675 vtx: 2 -432435000 453390000 11 0 0 0 0
\r
2676 connect: 2 1 0 3 0
\r
2677 vtx: 1 -424815000 450850000 11 0 0 0 0
\r
2678 seg: 1 13 254000 0 0
\r
2679 vtx: 2 -428434500 450850000 0 0 0 0 0
\r
2680 seg: 2 13 254000 0 0
\r
2681 vtx: 3 -430974500 453390000 0 0 0 0 0
\r
2682 seg: 3 13 254000 0 0
\r
2683 vtx: 4 -432435000 453390000 11 0 0 0 0
\r
2685 net: "Q4" 2 1 0 0 0 0 1
\r
2688 connect: 1 1 0 1 0
\r
2689 vtx: 1 -412115000 379095000 11 0 0 0 0
\r
2690 seg: 1 12 254000 0 0
\r
2691 vtx: 2 -412115000 381635000 11 0 0 0 0
\r
2693 net: "Xff$XMaster$XXstiD$NTI_Out" 2 1 0 0 0 0 1
\r
2694 pin: 1 IC_2_CD4007_1.8
\r
2696 connect: 1 1 0 5 0
\r
2697 vtx: 1 -518795000 529590000 11 0 0 0 0
\r
2698 seg: 1 12 254000 0 0
\r
2699 vtx: 2 -517334500 531050500 0 0 0 0 0
\r
2700 seg: 2 12 254000 0 0
\r
2701 vtx: 3 -512699508 531050500 0 0 0 0 0
\r
2702 seg: 3 12 254000 0 0
\r
2703 vtx: 4 -507982728 526333720 0 0 0 0 0
\r
2704 seg: 4 12 254000 0 0
\r
2705 vtx: 5 -507982728 516237728 0 0 0 0 0
\r
2706 seg: 5 12 254000 0 0
\r
2707 vtx: 6 -506095000 514350000 11 0 0 0 0
\r
2709 net: "Xff$XMaster$XXgatebot$NN" 2 1 0 0 0 0 1
\r
2710 pin: 1 IC_1_CD4007_1.9
\r
2712 connect: 1 1 0 3 0
\r
2713 vtx: 1 -525145000 504190000 11 0 0 0 0
\r
2714 seg: 1 13 254000 0 0
\r
2715 vtx: 2 -524948658 504386342 0 0 0 0 0
\r
2716 seg: 2 13 254000 0 0
\r
2717 vtx: 3 -524948658 515423658 0 0 0 0 0
\r
2718 seg: 3 13 254000 0 0
\r
2719 vtx: 4 -526415000 516890000 11 0 0 0 0
\r
2721 net: "Xff$XSlave$Q_storage_$G1" 3 2 0 0 0 0 1
\r
2722 pin: 1 IC_3_CD4007_2.3
\r
2725 connect: 1 1 0 5 0
\r
2726 vtx: 1 -525145000 412750000 11 0 0 0 0
\r
2727 seg: 1 12 254000 0 0
\r
2728 vtx: 2 -525145000 417722304 0 0 0 0 0
\r
2729 seg: 2 12 254000 0 0
\r
2730 vtx: 3 -509482852 433384452 0 0 0 0 0
\r
2731 seg: 3 12 254000 0 0
\r
2732 vtx: 4 -507649226 433384452 0 0 711200 355600 0
\r
2733 seg: 4 13 254000 0 0
\r
2734 vtx: 5 -492723678 448310000 0 0 0 0 0
\r
2735 seg: 5 13 254000 0 0
\r
2736 vtx: 6 -490855000 448310000 11 0 0 0 0
\r
2737 connect: 2 2 1 2 0
\r
2738 vtx: 1 -520065000 402590000 11 0 0 0 0
\r
2739 seg: 1 13 254000 0 0
\r
2740 vtx: 2 -525145000 407670000 0 0 0 0 0
\r
2741 seg: 2 13 254000 0 0
\r
2742 vtx: 3 -525145000 412750000 11 0 0 0 0
\r
2744 net: "Xff$XMaster$_D_$G1_$G2" 3 2 0 0 0 0 1
\r
2745 pin: 1 IC_1_CD4007_3.6
\r
2748 connect: 1 2 0 3 0
\r
2749 vtx: 1 -417195000 516890000 11 0 0 0 0
\r
2750 seg: 1 12 254000 0 0
\r
2751 vtx: 2 -421195500 512889500 0 0 0 0 0
\r
2752 seg: 2 12 254000 0 0
\r
2753 vtx: 3 -428434500 512889500 0 0 0 0 0
\r
2754 seg: 3 12 254000 0 0
\r
2755 vtx: 4 -432435000 516890000 11 0 0 0 0
\r
2756 connect: 2 2 1 2 0
\r
2757 vtx: 1 -417195000 516890000 11 0 0 0 0
\r
2758 seg: 1 13 254000 0 0
\r
2759 vtx: 2 -417195000 506730000 0 0 0 0 0
\r
2760 seg: 2 13 254000 0 0
\r
2761 vtx: 3 -419735000 504190000 11 0 0 0 0
\r
2763 net: "Xff$XSlave$XXgatebot$NI_$G1_$G2" 2 1 0 0 0 0 1
\r
2764 pin: 1 IC_7_CD4007_3.4
\r
2765 pin: 2 IC_7_CD4007_3.8
\r
2766 connect: 1 1 0 1 0
\r
2767 vtx: 1 -403225000 463550000 11 0 0 0 0
\r
2768 seg: 1 12 254000 0 0
\r
2769 vtx: 2 -410845000 471170000 11 0 0 0 0
\r
2771 net: "Xff$XSlave$XXgatebot$NN_$G1_$G2" 2 1 0 0 0 0 1
\r
2772 pin: 1 IC_7_CD4007_3.9
\r
2774 connect: 1 1 0 1 0
\r
2775 vtx: 1 -396875000 466090000 11 0 0 0 0
\r
2776 seg: 1 12 254000 0 0
\r
2777 vtx: 2 -403225000 466090000 11 0 0 0 0
\r
2779 net: "Xff$XMaster$XXlatch$NI_$G1_$G2" 2 1 0 0 0 0 1
\r
2780 pin: 1 IC_0_CD4007_3.4
\r
2781 pin: 2 IC_0_CD4007_3.8
\r
2782 connect: 1 1 0 1 0
\r
2783 vtx: 1 -446405000 514350000 11 0 0 0 0
\r
2784 seg: 1 13 254000 0 0
\r
2785 vtx: 2 -454025000 521970000 11 0 0 0 0
\r
2787 net: "Xff$XMaster$XXgatetop$NI_$G1_$G2" 2 1 0 0 0 0 1
\r
2788 pin: 1 IC_5_CD4007_3.4
\r
2789 pin: 2 IC_5_CD4007_3.8
\r
2790 connect: 1 1 0 1 0
\r
2791 vtx: 1 -358775000 463550000 11 0 0 0 0
\r
2792 seg: 1 12 254000 0 0
\r
2793 vtx: 2 -366395000 471170000 11 0 0 0 0
\r
2795 net: "Xff$XMaster$XXlatch$NN_$G1_$G2" 2 1 0 0 0 0 1
\r
2796 pin: 1 IC_0_CD4007_3.9
\r
2798 connect: 1 1 0 5 0
\r
2799 vtx: 1 -418465000 488950000 11 0 0 0 0
\r
2800 seg: 1 12 254000 0 0
\r
2801 vtx: 2 -420182548 487232452 0 0 0 0 0
\r
2802 seg: 2 12 254000 0 0
\r
2803 vtx: 3 -424254930 487232452 0 0 0 0 0
\r
2804 seg: 3 12 254000 0 0
\r
2805 vtx: 4 -425530010 488507532 0 0 0 0 0
\r
2806 seg: 4 12 254000 0 0
\r
2807 vtx: 5 -425530010 496015010 0 0 0 0 0
\r
2808 seg: 5 12 254000 0 0
\r
2809 vtx: 6 -446405000 516890000 11 0 0 0 0
\r
2811 net: "Xff$XMaster$XXgatetop$NN_$G1_$G2" 2 1 0 0 0 0 1
\r
2812 pin: 1 IC_5_CD4007_3.9
\r
2814 connect: 1 1 0 3 0
\r
2815 vtx: 1 -374015000 466090000 11 0 0 0 0
\r
2816 seg: 1 13 254000 0 0
\r
2817 vtx: 2 -370010182 462085436 0 0 0 0 0
\r
2818 seg: 2 13 254000 0 0
\r
2819 vtx: 3 -362779564 462085436 0 0 0 0 0
\r
2820 seg: 3 13 254000 0 0
\r
2821 vtx: 4 -358775000 466090000 11 0 0 0 0
\r
2823 net: "Xff$XSlave$X_Xlatch$NP_$G1_$G3" 3 2 0 0 0 0 1
\r
2824 pin: 1 IC_4_CD4007_4.1
\r
2825 pin: 2 IC_4_CD4007_4.13
\r
2827 connect: 1 1 0 3 0
\r
2828 vtx: 1 -358775000 450850000 11 0 0 0 0
\r
2829 seg: 1 13 254000 0 0
\r
2830 vtx: 2 -364033308 450850000 0 0 0 0 31023
\r
2831 seg: 2 13 254000 0 0
\r
2832 vtx: 3 -366395000 453211692 0 0 0 0 0
\r
2833 seg: 3 13 254000 0 0
\r
2834 vtx: 4 -366395000 453390000 11 0 0 0 0
\r
2835 connect: 2 2 -1 2 0
\r
2836 vtx: 1 -371475000 427990000 11 0 0 0 0
\r
2837 seg: 1 13 254000 0 0
\r
2838 vtx: 2 -364033308 435431692 0 0 0 0 0
\r
2839 seg: 2 13 254000 0 0
\r
2840 vtx: 3 -364033308 450850000 0 0 0 0 31023
\r
2842 net: "Xff$XMaster$XXlatch$NN" 2 1 0 0 0 0 1
\r
2843 pin: 1 IC_0_CD4007_1.9
\r
2845 connect: 1 1 0 5 0
\r
2846 vtx: 1 -520065000 488950000 11 0 0 0 0
\r
2847 seg: 1 12 254000 0 0
\r
2848 vtx: 2 -521782548 487232452 0 0 0 0 0
\r
2849 seg: 2 12 254000 0 0
\r
2850 vtx: 3 -525854930 487232452 0 0 0 0 0
\r
2851 seg: 3 12 254000 0 0
\r
2852 vtx: 4 -527130010 488507532 0 0 0 0 0
\r
2853 seg: 4 12 254000 0 0
\r
2854 vtx: 5 -527130010 496015010 0 0 0 0 0
\r
2855 seg: 5 12 254000 0 0
\r
2856 vtx: 6 -548005000 516890000 11 0 0 0 0
\r
2858 net: "Xff$XSlave$X_Xlatch$NP" 3 2 0 0 0 0 1
\r
2859 pin: 1 IC_4_CD4007_1.1
\r
2860 pin: 2 IC_4_CD4007_1.13
\r
2862 connect: 1 1 0 3 0
\r
2863 vtx: 1 -460375000 527050000 11 0 0 0 0
\r
2864 seg: 1 13 254000 0 0
\r
2865 vtx: 2 -465633308 527050000 0 0 0 0 13789
\r
2866 seg: 2 13 254000 0 0
\r
2867 vtx: 3 -467995000 529411692 0 0 0 0 0
\r
2868 seg: 3 13 254000 0 0
\r
2869 vtx: 4 -467995000 529590000 11 0 0 0 0
\r
2870 connect: 2 2 -1 2 0
\r
2871 vtx: 1 -473075000 504190000 11 0 0 0 0
\r
2872 seg: 1 13 254000 0 0
\r
2873 vtx: 2 -465633308 511631692 0 0 0 0 0
\r
2874 seg: 2 13 254000 0 0
\r
2875 vtx: 3 -465633308 527050000 0 0 0 0 13789
\r
2877 net: "Xff$XSlave$XXgatebot$NN" 2 1 0 0 0 0 1
\r
2878 pin: 1 IC_7_CD4007_1.9
\r
2880 connect: 1 1 0 1 0
\r
2881 vtx: 1 -498475000 466090000 11 0 0 0 0
\r
2882 seg: 1 12 254000 0 0
\r
2883 vtx: 2 -504825000 466090000 11 0 0 0 0
\r
2885 net: "Xff$XSlave$XXgatetop$NP_$G1" 3 2 0 0 0 0 1
\r
2886 pin: 1 IC_8_CD4007_2.1
\r
2887 pin: 2 IC_8_CD4007_2.13
\r
2889 connect: 1 1 0 3 0
\r
2890 vtx: 1 -526415000 400050000 11 0 0 0 0
\r
2891 seg: 1 12 254000 0 0
\r
2892 vtx: 2 -530034500 400050000 0 0 0 0 0
\r
2893 seg: 2 12 254000 0 0
\r
2894 vtx: 3 -532574500 402590000 0 0 0 0 0
\r
2895 seg: 3 12 254000 0 0
\r
2896 vtx: 4 -534035000 402590000 11 0 0 0 0
\r
2897 connect: 2 2 0 2 0
\r
2898 vtx: 1 -537845000 412750000 11 0 0 0 0
\r
2899 seg: 1 13 254000 0 0
\r
2900 vtx: 2 -534035000 408940000 0 0 0 0 0
\r
2901 seg: 2 13 254000 0 0
\r
2902 vtx: 3 -534035000 402590000 11 0 0 0 0
\r
2904 net: "Xff$XXstiCLK$NTI_Out_$G1" 2 1 0 0 0 0 1
\r
2905 pin: 1 X_IC_9_CD4007_2.8
\r
2907 connect: 1 1 0 2 0
\r
2908 vtx: 1 -540385000 389890000 11 0 0 0 0
\r
2909 seg: 1 12 254000 0 0
\r
2910 vtx: 2 -542925000 387350000 0 0 0 0 0
\r
2911 seg: 2 12 254000 0 0
\r
2912 vtx: 3 -548005000 387350000 11 0 0 0 0
\r
2914 net: "Xff$XMaster$_D_$G1_$G3" 3 2 0 0 0 0 1
\r
2915 pin: 1 IC_1_CD4007_4.6
\r
2918 connect: 1 2 0 3 0
\r
2919 vtx: 1 -417195000 440690000 11 0 0 0 0
\r
2920 seg: 1 12 254000 0 0
\r
2921 vtx: 2 -421195500 436689500 0 0 0 0 0
\r
2922 seg: 2 12 254000 0 0
\r
2923 vtx: 3 -428434500 436689500 0 0 0 0 0
\r
2924 seg: 3 12 254000 0 0
\r
2925 vtx: 4 -432435000 440690000 11 0 0 0 0
\r
2926 connect: 2 2 1 2 0
\r
2927 vtx: 1 -417195000 440690000 11 0 0 0 0
\r
2928 seg: 1 13 254000 0 0
\r
2929 vtx: 2 -417195000 430530000 0 0 0 0 0
\r
2930 seg: 2 13 254000 0 0
\r
2931 vtx: 3 -419735000 427990000 11 0 0 0 0
\r
2933 net: "Xff$XSlave$XXgatebot$NI_$G1_$G3" 2 1 0 0 0 0 1
\r
2934 pin: 1 IC_7_CD4007_4.4
\r
2935 pin: 2 IC_7_CD4007_4.8
\r
2936 connect: 1 1 0 1 0
\r
2937 vtx: 1 -403225000 387350000 11 0 0 0 0
\r
2938 seg: 1 12 254000 0 0
\r
2939 vtx: 2 -410845000 394970000 11 0 0 0 0
\r
2941 net: "Xff$XSlave$XXgatebot$NN_$G1_$G3" 2 1 0 0 0 0 1
\r
2942 pin: 1 IC_7_CD4007_4.9
\r
2944 connect: 1 1 0 1 0
\r
2945 vtx: 1 -396875000 389890000 11 0 0 0 0
\r
2946 seg: 1 12 254000 0 0
\r
2947 vtx: 2 -403225000 389890000 11 0 0 0 0
\r
2949 net: "Xff$XMaster$XXlatch$NI_$G1_$G3" 2 1 0 0 0 0 1
\r
2950 pin: 1 IC_0_CD4007_4.4
\r
2951 pin: 2 IC_0_CD4007_4.8
\r
2952 connect: 1 1 0 1 0
\r
2953 vtx: 1 -446405000 438150000 11 0 0 0 0
\r
2954 seg: 1 13 254000 0 0
\r
2955 vtx: 2 -454025000 445770000 11 0 0 0 0
\r
2957 net: "Xff$XMaster$XXgatetop$NI_$G1_$G3" 2 1 0 0 0 0 1
\r
2958 pin: 1 IC_5_CD4007_4.4
\r
2959 pin: 2 IC_5_CD4007_4.8
\r
2960 connect: 1 1 0 1 0
\r
2961 vtx: 1 -358775000 387350000 11 0 0 0 0
\r
2962 seg: 1 12 254000 0 0
\r
2963 vtx: 2 -366395000 394970000 11 0 0 0 0
\r
2965 net: "Xff$XMaster$XXlatch$NN_$G1_$G3" 2 1 0 0 0 0 1
\r
2966 pin: 1 IC_0_CD4007_4.9
\r
2968 connect: 1 1 0 5 0
\r
2969 vtx: 1 -418465000 412750000 11 0 0 0 0
\r
2970 seg: 1 12 254000 0 0
\r
2971 vtx: 2 -420182548 411032452 0 0 0 0 0
\r
2972 seg: 2 12 254000 0 0
\r
2973 vtx: 3 -424254930 411032452 0 0 0 0 0
\r
2974 seg: 3 12 254000 0 0
\r
2975 vtx: 4 -425530010 412307532 0 0 0 0 0
\r
2976 seg: 4 12 254000 0 0
\r
2977 vtx: 5 -425530010 419815010 0 0 0 0 0
\r
2978 seg: 5 12 254000 0 0
\r
2979 vtx: 6 -446405000 440690000 11 0 0 0 0
\r
2981 net: "Xff$XMaster$XXgatetop$NN_$G1_$G3" 2 1 0 0 0 0 1
\r
2982 pin: 1 IC_5_CD4007_4.9
\r
2984 connect: 1 1 0 3 0
\r
2985 vtx: 1 -374015000 389890000 11 0 0 0 0
\r
2986 seg: 1 13 254000 0 0
\r
2987 vtx: 2 -370010182 385885436 0 0 0 0 0
\r
2988 seg: 2 13 254000 0 0
\r
2989 vtx: 3 -362779564 385885436 0 0 0 0 0
\r
2990 seg: 3 13 254000 0 0
\r
2991 vtx: 4 -358775000 389890000 11 0 0 0 0
\r
2993 net: "Xff$XSlave$XXstiD$NTI_Out" 2 1 0 0 0 0 1
\r
2994 pin: 1 IC_2_CD4007_1.5
\r
2996 connect: 1 1 0 4 0
\r
2997 vtx: 1 -532765000 496570000 11 0 0 0 0
\r
2998 seg: 1 13 254000 0 0
\r
2999 vtx: 2 -526521172 496570000 0 0 0 0 0
\r
3000 seg: 2 13 254000 0 0
\r
3001 vtx: 3 -516075422 507015750 0 0 0 0 0
\r
3002 seg: 3 13 254000 0 0
\r
3003 vtx: 4 -516075422 517069578 0 0 0 0 0
\r
3004 seg: 4 13 254000 0 0
\r
3005 vtx: 5 -513715000 519430000 11 0 0 0 0
\r
3007 net: "Xff$XMaster$XXgatebot$NP" 3 2 0 0 0 0 1
\r
3008 pin: 1 IC_1_CD4007_1.1
\r
3009 pin: 2 IC_1_CD4007_1.13
\r
3011 connect: 1 2 0 1 0
\r
3012 vtx: 1 -540385000 529590000 11 0 0 0 0
\r
3013 seg: 1 12 254000 0 0
\r
3014 vtx: 2 -534035000 529590000 11 0 0 0 0
\r
3015 connect: 2 1 0 3 0
\r
3016 vtx: 1 -526415000 527050000 11 0 0 0 0
\r
3017 seg: 1 13 254000 0 0
\r
3018 vtx: 2 -530034500 527050000 0 0 0 0 0
\r
3019 seg: 2 13 254000 0 0
\r
3020 vtx: 3 -532574500 529590000 0 0 0 0 0
\r
3021 seg: 3 13 254000 0 0
\r
3022 vtx: 4 -534035000 529590000 11 0 0 0 0
\r
3024 net: "Xff$XMaster$XXstiD$PTI_Out" 2 1 0 0 0 0 1
\r
3025 pin: 1 IC_2_CD4007_1.13
\r
3027 connect: 1 1 0 3 0
\r
3028 vtx: 1 -508635000 504190000 11 0 0 0 0
\r
3029 seg: 1 13 254000 0 0
\r
3030 vtx: 2 -508766826 504321826 0 0 0 0 0
\r
3031 seg: 2 13 254000 0 0
\r
3032 vtx: 3 -508766826 524378174 0 0 0 0 0
\r
3033 seg: 3 13 254000 0 0
\r
3034 vtx: 4 -506095000 527050000 11 0 0 0 0
\r
3036 net: "_Q_$G1" 4 3 0 0 0 0 1
\r
3037 pin: 1 IC_3_CD4007_2.6
\r
3041 connect: 1 2 0 5 0
\r
3042 vtx: 1 -474345000 453390000 11 0 0 0 0
\r
3043 seg: 1 13 254000 0 0
\r
3044 vtx: 2 -474345000 444969392 0 0 0 0 0
\r
3045 seg: 2 13 254000 0 0
\r
3046 vtx: 3 -482635560 436678832 0 0 0 0 0
\r
3047 seg: 3 13 254000 0 0
\r
3048 vtx: 4 -483314502 436678832 0 0 0 0 7561
\r
3049 seg: 4 13 254000 0 0
\r
3050 vtx: 5 -486843832 436678832 0 0 0 0 0
\r
3051 seg: 5 13 254000 0 0
\r
3052 vtx: 6 -490855000 440690000 11 0 0 0 0
\r
3053 connect: 2 3 1 5 0
\r
3054 vtx: 1 -461010000 419100000 11 0 0 0 0
\r
3055 seg: 1 12 254000 0 0
\r
3056 vtx: 2 -459596490 420513510 0 0 0 0 0
\r
3057 seg: 2 12 254000 0 0
\r
3058 vtx: 3 -459596490 422203880 0 0 0 0 0
\r
3059 seg: 3 12 254000 0 0
\r
3060 vtx: 4 -463664300 426271690 0 0 0 0 0
\r
3061 seg: 4 12 254000 0 0
\r
3062 vtx: 5 -484056690 426271690 0 0 0 0 0
\r
3063 seg: 5 12 254000 0 0
\r
3064 vtx: 6 -485775000 427990000 11 0 0 0 0
\r
3065 connect: 3 1 -1 2 0
\r
3066 vtx: 1 -485775000 427990000 11 0 0 0 0
\r
3067 seg: 1 13 254000 0 0
\r
3068 vtx: 2 -483314502 430450498 0 0 0 0 0
\r
3069 seg: 2 13 254000 0 0
\r
3070 vtx: 3 -483314502 436678832 0 0 0 0 7561
\r
3072 net: "Xff$XSlave$XXgatebot$NN_$G1" 2 1 0 0 0 0 1
\r
3073 pin: 1 IC_7_CD4007_2.9
\r
3075 connect: 1 1 0 1 0
\r
3076 vtx: 1 -498475000 389890000 11 0 0 0 0
\r
3077 seg: 1 12 254000 0 0
\r
3078 vtx: 2 -504825000 389890000 11 0 0 0 0
\r
3080 net: "Xff$NC_01_$G1_$G2" 3 2 0 0 0 0 1
\r
3081 pin: 1 IC_0_CD4007_3.6
\r
3084 connect: 1 2 0 3 0
\r
3085 vtx: 1 -436245000 496570000 11 0 0 0 0
\r
3086 seg: 1 12 254000 0 0
\r
3087 vtx: 2 -451104000 511429000 0 0 0 0 0
\r
3088 seg: 2 12 254000 0 0
\r
3089 vtx: 3 -451104000 513969000 0 0 0 0 0
\r
3090 seg: 3 12 254000 0 0
\r
3091 vtx: 4 -454025000 516890000 11 0 0 0 0
\r
3092 connect: 2 2 1 4 0
\r
3093 vtx: 1 -436245000 496570000 11 0 0 0 0
\r
3094 seg: 1 12 254000 0 0
\r
3095 vtx: 2 -436245000 495429032 0 0 0 0 0
\r
3096 seg: 2 12 254000 0 0
\r
3097 vtx: 3 -425321222 484505254 0 0 0 0 0
\r
3098 seg: 3 12 254000 0 0
\r
3099 vtx: 4 -388619746 484505254 0 0 0 0 0
\r
3100 seg: 4 12 254000 0 0
\r
3101 vtx: 5 -384175000 488950000 11 0 0 0 0
\r
3103 net: "Xff$XMaster$X_Xlatch$NI_$G1_$G2" 2 1 0 0 0 0 1
\r
3104 pin: 1 IC_6_CD4007_3.4
\r
3105 pin: 2 IC_6_CD4007_3.8
\r
3106 connect: 1 1 0 1 0
\r
3107 vtx: 1 -380365000 463550000 11 0 0 0 0
\r
3108 seg: 1 13 254000 0 0
\r
3109 vtx: 2 -387985000 471170000 11 0 0 0 0
\r
3111 net: "Xff$XMaster$_Q_storage_$G1_$G2" 3 2 0 0 0 0 1
\r
3112 pin: 1 IC_6_CD4007_3.6
\r
3115 connect: 1 2 0 7 0
\r
3116 vtx: 1 -436245000 504190000 11 0 0 0 0
\r
3117 seg: 1 12 254000 0 0
\r
3118 vtx: 2 -429311308 497256308 0 0 0 0 0
\r
3119 seg: 2 12 254000 0 0
\r
3120 vtx: 3 -429311308 491011464 0 0 0 0 0
\r
3121 seg: 3 12 254000 0 0
\r
3122 vtx: 4 -424643296 486343452 0 0 0 0 0
\r
3123 seg: 4 12 254000 0 0
\r
3124 vtx: 5 -409286202 486343452 0 0 0 0 0
\r
3125 seg: 5 12 254000 0 0
\r
3126 vtx: 6 -409117800 486511854 0 0 711200 355600 0
\r
3127 seg: 6 13 254000 0 0
\r
3128 vtx: 7 -408406854 486511854 0 0 0 0 0
\r
3129 seg: 7 13 254000 0 0
\r
3130 vtx: 8 -387985000 466090000 11 0 0 0 0
\r
3131 connect: 2 2 1 2 0
\r
3132 vtx: 1 -436245000 504190000 11 0 0 0 0
\r
3133 seg: 1 13 254000 0 0
\r
3134 vtx: 2 -436245000 514350000 0 0 0 0 0
\r
3135 seg: 2 13 254000 0 0
\r
3136 vtx: 3 -438785000 516890000 11 0 0 0 0
\r
3138 net: "Xff$XMaster$X_Xlatch$NN_$G1_$G2" 2 1 0 0 0 0 1
\r
3139 pin: 1 IC_6_CD4007_3.9
\r
3141 connect: 1 1 0 6 0
\r
3142 vtx: 1 -448945000 496570000 11 0 0 0 0
\r
3143 seg: 1 12 254000 0 0
\r
3144 vtx: 2 -439271664 496570000 0 0 0 0 0
\r
3145 seg: 2 12 254000 0 0
\r
3146 vtx: 3 -415695638 472993974 0 0 0 0 0
\r
3147 seg: 3 12 254000 0 0
\r
3148 vtx: 4 -415695638 466321394 0 0 0 0 0
\r
3149 seg: 4 12 254000 0 0
\r
3150 vtx: 5 -410566870 461192626 0 0 0 0 0
\r
3151 seg: 5 12 254000 0 0
\r
3152 vtx: 6 -385262374 461192626 0 0 0 0 0
\r
3153 seg: 6 12 254000 0 0
\r
3154 vtx: 7 -380365000 466090000 11 0 0 0 0
\r
3156 net: "_Q$G_0" 4 3 0 0 0 0 1
\r
3157 pin: 1 IC_3_CD4007_1.6
\r
3161 connect: 1 2 0 5 0
\r
3162 vtx: 1 -474345000 529590000 11 0 0 0 0
\r
3163 seg: 1 13 254000 0 0
\r
3164 vtx: 2 -474345000 521169392 0 0 0 0 0
\r
3165 seg: 2 13 254000 0 0
\r
3166 vtx: 3 -482635560 512878832 0 0 0 0 0
\r
3167 seg: 3 13 254000 0 0
\r
3168 vtx: 4 -483314502 512878832 0 0 0 0 24750
\r
3169 seg: 4 13 254000 0 0
\r
3170 vtx: 5 -486843832 512878832 0 0 0 0 0
\r
3171 seg: 5 13 254000 0 0
\r
3172 vtx: 6 -490855000 516890000 11 0 0 0 0
\r
3173 connect: 2 3 1 5 0
\r
3174 vtx: 1 -461010000 495300000 11 0 0 0 0
\r
3175 seg: 1 12 254000 0 0
\r
3176 vtx: 2 -459596490 496713510 0 0 0 0 0
\r
3177 seg: 2 12 254000 0 0
\r
3178 vtx: 3 -459596490 498403880 0 0 0 0 0
\r
3179 seg: 3 12 254000 0 0
\r
3180 vtx: 4 -463664300 502471690 0 0 0 0 0
\r
3181 seg: 4 12 254000 0 0
\r
3182 vtx: 5 -484056690 502471690 0 0 0 0 0
\r
3183 seg: 5 12 254000 0 0
\r
3184 vtx: 6 -485775000 504190000 11 0 0 0 0
\r
3185 connect: 3 1 -1 2 0
\r
3186 vtx: 1 -485775000 504190000 11 0 0 0 0
\r
3187 seg: 1 13 254000 0 0
\r
3188 vtx: 2 -483314502 506650498 0 0 0 0 0
\r
3189 seg: 2 13 254000 0 0
\r
3190 vtx: 3 -483314502 512878832 0 0 0 0 24750
\r
3192 net: "Xff$XSlave$XXstiD$PTI_Out" 2 1 0 0 0 0 1
\r
3193 pin: 1 IC_2_CD4007_1.1
\r
3195 connect: 1 1 0 4 0
\r
3196 vtx: 1 -503555000 488950000 11 0 0 0 0
\r
3197 seg: 1 13 254000 0 0
\r
3198 vtx: 2 -503555000 495939826 0 0 0 0 0
\r
3199 seg: 2 13 254000 0 0
\r
3200 vtx: 3 -510356612 502741438 0 0 0 0 0
\r
3201 seg: 3 13 254000 0 0
\r
3202 vtx: 4 -510356612 526231612 0 0 0 0 0
\r
3203 seg: 4 13 254000 0 0
\r
3204 vtx: 5 -513715000 529590000 11 0 0 0 0
\r
3206 net: "Xff$XMaster$XXlatch$NP" 3 2 0 0 0 0 1
\r
3207 pin: 1 IC_0_CD4007_1.1
\r
3208 pin: 2 IC_0_CD4007_1.13
\r
3210 connect: 1 1 0 3 0
\r
3211 vtx: 1 -548005000 527050000 11 0 0 0 0
\r
3212 seg: 1 13 254000 0 0
\r
3213 vtx: 2 -550307764 529352764 0 0 0 0 0
\r
3214 seg: 2 13 254000 0 0
\r
3215 vtx: 3 -555625000 529352764 0 0 0 0 32643
\r
3216 seg: 3 13 254000 0 0
\r
3217 vtx: 4 -555625000 529590000 11 0 0 0 0
\r
3218 connect: 2 2 -1 4 0
\r
3219 vtx: 1 -542925000 504190000 11 0 0 0 0
\r
3220 seg: 1 13 254000 0 0
\r
3221 vtx: 2 -547534592 504190000 0 0 0 0 0
\r
3222 seg: 2 13 254000 0 0
\r
3223 vtx: 3 -557101248 513756910 0 0 0 0 0
\r
3224 seg: 3 13 254000 0 0
\r
3225 vtx: 4 -557101248 527876516 0 0 0 0 0
\r
3226 seg: 4 13 254000 0 0
\r
3227 vtx: 5 -555625000 529352764 0 0 0 0 32643
\r
3229 net: "Xff$XMaster$_Q_storage" 3 2 0 0 0 0 1
\r
3230 pin: 1 IC_6_CD4007_1.6
\r
3233 connect: 1 2 0 7 0
\r
3234 vtx: 1 -537845000 504190000 11 0 0 0 0
\r
3235 seg: 1 12 254000 0 0
\r
3236 vtx: 2 -530911308 497256308 0 0 0 0 0
\r
3237 seg: 2 12 254000 0 0
\r
3238 vtx: 3 -530911308 491011464 0 0 0 0 0
\r
3239 seg: 3 12 254000 0 0
\r
3240 vtx: 4 -526243296 486343452 0 0 0 0 0
\r
3241 seg: 4 12 254000 0 0
\r
3242 vtx: 5 -510886202 486343452 0 0 0 0 0
\r
3243 seg: 5 12 254000 0 0
\r
3244 vtx: 6 -510717800 486511854 0 0 711200 355600 0
\r
3245 seg: 6 13 254000 0 0
\r
3246 vtx: 7 -510006854 486511854 0 0 0 0 0
\r
3247 seg: 7 13 254000 0 0
\r
3248 vtx: 8 -489585000 466090000 11 0 0 0 0
\r
3249 connect: 2 2 1 2 0
\r
3250 vtx: 1 -537845000 504190000 11 0 0 0 0
\r
3251 seg: 1 13 254000 0 0
\r
3252 vtx: 2 -537845000 514350000 0 0 0 0 0
\r
3253 seg: 2 13 254000 0 0
\r
3254 vtx: 3 -540385000 516890000 11 0 0 0 0
\r
3256 net: "Xff$XMaster$XXgatetop$NN" 2 1 0 0 0 0 1
\r
3257 pin: 1 IC_5_CD4007_1.9
\r
3259 connect: 1 1 0 3 0
\r
3260 vtx: 1 -475615000 466090000 11 0 0 0 0
\r
3261 seg: 1 13 254000 0 0
\r
3262 vtx: 2 -471610182 462085436 0 0 0 0 0
\r
3263 seg: 2 13 254000 0 0
\r
3264 vtx: 3 -464379564 462085436 0 0 0 0 0
\r
3265 seg: 3 13 254000 0 0
\r
3266 vtx: 4 -460375000 466090000 11 0 0 0 0
\r
3268 net: "Xff$XSlave$XXgatebot$NP" 3 2 0 0 0 0 1
\r
3269 pin: 1 IC_7_CD4007_1.1
\r
3270 pin: 2 IC_7_CD4007_1.13
\r
3272 connect: 1 1 0 3 0
\r
3273 vtx: 1 -504825000 476250000 11 0 0 0 0
\r
3274 seg: 1 13 254000 0 0
\r
3275 vtx: 2 -508444500 476250000 0 0 0 0 0
\r
3276 seg: 2 13 254000 0 0
\r
3277 vtx: 3 -510984500 478790000 0 0 0 0 0
\r
3278 seg: 3 13 254000 0 0
\r
3279 vtx: 4 -512445000 478790000 11 0 0 0 0
\r
3280 connect: 2 2 0 1 0
\r
3281 vtx: 1 -512445000 496570000 11 0 0 0 0
\r
3282 seg: 1 13 254000 0 0
\r
3283 vtx: 2 -512445000 478790000 11 0 0 0 0
\r
3285 net: "Xff$XSlave$X_Xlatch$NN_$G1" 2 1 0 0 0 0 1
\r
3286 pin: 1 IC_4_CD4007_2.9
\r
3288 connect: 1 1 0 5 0
\r
3289 vtx: 1 -474345000 440690000 11 0 0 0 0
\r
3290 seg: 1 12 254000 0 0
\r
3291 vtx: 2 -470339166 436684166 0 0 0 0 0
\r
3292 seg: 2 12 254000 0 0
\r
3293 vtx: 3 -459761082 436684166 0 0 0 0 0
\r
3294 seg: 3 12 254000 0 0
\r
3295 vtx: 4 -458911706 437533542 0 0 0 0 0
\r
3296 seg: 4 12 254000 0 0
\r
3297 vtx: 5 -458911706 439226706 0 0 0 0 0
\r
3298 seg: 5 12 254000 0 0
\r
3299 vtx: 6 -460375000 440690000 11 0 0 0 0
\r
3301 net: "Xff$NC_01_$G1_$G3" 3 2 0 0 0 0 1
\r
3302 pin: 1 IC_0_CD4007_4.6
\r
3305 connect: 1 2 0 3 0
\r
3306 vtx: 1 -436245000 420370000 11 0 0 0 0
\r
3307 seg: 1 12 254000 0 0
\r
3308 vtx: 2 -451104000 435229000 0 0 0 0 0
\r
3309 seg: 2 12 254000 0 0
\r
3310 vtx: 3 -451104000 437769000 0 0 0 0 0
\r
3311 seg: 3 12 254000 0 0
\r
3312 vtx: 4 -454025000 440690000 11 0 0 0 0
\r
3313 connect: 2 2 1 4 0
\r
3314 vtx: 1 -436245000 420370000 11 0 0 0 0
\r
3315 seg: 1 12 254000 0 0
\r
3316 vtx: 2 -436245000 419229032 0 0 0 0 0
\r
3317 seg: 2 12 254000 0 0
\r
3318 vtx: 3 -425321222 408305254 0 0 0 0 0
\r
3319 seg: 3 12 254000 0 0
\r
3320 vtx: 4 -388619746 408305254 0 0 0 0 0
\r
3321 seg: 4 12 254000 0 0
\r
3322 vtx: 5 -384175000 412750000 11 0 0 0 0
\r
3324 net: "Xff$XMaster$X_Xlatch$NI_$G1_$G3" 2 1 0 0 0 0 1
\r
3325 pin: 1 IC_6_CD4007_4.4
\r
3326 pin: 2 IC_6_CD4007_4.8
\r
3327 connect: 1 1 0 1 0
\r
3328 vtx: 1 -380365000 387350000 11 0 0 0 0
\r
3329 seg: 1 13 254000 0 0
\r
3330 vtx: 2 -387985000 394970000 11 0 0 0 0
\r
3332 net: "Xff$XMaster$_Q_storage_$G1_$G3" 3 2 0 0 0 0 1
\r
3333 pin: 1 IC_6_CD4007_4.6
\r
3336 connect: 1 2 0 7 0
\r
3337 vtx: 1 -436245000 427990000 11 0 0 0 0
\r
3338 seg: 1 12 254000 0 0
\r
3339 vtx: 2 -429311308 421056308 0 0 0 0 0
\r
3340 seg: 2 12 254000 0 0
\r
3341 vtx: 3 -429311308 414811464 0 0 0 0 0
\r
3342 seg: 3 12 254000 0 0
\r
3343 vtx: 4 -424643296 410143452 0 0 0 0 0
\r
3344 seg: 4 12 254000 0 0
\r
3345 vtx: 5 -409286202 410143452 0 0 0 0 0
\r
3346 seg: 5 12 254000 0 0
\r
3347 vtx: 6 -409117800 410311854 0 0 711200 355600 0
\r
3348 seg: 6 13 254000 0 0
\r
3349 vtx: 7 -408406854 410311854 0 0 0 0 0
\r
3350 seg: 7 13 254000 0 0
\r
3351 vtx: 8 -387985000 389890000 11 0 0 0 0
\r
3352 connect: 2 2 1 2 0
\r
3353 vtx: 1 -436245000 427990000 11 0 0 0 0
\r
3354 seg: 1 13 254000 0 0
\r
3355 vtx: 2 -436245000 438150000 0 0 0 0 0
\r
3356 seg: 2 13 254000 0 0
\r
3357 vtx: 3 -438785000 440690000 11 0 0 0 0
\r
3359 net: "Xff$XMaster$X_Xlatch$NN_$G1_$G3" 2 1 0 0 0 0 1
\r
3360 pin: 1 IC_6_CD4007_4.9
\r
3362 connect: 1 1 0 6 0
\r
3363 vtx: 1 -448945000 420370000 11 0 0 0 0
\r
3364 seg: 1 12 254000 0 0
\r
3365 vtx: 2 -439271664 420370000 0 0 0 0 0
\r
3366 seg: 2 12 254000 0 0
\r
3367 vtx: 3 -415695638 396793974 0 0 0 0 0
\r
3368 seg: 3 12 254000 0 0
\r
3369 vtx: 4 -415695638 390121394 0 0 0 0 0
\r
3370 seg: 4 12 254000 0 0
\r
3371 vtx: 5 -410566870 384992626 0 0 0 0 0
\r
3372 seg: 5 12 254000 0 0
\r
3373 vtx: 6 -385262374 384992626 0 0 0 0 0
\r
3374 seg: 6 12 254000 0 0
\r
3375 vtx: 7 -380365000 389890000 11 0 0 0 0
\r
3377 net: "$G_Vss" 5 4 0 0 0 0 1
\r
3383 connect: 1 1 0 1 0
\r
3384 vtx: 1 -473075000 379095000 11 0 0 0 0
\r
3385 seg: 1 12 254000 0 0
\r
3386 vtx: 2 -473075000 381635000 11 0 0 0 0
\r
3387 connect: 2 2 0 1 0
\r
3388 vtx: 1 -470535000 381635000 11 0 0 0 0
\r
3389 seg: 1 12 254000 0 0
\r
3390 vtx: 2 -473075000 381635000 11 0 0 0 0
\r
3391 connect: 3 3 2 1 0
\r
3392 vtx: 1 -470535000 379095000 11 0 0 0 0
\r
3393 seg: 1 12 254000 0 0
\r
3394 vtx: 2 -470535000 381635000 11 0 0 0 0
\r
3395 connect: 4 4 2 1 0
\r
3396 vtx: 1 -455295000 381635000 11 0 0 0 0
\r
3397 seg: 1 12 254000 0 0
\r
3398 vtx: 2 -470535000 381635000 11 0 0 0 0
\r
3400 net: "$G_Vdd" 5 4 0 0 0 0 1
\r
3406 connect: 1 1 0 3 0
\r
3407 vtx: 1 -483235000 379095000 11 0 0 0 0
\r
3408 seg: 1 12 254000 0 0
\r
3409 vtx: 2 -483489000 379349000 0 0 0 0 0
\r
3410 seg: 2 12 254000 0 0
\r
3411 vtx: 3 -483235000 379603000 0 0 0 0 0
\r
3412 seg: 3 12 254000 0 0
\r
3413 vtx: 4 -483235000 381635000 11 0 0 0 0
\r
3414 connect: 2 2 0 3 0
\r
3415 vtx: 1 -480695000 381635000 11 0 0 0 0
\r
3416 seg: 1 12 254000 0 0
\r
3417 vtx: 2 -480949000 381381000 0 0 0 0 0
\r
3418 seg: 2 12 254000 0 0
\r
3419 vtx: 3 -481203000 381635000 0 0 0 0 0
\r
3420 seg: 3 12 254000 0 0
\r
3421 vtx: 4 -483235000 381635000 11 0 0 0 0
\r
3422 connect: 3 3 2 4 0
\r
3423 vtx: 1 -480695000 379095000 11 0 0 0 0
\r
3424 seg: 1 12 254000 0 0
\r
3425 vtx: 2 -480695000 379603000 0 0 0 0 0
\r
3426 seg: 2 12 254000 0 0
\r
3427 vtx: 3 -480441000 379857000 0 0 0 0 0
\r
3428 seg: 3 12 254000 0 0
\r
3429 vtx: 4 -480441000 381889000 0 0 0 0 0
\r
3430 seg: 4 12 254000 0 0
\r
3431 vtx: 5 -480695000 381635000 11 0 0 0 0
\r
3432 connect: 4 4 3 3 0
\r
3433 vtx: 1 -455295000 379095000 11 0 0 0 0
\r
3434 seg: 1 12 254000 0 0
\r
3435 vtx: 2 -455295000 377190000 0 0 0 0 0
\r
3436 seg: 2 12 254000 0 0
\r
3437 vtx: 3 -480695000 377190000 0 0 0 0 0
\r
3438 seg: 3 12 254000 0 0
\r
3439 vtx: 4 -480695000 379095000 11 0 0 0 0
\r
3441 net: "Xff$XSlave$XXgatetop$NN" 2 1 0 0 0 0 1
\r
3442 pin: 1 IC_8_CD4007_1.9
\r
3444 connect: 1 1 0 1 0
\r
3445 vtx: 1 -520065000 466090000 11 0 0 0 0
\r
3446 seg: 1 12 254000 0 0
\r
3447 vtx: 2 -526415000 466090000 11 0 0 0 0
\r
3449 net: "Xff$XSlave$XXgatebot$NP_$G1" 3 2 0 0 0 0 1
\r
3450 pin: 1 IC_7_CD4007_2.1
\r
3451 pin: 2 IC_7_CD4007_2.13
\r
3453 connect: 1 1 0 3 0
\r
3454 vtx: 1 -504825000 400050000 11 0 0 0 0
\r
3455 seg: 1 13 254000 0 0
\r
3456 vtx: 2 -508444500 400050000 0 0 0 0 0
\r
3457 seg: 2 13 254000 0 0
\r
3458 vtx: 3 -510984500 402590000 0 0 0 0 0
\r
3459 seg: 3 13 254000 0 0
\r
3460 vtx: 4 -512445000 402590000 11 0 0 0 0
\r
3461 connect: 2 2 0 1 0
\r
3462 vtx: 1 -512445000 420370000 11 0 0 0 0
\r
3463 seg: 1 13 254000 0 0
\r
3464 vtx: 2 -512445000 402590000 11 0 0 0 0
\r
3466 net: "Xff$XMaster$X_Xlatch$NI_$G1" 2 1 0 0 0 0 1
\r
3467 pin: 1 IC_6_CD4007_2.4
\r
3468 pin: 2 IC_6_CD4007_2.8
\r
3469 connect: 1 1 0 1 0
\r
3470 vtx: 1 -481965000 387350000 11 0 0 0 0
\r
3471 seg: 1 13 254000 0 0
\r
3472 vtx: 2 -489585000 394970000 11 0 0 0 0
\r
3474 net: "Xff$XSlave$XXlatch$NP_$G1_$G2" 3 2 0 0 0 0 1
\r
3475 pin: 1 IC_3_CD4007_3.1
\r
3476 pin: 2 IC_3_CD4007_3.13
\r
3478 connect: 1 1 0 3 0
\r
3479 vtx: 1 -381635000 527050000 11 0 0 0 0
\r
3480 seg: 1 12 254000 0 0
\r
3481 vtx: 2 -385254500 527050000 0 0 0 0 0
\r
3482 seg: 2 12 254000 0 0
\r
3483 vtx: 3 -387794500 529590000 0 0 0 0 0
\r
3484 seg: 3 12 254000 0 0
\r
3485 vtx: 4 -389255000 529590000 11 0 0 0 0
\r
3486 connect: 2 2 0 1 0
\r
3487 vtx: 1 -395605000 529590000 11 0 0 0 0
\r
3488 seg: 1 12 254000 0 0
\r
3489 vtx: 2 -389255000 529590000 11 0 0 0 0
\r
3491 net: "Xff$XMaster$X_Xlatch$NI" 2 1 0 0 0 0 1
\r
3492 pin: 1 IC_6_CD4007_1.4
\r
3493 pin: 2 IC_6_CD4007_1.8
\r
3494 connect: 1 1 0 1 0
\r
3495 vtx: 1 -481965000 463550000 11 0 0 0 0
\r
3496 seg: 1 13 254000 0 0
\r
3497 vtx: 2 -489585000 471170000 11 0 0 0 0
\r
3499 net: "Xff$XMaster$XXgatetop$NP" 3 2 0 0 0 0 1
\r
3500 pin: 1 IC_5_CD4007_1.1
\r
3501 pin: 2 IC_5_CD4007_1.13
\r
3503 connect: 1 2 0 3 0
\r
3504 vtx: 1 -478155000 496570000 11 0 0 0 0
\r
3505 seg: 1 13 254000 0 0
\r
3506 vtx: 2 -478155000 490410500 0 0 0 0 0
\r
3507 seg: 2 13 254000 0 0
\r
3508 vtx: 3 -467995000 480250500 0 0 0 0 0
\r
3509 seg: 3 13 254000 0 0
\r
3510 vtx: 4 -467995000 478790000 11 0 0 0 0
\r
3511 connect: 2 1 0 3 0
\r
3512 vtx: 1 -460375000 476250000 11 0 0 0 0
\r
3513 seg: 1 12 254000 0 0
\r
3514 vtx: 2 -463994500 476250000 0 0 0 0 0
\r
3515 seg: 2 12 254000 0 0
\r
3516 vtx: 3 -466534500 478790000 0 0 0 0 0
\r
3517 seg: 3 12 254000 0 0
\r
3518 vtx: 4 -467995000 478790000 11 0 0 0 0
\r
3520 net: "Xff$XMaster$XXlatch$NI_$G1" 2 1 0 0 0 0 1
\r
3521 pin: 1 IC_0_CD4007_2.4
\r
3522 pin: 2 IC_0_CD4007_2.8
\r
3523 connect: 1 1 0 1 0
\r
3524 vtx: 1 -548005000 438150000 11 0 0 0 0
\r
3525 seg: 1 13 254000 0 0
\r
3526 vtx: 2 -555625000 445770000 11 0 0 0 0
\r
3528 net: "Xff$XSlave$X_Xlatch$NP_$G1" 3 2 0 0 0 0 1
\r
3529 pin: 1 IC_4_CD4007_2.1
\r
3530 pin: 2 IC_4_CD4007_2.13
\r
3532 connect: 1 1 0 3 0
\r
3533 vtx: 1 -460375000 450850000 11 0 0 0 0
\r
3534 seg: 1 13 254000 0 0
\r
3535 vtx: 2 -465633308 450850000 0 0 0 0 30020
\r
3536 seg: 2 13 254000 0 0
\r
3537 vtx: 3 -467995000 453211692 0 0 0 0 0
\r
3538 seg: 3 13 254000 0 0
\r
3539 vtx: 4 -467995000 453390000 11 0 0 0 0
\r
3540 connect: 2 2 -1 2 0
\r
3541 vtx: 1 -473075000 427990000 11 0 0 0 0
\r
3542 seg: 1 13 254000 0 0
\r
3543 vtx: 2 -465633308 435431692 0 0 0 0 0
\r
3544 seg: 2 13 254000 0 0
\r
3545 vtx: 3 -465633308 450850000 0 0 0 0 30020
\r
3547 net: "Xff$XMaster$XXstiD$PTI_Out_$G1" 2 1 0 0 0 0 1
\r
3548 pin: 1 IC_2_CD4007_2.13
\r
3550 connect: 1 1 0 3 0
\r
3551 vtx: 1 -508635000 427990000 11 0 0 0 0
\r
3552 seg: 1 13 254000 0 0
\r
3553 vtx: 2 -508766826 428121826 0 0 0 0 0
\r
3554 seg: 2 13 254000 0 0
\r
3555 vtx: 3 -508766826 448178174 0 0 0 0 0
\r
3556 seg: 3 13 254000 0 0
\r
3557 vtx: 4 -506095000 450850000 11 0 0 0 0
\r
3559 net: "Xff$XMaster$XXgatebot$NN_$G1_$G2" 2 1 0 0 0 0 1
\r
3560 pin: 1 IC_1_CD4007_3.9
\r
3562 connect: 1 1 0 3 0
\r
3563 vtx: 1 -423545000 504190000 11 0 0 0 0
\r
3564 seg: 1 13 254000 0 0
\r
3565 vtx: 2 -423348658 504386342 0 0 0 0 0
\r
3566 seg: 2 13 254000 0 0
\r
3567 vtx: 3 -423348658 515423658 0 0 0 0 0
\r
3568 seg: 3 13 254000 0 0
\r
3569 vtx: 4 -424815000 516890000 11 0 0 0 0
\r
3571 net: "D_$G1_$G2" 3 2 0 0 0 0 1
\r
3572 pin: 1 IC_5_CD4007_3.3
\r
3573 pin: 2 IC_2_CD4007_3.6
\r
3575 connect: 1 2 0 5 0
\r
3576 vtx: 1 -361950000 497840000 11 0 0 0 0
\r
3577 seg: 1 13 254000 0 0
\r
3578 vtx: 2 -360552746 499237254 0 0 0 0 0
\r
3579 seg: 2 13 254000 0 0
\r
3580 vtx: 3 -358827832 499237254 0 0 0 0 0
\r
3581 seg: 3 13 254000 0 0
\r
3582 vtx: 4 -358011222 498420644 0 0 0 0 0
\r
3583 seg: 4 13 254000 0 0
\r
3584 vtx: 5 -358011222 482093778 0 0 0 0 0
\r
3585 seg: 5 13 254000 0 0
\r
3586 vtx: 6 -366395000 473710000 11 0 0 0 0
\r
3587 connect: 2 2 1 6 0
\r
3588 vtx: 1 -361950000 497840000 11 0 0 0 0
\r
3589 seg: 1 12 254000 0 0
\r
3590 vtx: 2 -364803436 500693436 0 0 0 0 0
\r
3591 seg: 2 12 254000 0 0
\r
3592 vtx: 3 -399619470 500693436 0 0 0 0 0
\r
3593 seg: 3 12 254000 0 0
\r
3594 vtx: 4 -404931626 506005846 0 0 0 0 0
\r
3595 seg: 4 12 254000 0 0
\r
3596 vtx: 5 -404931626 510047494 0 0 0 0 0
\r
3597 seg: 5 12 254000 0 0
\r
3598 vtx: 6 -411774132 516890000 0 0 0 0 0
\r
3599 seg: 6 12 254000 0 0
\r
3600 vtx: 7 -412115000 516890000 11 0 0 0 0
\r
3602 net: "Xff$XSlave$Q_storage_$G1_$G2" 3 2 0 0 0 0 1
\r
3603 pin: 1 IC_3_CD4007_3.3
\r
3606 connect: 1 1 0 5 0
\r
3607 vtx: 1 -423545000 488950000 11 0 0 0 0
\r
3608 seg: 1 12 254000 0 0
\r
3609 vtx: 2 -423545000 493922304 0 0 0 0 0
\r
3610 seg: 2 12 254000 0 0
\r
3611 vtx: 3 -407882852 509584452 0 0 0 0 0
\r
3612 seg: 3 12 254000 0 0
\r
3613 vtx: 4 -406049226 509584452 0 0 711200 355600 0
\r
3614 seg: 4 13 254000 0 0
\r
3615 vtx: 5 -391123678 524510000 0 0 0 0 0
\r
3616 seg: 5 13 254000 0 0
\r
3617 vtx: 6 -389255000 524510000 11 0 0 0 0
\r
3618 connect: 2 2 1 2 0
\r
3619 vtx: 1 -418465000 478790000 11 0 0 0 0
\r
3620 seg: 1 13 254000 0 0
\r
3621 vtx: 2 -423545000 483870000 0 0 0 0 0
\r
3622 seg: 2 13 254000 0 0
\r
3623 vtx: 3 -423545000 488950000 11 0 0 0 0
\r
3625 net: "Xff$XSlave$XXgatetop$NP_$G1_$G2" 3 2 0 0 0 0 1
\r
3626 pin: 1 IC_8_CD4007_3.1
\r
3627 pin: 2 IC_8_CD4007_3.13
\r
3629 connect: 1 1 0 3 0
\r
3630 vtx: 1 -424815000 476250000 11 0 0 0 0
\r
3631 seg: 1 12 254000 0 0
\r
3632 vtx: 2 -428434500 476250000 0 0 0 0 0
\r
3633 seg: 2 12 254000 0 0
\r
3634 vtx: 3 -430974500 478790000 0 0 0 0 0
\r
3635 seg: 3 12 254000 0 0
\r
3636 vtx: 4 -432435000 478790000 11 0 0 0 0
\r
3637 connect: 2 2 0 2 0
\r
3638 vtx: 1 -436245000 488950000 11 0 0 0 0
\r
3639 seg: 1 13 254000 0 0
\r
3640 vtx: 2 -432435000 485140000 0 0 0 0 0
\r
3641 seg: 2 13 254000 0 0
\r
3642 vtx: 3 -432435000 478790000 11 0 0 0 0
\r
3644 net: "Xff$XSlave$XXlatch$NP_$G1_$G3" 3 2 0 0 0 0 1
\r
3645 pin: 1 IC_3_CD4007_4.1
\r
3646 pin: 2 IC_3_CD4007_4.13
\r
3648 connect: 1 1 0 3 0
\r
3649 vtx: 1 -381635000 450850000 11 0 0 0 0
\r
3650 seg: 1 12 254000 0 0
\r
3651 vtx: 2 -385254500 450850000 0 0 0 0 0
\r
3652 seg: 2 12 254000 0 0
\r
3653 vtx: 3 -387794500 453390000 0 0 0 0 0
\r
3654 seg: 3 12 254000 0 0
\r
3655 vtx: 4 -389255000 453390000 11 0 0 0 0
\r
3656 connect: 2 2 0 1 0
\r
3657 vtx: 1 -395605000 453390000 11 0 0 0 0
\r
3658 seg: 1 12 254000 0 0
\r
3659 vtx: 2 -389255000 453390000 11 0 0 0 0
\r
3661 net: "Xff$XSlave$XXgatetop$NP" 3 2 0 0 0 0 1
\r
3662 pin: 1 IC_8_CD4007_1.1
\r
3663 pin: 2 IC_8_CD4007_1.13
\r
3665 connect: 1 1 0 3 0
\r
3666 vtx: 1 -526415000 476250000 11 0 0 0 0
\r
3667 seg: 1 12 254000 0 0
\r
3668 vtx: 2 -530034500 476250000 0 0 0 0 0
\r
3669 seg: 2 12 254000 0 0
\r
3670 vtx: 3 -532574500 478790000 0 0 0 0 0
\r
3671 seg: 3 12 254000 0 0
\r
3672 vtx: 4 -534035000 478790000 11 0 0 0 0
\r
3673 connect: 2 2 0 2 0
\r
3674 vtx: 1 -537845000 488950000 11 0 0 0 0
\r
3675 seg: 1 13 254000 0 0
\r
3676 vtx: 2 -534035000 485140000 0 0 0 0 0
\r
3677 seg: 2 13 254000 0 0
\r
3678 vtx: 3 -534035000 478790000 11 0 0 0 0
\r
3680 net: "Xff$XXstiCLK$NTI_Out" 2 1 0 0 0 0 1
\r
3681 pin: 1 X_IC_9_CD4007_1.8
\r
3683 connect: 1 1 0 2 0
\r
3684 vtx: 1 -540385000 466090000 11 0 0 0 0
\r
3685 seg: 1 12 254000 0 0
\r
3686 vtx: 2 -542925000 463550000 0 0 0 0 0
\r
3687 seg: 2 12 254000 0 0
\r
3688 vtx: 3 -548005000 463550000 11 0 0 0 0
\r
3690 net: "Xff$XMaster$XXgatetop$NI_$G1" 2 1 0 0 0 0 1
\r
3691 pin: 1 IC_5_CD4007_2.4
\r
3692 pin: 2 IC_5_CD4007_2.8
\r
3693 connect: 1 1 0 1 0
\r
3694 vtx: 1 -460375000 387350000 11 0 0 0 0
\r
3695 seg: 1 12 254000 0 0
\r
3696 vtx: 2 -467995000 394970000 11 0 0 0 0
\r
3698 net: "Xff$XSlave$XXlatch$NI_$G1" 2 1 0 0 0 0 1
\r
3699 pin: 1 IC_3_CD4007_2.4
\r
3700 pin: 2 IC_3_CD4007_2.8
\r
3701 connect: 1 1 0 1 0
\r
3702 vtx: 1 -483235000 438150000 11 0 0 0 0
\r
3703 seg: 1 13 254000 0 0
\r
3704 vtx: 2 -490855000 445770000 11 0 0 0 0
\r
3706 net: "0_$G1_$G2" 2 1 0 0 0 0 1
\r
3709 connect: 1 1 0 1 0
\r
3710 vtx: 1 -364490000 497840000 11 0 0 0 0
\r
3711 seg: 1 13 254000 0 0
\r
3712 vtx: 2 -364490000 495300000 11 0 0 0 0
\r
3714 net: "Xff$XSlave$X_Xlatch$NI_$G1_$G2" 2 1 0 0 0 0 1
\r
3715 pin: 1 IC_4_CD4007_3.4
\r
3716 pin: 2 IC_4_CD4007_3.8
\r
3717 connect: 1 1 0 1 0
\r
3718 vtx: 1 -358775000 514350000 11 0 0 0 0
\r
3719 seg: 1 12 254000 0 0
\r
3720 vtx: 2 -366395000 521970000 11 0 0 0 0
\r
3722 net: "Xff$XSlave$X_Xlatch$NN_$G1_$G2" 2 1 0 0 0 0 1
\r
3723 pin: 1 IC_4_CD4007_3.9
\r
3725 connect: 1 1 0 5 0
\r
3726 vtx: 1 -372745000 516890000 11 0 0 0 0
\r
3727 seg: 1 12 254000 0 0
\r
3728 vtx: 2 -368739166 512884166 0 0 0 0 0
\r
3729 seg: 2 12 254000 0 0
\r
3730 vtx: 3 -358161082 512884166 0 0 0 0 0
\r
3731 seg: 3 12 254000 0 0
\r
3732 vtx: 4 -357311706 513733542 0 0 0 0 0
\r
3733 seg: 4 12 254000 0 0
\r
3734 vtx: 5 -357311706 515426706 0 0 0 0 0
\r
3735 seg: 5 12 254000 0 0
\r
3736 vtx: 6 -358775000 516890000 11 0 0 0 0
\r
3738 net: "Xff$XMaster$XXgatebot$NI_$G1_$G2" 2 1 0 0 0 0 1
\r
3739 pin: 1 IC_1_CD4007_3.4
\r
3740 pin: 2 IC_1_CD4007_3.8
\r
3741 connect: 1 1 0 1 0
\r
3742 vtx: 1 -424815000 514350000 11 0 0 0 0
\r
3743 seg: 1 12 254000 0 0
\r
3744 vtx: 2 -432435000 521970000 11 0 0 0 0
\r
3746 net: "Xff$XMaster$XXgatebot$NN_$G1_$G3" 2 1 0 0 0 0 1
\r
3747 pin: 1 IC_1_CD4007_4.9
\r
3749 connect: 1 1 0 3 0
\r
3750 vtx: 1 -423545000 427990000 11 0 0 0 0
\r
3751 seg: 1 13 254000 0 0
\r
3752 vtx: 2 -423348658 428186342 0 0 0 0 0
\r
3753 seg: 2 13 254000 0 0
\r
3754 vtx: 3 -423348658 439223658 0 0 0 0 0
\r
3755 seg: 3 13 254000 0 0
\r
3756 vtx: 4 -424815000 440690000 11 0 0 0 0
\r
3758 net: "D_$G1_$G3" 3 2 0 0 0 0 1
\r
3759 pin: 1 IC_5_CD4007_4.3
\r
3760 pin: 2 IC_2_CD4007_4.6
\r
3762 connect: 1 2 0 5 0
\r
3763 vtx: 1 -361950000 421640000 11 0 0 0 0
\r
3764 seg: 1 13 254000 0 0
\r
3765 vtx: 2 -360552746 423037254 0 0 0 0 0
\r
3766 seg: 2 13 254000 0 0
\r
3767 vtx: 3 -358827832 423037254 0 0 0 0 0
\r
3768 seg: 3 13 254000 0 0
\r
3769 vtx: 4 -358011222 422220644 0 0 0 0 0
\r
3770 seg: 4 13 254000 0 0
\r
3771 vtx: 5 -358011222 405893778 0 0 0 0 0
\r
3772 seg: 5 13 254000 0 0
\r
3773 vtx: 6 -366395000 397510000 11 0 0 0 0
\r
3774 connect: 2 2 1 6 0
\r
3775 vtx: 1 -361950000 421640000 11 0 0 0 0
\r
3776 seg: 1 12 254000 0 0
\r
3777 vtx: 2 -364803436 424493436 0 0 0 0 0
\r
3778 seg: 2 12 254000 0 0
\r
3779 vtx: 3 -399619470 424493436 0 0 0 0 0
\r
3780 seg: 3 12 254000 0 0
\r
3781 vtx: 4 -404931626 429805846 0 0 0 0 0
\r
3782 seg: 4 12 254000 0 0
\r
3783 vtx: 5 -404931626 433847494 0 0 0 0 0
\r
3784 seg: 5 12 254000 0 0
\r
3785 vtx: 6 -411774132 440690000 0 0 0 0 0
\r
3786 seg: 6 12 254000 0 0
\r
3787 vtx: 7 -412115000 440690000 11 0 0 0 0
\r
3789 net: "Xff$XSlave$Q_storage_$G1_$G3" 3 2 0 0 0 0 1
\r
3790 pin: 1 IC_3_CD4007_4.3
\r
3793 connect: 1 1 0 5 0
\r
3794 vtx: 1 -423545000 412750000 11 0 0 0 0
\r
3795 seg: 1 12 254000 0 0
\r
3796 vtx: 2 -423545000 417722304 0 0 0 0 0
\r
3797 seg: 2 12 254000 0 0
\r
3798 vtx: 3 -407882852 433384452 0 0 0 0 0
\r
3799 seg: 3 12 254000 0 0
\r
3800 vtx: 4 -406049226 433384452 0 0 711200 355600 0
\r
3801 seg: 4 13 254000 0 0
\r
3802 vtx: 5 -391123678 448310000 0 0 0 0 0
\r
3803 seg: 5 13 254000 0 0
\r
3804 vtx: 6 -389255000 448310000 11 0 0 0 0
\r
3805 connect: 2 2 1 2 0
\r
3806 vtx: 1 -418465000 402590000 11 0 0 0 0
\r
3807 seg: 1 13 254000 0 0
\r
3808 vtx: 2 -423545000 407670000 0 0 0 0 0
\r
3809 seg: 2 13 254000 0 0
\r
3810 vtx: 3 -423545000 412750000 11 0 0 0 0
\r
3812 net: "Xff$XSlave$XXgatetop$NP_$G1_$G3" 3 2 0 0 0 0 1
\r
3813 pin: 1 IC_8_CD4007_4.1
\r
3814 pin: 2 IC_8_CD4007_4.13
\r
3816 connect: 1 1 0 3 0
\r
3817 vtx: 1 -424815000 400050000 11 0 0 0 0
\r
3818 seg: 1 12 254000 0 0
\r
3819 vtx: 2 -428434500 400050000 0 0 0 0 0
\r
3820 seg: 2 12 254000 0 0
\r
3821 vtx: 3 -430974500 402590000 0 0 0 0 0
\r
3822 seg: 3 12 254000 0 0
\r
3823 vtx: 4 -432435000 402590000 11 0 0 0 0
\r
3824 connect: 2 2 0 2 0
\r
3825 vtx: 1 -436245000 412750000 11 0 0 0 0
\r
3826 seg: 1 13 254000 0 0
\r
3827 vtx: 2 -432435000 408940000 0 0 0 0 0
\r
3828 seg: 2 13 254000 0 0
\r
3829 vtx: 3 -432435000 402590000 11 0 0 0 0
\r
3831 net: "Xff$XXstiCLK$PTI_Out" 2 1 0 0 0 0 1
\r
3832 pin: 1 X_IC_9_CD4007_1.13
\r
3834 connect: 1 1 0 2 0
\r
3835 vtx: 1 -555625000 488950000 11 0 0 0 0
\r
3836 seg: 1 12 254000 0 0
\r
3837 vtx: 2 -555625000 483870000 0 0 0 0 0
\r
3838 seg: 2 12 254000 0 0
\r
3839 vtx: 3 -548005000 476250000 11 0 0 0 0
\r
3841 net: "Xff$XXstiCLK$PTI_Out_$G1" 2 1 0 0 0 0 1
\r
3842 pin: 1 X_IC_9_CD4007_2.13
\r
3844 connect: 1 1 0 2 0
\r
3845 vtx: 1 -555625000 412750000 11 0 0 0 0
\r
3846 seg: 1 12 254000 0 0
\r
3847 vtx: 2 -555625000 407670000 0 0 0 0 0
\r
3848 seg: 2 12 254000 0 0
\r
3849 vtx: 3 -548005000 400050000 11 0 0 0 0
\r
3851 net: "CLK_$G1_$G2" 4 3 0 0 0 0 1
\r
3852 pin: 1 IC_8_CD4007_3.6
\r
3853 pin: 2 IC_7_CD4007_3.3
\r
3854 pin: 3 X_IC_9_CD4007_3.6
\r
3856 connect: 1 1 0 5 0
\r
3857 vtx: 1 -410845000 473710000 11 0 0 0 0
\r
3858 seg: 1 13 254000 0 0
\r
3859 vtx: 2 -414793684 469761316 0 0 0 0 0
\r
3860 seg: 2 13 254000 0 0
\r
3861 vtx: 3 -414793684 467335108 0 0 0 0 0
\r
3862 seg: 3 13 254000 0 0
\r
3863 vtx: 4 -420042086 462086706 0 0 0 0 0
\r
3864 seg: 4 13 254000 0 0
\r
3865 vtx: 5 -428431706 462086706 0 0 0 0 0
\r
3866 seg: 5 13 254000 0 0
\r
3867 vtx: 6 -432435000 466090000 11 0 0 0 0
\r
3868 connect: 2 2 0 3 0
\r
3869 vtx: 1 -454025000 466090000 11 0 0 0 0
\r
3870 seg: 1 12 254000 0 0
\r
3871 vtx: 2 -450023738 462088992 0 0 0 0 0
\r
3872 seg: 2 12 254000 0 0
\r
3873 vtx: 3 -436436008 462088992 0 0 0 0 0
\r
3874 seg: 3 12 254000 0 0
\r
3875 vtx: 4 -432435000 466090000 11 0 0 0 0
\r
3876 connect: 3 3 1 7 0
\r
3877 vtx: 1 -361950000 495300000 11 0 0 0 0
\r
3878 seg: 1 12 254000 0 0
\r
3879 vtx: 2 -366270540 490979460 0 0 0 0 0
\r
3880 seg: 2 12 254000 0 0
\r
3881 vtx: 3 -379617478 490979460 0 0 0 0 0
\r
3882 seg: 3 12 254000 0 0
\r
3883 vtx: 4 -387744462 482852476 0 0 0 0 0
\r
3884 seg: 4 12 254000 0 0
\r
3885 vtx: 5 -409260040 482852476 0 0 0 0 0
\r
3886 seg: 5 12 254000 0 0
\r
3887 vtx: 6 -412316168 479796348 0 0 0 0 0
\r
3888 seg: 6 12 254000 0 0
\r
3889 vtx: 7 -412316168 475181168 0 0 0 0 0
\r
3890 seg: 7 12 254000 0 0
\r
3891 vtx: 8 -410845000 473710000 11 0 0 0 0
\r
3893 net: "0_$G1_$G3" 2 1 0 0 0 0 1
\r
3896 connect: 1 1 0 1 0
\r
3897 vtx: 1 -364490000 421640000 11 0 0 0 0
\r
3898 seg: 1 13 254000 0 0
\r
3899 vtx: 2 -364490000 419100000 11 0 0 0 0
\r
3901 net: "Xff$XSlave$X_Xlatch$NI_$G1_$G3" 2 1 0 0 0 0 1
\r
3902 pin: 1 IC_4_CD4007_4.4
\r
3903 pin: 2 IC_4_CD4007_4.8
\r
3904 connect: 1 1 0 1 0
\r
3905 vtx: 1 -358775000 438150000 11 0 0 0 0
\r
3906 seg: 1 12 254000 0 0
\r
3907 vtx: 2 -366395000 445770000 11 0 0 0 0
\r
3909 net: "Xff$XSlave$X_Xlatch$NN_$G1_$G3" 2 1 0 0 0 0 1
\r
3910 pin: 1 IC_4_CD4007_4.9
\r
3912 connect: 1 1 0 5 0
\r
3913 vtx: 1 -372745000 440690000 11 0 0 0 0
\r
3914 seg: 1 12 254000 0 0
\r
3915 vtx: 2 -368739166 436684166 0 0 0 0 0
\r
3916 seg: 2 12 254000 0 0
\r
3917 vtx: 3 -358161082 436684166 0 0 0 0 0
\r
3918 seg: 3 12 254000 0 0
\r
3919 vtx: 4 -357311706 437533542 0 0 0 0 0
\r
3920 seg: 4 12 254000 0 0
\r
3921 vtx: 5 -357311706 439226706 0 0 0 0 0
\r
3922 seg: 5 12 254000 0 0
\r
3923 vtx: 6 -358775000 440690000 11 0 0 0 0
\r
3925 net: "Xff$XMaster$XXgatebot$NI_$G1_$G3" 2 1 0 0 0 0 1
\r
3926 pin: 1 IC_1_CD4007_4.4
\r
3927 pin: 2 IC_1_CD4007_4.8
\r
3928 connect: 1 1 0 1 0
\r
3929 vtx: 1 -424815000 438150000 11 0 0 0 0
\r
3930 seg: 1 12 254000 0 0
\r
3931 vtx: 2 -432435000 445770000 11 0 0 0 0
\r
3933 net: "$G_Vss_$G0" 12 11 0 635000 711200 355600 1
\r
3934 pin: 1 IC_0_CD4007_1.7
\r
3935 pin: 2 IC_6_CD4007_1.7
\r
3936 pin: 3 IC_5_CD4007_1.7
\r
3937 pin: 4 IC_1_CD4007_1.7
\r
3938 pin: 5 IC_2_CD4007_1.4
\r
3939 pin: 6 IC_2_CD4007_1.7
\r
3940 pin: 7 IC_3_CD4007_1.7
\r
3941 pin: 8 IC_4_CD4007_1.7
\r
3942 pin: 9 IC_8_CD4007_1.7
\r
3943 pin: 10 IC_7_CD4007_1.7
\r
3944 pin: 11 X_IC_9_CD4007_1.7
\r
3946 connect: 1 3 0 5 0
\r
3947 vtx: 1 -534035000 514350000 11 0 0 0 0
\r
3948 seg: 1 13 635000 0 0
\r
3949 vtx: 2 -538293310 518608310 0 0 0 0 0
\r
3950 seg: 2 13 635000 0 0
\r
3951 vtx: 3 -541610550 518608310 0 0 0 0 0
\r
3952 seg: 3 13 635000 0 0
\r
3953 vtx: 4 -547330122 512888992 0 0 0 0 0
\r
3954 seg: 4 13 635000 0 0
\r
3955 vtx: 5 -554163738 512888992 0 0 0 0 0
\r
3956 seg: 5 13 635000 0 0
\r
3957 vtx: 6 -555625000 514350000 11 0 0 0 0
\r
3958 connect: 2 7 1 14 0
\r
3959 vtx: 1 -467995000 514350000 11 0 0 0 0
\r
3960 seg: 1 13 635000 0 0
\r
3961 vtx: 2 -474325188 508019812 0 0 0 0 0
\r
3962 seg: 2 13 635000 0 0
\r
3963 vtx: 3 -474792548 508019812 0 0 0 0 32072
\r
3964 seg: 3 13 635000 0 0
\r
3965 vtx: 4 -474792548 503470926 0 0 0 0 0
\r
3966 seg: 4 13 635000 0 0
\r
3967 vtx: 5 -474241876 502920254 0 0 0 0 13581
\r
3968 seg: 5 13 635000 0 0
\r
3969 vtx: 6 -479869754 497292630 0 0 0 0 0
\r
3970 seg: 6 13 635000 0 0
\r
3971 vtx: 7 -479869754 489299504 0 0 0 0 0
\r
3972 seg: 7 13 635000 0 0
\r
3973 vtx: 8 -473895928 483325678 0 0 0 0 0
\r
3974 seg: 8 13 635000 0 0
\r
3975 vtx: 9 -473895928 468636604 0 0 0 0 21173
\r
3976 seg: 9 13 635000 0 0
\r
3977 vtx: 10 -475496128 468636604 0 0 0 0 0
\r
3978 seg: 10 13 635000 0 0
\r
3979 vtx: 11 -477560386 466572346 0 0 0 0 0
\r
3980 seg: 11 13 635000 0 0
\r
3981 vtx: 12 -477560386 465889086 0 0 0 0 0
\r
3982 seg: 12 13 635000 0 0
\r
3983 vtx: 13 -481369624 462079848 0 0 0 0 0
\r
3984 seg: 13 13 635000 0 0
\r
3985 vtx: 14 -488114848 462079848 0 0 0 0 0
\r
3986 seg: 14 13 635000 0 0
\r
3987 vtx: 15 -489585000 463550000 11 0 0 0 0
\r
3988 connect: 3 9 1 3 0
\r
3989 vtx: 1 -512445000 463550000 11 0 0 0 0
\r
3990 seg: 1 12 635000 0 0
\r
3991 vtx: 2 -510982468 462087468 0 0 0 0 0
\r
3992 seg: 2 12 635000 0 0
\r
3993 vtx: 3 -491047532 462087468 0 0 0 0 0
\r
3994 seg: 3 12 635000 0 0
\r
3995 vtx: 4 -489585000 463550000 11 0 0 0 0
\r
3996 connect: 4 5 3 3 0
\r
3997 vtx: 1 -513715000 514350000 11 0 0 0 0
\r
3998 seg: 1 12 635000 0 0
\r
3999 vtx: 2 -516066024 511998976 0 0 0 0 0
\r
4000 seg: 2 12 635000 0 0
\r
4001 vtx: 3 -531683976 511998976 0 0 0 0 0
\r
4002 seg: 3 12 635000 0 0
\r
4003 vtx: 4 -534035000 514350000 11 0 0 0 0
\r
4004 connect: 5 5 4 5 0
\r
4005 vtx: 1 -513715000 514350000 11 0 0 0 0
\r
4006 seg: 1 12 635000 0 0
\r
4007 vtx: 2 -515194804 515829804 0 0 0 0 0
\r
4008 seg: 2 12 635000 0 0
\r
4009 vtx: 3 -515194804 520042140 0 0 0 0 0
\r
4010 seg: 3 12 635000 0 0
\r
4011 vtx: 4 -513727192 521509752 0 0 0 0 28422
\r
4012 seg: 4 12 635000 0 0
\r
4013 vtx: 5 -513715000 521521944 0 0 0 0 0
\r
4014 seg: 5 12 635000 0 0
\r
4015 vtx: 6 -513715000 521970000 11 0 0 0 0
\r
4016 connect: 6 9 8 3 0
\r
4017 vtx: 1 -512445000 463550000 11 0 0 0 0
\r
4018 seg: 1 13 635000 0 0
\r
4019 vtx: 2 -514800088 461194912 0 0 0 0 0
\r
4020 seg: 2 13 635000 0 0
\r
4021 vtx: 3 -531679912 461194912 0 0 0 0 0
\r
4022 seg: 3 13 635000 0 0
\r
4023 vtx: 4 -534035000 463550000 11 0 0 0 0
\r
4024 connect: 7 10 8 3 0
\r
4025 vtx: 1 -555625000 463550000 11 0 0 0 0
\r
4026 seg: 1 13 635000 0 0
\r
4027 vtx: 2 -554164500 462089500 0 0 0 0 0
\r
4028 seg: 2 13 635000 0 0
\r
4029 vtx: 3 -535495500 462089500 0 0 0 0 0
\r
4030 seg: 3 13 635000 0 0
\r
4031 vtx: 4 -534035000 463550000 11 0 0 0 0
\r
4032 connect: 8 11 -1 2 0
\r
4033 vtx: 1 -468630000 497840000 11 0 0 0 0
\r
4034 seg: 1 13 635000 0 0
\r
4035 vtx: 2 -469161622 497840000 0 0 0 0 0
\r
4036 seg: 2 13 635000 0 0
\r
4037 vtx: 3 -474241876 502920254 0 0 0 0 13581
\r
4038 connect: 9 6 -1 4 0
\r
4039 vtx: 1 -490855000 514350000 11 0 0 0 0
\r
4040 seg: 1 13 635000 0 0
\r
4041 vtx: 2 -484524812 508019812 0 0 0 0 0
\r
4042 seg: 2 13 635000 0 0
\r
4043 vtx: 3 -484440738 508019812 0 0 711200 355600 0
\r
4044 seg: 3 12 635000 0 0
\r
4045 vtx: 4 -477628712 508019812 0 0 711200 355600 0
\r
4046 seg: 4 13 635000 0 0
\r
4047 vtx: 5 -474792548 508019812 0 0 0 0 32072
\r
4048 connect: 10 2 -1 2 0
\r
4049 vtx: 1 -467995000 463550000 11 0 0 0 0
\r
4050 seg: 1 13 635000 0 0
\r
4051 vtx: 2 -473081604 468636604 0 0 0 0 0
\r
4052 seg: 2 13 635000 0 0
\r
4053 vtx: 3 -473895928 468636604 0 0 0 0 21173
\r
4054 connect: 11 6 -1 5 0
\r
4055 vtx: 1 -490855000 514350000 11 0 0 0 0
\r
4056 seg: 1 12 635000 0 0
\r
4057 vtx: 2 -492319564 512885436 0 0 0 0 0
\r
4058 seg: 2 12 635000 0 0
\r
4059 vtx: 3 -506695964 512885436 0 0 0 0 0
\r
4060 seg: 3 12 635000 0 0
\r
4061 vtx: 4 -509047242 515236714 0 0 0 0 0
\r
4062 seg: 4 12 635000 0 0
\r
4063 vtx: 5 -509047242 516829802 0 0 0 0 0
\r
4064 seg: 5 12 635000 0 0
\r
4065 vtx: 6 -513727192 521509752 0 0 0 0 28422
\r
4067 net: "$G_Vdd_$G0" 20 19 0 635000 711200 355600 1
\r
4068 pin: 1 IC_0_CD4007_1.2
\r
4069 pin: 2 IC_0_CD4007_1.14
\r
4070 pin: 3 IC_6_CD4007_1.2
\r
4071 pin: 4 IC_6_CD4007_1.14
\r
4072 pin: 5 IC_5_CD4007_1.2
\r
4073 pin: 6 IC_5_CD4007_1.14
\r
4074 pin: 7 IC_1_CD4007_1.2
\r
4075 pin: 8 IC_1_CD4007_1.14
\r
4076 pin: 9 IC_2_CD4007_1.2
\r
4077 pin: 10 IC_2_CD4007_1.14
\r
4078 pin: 11 IC_3_CD4007_1.2
\r
4079 pin: 12 IC_3_CD4007_1.14
\r
4080 pin: 13 IC_4_CD4007_1.2
\r
4081 pin: 14 IC_4_CD4007_1.14
\r
4082 pin: 15 IC_8_CD4007_1.2
\r
4083 pin: 16 IC_8_CD4007_1.14
\r
4084 pin: 17 IC_7_CD4007_1.2
\r
4085 pin: 18 IC_7_CD4007_1.14
\r
4086 pin: 19 X_IC_9_CD4007_1.14
\r
4088 connect: 1 1 0 2 0
\r
4089 vtx: 1 -548005000 529590000 11 0 0 0 0
\r
4090 seg: 1 12 635000 0 0
\r
4091 vtx: 2 -550545000 527050000 0 0 0 0 0
\r
4092 seg: 2 12 635000 0 0
\r
4093 vtx: 3 -555625000 527050000 11 0 0 0 0
\r
4094 connect: 2 6 1 2 0
\r
4095 vtx: 1 -534035000 527050000 11 0 0 0 0
\r
4096 seg: 1 12 635000 0 0
\r
4097 vtx: 2 -545465000 527050000 0 0 0 0 0
\r
4098 seg: 2 12 635000 0 0
\r
4099 vtx: 3 -548005000 529590000 11 0 0 0 0
\r
4100 connect: 3 3 2 2 0
\r
4101 vtx: 1 -481965000 478790000 11 0 0 0 0
\r
4102 seg: 1 12 635000 0 0
\r
4103 vtx: 2 -484505000 476250000 0 0 0 0 0
\r
4104 seg: 2 12 635000 0 0
\r
4105 vtx: 3 -489585000 476250000 11 0 0 0 0
\r
4106 connect: 4 17 2 2 0
\r
4107 vtx: 1 -504825000 478790000 11 0 0 0 0
\r
4108 seg: 1 12 635000 0 0
\r
4109 vtx: 2 -502285000 476250000 0 0 0 0 0
\r
4110 seg: 2 12 635000 0 0
\r
4111 vtx: 3 -489585000 476250000 11 0 0 0 0
\r
4112 connect: 5 5 3 6 0
\r
4113 vtx: 1 -460375000 478790000 11 0 0 0 0
\r
4114 seg: 1 12 635000 0 0
\r
4115 vtx: 2 -461837532 480252532 0 0 0 0 0
\r
4116 seg: 2 12 635000 0 0
\r
4117 vtx: 3 -469017858 480252532 0 0 0 0 0
\r
4118 seg: 3 12 635000 0 0
\r
4119 vtx: 4 -469458040 479812350 0 0 0 0 0
\r
4120 seg: 4 12 635000 0 0
\r
4121 vtx: 5 -469458040 477063562 0 0 0 0 29314
\r
4122 seg: 5 12 635000 0 0
\r
4123 vtx: 6 -480238562 477063562 0 0 0 0 0
\r
4124 seg: 6 12 635000 0 0
\r
4125 vtx: 7 -481965000 478790000 11 0 0 0 0
\r
4126 connect: 6 19 4 4 0
\r
4127 vtx: 1 -468630000 495300000 11 0 0 0 0
\r
4128 seg: 1 13 635000 0 0
\r
4129 vtx: 2 -468630000 493903000 0 0 0 0 0
\r
4130 seg: 2 13 635000 0 0
\r
4131 vtx: 3 -466534500 491807500 0 0 0 0 0
\r
4132 seg: 3 13 635000 0 0
\r
4133 vtx: 4 -466534500 477710500 0 0 0 0 0
\r
4134 seg: 4 13 635000 0 0
\r
4135 vtx: 5 -467995000 476250000 11 0 0 0 0
\r
4136 connect: 7 13 5 3 0
\r
4137 vtx: 1 -460375000 529590000 11 0 0 0 0
\r
4138 seg: 1 13 635000 0 0
\r
4139 vtx: 2 -458716126 527931126 0 0 0 0 0
\r
4140 seg: 2 13 635000 0 0
\r
4141 vtx: 3 -458716126 480448874 0 0 0 0 0
\r
4142 seg: 3 13 635000 0 0
\r
4143 vtx: 4 -460375000 478790000 11 0 0 0 0
\r
4144 connect: 8 7 6 2 0
\r
4145 vtx: 1 -526415000 529590000 11 0 0 0 0
\r
4146 seg: 1 12 635000 0 0
\r
4147 vtx: 2 -531495000 529590000 0 0 0 0 0
\r
4148 seg: 2 12 635000 0 0
\r
4149 vtx: 3 -534035000 527050000 11 0 0 0 0
\r
4150 connect: 9 8 7 5 0
\r
4151 vtx: 1 -513715000 527050000 11 0 0 0 0
\r
4152 seg: 1 13 635000 0 0
\r
4153 vtx: 2 -515176770 528511770 0 0 0 0 0
\r
4154 seg: 2 13 635000 0 0
\r
4155 vtx: 3 -515176770 530611588 0 0 0 0 11452
\r
4156 seg: 3 13 635000 0 0
\r
4157 vtx: 4 -515879080 531314152 0 0 0 0 0
\r
4158 seg: 4 13 635000 0 0
\r
4159 vtx: 5 -524690848 531314152 0 0 0 0 0
\r
4160 seg: 5 13 635000 0 0
\r
4161 vtx: 6 -526415000 529590000 11 0 0 0 0
\r
4162 connect: 10 10 9 2 0
\r
4163 vtx: 1 -490855000 527050000 11 0 0 0 0
\r
4164 seg: 1 12 635000 0 0
\r
4165 vtx: 2 -503555000 527050000 0 0 0 0 0
\r
4166 seg: 2 12 635000 0 0
\r
4167 vtx: 3 -506095000 529590000 11 0 0 0 0
\r
4168 connect: 11 11 10 2 0
\r
4169 vtx: 1 -483235000 529590000 11 0 0 0 0
\r
4170 seg: 1 13 635000 0 0
\r
4171 vtx: 2 -485775000 527050000 0 0 0 0 0
\r
4172 seg: 2 13 635000 0 0
\r
4173 vtx: 3 -490855000 527050000 11 0 0 0 0
\r
4174 connect: 12 12 11 2 0
\r
4175 vtx: 1 -467995000 527050000 11 0 0 0 0
\r
4176 seg: 1 12 635000 0 0
\r
4177 vtx: 2 -480695000 527050000 0 0 0 0 0
\r
4178 seg: 2 12 635000 0 0
\r
4179 vtx: 3 -483235000 529590000 11 0 0 0 0
\r
4180 connect: 13 13 12 2 0
\r
4181 vtx: 1 -460375000 529590000 11 0 0 0 0
\r
4182 seg: 1 12 635000 0 0
\r
4183 vtx: 2 -462915000 527050000 0 0 0 0 0
\r
4184 seg: 2 12 635000 0 0
\r
4185 vtx: 3 -467995000 527050000 11 0 0 0 0
\r
4186 connect: 14 15 14 2 0
\r
4187 vtx: 1 -526415000 478790000 11 0 0 0 0
\r
4188 seg: 1 13 635000 0 0
\r
4189 vtx: 2 -531495000 478790000 0 0 0 0 0
\r
4190 seg: 2 13 635000 0 0
\r
4191 vtx: 3 -534035000 476250000 11 0 0 0 0
\r
4192 connect: 15 18 14 2 0
\r
4193 vtx: 1 -548005000 478790000 11 0 0 0 0
\r
4194 seg: 1 12 635000 0 0
\r
4195 vtx: 2 -545465000 476250000 0 0 0 0 0
\r
4196 seg: 2 12 635000 0 0
\r
4197 vtx: 3 -534035000 476250000 11 0 0 0 0
\r
4198 connect: 16 16 15 2 0
\r
4199 vtx: 1 -512445000 476250000 11 0 0 0 0
\r
4200 seg: 1 13 635000 0 0
\r
4201 vtx: 2 -523875000 476250000 0 0 0 0 0
\r
4202 seg: 2 13 635000 0 0
\r
4203 vtx: 3 -526415000 478790000 11 0 0 0 0
\r
4204 connect: 17 17 16 2 0
\r
4205 vtx: 1 -504825000 478790000 11 0 0 0 0
\r
4206 seg: 1 12 635000 0 0
\r
4207 vtx: 2 -507365000 476250000 0 0 0 0 0
\r
4208 seg: 2 12 635000 0 0
\r
4209 vtx: 3 -512445000 476250000 11 0 0 0 0
\r
4210 connect: 18 9 -1 3 0
\r
4211 vtx: 1 -506095000 529590000 11 0 0 0 0
\r
4212 seg: 1 13 635000 0 0
\r
4213 vtx: 2 -507561596 531056596 0 0 0 0 0
\r
4214 seg: 2 13 635000 0 0
\r
4215 vtx: 3 -514731508 531056596 0 0 0 0 0
\r
4216 seg: 3 13 635000 0 0
\r
4217 vtx: 4 -515176770 530611588 0 0 0 0 11452
\r
4218 connect: 19 4 -1 2 0
\r
4219 vtx: 1 -467995000 476250000 11 0 0 0 0
\r
4220 seg: 1 12 635000 0 0
\r
4221 vtx: 2 -468644478 476250000 0 0 0 0 0
\r
4222 seg: 2 12 635000 0 0
\r
4223 vtx: 3 -469458040 477063562 0 0 0 0 29314
\r
4225 net: "Xff$XSlave$XXlatch$NI" 2 1 0 0 0 0 1
\r
4226 pin: 1 IC_3_CD4007_1.4
\r
4227 pin: 2 IC_3_CD4007_1.8
\r
4228 connect: 1 1 0 1 0
\r
4229 vtx: 1 -483235000 514350000 11 0 0 0 0
\r
4230 seg: 1 13 254000 0 0
\r
4231 vtx: 2 -490855000 521970000 11 0 0 0 0
\r
4233 net: "Xff$XMaster$_D" 3 2 0 0 0 0 1
\r
4234 pin: 1 IC_1_CD4007_1.6
\r
4237 connect: 1 2 0 3 0
\r
4238 vtx: 1 -518795000 516890000 11 0 0 0 0
\r
4239 seg: 1 12 254000 0 0
\r
4240 vtx: 2 -522795500 512889500 0 0 0 0 0
\r
4241 seg: 2 12 254000 0 0
\r
4242 vtx: 3 -530034500 512889500 0 0 0 0 0
\r
4243 seg: 3 12 254000 0 0
\r
4244 vtx: 4 -534035000 516890000 11 0 0 0 0
\r
4245 connect: 2 2 1 2 0
\r
4246 vtx: 1 -518795000 516890000 11 0 0 0 0
\r
4247 seg: 1 13 254000 0 0
\r
4248 vtx: 2 -518795000 506730000 0 0 0 0 0
\r
4249 seg: 2 13 254000 0 0
\r
4250 vtx: 3 -521335000 504190000 11 0 0 0 0
\r
4252 net: "Xff$XSlave$_D" 3 2 0 0 0 0 1
\r
4253 pin: 1 IC_7_CD4007_1.6
\r
4256 connect: 1 2 0 5 0
\r
4257 vtx: 1 -520065000 496570000 11 0 0 0 0
\r
4258 seg: 1 13 254000 0 0
\r
4259 vtx: 2 -517880600 494385600 0 0 0 0 0
\r
4260 seg: 2 13 254000 0 0
\r
4261 vtx: 3 -517880600 482243384 0 0 711200 355600 0
\r
4262 seg: 3 12 254000 0 0
\r
4263 vtx: 4 -515073138 479435922 0 0 0 0 0
\r
4264 seg: 4 12 254000 0 0
\r
4265 vtx: 5 -515073138 468718138 0 0 0 0 0
\r
4266 seg: 5 12 254000 0 0
\r
4267 vtx: 6 -512445000 466090000 11 0 0 0 0
\r
4268 connect: 2 2 1 3 0
\r
4269 vtx: 1 -520065000 496570000 11 0 0 0 0
\r
4270 seg: 1 12 254000 0 0
\r
4271 vtx: 2 -516823198 493328198 0 0 0 0 0
\r
4272 seg: 2 12 254000 0 0
\r
4273 vtx: 3 -495233198 493328198 0 0 0 0 0
\r
4274 seg: 3 12 254000 0 0
\r
4275 vtx: 4 -490855000 488950000 11 0 0 0 0
\r
4277 net: "$G_Vdd_$G1_$G2" 20 19 0 0 0 0 1
\r
4278 pin: 1 IC_0_CD4007_3.2
\r
4279 pin: 2 IC_0_CD4007_3.14
\r
4280 pin: 3 IC_6_CD4007_3.2
\r
4281 pin: 4 IC_6_CD4007_3.14
\r
4282 pin: 5 IC_5_CD4007_3.2
\r
4283 pin: 6 IC_5_CD4007_3.14
\r
4284 pin: 7 IC_1_CD4007_3.2
\r
4285 pin: 8 IC_1_CD4007_3.14
\r
4286 pin: 9 IC_2_CD4007_3.2
\r
4287 pin: 10 IC_2_CD4007_3.14
\r
4288 pin: 11 IC_3_CD4007_3.2
\r
4289 pin: 12 IC_3_CD4007_3.14
\r
4290 pin: 13 IC_4_CD4007_3.2
\r
4291 pin: 14 IC_4_CD4007_3.14
\r
4292 pin: 15 IC_8_CD4007_3.2
\r
4293 pin: 16 IC_8_CD4007_3.14
\r
4294 pin: 17 IC_7_CD4007_3.2
\r
4295 pin: 18 IC_7_CD4007_3.14
\r
4296 pin: 19 X_IC_9_CD4007_3.14
\r
4298 connect: 1 1 0 2 0
\r
4299 vtx: 1 -446405000 529590000 11 0 0 0 0
\r
4300 seg: 1 12 254000 0 0
\r
4301 vtx: 2 -448945000 527050000 0 0 0 0 0
\r
4302 seg: 2 12 254000 0 0
\r
4303 vtx: 3 -454025000 527050000 11 0 0 0 0
\r
4304 connect: 2 6 1 2 0
\r
4305 vtx: 1 -432435000 527050000 11 0 0 0 0
\r
4306 seg: 1 12 254000 0 0
\r
4307 vtx: 2 -443865000 527050000 0 0 0 0 0
\r
4308 seg: 2 12 254000 0 0
\r
4309 vtx: 3 -446405000 529590000 11 0 0 0 0
\r
4310 connect: 3 3 2 2 0
\r
4311 vtx: 1 -380365000 478790000 11 0 0 0 0
\r
4312 seg: 1 12 254000 0 0
\r
4313 vtx: 2 -382905000 476250000 0 0 0 0 0
\r
4314 seg: 2 12 254000 0 0
\r
4315 vtx: 3 -387985000 476250000 11 0 0 0 0
\r
4316 connect: 4 17 2 2 0
\r
4317 vtx: 1 -403225000 478790000 11 0 0 0 0
\r
4318 seg: 1 12 254000 0 0
\r
4319 vtx: 2 -400685000 476250000 0 0 0 0 0
\r
4320 seg: 2 12 254000 0 0
\r
4321 vtx: 3 -387985000 476250000 11 0 0 0 0
\r
4322 connect: 5 5 3 6 0
\r
4323 vtx: 1 -358775000 478790000 11 0 0 0 0
\r
4324 seg: 1 12 254000 0 0
\r
4325 vtx: 2 -360237532 480252532 0 0 0 0 0
\r
4326 seg: 2 12 254000 0 0
\r
4327 vtx: 3 -367417858 480252532 0 0 0 0 0
\r
4328 seg: 3 12 254000 0 0
\r
4329 vtx: 4 -367858040 479812350 0 0 0 0 0
\r
4330 seg: 4 12 254000 0 0
\r
4331 vtx: 5 -367858040 477063562 0 0 0 0 161
\r
4332 seg: 5 12 254000 0 0
\r
4333 vtx: 6 -378638562 477063562 0 0 0 0 0
\r
4334 seg: 6 12 254000 0 0
\r
4335 vtx: 7 -380365000 478790000 11 0 0 0 0
\r
4336 connect: 6 19 4 4 0
\r
4337 vtx: 1 -367030000 495300000 11 0 0 0 0
\r
4338 seg: 1 13 254000 0 0
\r
4339 vtx: 2 -367030000 493903000 0 0 0 0 0
\r
4340 seg: 2 13 254000 0 0
\r
4341 vtx: 3 -364934500 491807500 0 0 0 0 0
\r
4342 seg: 3 13 254000 0 0
\r
4343 vtx: 4 -364934500 477710500 0 0 0 0 0
\r
4344 seg: 4 13 254000 0 0
\r
4345 vtx: 5 -366395000 476250000 11 0 0 0 0
\r
4346 connect: 7 13 5 3 0
\r
4347 vtx: 1 -358775000 529590000 11 0 0 0 0
\r
4348 seg: 1 13 254000 0 0
\r
4349 vtx: 2 -357116126 527931126 0 0 0 0 0
\r
4350 seg: 2 13 254000 0 0
\r
4351 vtx: 3 -357116126 480448874 0 0 0 0 0
\r
4352 seg: 3 13 254000 0 0
\r
4353 vtx: 4 -358775000 478790000 11 0 0 0 0
\r
4354 connect: 8 7 6 2 0
\r
4355 vtx: 1 -424815000 529590000 11 0 0 0 0
\r
4356 seg: 1 12 254000 0 0
\r
4357 vtx: 2 -429895000 529590000 0 0 0 0 0
\r
4358 seg: 2 12 254000 0 0
\r
4359 vtx: 3 -432435000 527050000 11 0 0 0 0
\r
4360 connect: 9 8 7 5 0
\r
4361 vtx: 1 -412115000 527050000 11 0 0 0 0
\r
4362 seg: 1 13 254000 0 0
\r
4363 vtx: 2 -413576770 528511770 0 0 0 0 0
\r
4364 seg: 2 13 254000 0 0
\r
4365 vtx: 3 -413576770 530611588 0 0 0 0 14021
\r
4366 seg: 3 13 254000 0 0
\r
4367 vtx: 4 -414279080 531314152 0 0 0 0 0
\r
4368 seg: 4 13 254000 0 0
\r
4369 vtx: 5 -423090848 531314152 0 0 0 0 0
\r
4370 seg: 5 13 254000 0 0
\r
4371 vtx: 6 -424815000 529590000 11 0 0 0 0
\r
4372 connect: 10 10 9 2 0
\r
4373 vtx: 1 -389255000 527050000 11 0 0 0 0
\r
4374 seg: 1 12 254000 0 0
\r
4375 vtx: 2 -401955000 527050000 0 0 0 0 0
\r
4376 seg: 2 12 254000 0 0
\r
4377 vtx: 3 -404495000 529590000 11 0 0 0 0
\r
4378 connect: 11 11 10 2 0
\r
4379 vtx: 1 -381635000 529590000 11 0 0 0 0
\r
4380 seg: 1 13 254000 0 0
\r
4381 vtx: 2 -384175000 527050000 0 0 0 0 0
\r
4382 seg: 2 13 254000 0 0
\r
4383 vtx: 3 -389255000 527050000 11 0 0 0 0
\r
4384 connect: 12 12 11 2 0
\r
4385 vtx: 1 -366395000 527050000 11 0 0 0 0
\r
4386 seg: 1 12 254000 0 0
\r
4387 vtx: 2 -379095000 527050000 0 0 0 0 0
\r
4388 seg: 2 12 254000 0 0
\r
4389 vtx: 3 -381635000 529590000 11 0 0 0 0
\r
4390 connect: 13 13 12 2 0
\r
4391 vtx: 1 -358775000 529590000 11 0 0 0 0
\r
4392 seg: 1 12 254000 0 0
\r
4393 vtx: 2 -361315000 527050000 0 0 0 0 0
\r
4394 seg: 2 12 254000 0 0
\r
4395 vtx: 3 -366395000 527050000 11 0 0 0 0
\r
4396 connect: 14 15 14 2 0
\r
4397 vtx: 1 -424815000 478790000 11 0 0 0 0
\r
4398 seg: 1 13 254000 0 0
\r
4399 vtx: 2 -429895000 478790000 0 0 0 0 0
\r
4400 seg: 2 13 254000 0 0
\r
4401 vtx: 3 -432435000 476250000 11 0 0 0 0
\r
4402 connect: 15 18 14 2 0
\r
4403 vtx: 1 -446405000 478790000 11 0 0 0 0
\r
4404 seg: 1 12 254000 0 0
\r
4405 vtx: 2 -443865000 476250000 0 0 0 0 0
\r
4406 seg: 2 12 254000 0 0
\r
4407 vtx: 3 -432435000 476250000 11 0 0 0 0
\r
4408 connect: 16 16 15 2 0
\r
4409 vtx: 1 -410845000 476250000 11 0 0 0 0
\r
4410 seg: 1 13 254000 0 0
\r
4411 vtx: 2 -422275000 476250000 0 0 0 0 0
\r
4412 seg: 2 13 254000 0 0
\r
4413 vtx: 3 -424815000 478790000 11 0 0 0 0
\r
4414 connect: 17 17 16 2 0
\r
4415 vtx: 1 -403225000 478790000 11 0 0 0 0
\r
4416 seg: 1 12 254000 0 0
\r
4417 vtx: 2 -405765000 476250000 0 0 0 0 0
\r
4418 seg: 2 12 254000 0 0
\r
4419 vtx: 3 -410845000 476250000 11 0 0 0 0
\r
4420 connect: 18 9 -1 3 0
\r
4421 vtx: 1 -404495000 529590000 11 0 0 0 0
\r
4422 seg: 1 13 254000 0 0
\r
4423 vtx: 2 -405961596 531056596 0 0 0 0 0
\r
4424 seg: 2 13 254000 0 0
\r
4425 vtx: 3 -413131508 531056596 0 0 0 0 0
\r
4426 seg: 3 13 254000 0 0
\r
4427 vtx: 4 -413576770 530611588 0 0 0 0 14021
\r
4428 connect: 19 4 -1 2 0
\r
4429 vtx: 1 -366395000 476250000 11 0 0 0 0
\r
4430 seg: 1 12 254000 0 0
\r
4431 vtx: 2 -367044478 476250000 0 0 0 0 0
\r
4432 seg: 2 12 254000 0 0
\r
4433 vtx: 3 -367858040 477063562 0 0 0 0 161
\r
4435 net: "CLK_$G1_$G3" 4 3 0 0 0 0 1
\r
4436 pin: 1 IC_8_CD4007_4.6
\r
4437 pin: 2 IC_7_CD4007_4.3
\r
4438 pin: 3 X_IC_9_CD4007_4.6
\r
4440 connect: 1 1 0 5 0
\r
4441 vtx: 1 -410845000 397510000 11 0 0 0 0
\r
4442 seg: 1 13 254000 0 0
\r
4443 vtx: 2 -414793684 393561316 0 0 0 0 0
\r
4444 seg: 2 13 254000 0 0
\r
4445 vtx: 3 -414793684 391135108 0 0 0 0 0
\r
4446 seg: 3 13 254000 0 0
\r
4447 vtx: 4 -420042086 385886706 0 0 0 0 0
\r
4448 seg: 4 13 254000 0 0
\r
4449 vtx: 5 -428431706 385886706 0 0 0 0 0
\r
4450 seg: 5 13 254000 0 0
\r
4451 vtx: 6 -432435000 389890000 11 0 0 0 0
\r
4452 connect: 2 2 0 3 0
\r
4453 vtx: 1 -454025000 389890000 11 0 0 0 0
\r
4454 seg: 1 12 254000 0 0
\r
4455 vtx: 2 -450023738 385888992 0 0 0 0 0
\r
4456 seg: 2 12 254000 0 0
\r
4457 vtx: 3 -436436008 385888992 0 0 0 0 0
\r
4458 seg: 3 12 254000 0 0
\r
4459 vtx: 4 -432435000 389890000 11 0 0 0 0
\r
4460 connect: 3 3 1 7 0
\r
4461 vtx: 1 -361950000 419100000 11 0 0 0 0
\r
4462 seg: 1 12 254000 0 0
\r
4463 vtx: 2 -366270540 414779460 0 0 0 0 0
\r
4464 seg: 2 12 254000 0 0
\r
4465 vtx: 3 -379617478 414779460 0 0 0 0 0
\r
4466 seg: 3 12 254000 0 0
\r
4467 vtx: 4 -387744462 406652476 0 0 0 0 0
\r
4468 seg: 4 12 254000 0 0
\r
4469 vtx: 5 -409260040 406652476 0 0 0 0 0
\r
4470 seg: 5 12 254000 0 0
\r
4471 vtx: 6 -412316168 403596348 0 0 0 0 0
\r
4472 seg: 6 12 254000 0 0
\r
4473 vtx: 7 -412316168 398981168 0 0 0 0 0
\r
4474 seg: 7 12 254000 0 0
\r
4475 vtx: 8 -410845000 397510000 11 0 0 0 0
\r
4477 net: "0" 6 5 0 0 0 0 1
\r
4484 connect: 1 1 0 1 0
\r
4485 vtx: 1 -475615000 381635000 11 0 0 0 0
\r
4486 seg: 1 13 254000 0 0
\r
4487 vtx: 2 -478155000 381635000 11 0 0 0 0
\r
4488 connect: 2 5 2 1 0
\r
4489 vtx: 1 -478155000 379095000 11 0 0 0 0
\r
4490 seg: 1 13 254000 0 0
\r
4491 vtx: 2 -475615000 379095000 11 0 0 0 0
\r
4492 connect: 3 2 1 1 0
\r
4493 vtx: 1 -475615000 379095000 11 0 0 0 0
\r
4494 seg: 1 13 254000 0 0
\r
4495 vtx: 2 -475615000 381635000 11 0 0 0 0
\r
4496 connect: 4 4 3 1 0
\r
4497 vtx: 1 -452755000 379095000 11 0 0 0 0
\r
4498 seg: 1 13 254000 0 0
\r
4499 vtx: 2 -452755000 381635000 11 0 0 0 0
\r
4500 connect: 5 3 1 3 0
\r
4501 vtx: 1 -452755000 381635000 11 0 0 0 0
\r
4502 seg: 1 13 254000 0 0
\r
4503 vtx: 2 -452755000 382905000 0 0 0 0 0
\r
4504 seg: 2 13 254000 0 0
\r
4505 vtx: 3 -474345000 382905000 0 0 0 0 0
\r
4506 seg: 3 13 254000 0 0
\r
4507 vtx: 4 -475615000 381635000 11 0 0 0 0
\r
4509 net: "Xff$between" 5 4 0 0 0 0 1
\r
4510 pin: 1 IC_6_CD4007_1.3
\r
4511 pin: 2 IC_2_CD4007_1.3
\r
4512 pin: 3 IC_8_CD4007_1.3
\r
4515 connect: 1 4 0 3 0
\r
4516 vtx: 1 -507365000 488950000 11 0 0 0 0
\r
4517 seg: 1 13 254000 0 0
\r
4518 vtx: 2 -507365000 485255062 0 0 0 0 0
\r
4519 seg: 2 13 254000 0 0
\r
4520 vtx: 3 -495819938 473710000 0 0 0 0 0
\r
4521 seg: 3 13 254000 0 0
\r
4522 vtx: 4 -489585000 473710000 11 0 0 0 0
\r
4523 connect: 2 3 1 10 0
\r
4524 vtx: 1 -555625000 504190000 11 0 0 0 0
\r
4525 seg: 1 13 254000 0 0
\r
4526 vtx: 2 -555625000 499220744 0 0 0 0 0
\r
4527 seg: 2 13 254000 0 0
\r
4528 vtx: 3 -543631120 487226864 0 0 0 0 0
\r
4529 seg: 3 13 254000 0 0
\r
4530 vtx: 4 -541352740 487226864 0 0 0 0 11363
\r
4531 seg: 4 13 254000 0 0
\r
4532 vtx: 5 -541352740 487879898 0 0 0 0 0
\r
4533 seg: 5 13 254000 0 0
\r
4534 vtx: 6 -538428692 490803692 0 0 0 0 0
\r
4535 seg: 6 13 254000 0 0
\r
4536 vtx: 7 -530911308 490803692 0 0 0 0 0
\r
4537 seg: 7 13 254000 0 0
\r
4538 vtx: 8 -523240254 498474746 0 0 0 0 0
\r
4539 seg: 8 13 254000 0 0
\r
4540 vtx: 9 -512236974 498474746 0 0 0 0 3960
\r
4541 seg: 9 13 254000 0 0
\r
4542 vtx: 10 -512236974 523031974 0 0 0 0 0
\r
4543 seg: 10 13 254000 0 0
\r
4544 vtx: 11 -513715000 524510000 11 0 0 0 0
\r
4545 connect: 3 4 -1 3 0
\r
4546 vtx: 1 -507365000 488950000 11 0 0 0 0
\r
4547 seg: 1 13 254000 0 0
\r
4548 vtx: 2 -507365000 493928146 0 0 0 0 0
\r
4549 seg: 2 13 254000 0 0
\r
4550 vtx: 3 -511911346 498474746 0 0 0 0 0
\r
4551 seg: 3 13 254000 0 0
\r
4552 vtx: 4 -512236974 498474746 0 0 0 0 3960
\r
4553 connect: 4 2 -1 3 0
\r
4554 vtx: 1 -534035000 473710000 11 0 0 0 0
\r
4555 seg: 1 13 254000 0 0
\r
4556 vtx: 2 -536926028 476601028 0 0 0 0 0
\r
4557 seg: 2 13 254000 0 0
\r
4558 vtx: 3 -536926028 482800152 0 0 0 0 0
\r
4559 seg: 3 13 254000 0 0
\r
4560 vtx: 4 -541352740 487226864 0 0 0 0 11363
\r
4562 net: "Xff$XMaster$XXgatebot$NI_$G1" 2 1 0 0 0 0 1
\r
4563 pin: 1 IC_1_CD4007_2.4
\r
4564 pin: 2 IC_1_CD4007_2.8
\r
4565 connect: 1 1 0 1 0
\r
4566 vtx: 1 -526415000 438150000 11 0 0 0 0
\r
4567 seg: 1 12 254000 0 0
\r
4568 vtx: 2 -534035000 445770000 11 0 0 0 0
\r
4570 net: "Xff$XMaster$_Q_storage_$G1" 3 2 0 0 0 0 1
\r
4571 pin: 1 IC_6_CD4007_2.6
\r
4574 connect: 1 2 0 7 0
\r
4575 vtx: 1 -537845000 427990000 11 0 0 0 0
\r
4576 seg: 1 12 254000 0 0
\r
4577 vtx: 2 -530911308 421056308 0 0 0 0 0
\r
4578 seg: 2 12 254000 0 0
\r
4579 vtx: 3 -530911308 414811464 0 0 0 0 0
\r
4580 seg: 3 12 254000 0 0
\r
4581 vtx: 4 -526243296 410143452 0 0 0 0 0
\r
4582 seg: 4 12 254000 0 0
\r
4583 vtx: 5 -510886202 410143452 0 0 0 0 0
\r
4584 seg: 5 12 254000 0 0
\r
4585 vtx: 6 -510717800 410311854 0 0 711200 355600 0
\r
4586 seg: 6 13 254000 0 0
\r
4587 vtx: 7 -510006854 410311854 0 0 0 0 0
\r
4588 seg: 7 13 254000 0 0
\r
4589 vtx: 8 -489585000 389890000 11 0 0 0 0
\r
4590 connect: 2 2 1 2 0
\r
4591 vtx: 1 -537845000 427990000 11 0 0 0 0
\r
4592 seg: 1 13 254000 0 0
\r
4593 vtx: 2 -537845000 438150000 0 0 0 0 0
\r
4594 seg: 2 13 254000 0 0
\r
4595 vtx: 3 -540385000 440690000 11 0 0 0 0
\r
4597 net: "$G_Vdd_$G1" 20 19 0 0 0 0 1
\r
4598 pin: 1 IC_0_CD4007_2.2
\r
4599 pin: 2 IC_0_CD4007_2.14
\r
4600 pin: 3 IC_6_CD4007_2.2
\r
4601 pin: 4 IC_6_CD4007_2.14
\r
4602 pin: 5 IC_5_CD4007_2.2
\r
4603 pin: 6 IC_5_CD4007_2.14
\r
4604 pin: 7 IC_1_CD4007_2.2
\r
4605 pin: 8 IC_1_CD4007_2.14
\r
4606 pin: 9 IC_2_CD4007_2.2
\r
4607 pin: 10 IC_2_CD4007_2.14
\r
4608 pin: 11 IC_3_CD4007_2.2
\r
4609 pin: 12 IC_3_CD4007_2.14
\r
4610 pin: 13 IC_4_CD4007_2.2
\r
4611 pin: 14 IC_4_CD4007_2.14
\r
4612 pin: 15 IC_8_CD4007_2.2
\r
4613 pin: 16 IC_8_CD4007_2.14
\r
4614 pin: 17 IC_7_CD4007_2.2
\r
4615 pin: 18 IC_7_CD4007_2.14
\r
4616 pin: 19 X_IC_9_CD4007_2.14
\r
4618 connect: 1 1 0 2 0
\r
4619 vtx: 1 -548005000 453390000 11 0 0 0 0
\r
4620 seg: 1 12 254000 0 0
\r
4621 vtx: 2 -550545000 450850000 0 0 0 0 0
\r
4622 seg: 2 12 254000 0 0
\r
4623 vtx: 3 -555625000 450850000 11 0 0 0 0
\r
4624 connect: 2 6 1 2 0
\r
4625 vtx: 1 -534035000 450850000 11 0 0 0 0
\r
4626 seg: 1 12 254000 0 0
\r
4627 vtx: 2 -545465000 450850000 0 0 0 0 0
\r
4628 seg: 2 12 254000 0 0
\r
4629 vtx: 3 -548005000 453390000 11 0 0 0 0
\r
4630 connect: 3 3 2 2 0
\r
4631 vtx: 1 -481965000 402590000 11 0 0 0 0
\r
4632 seg: 1 12 254000 0 0
\r
4633 vtx: 2 -484505000 400050000 0 0 0 0 0
\r
4634 seg: 2 12 254000 0 0
\r
4635 vtx: 3 -489585000 400050000 11 0 0 0 0
\r
4636 connect: 4 17 2 2 0
\r
4637 vtx: 1 -504825000 402590000 11 0 0 0 0
\r
4638 seg: 1 12 254000 0 0
\r
4639 vtx: 2 -502285000 400050000 0 0 0 0 0
\r
4640 seg: 2 12 254000 0 0
\r
4641 vtx: 3 -489585000 400050000 11 0 0 0 0
\r
4642 connect: 5 5 3 6 0
\r
4643 vtx: 1 -460375000 402590000 11 0 0 0 0
\r
4644 seg: 1 12 254000 0 0
\r
4645 vtx: 2 -461837532 404052532 0 0 0 0 0
\r
4646 seg: 2 12 254000 0 0
\r
4647 vtx: 3 -469017858 404052532 0 0 0 0 0
\r
4648 seg: 3 12 254000 0 0
\r
4649 vtx: 4 -469458040 403612350 0 0 0 0 0
\r
4650 seg: 4 12 254000 0 0
\r
4651 vtx: 5 -469458040 400863562 0 0 0 0 6304
\r
4652 seg: 5 12 254000 0 0
\r
4653 vtx: 6 -480238562 400863562 0 0 0 0 0
\r
4654 seg: 6 12 254000 0 0
\r
4655 vtx: 7 -481965000 402590000 11 0 0 0 0
\r
4656 connect: 6 19 4 4 0
\r
4657 vtx: 1 -468630000 419100000 11 0 0 0 0
\r
4658 seg: 1 13 254000 0 0
\r
4659 vtx: 2 -468630000 417703000 0 0 0 0 0
\r
4660 seg: 2 13 254000 0 0
\r
4661 vtx: 3 -466534500 415607500 0 0 0 0 0
\r
4662 seg: 3 13 254000 0 0
\r
4663 vtx: 4 -466534500 401510500 0 0 0 0 0
\r
4664 seg: 4 13 254000 0 0
\r
4665 vtx: 5 -467995000 400050000 11 0 0 0 0
\r
4666 connect: 7 13 5 3 0
\r
4667 vtx: 1 -460375000 453390000 11 0 0 0 0
\r
4668 seg: 1 13 254000 0 0
\r
4669 vtx: 2 -458716126 451731126 0 0 0 0 0
\r
4670 seg: 2 13 254000 0 0
\r
4671 vtx: 3 -458716126 404248874 0 0 0 0 0
\r
4672 seg: 3 13 254000 0 0
\r
4673 vtx: 4 -460375000 402590000 11 0 0 0 0
\r
4674 connect: 8 7 6 2 0
\r
4675 vtx: 1 -526415000 453390000 11 0 0 0 0
\r
4676 seg: 1 12 254000 0 0
\r
4677 vtx: 2 -531495000 453390000 0 0 0 0 0
\r
4678 seg: 2 12 254000 0 0
\r
4679 vtx: 3 -534035000 450850000 11 0 0 0 0
\r
4680 connect: 9 8 7 5 0
\r
4681 vtx: 1 -513715000 450850000 11 0 0 0 0
\r
4682 seg: 1 13 254000 0 0
\r
4683 vtx: 2 -515176770 452311770 0 0 0 0 0
\r
4684 seg: 2 13 254000 0 0
\r
4685 vtx: 3 -515176770 454411588 0 0 0 0 5607
\r
4686 seg: 3 13 254000 0 0
\r
4687 vtx: 4 -515879080 455114152 0 0 0 0 0
\r
4688 seg: 4 13 254000 0 0
\r
4689 vtx: 5 -524690848 455114152 0 0 0 0 0
\r
4690 seg: 5 13 254000 0 0
\r
4691 vtx: 6 -526415000 453390000 11 0 0 0 0
\r
4692 connect: 10 10 9 2 0
\r
4693 vtx: 1 -490855000 450850000 11 0 0 0 0
\r
4694 seg: 1 12 254000 0 0
\r
4695 vtx: 2 -503555000 450850000 0 0 0 0 0
\r
4696 seg: 2 12 254000 0 0
\r
4697 vtx: 3 -506095000 453390000 11 0 0 0 0
\r
4698 connect: 11 11 10 2 0
\r
4699 vtx: 1 -483235000 453390000 11 0 0 0 0
\r
4700 seg: 1 13 254000 0 0
\r
4701 vtx: 2 -485775000 450850000 0 0 0 0 0
\r
4702 seg: 2 13 254000 0 0
\r
4703 vtx: 3 -490855000 450850000 11 0 0 0 0
\r
4704 connect: 12 12 11 2 0
\r
4705 vtx: 1 -467995000 450850000 11 0 0 0 0
\r
4706 seg: 1 12 254000 0 0
\r
4707 vtx: 2 -480695000 450850000 0 0 0 0 0
\r
4708 seg: 2 12 254000 0 0
\r
4709 vtx: 3 -483235000 453390000 11 0 0 0 0
\r
4710 connect: 13 13 12 2 0
\r
4711 vtx: 1 -460375000 453390000 11 0 0 0 0
\r
4712 seg: 1 12 254000 0 0
\r
4713 vtx: 2 -462915000 450850000 0 0 0 0 0
\r
4714 seg: 2 12 254000 0 0
\r
4715 vtx: 3 -467995000 450850000 11 0 0 0 0
\r
4716 connect: 14 15 14 2 0
\r
4717 vtx: 1 -526415000 402590000 11 0 0 0 0
\r
4718 seg: 1 13 254000 0 0
\r
4719 vtx: 2 -531495000 402590000 0 0 0 0 0
\r
4720 seg: 2 13 254000 0 0
\r
4721 vtx: 3 -534035000 400050000 11 0 0 0 0
\r
4722 connect: 15 18 14 2 0
\r
4723 vtx: 1 -548005000 402590000 11 0 0 0 0
\r
4724 seg: 1 12 254000 0 0
\r
4725 vtx: 2 -545465000 400050000 0 0 0 0 0
\r
4726 seg: 2 12 254000 0 0
\r
4727 vtx: 3 -534035000 400050000 11 0 0 0 0
\r
4728 connect: 16 16 15 2 0
\r
4729 vtx: 1 -512445000 400050000 11 0 0 0 0
\r
4730 seg: 1 13 254000 0 0
\r
4731 vtx: 2 -523875000 400050000 0 0 0 0 0
\r
4732 seg: 2 13 254000 0 0
\r
4733 vtx: 3 -526415000 402590000 11 0 0 0 0
\r
4734 connect: 17 17 16 2 0
\r
4735 vtx: 1 -504825000 402590000 11 0 0 0 0
\r
4736 seg: 1 12 254000 0 0
\r
4737 vtx: 2 -507365000 400050000 0 0 0 0 0
\r
4738 seg: 2 12 254000 0 0
\r
4739 vtx: 3 -512445000 400050000 11 0 0 0 0
\r
4740 connect: 18 9 -1 3 0
\r
4741 vtx: 1 -506095000 453390000 11 0 0 0 0
\r
4742 seg: 1 13 254000 0 0
\r
4743 vtx: 2 -507561596 454856596 0 0 0 0 0
\r
4744 seg: 2 13 254000 0 0
\r
4745 vtx: 3 -514731508 454856596 0 0 0 0 0
\r
4746 seg: 3 13 254000 0 0
\r
4747 vtx: 4 -515176770 454411588 0 0 0 0 5607
\r
4748 connect: 19 4 -1 2 0
\r
4749 vtx: 1 -467995000 400050000 11 0 0 0 0
\r
4750 seg: 1 12 254000 0 0
\r
4751 vtx: 2 -468644478 400050000 0 0 0 0 0
\r
4752 seg: 2 12 254000 0 0
\r
4753 vtx: 3 -469458040 400863562 0 0 0 0 6304
\r
4755 net: "$G_Vss_$G1" 12 11 0 0 0 0 1
\r
4756 pin: 1 IC_0_CD4007_2.7
\r
4757 pin: 2 IC_6_CD4007_2.7
\r
4758 pin: 3 IC_5_CD4007_2.7
\r
4759 pin: 4 IC_1_CD4007_2.7
\r
4760 pin: 5 IC_2_CD4007_2.4
\r
4761 pin: 6 IC_2_CD4007_2.7
\r
4762 pin: 7 IC_3_CD4007_2.7
\r
4763 pin: 8 IC_4_CD4007_2.7
\r
4764 pin: 9 IC_8_CD4007_2.7
\r
4765 pin: 10 IC_7_CD4007_2.7
\r
4766 pin: 11 X_IC_9_CD4007_2.7
\r
4768 connect: 1 3 0 5 0
\r
4769 vtx: 1 -534035000 438150000 11 0 0 0 0
\r
4770 seg: 1 13 254000 0 0
\r
4771 vtx: 2 -538293310 442408310 0 0 0 0 0
\r
4772 seg: 2 13 254000 0 0
\r
4773 vtx: 3 -541610550 442408310 0 0 0 0 0
\r
4774 seg: 3 13 254000 0 0
\r
4775 vtx: 4 -547330122 436688992 0 0 0 0 0
\r
4776 seg: 4 13 254000 0 0
\r
4777 vtx: 5 -554163738 436688992 0 0 0 0 0
\r
4778 seg: 5 13 254000 0 0
\r
4779 vtx: 6 -555625000 438150000 11 0 0 0 0
\r
4780 connect: 2 7 1 14 0
\r
4781 vtx: 1 -467995000 438150000 11 0 0 0 0
\r
4782 seg: 1 13 254000 0 0
\r
4783 vtx: 2 -474325188 431819812 0 0 0 0 0
\r
4784 seg: 2 13 254000 0 0
\r
4785 vtx: 3 -474792548 431819812 0 0 0 0 13231
\r
4786 seg: 3 13 254000 0 0
\r
4787 vtx: 4 -474792548 427270926 0 0 0 0 0
\r
4788 seg: 4 13 254000 0 0
\r
4789 vtx: 5 -474241876 426720254 0 0 0 0 27884
\r
4790 seg: 5 13 254000 0 0
\r
4791 vtx: 6 -479869754 421092630 0 0 0 0 0
\r
4792 seg: 6 13 254000 0 0
\r
4793 vtx: 7 -479869754 413099504 0 0 0 0 0
\r
4794 seg: 7 13 254000 0 0
\r
4795 vtx: 8 -473895928 407125678 0 0 0 0 0
\r
4796 seg: 8 13 254000 0 0
\r
4797 vtx: 9 -473895928 392436604 0 0 0 0 20262
\r
4798 seg: 9 13 254000 0 0
\r
4799 vtx: 10 -475496128 392436604 0 0 0 0 0
\r
4800 seg: 10 13 254000 0 0
\r
4801 vtx: 11 -477560386 390372346 0 0 0 0 0
\r
4802 seg: 11 13 254000 0 0
\r
4803 vtx: 12 -477560386 389689086 0 0 0 0 0
\r
4804 seg: 12 13 254000 0 0
\r
4805 vtx: 13 -481369624 385879848 0 0 0 0 0
\r
4806 seg: 13 13 254000 0 0
\r
4807 vtx: 14 -488114848 385879848 0 0 0 0 0
\r
4808 seg: 14 13 254000 0 0
\r
4809 vtx: 15 -489585000 387350000 11 0 0 0 0
\r
4810 connect: 3 9 1 3 0
\r
4811 vtx: 1 -512445000 387350000 11 0 0 0 0
\r
4812 seg: 1 12 254000 0 0
\r
4813 vtx: 2 -510982468 385887468 0 0 0 0 0
\r
4814 seg: 2 12 254000 0 0
\r
4815 vtx: 3 -491047532 385887468 0 0 0 0 0
\r
4816 seg: 3 12 254000 0 0
\r
4817 vtx: 4 -489585000 387350000 11 0 0 0 0
\r
4818 connect: 4 5 3 3 0
\r
4819 vtx: 1 -513715000 438150000 11 0 0 0 0
\r
4820 seg: 1 12 254000 0 0
\r
4821 vtx: 2 -516066024 435798976 0 0 0 0 0
\r
4822 seg: 2 12 254000 0 0
\r
4823 vtx: 3 -531683976 435798976 0 0 0 0 0
\r
4824 seg: 3 12 254000 0 0
\r
4825 vtx: 4 -534035000 438150000 11 0 0 0 0
\r
4826 connect: 5 5 4 5 0
\r
4827 vtx: 1 -513715000 438150000 11 0 0 0 0
\r
4828 seg: 1 12 254000 0 0
\r
4829 vtx: 2 -515194804 439629804 0 0 0 0 0
\r
4830 seg: 2 12 254000 0 0
\r
4831 vtx: 3 -515194804 443842140 0 0 0 0 0
\r
4832 seg: 3 12 254000 0 0
\r
4833 vtx: 4 -513727192 445309752 0 0 0 0 28059
\r
4834 seg: 4 12 254000 0 0
\r
4835 vtx: 5 -513715000 445321944 0 0 0 0 0
\r
4836 seg: 5 12 254000 0 0
\r
4837 vtx: 6 -513715000 445770000 11 0 0 0 0
\r
4838 connect: 6 9 8 3 0
\r
4839 vtx: 1 -512445000 387350000 11 0 0 0 0
\r
4840 seg: 1 13 254000 0 0
\r
4841 vtx: 2 -514800088 384994912 0 0 0 0 0
\r
4842 seg: 2 13 254000 0 0
\r
4843 vtx: 3 -531679912 384994912 0 0 0 0 0
\r
4844 seg: 3 13 254000 0 0
\r
4845 vtx: 4 -534035000 387350000 11 0 0 0 0
\r
4846 connect: 7 10 8 3 0
\r
4847 vtx: 1 -555625000 387350000 11 0 0 0 0
\r
4848 seg: 1 13 254000 0 0
\r
4849 vtx: 2 -554164500 385889500 0 0 0 0 0
\r
4850 seg: 2 13 254000 0 0
\r
4851 vtx: 3 -535495500 385889500 0 0 0 0 0
\r
4852 seg: 3 13 254000 0 0
\r
4853 vtx: 4 -534035000 387350000 11 0 0 0 0
\r
4854 connect: 8 11 -1 2 0
\r
4855 vtx: 1 -468630000 421640000 11 0 0 0 0
\r
4856 seg: 1 13 254000 0 0
\r
4857 vtx: 2 -469161622 421640000 0 0 0 0 0
\r
4858 seg: 2 13 254000 0 0
\r
4859 vtx: 3 -474241876 426720254 0 0 0 0 27884
\r
4860 connect: 9 6 -1 4 0
\r
4861 vtx: 1 -490855000 438150000 11 0 0 0 0
\r
4862 seg: 1 13 254000 0 0
\r
4863 vtx: 2 -484524812 431819812 0 0 0 0 0
\r
4864 seg: 2 13 254000 0 0
\r
4865 vtx: 3 -484440738 431819812 0 0 711200 355600 0
\r
4866 seg: 3 12 254000 0 0
\r
4867 vtx: 4 -477628712 431819812 0 0 711200 355600 0
\r
4868 seg: 4 13 254000 0 0
\r
4869 vtx: 5 -474792548 431819812 0 0 0 0 13231
\r
4870 connect: 10 2 -1 2 0
\r
4871 vtx: 1 -467995000 387350000 11 0 0 0 0
\r
4872 seg: 1 13 254000 0 0
\r
4873 vtx: 2 -473081604 392436604 0 0 0 0 0
\r
4874 seg: 2 13 254000 0 0
\r
4875 vtx: 3 -473895928 392436604 0 0 0 0 20262
\r
4876 connect: 11 6 -1 5 0
\r
4877 vtx: 1 -490855000 438150000 11 0 0 0 0
\r
4878 seg: 1 12 254000 0 0
\r
4879 vtx: 2 -492319564 436685436 0 0 0 0 0
\r
4880 seg: 2 12 254000 0 0
\r
4881 vtx: 3 -506695964 436685436 0 0 0 0 0
\r
4882 seg: 3 12 254000 0 0
\r
4883 vtx: 4 -509047242 439036714 0 0 0 0 0
\r
4884 seg: 4 12 254000 0 0
\r
4885 vtx: 5 -509047242 440629802 0 0 0 0 0
\r
4886 seg: 5 12 254000 0 0
\r
4887 vtx: 6 -513727192 445309752 0 0 0 0 28059
\r
4889 net: "Xff$XMaster$X_Xlatch$NN_$G1" 2 1 0 0 0 0 1
\r
4890 pin: 1 IC_6_CD4007_2.9
\r
4892 connect: 1 1 0 6 0
\r
4893 vtx: 1 -550545000 420370000 11 0 0 0 0
\r
4894 seg: 1 12 254000 0 0
\r
4895 vtx: 2 -540871664 420370000 0 0 0 0 0
\r
4896 seg: 2 12 254000 0 0
\r
4897 vtx: 3 -517295638 396793974 0 0 0 0 0
\r
4898 seg: 3 12 254000 0 0
\r
4899 vtx: 4 -517295638 390121394 0 0 0 0 0
\r
4900 seg: 4 12 254000 0 0
\r
4901 vtx: 5 -512166870 384992626 0 0 0 0 0
\r
4902 seg: 5 12 254000 0 0
\r
4903 vtx: 6 -486862374 384992626 0 0 0 0 0
\r
4904 seg: 6 12 254000 0 0
\r
4905 vtx: 7 -481965000 389890000 11 0 0 0 0
\r
4907 net: "_Q_$G1_$G2" 4 3 0 0 0 0 1
\r
4908 pin: 1 IC_3_CD4007_3.6
\r
4912 connect: 1 2 0 5 0
\r
4913 vtx: 1 -372745000 529590000 11 0 0 0 0
\r
4914 seg: 1 13 254000 0 0
\r
4915 vtx: 2 -372745000 521169392 0 0 0 0 0
\r
4916 seg: 2 13 254000 0 0
\r
4917 vtx: 3 -381035560 512878832 0 0 0 0 0
\r
4918 seg: 3 13 254000 0 0
\r
4919 vtx: 4 -381714502 512878832 0 0 0 0 5762
\r
4920 seg: 4 13 254000 0 0
\r
4921 vtx: 5 -385243832 512878832 0 0 0 0 0
\r
4922 seg: 5 13 254000 0 0
\r
4923 vtx: 6 -389255000 516890000 11 0 0 0 0
\r
4924 connect: 2 3 1 5 0
\r
4925 vtx: 1 -359410000 495300000 11 0 0 0 0
\r
4926 seg: 1 12 254000 0 0
\r
4927 vtx: 2 -357996490 496713510 0 0 0 0 0
\r
4928 seg: 2 12 254000 0 0
\r
4929 vtx: 3 -357996490 498403880 0 0 0 0 0
\r
4930 seg: 3 12 254000 0 0
\r
4931 vtx: 4 -362064300 502471690 0 0 0 0 0
\r
4932 seg: 4 12 254000 0 0
\r
4933 vtx: 5 -382456690 502471690 0 0 0 0 0
\r
4934 seg: 5 12 254000 0 0
\r
4935 vtx: 6 -384175000 504190000 11 0 0 0 0
\r
4936 connect: 3 1 -1 2 0
\r
4937 vtx: 1 -384175000 504190000 11 0 0 0 0
\r
4938 seg: 1 13 254000 0 0
\r
4939 vtx: 2 -381714502 506650498 0 0 0 0 0
\r
4940 seg: 2 13 254000 0 0
\r
4941 vtx: 3 -381714502 512878832 0 0 0 0 5762
\r
4943 net: "$G_Vdd_$G1_$G3" 20 19 0 0 0 0 1
\r
4944 pin: 1 IC_0_CD4007_4.2
\r
4945 pin: 2 IC_0_CD4007_4.14
\r
4946 pin: 3 IC_6_CD4007_4.2
\r
4947 pin: 4 IC_6_CD4007_4.14
\r
4948 pin: 5 IC_5_CD4007_4.2
\r
4949 pin: 6 IC_5_CD4007_4.14
\r
4950 pin: 7 IC_1_CD4007_4.2
\r
4951 pin: 8 IC_1_CD4007_4.14
\r
4952 pin: 9 IC_2_CD4007_4.2
\r
4953 pin: 10 IC_2_CD4007_4.14
\r
4954 pin: 11 IC_3_CD4007_4.2
\r
4955 pin: 12 IC_3_CD4007_4.14
\r
4956 pin: 13 IC_4_CD4007_4.2
\r
4957 pin: 14 IC_4_CD4007_4.14
\r
4958 pin: 15 IC_8_CD4007_4.2
\r
4959 pin: 16 IC_8_CD4007_4.14
\r
4960 pin: 17 IC_7_CD4007_4.2
\r
4961 pin: 18 IC_7_CD4007_4.14
\r
4962 pin: 19 X_IC_9_CD4007_4.14
\r
4964 connect: 1 1 0 2 0
\r
4965 vtx: 1 -446405000 453390000 11 0 0 0 0
\r
4966 seg: 1 12 254000 0 0
\r
4967 vtx: 2 -448945000 450850000 0 0 0 0 0
\r
4968 seg: 2 12 254000 0 0
\r
4969 vtx: 3 -454025000 450850000 11 0 0 0 0
\r
4970 connect: 2 6 1 2 0
\r
4971 vtx: 1 -432435000 450850000 11 0 0 0 0
\r
4972 seg: 1 12 254000 0 0
\r
4973 vtx: 2 -443865000 450850000 0 0 0 0 0
\r
4974 seg: 2 12 254000 0 0
\r
4975 vtx: 3 -446405000 453390000 11 0 0 0 0
\r
4976 connect: 3 3 2 2 0
\r
4977 vtx: 1 -380365000 402590000 11 0 0 0 0
\r
4978 seg: 1 12 254000 0 0
\r
4979 vtx: 2 -382905000 400050000 0 0 0 0 0
\r
4980 seg: 2 12 254000 0 0
\r
4981 vtx: 3 -387985000 400050000 11 0 0 0 0
\r
4982 connect: 4 17 2 2 0
\r
4983 vtx: 1 -403225000 402590000 11 0 0 0 0
\r
4984 seg: 1 12 254000 0 0
\r
4985 vtx: 2 -400685000 400050000 0 0 0 0 0
\r
4986 seg: 2 12 254000 0 0
\r
4987 vtx: 3 -387985000 400050000 11 0 0 0 0
\r
4988 connect: 5 5 3 6 0
\r
4989 vtx: 1 -358775000 402590000 11 0 0 0 0
\r
4990 seg: 1 12 254000 0 0
\r
4991 vtx: 2 -360237532 404052532 0 0 0 0 0
\r
4992 seg: 2 12 254000 0 0
\r
4993 vtx: 3 -367417858 404052532 0 0 0 0 0
\r
4994 seg: 3 12 254000 0 0
\r
4995 vtx: 4 -367858040 403612350 0 0 0 0 0
\r
4996 seg: 4 12 254000 0 0
\r
4997 vtx: 5 -367858040 400863562 0 0 0 0 31105
\r
4998 seg: 5 12 254000 0 0
\r
4999 vtx: 6 -378638562 400863562 0 0 0 0 0
\r
5000 seg: 6 12 254000 0 0
\r
5001 vtx: 7 -380365000 402590000 11 0 0 0 0
\r
5002 connect: 6 19 4 4 0
\r
5003 vtx: 1 -367030000 419100000 11 0 0 0 0
\r
5004 seg: 1 13 254000 0 0
\r
5005 vtx: 2 -367030000 417703000 0 0 0 0 0
\r
5006 seg: 2 13 254000 0 0
\r
5007 vtx: 3 -364934500 415607500 0 0 0 0 0
\r
5008 seg: 3 13 254000 0 0
\r
5009 vtx: 4 -364934500 401510500 0 0 0 0 0
\r
5010 seg: 4 13 254000 0 0
\r
5011 vtx: 5 -366395000 400050000 11 0 0 0 0
\r
5012 connect: 7 13 5 3 0
\r
5013 vtx: 1 -358775000 453390000 11 0 0 0 0
\r
5014 seg: 1 13 254000 0 0
\r
5015 vtx: 2 -357116126 451731126 0 0 0 0 0
\r
5016 seg: 2 13 254000 0 0
\r
5017 vtx: 3 -357116126 404248874 0 0 0 0 0
\r
5018 seg: 3 13 254000 0 0
\r
5019 vtx: 4 -358775000 402590000 11 0 0 0 0
\r
5020 connect: 8 7 6 2 0
\r
5021 vtx: 1 -424815000 453390000 11 0 0 0 0
\r
5022 seg: 1 12 254000 0 0
\r
5023 vtx: 2 -429895000 453390000 0 0 0 0 0
\r
5024 seg: 2 12 254000 0 0
\r
5025 vtx: 3 -432435000 450850000 11 0 0 0 0
\r
5026 connect: 9 8 7 5 0
\r
5027 vtx: 1 -412115000 450850000 11 0 0 0 0
\r
5028 seg: 1 13 254000 0 0
\r
5029 vtx: 2 -413576770 452311770 0 0 0 0 0
\r
5030 seg: 2 13 254000 0 0
\r
5031 vtx: 3 -413576770 454411588 0 0 0 0 25802
\r
5032 seg: 3 13 254000 0 0
\r
5033 vtx: 4 -414279080 455114152 0 0 0 0 0
\r
5034 seg: 4 13 254000 0 0
\r
5035 vtx: 5 -423090848 455114152 0 0 0 0 0
\r
5036 seg: 5 13 254000 0 0
\r
5037 vtx: 6 -424815000 453390000 11 0 0 0 0
\r
5038 connect: 10 10 9 2 0
\r
5039 vtx: 1 -389255000 450850000 11 0 0 0 0
\r
5040 seg: 1 12 254000 0 0
\r
5041 vtx: 2 -401955000 450850000 0 0 0 0 0
\r
5042 seg: 2 12 254000 0 0
\r
5043 vtx: 3 -404495000 453390000 11 0 0 0 0
\r
5044 connect: 11 11 10 2 0
\r
5045 vtx: 1 -381635000 453390000 11 0 0 0 0
\r
5046 seg: 1 13 254000 0 0
\r
5047 vtx: 2 -384175000 450850000 0 0 0 0 0
\r
5048 seg: 2 13 254000 0 0
\r
5049 vtx: 3 -389255000 450850000 11 0 0 0 0
\r
5050 connect: 12 12 11 2 0
\r
5051 vtx: 1 -366395000 450850000 11 0 0 0 0
\r
5052 seg: 1 12 254000 0 0
\r
5053 vtx: 2 -379095000 450850000 0 0 0 0 0
\r
5054 seg: 2 12 254000 0 0
\r
5055 vtx: 3 -381635000 453390000 11 0 0 0 0
\r
5056 connect: 13 13 12 2 0
\r
5057 vtx: 1 -358775000 453390000 11 0 0 0 0
\r
5058 seg: 1 12 254000 0 0
\r
5059 vtx: 2 -361315000 450850000 0 0 0 0 0
\r
5060 seg: 2 12 254000 0 0
\r
5061 vtx: 3 -366395000 450850000 11 0 0 0 0
\r
5062 connect: 14 15 14 2 0
\r
5063 vtx: 1 -424815000 402590000 11 0 0 0 0
\r
5064 seg: 1 13 254000 0 0
\r
5065 vtx: 2 -429895000 402590000 0 0 0 0 0
\r
5066 seg: 2 13 254000 0 0
\r
5067 vtx: 3 -432435000 400050000 11 0 0 0 0
\r
5068 connect: 15 18 14 2 0
\r
5069 vtx: 1 -446405000 402590000 11 0 0 0 0
\r
5070 seg: 1 12 254000 0 0
\r
5071 vtx: 2 -443865000 400050000 0 0 0 0 0
\r
5072 seg: 2 12 254000 0 0
\r
5073 vtx: 3 -432435000 400050000 11 0 0 0 0
\r
5074 connect: 16 16 15 2 0
\r
5075 vtx: 1 -410845000 400050000 11 0 0 0 0
\r
5076 seg: 1 13 254000 0 0
\r
5077 vtx: 2 -422275000 400050000 0 0 0 0 0
\r
5078 seg: 2 13 254000 0 0
\r
5079 vtx: 3 -424815000 402590000 11 0 0 0 0
\r
5080 connect: 17 17 16 2 0
\r
5081 vtx: 1 -403225000 402590000 11 0 0 0 0
\r
5082 seg: 1 12 254000 0 0
\r
5083 vtx: 2 -405765000 400050000 0 0 0 0 0
\r
5084 seg: 2 12 254000 0 0
\r
5085 vtx: 3 -410845000 400050000 11 0 0 0 0
\r
5086 connect: 18 9 -1 3 0
\r
5087 vtx: 1 -404495000 453390000 11 0 0 0 0
\r
5088 seg: 1 13 254000 0 0
\r
5089 vtx: 2 -405961596 454856596 0 0 0 0 0
\r
5090 seg: 2 13 254000 0 0
\r
5091 vtx: 3 -413131508 454856596 0 0 0 0 0
\r
5092 seg: 3 13 254000 0 0
\r
5093 vtx: 4 -413576770 454411588 0 0 0 0 25802
\r
5094 connect: 19 4 -1 2 0
\r
5095 vtx: 1 -366395000 400050000 11 0 0 0 0
\r
5096 seg: 1 12 254000 0 0
\r
5097 vtx: 2 -367044478 400050000 0 0 0 0 0
\r
5098 seg: 2 12 254000 0 0
\r
5099 vtx: 3 -367858040 400863562 0 0 0 0 31105
\r
5101 net: "1" 2 1 0 0 0 0 1
\r
5104 connect: 1 1 0 1 0
\r
5105 vtx: 1 -442595000 379095000 11 0 0 0 0
\r
5106 seg: 1 12 254000 0 0
\r
5107 vtx: 2 -442595000 381635000 11 0 0 0 0
\r
5109 net: "D1" 2 1 0 0 0 0 1
\r
5112 connect: 1 1 0 1 0
\r
5113 vtx: 1 -440055000 379095000 11 0 0 0 0
\r
5114 seg: 1 12 254000 0 0
\r
5115 vtx: 2 -440055000 381635000 11 0 0 0 0
\r
5117 net: "CLK_$G0" 4 3 0 0 0 0 1
\r
5118 pin: 1 IC_8_CD4007_1.6
\r
5119 pin: 2 IC_7_CD4007_1.3
\r
5120 pin: 3 X_IC_9_CD4007_1.6
\r
5122 connect: 1 1 0 5 0
\r
5123 vtx: 1 -512445000 473710000 11 0 0 0 0
\r
5124 seg: 1 13 254000 0 0
\r
5125 vtx: 2 -516393684 469761316 0 0 0 0 0
\r
5126 seg: 2 13 254000 0 0
\r
5127 vtx: 3 -516393684 467335108 0 0 0 0 0
\r
5128 seg: 3 13 254000 0 0
\r
5129 vtx: 4 -521642086 462086706 0 0 0 0 0
\r
5130 seg: 4 13 254000 0 0
\r
5131 vtx: 5 -530031706 462086706 0 0 0 0 0
\r
5132 seg: 5 13 254000 0 0
\r
5133 vtx: 6 -534035000 466090000 11 0 0 0 0
\r
5134 connect: 2 2 0 3 0
\r
5135 vtx: 1 -555625000 466090000 11 0 0 0 0
\r
5136 seg: 1 12 254000 0 0
\r
5137 vtx: 2 -551623738 462088992 0 0 0 0 0
\r
5138 seg: 2 12 254000 0 0
\r
5139 vtx: 3 -538036008 462088992 0 0 0 0 0
\r
5140 seg: 3 12 254000 0 0
\r
5141 vtx: 4 -534035000 466090000 11 0 0 0 0
\r
5142 connect: 3 3 1 7 0
\r
5143 vtx: 1 -463550000 495300000 11 0 0 0 0
\r
5144 seg: 1 12 254000 0 0
\r
5145 vtx: 2 -467870540 490979460 0 0 0 0 0
\r
5146 seg: 2 12 254000 0 0
\r
5147 vtx: 3 -481217478 490979460 0 0 0 0 0
\r
5148 seg: 3 12 254000 0 0
\r
5149 vtx: 4 -489344462 482852476 0 0 0 0 0
\r
5150 seg: 4 12 254000 0 0
\r
5151 vtx: 5 -510860040 482852476 0 0 0 0 0
\r
5152 seg: 5 12 254000 0 0
\r
5153 vtx: 6 -513916168 479796348 0 0 0 0 0
\r
5154 seg: 6 12 254000 0 0
\r
5155 vtx: 7 -513916168 475181168 0 0 0 0 0
\r
5156 seg: 7 12 254000 0 0
\r
5157 vtx: 8 -512445000 473710000 11 0 0 0 0
\r
5159 net: "Xff$XMaster$X_Xlatch$NN" 2 1 0 0 0 0 1
\r
5160 pin: 1 IC_6_CD4007_1.9
\r
5162 connect: 1 1 0 6 0
\r
5163 vtx: 1 -550545000 496570000 11 0 0 0 0
\r
5164 seg: 1 12 254000 0 0
\r
5165 vtx: 2 -540871664 496570000 0 0 0 0 0
\r
5166 seg: 2 12 254000 0 0
\r
5167 vtx: 3 -517295638 472993974 0 0 0 0 0
\r
5168 seg: 3 12 254000 0 0
\r
5169 vtx: 4 -517295638 466321394 0 0 0 0 0
\r
5170 seg: 4 12 254000 0 0
\r
5171 vtx: 5 -512166870 461192626 0 0 0 0 0
\r
5172 seg: 5 12 254000 0 0
\r
5173 vtx: 6 -486862374 461192626 0 0 0 0 0
\r
5174 seg: 6 12 254000 0 0
\r
5175 vtx: 7 -481965000 466090000 11 0 0 0 0
\r
5177 net: "Xff$XMaster$Q_storage" 3 2 0 0 0 0 1
\r
5178 pin: 1 IC_0_CD4007_1.3
\r
5181 connect: 1 1 0 11 0
\r
5182 vtx: 1 -490855000 496570000 11 0 0 0 0
\r
5183 seg: 1 12 254000 0 0
\r
5184 vtx: 2 -489135928 494850928 0 0 0 0 0
\r
5185 seg: 2 12 254000 0 0
\r
5186 vtx: 3 -489135928 488229656 0 0 0 0 0
\r
5187 seg: 3 12 254000 0 0
\r
5188 vtx: 4 -491971330 485394254 0 0 0 0 0
\r
5189 seg: 4 12 254000 0 0
\r
5190 vtx: 5 -526551398 485394254 0 0 0 0 0
\r
5191 seg: 5 12 254000 0 0
\r
5192 vtx: 6 -532450548 491293404 0 0 0 0 0
\r
5193 seg: 6 12 254000 0 0
\r
5194 vtx: 7 -532450548 493600486 0 0 0 0 0
\r
5195 seg: 7 12 254000 0 0
\r
5196 vtx: 8 -540385000 501534684 0 0 0 0 0
\r
5197 seg: 8 12 254000 0 0
\r
5198 vtx: 9 -540385000 504087892 0 0 0 0 0
\r
5199 seg: 9 12 254000 0 0
\r
5200 vtx: 10 -551815000 515517892 0 0 0 0 0
\r
5201 seg: 10 12 254000 0 0
\r
5202 vtx: 11 -551815000 520700000 0 0 0 0 0
\r
5203 seg: 11 12 254000 0 0
\r
5204 vtx: 12 -555625000 524510000 11 0 0 0 0
\r
5205 connect: 2 2 1 2 0
\r
5206 vtx: 1 -475615000 478790000 11 0 0 0 0
\r
5207 seg: 1 13 254000 0 0
\r
5208 vtx: 2 -475615000 481330000 0 0 0 0 0
\r
5209 seg: 2 13 254000 0 0
\r
5210 vtx: 3 -490855000 496570000 11 0 0 0 0
\r
5212 net: "Xff$XMaster$XXlatch$NN_$G1" 2 1 0 0 0 0 1
\r
5213 pin: 1 IC_0_CD4007_2.9
\r
5215 connect: 1 1 0 5 0
\r
5216 vtx: 1 -520065000 412750000 11 0 0 0 0
\r
5217 seg: 1 12 254000 0 0
\r
5218 vtx: 2 -521782548 411032452 0 0 0 0 0
\r
5219 seg: 2 12 254000 0 0
\r
5220 vtx: 3 -525854930 411032452 0 0 0 0 0
\r
5221 seg: 3 12 254000 0 0
\r
5222 vtx: 4 -527130010 412307532 0 0 0 0 0
\r
5223 seg: 4 12 254000 0 0
\r
5224 vtx: 5 -527130010 419815010 0 0 0 0 0
\r
5225 seg: 5 12 254000 0 0
\r
5226 vtx: 6 -548005000 440690000 11 0 0 0 0
\r
5228 net: "Xff$XSlave$XXstiD$NTI_Out_$G1" 2 1 0 0 0 0 1
\r
5229 pin: 1 IC_2_CD4007_2.5
\r
5231 connect: 1 1 0 4 0
\r
5232 vtx: 1 -532765000 420370000 11 0 0 0 0
\r
5233 seg: 1 13 254000 0 0
\r
5234 vtx: 2 -526521172 420370000 0 0 0 0 0
\r
5235 seg: 2 13 254000 0 0
\r
5236 vtx: 3 -516075422 430815750 0 0 0 0 0
\r
5237 seg: 3 13 254000 0 0
\r
5238 vtx: 4 -516075422 440869578 0 0 0 0 0
\r
5239 seg: 4 13 254000 0 0
\r
5240 vtx: 5 -513715000 443230000 11 0 0 0 0
\r
5242 net: "Xff$between_$G1" 5 4 0 0 0 0 1
\r
5243 pin: 1 IC_6_CD4007_2.3
\r
5244 pin: 2 IC_2_CD4007_2.3
\r
5245 pin: 3 IC_8_CD4007_2.3
\r
5248 connect: 1 4 0 3 0
\r
5249 vtx: 1 -507365000 412750000 11 0 0 0 0
\r
5250 seg: 1 13 254000 0 0
\r
5251 vtx: 2 -507365000 409055062 0 0 0 0 0
\r
5252 seg: 2 13 254000 0 0
\r
5253 vtx: 3 -495819938 397510000 0 0 0 0 0
\r
5254 seg: 3 13 254000 0 0
\r
5255 vtx: 4 -489585000 397510000 11 0 0 0 0
\r
5256 connect: 2 3 1 10 0
\r
5257 vtx: 1 -555625000 427990000 11 0 0 0 0
\r
5258 seg: 1 13 254000 0 0
\r
5259 vtx: 2 -555625000 423020744 0 0 0 0 0
\r
5260 seg: 2 13 254000 0 0
\r
5261 vtx: 3 -543631120 411026864 0 0 0 0 0
\r
5262 seg: 3 13 254000 0 0
\r
5263 vtx: 4 -541352740 411026864 0 0 0 0 13826
\r
5264 seg: 4 13 254000 0 0
\r
5265 vtx: 5 -541352740 411679898 0 0 0 0 0
\r
5266 seg: 5 13 254000 0 0
\r
5267 vtx: 6 -538428692 414603692 0 0 0 0 0
\r
5268 seg: 6 13 254000 0 0
\r
5269 vtx: 7 -530911308 414603692 0 0 0 0 0
\r
5270 seg: 7 13 254000 0 0
\r
5271 vtx: 8 -523240254 422274746 0 0 0 0 0
\r
5272 seg: 8 13 254000 0 0
\r
5273 vtx: 9 -512236974 422274746 0 0 0 0 22504
\r
5274 seg: 9 13 254000 0 0
\r
5275 vtx: 10 -512236974 446831974 0 0 0 0 0
\r
5276 seg: 10 13 254000 0 0
\r
5277 vtx: 11 -513715000 448310000 11 0 0 0 0
\r
5278 connect: 3 4 -1 3 0
\r
5279 vtx: 1 -507365000 412750000 11 0 0 0 0
\r
5280 seg: 1 13 254000 0 0
\r
5281 vtx: 2 -507365000 417728146 0 0 0 0 0
\r
5282 seg: 2 13 254000 0 0
\r
5283 vtx: 3 -511911346 422274746 0 0 0 0 0
\r
5284 seg: 3 13 254000 0 0
\r
5285 vtx: 4 -512236974 422274746 0 0 0 0 22504
\r
5286 connect: 4 2 -1 3 0
\r
5287 vtx: 1 -534035000 397510000 11 0 0 0 0
\r
5288 seg: 1 13 254000 0 0
\r
5289 vtx: 2 -536926028 400401028 0 0 0 0 0
\r
5290 seg: 2 13 254000 0 0
\r
5291 vtx: 3 -536926028 406600152 0 0 0 0 0
\r
5292 seg: 3 13 254000 0 0
\r
5293 vtx: 4 -541352740 411026864 0 0 0 0 13826
\r
5295 net: "Xff$XMaster$XXlatch$NP_$G1_$G2" 3 2 0 0 0 0 1
\r
5296 pin: 1 IC_0_CD4007_3.1
\r
5297 pin: 2 IC_0_CD4007_3.13
\r
5299 connect: 1 1 0 3 0
\r
5300 vtx: 1 -446405000 527050000 11 0 0 0 0
\r
5301 seg: 1 13 254000 0 0
\r
5302 vtx: 2 -448707764 529352764 0 0 0 0 0
\r
5303 seg: 2 13 254000 0 0
\r
5304 vtx: 3 -454025000 529352764 0 0 0 0 25024
\r
5305 seg: 3 13 254000 0 0
\r
5306 vtx: 4 -454025000 529590000 11 0 0 0 0
\r
5307 connect: 2 2 -1 4 0
\r
5308 vtx: 1 -441325000 504190000 11 0 0 0 0
\r
5309 seg: 1 13 254000 0 0
\r
5310 vtx: 2 -445934592 504190000 0 0 0 0 0
\r
5311 seg: 2 13 254000 0 0
\r
5312 vtx: 3 -455501248 513756910 0 0 0 0 0
\r
5313 seg: 3 13 254000 0 0
\r
5314 vtx: 4 -455501248 527876516 0 0 0 0 0
\r
5315 seg: 4 13 254000 0 0
\r
5316 vtx: 5 -454025000 529352764 0 0 0 0 25024
\r
5318 net: "Xff$XMaster$Q_storage_$G1_$G2" 3 2 0 0 0 0 1
\r
5319 pin: 1 IC_0_CD4007_3.3
\r
5322 connect: 1 1 0 11 0
\r
5323 vtx: 1 -389255000 496570000 11 0 0 0 0
\r
5324 seg: 1 12 254000 0 0
\r
5325 vtx: 2 -387535928 494850928 0 0 0 0 0
\r
5326 seg: 2 12 254000 0 0
\r
5327 vtx: 3 -387535928 488229656 0 0 0 0 0
\r
5328 seg: 3 12 254000 0 0
\r
5329 vtx: 4 -390371330 485394254 0 0 0 0 0
\r
5330 seg: 4 12 254000 0 0
\r
5331 vtx: 5 -424951398 485394254 0 0 0 0 0
\r
5332 seg: 5 12 254000 0 0
\r
5333 vtx: 6 -430850548 491293404 0 0 0 0 0
\r
5334 seg: 6 12 254000 0 0
\r
5335 vtx: 7 -430850548 493600486 0 0 0 0 0
\r
5336 seg: 7 12 254000 0 0
\r
5337 vtx: 8 -438785000 501534684 0 0 0 0 0
\r
5338 seg: 8 12 254000 0 0
\r
5339 vtx: 9 -438785000 504087892 0 0 0 0 0
\r
5340 seg: 9 12 254000 0 0
\r
5341 vtx: 10 -450215000 515517892 0 0 0 0 0
\r
5342 seg: 10 12 254000 0 0
\r
5343 vtx: 11 -450215000 520700000 0 0 0 0 0
\r
5344 seg: 11 12 254000 0 0
\r
5345 vtx: 12 -454025000 524510000 11 0 0 0 0
\r
5346 connect: 2 2 1 2 0
\r
5347 vtx: 1 -374015000 478790000 11 0 0 0 0
\r
5348 seg: 1 13 254000 0 0
\r
5349 vtx: 2 -374015000 481330000 0 0 0 0 0
\r
5350 seg: 2 13 254000 0 0
\r
5351 vtx: 3 -389255000 496570000 11 0 0 0 0
\r
5353 net: "Xff$XMaster$XXgatetop$NP_$G1_$G2" 3 2 0 0 0 0 1
\r
5354 pin: 1 IC_5_CD4007_3.1
\r
5355 pin: 2 IC_5_CD4007_3.13
\r
5357 connect: 1 2 0 3 0
\r
5358 vtx: 1 -376555000 496570000 11 0 0 0 0
\r
5359 seg: 1 13 254000 0 0
\r
5360 vtx: 2 -376555000 490410500 0 0 0 0 0
\r
5361 seg: 2 13 254000 0 0
\r
5362 vtx: 3 -366395000 480250500 0 0 0 0 0
\r
5363 seg: 3 13 254000 0 0
\r
5364 vtx: 4 -366395000 478790000 11 0 0 0 0
\r
5365 connect: 2 1 0 3 0
\r
5366 vtx: 1 -358775000 476250000 11 0 0 0 0
\r
5367 seg: 1 12 254000 0 0
\r
5368 vtx: 2 -362394500 476250000 0 0 0 0 0
\r
5369 seg: 2 12 254000 0 0
\r
5370 vtx: 3 -364934500 478790000 0 0 0 0 0
\r
5371 seg: 3 12 254000 0 0
\r
5372 vtx: 4 -366395000 478790000 11 0 0 0 0
\r
5374 net: "Xff$_CLK_$G1_$G2" 4 3 0 0 0 0 1
\r
5375 pin: 1 IC_5_CD4007_3.6
\r
5376 pin: 2 IC_1_CD4007_3.3
\r
5379 connect: 1 3 0 7 0
\r
5380 vtx: 1 -438785000 478790000 11 0 0 0 0
\r
5381 seg: 1 12 254000 0 0
\r
5382 vtx: 2 -436430928 481144072 0 0 0 0 2856
\r
5383 seg: 2 12 254000 0 0
\r
5384 vtx: 3 -425103036 481144072 0 0 0 0 0
\r
5385 seg: 3 12 254000 0 0
\r
5386 vtx: 4 -416750500 472791536 0 0 0 0 0
\r
5387 seg: 4 12 254000 0 0
\r
5388 vtx: 5 -416750500 466118956 0 0 0 0 0
\r
5389 seg: 5 12 254000 0 0
\r
5390 vtx: 6 -410935170 460303626 0 0 0 0 0
\r
5391 seg: 6 12 254000 0 0
\r
5392 vtx: 7 -372181374 460303626 0 0 0 0 0
\r
5393 seg: 7 12 254000 0 0
\r
5394 vtx: 8 -366395000 466090000 11 0 0 0 0
\r
5395 connect: 2 2 1 3 0
\r
5396 vtx: 1 -441325000 488950000 11 0 0 0 0
\r
5397 seg: 1 13 254000 0 0
\r
5398 vtx: 2 -430971452 499303548 0 0 0 0 0
\r
5399 seg: 2 13 254000 0 0
\r
5400 vtx: 3 -430971452 523046452 0 0 0 0 0
\r
5401 seg: 3 13 254000 0 0
\r
5402 vtx: 4 -432435000 524510000 11 0 0 0 0
\r
5403 connect: 3 2 -1 2 0
\r
5404 vtx: 1 -441325000 488950000 11 0 0 0 0
\r
5405 seg: 1 12 254000 0 0
\r
5406 vtx: 2 -441325000 486038144 0 0 0 0 0
\r
5407 seg: 2 12 254000 0 0
\r
5408 vtx: 3 -436430928 481144072 0 0 0 0 2856
\r
5410 net: "Xff$XSlave$XXstiD$PTI_Out_$G1_$G2" 2 1 0 0 0 0 1
\r
5411 pin: 1 IC_2_CD4007_3.1
\r
5413 connect: 1 1 0 4 0
\r
5414 vtx: 1 -401955000 488950000 11 0 0 0 0
\r
5415 seg: 1 13 254000 0 0
\r
5416 vtx: 2 -401955000 495939826 0 0 0 0 0
\r
5417 seg: 2 13 254000 0 0
\r
5418 vtx: 3 -408756612 502741438 0 0 0 0 0
\r
5419 seg: 3 13 254000 0 0
\r
5420 vtx: 4 -408756612 526231612 0 0 0 0 0
\r
5421 seg: 4 13 254000 0 0
\r
5422 vtx: 5 -412115000 529590000 11 0 0 0 0
\r
5424 net: "Xff$XSlave$XXgatebot$NP_$G1_$G2" 3 2 0 0 0 0 1
\r
5425 pin: 1 IC_7_CD4007_3.1
\r
5426 pin: 2 IC_7_CD4007_3.13
\r
5428 connect: 1 1 0 3 0
\r
5429 vtx: 1 -403225000 476250000 11 0 0 0 0
\r
5430 seg: 1 13 254000 0 0
\r
5431 vtx: 2 -406844500 476250000 0 0 0 0 0
\r
5432 seg: 2 13 254000 0 0
\r
5433 vtx: 3 -409384500 478790000 0 0 0 0 0
\r
5434 seg: 3 13 254000 0 0
\r
5435 vtx: 4 -410845000 478790000 11 0 0 0 0
\r
5436 connect: 2 2 0 1 0
\r
5437 vtx: 1 -410845000 496570000 11 0 0 0 0
\r
5438 seg: 1 13 254000 0 0
\r
5439 vtx: 2 -410845000 478790000 11 0 0 0 0
\r
5441 net: "Xff$XSlave$XXstiD$NTI_Out_$G1_$G2" 2 1 0 0 0 0 1
\r
5442 pin: 1 IC_2_CD4007_3.5
\r
5444 connect: 1 1 0 4 0
\r
5445 vtx: 1 -431165000 496570000 11 0 0 0 0
\r
5446 seg: 1 13 254000 0 0
\r
5447 vtx: 2 -424921172 496570000 0 0 0 0 0
\r
5448 seg: 2 13 254000 0 0
\r
5449 vtx: 3 -414475422 507015750 0 0 0 0 0
\r
5450 seg: 3 13 254000 0 0
\r
5451 vtx: 4 -414475422 517069578 0 0 0 0 0
\r
5452 seg: 4 13 254000 0 0
\r
5453 vtx: 5 -412115000 519430000 11 0 0 0 0
\r
5455 net: "_Q_$G1_$G3" 4 3 0 0 0 0 1
\r
5456 pin: 1 IC_3_CD4007_4.6
\r
5460 connect: 1 2 0 5 0
\r
5461 vtx: 1 -372745000 453390000 11 0 0 0 0
\r
5462 seg: 1 13 254000 0 0
\r
5463 vtx: 2 -372745000 444969392 0 0 0 0 0
\r
5464 seg: 2 13 254000 0 0
\r
5465 vtx: 3 -381035560 436678832 0 0 0 0 0
\r
5466 seg: 3 13 254000 0 0
\r
5467 vtx: 4 -381714502 436678832 0 0 0 0 26586
\r
5468 seg: 4 13 254000 0 0
\r
5469 vtx: 5 -385243832 436678832 0 0 0 0 0
\r
5470 seg: 5 13 254000 0 0
\r
5471 vtx: 6 -389255000 440690000 11 0 0 0 0
\r
5472 connect: 2 3 1 5 0
\r
5473 vtx: 1 -359410000 419100000 11 0 0 0 0
\r
5474 seg: 1 12 254000 0 0
\r
5475 vtx: 2 -357996490 420513510 0 0 0 0 0
\r
5476 seg: 2 12 254000 0 0
\r
5477 vtx: 3 -357996490 422203880 0 0 0 0 0
\r
5478 seg: 3 12 254000 0 0
\r
5479 vtx: 4 -362064300 426271690 0 0 0 0 0
\r
5480 seg: 4 12 254000 0 0
\r
5481 vtx: 5 -382456690 426271690 0 0 0 0 0
\r
5482 seg: 5 12 254000 0 0
\r
5483 vtx: 6 -384175000 427990000 11 0 0 0 0
\r
5484 connect: 3 1 -1 2 0
\r
5485 vtx: 1 -384175000 427990000 11 0 0 0 0
\r
5486 seg: 1 13 254000 0 0
\r
5487 vtx: 2 -381714502 430450498 0 0 0 0 0
\r
5488 seg: 2 13 254000 0 0
\r
5489 vtx: 3 -381714502 436678832 0 0 0 0 26586
\r
5491 net: "2" 2 1 0 0 0 0 1
\r
5494 connect: 1 1 0 1 0
\r
5495 vtx: 1 -445135000 379095000 11 0 0 0 0
\r
5496 seg: 1 12 254000 0 0
\r
5497 vtx: 2 -445135000 381635000 11 0 0 0 0
\r
5499 net: "C1" 2 1 0 0 0 0 1
\r
5502 connect: 1 1 0 1 0
\r
5503 vtx: 1 -437515000 379095000 11 0 0 0 0
\r
5504 seg: 1 12 254000 0 0
\r
5505 vtx: 2 -437515000 381635000 11 0 0 0 0
\r
5507 net: "D2" 2 1 0 0 0 0 1
\r
5510 connect: 1 1 0 1 0
\r
5511 vtx: 1 -432435000 379095000 11 0 0 0 0
\r
5512 seg: 1 12 254000 0 0
\r
5513 vtx: 2 -432435000 381635000 11 0 0 0 0
\r
5515 net: "Q_$G0" 4 3 0 0 0 0 1
\r
5516 pin: 1 IC_4_CD4007_1.3
\r
5520 connect: 1 2 0 3 0
\r
5521 vtx: 1 -489585000 504190000 11 0 0 0 0
\r
5522 seg: 1 12 254000 0 0
\r
5523 vtx: 2 -489585000 504462542 0 0 0 0 0
\r
5524 seg: 2 12 254000 0 0
\r
5525 vtx: 3 -469537542 524510000 0 0 0 0 0
\r
5526 seg: 3 12 254000 0 0
\r
5527 vtx: 4 -467995000 524510000 11 0 0 0 0
\r
5528 connect: 2 2 1 2 0
\r
5529 vtx: 1 -489585000 504190000 11 0 0 0 0
\r
5530 seg: 1 13 254000 0 0
\r
5531 vtx: 2 -497205000 511810000 0 0 0 0 0
\r
5532 seg: 2 13 254000 0 0
\r
5533 vtx: 3 -497205000 516890000 11 0 0 0 0
\r
5534 connect: 3 3 2 3 0
\r
5535 vtx: 1 -461010000 497840000 11 0 0 0 0
\r
5536 seg: 1 12 254000 0 0
\r
5537 vtx: 2 -464752436 501582690 0 0 0 0 0
\r
5538 seg: 2 12 254000 0 0
\r
5539 vtx: 3 -486977436 501582690 0 0 0 0 0
\r
5540 seg: 3 12 254000 0 0
\r
5541 vtx: 4 -489585000 504190000 11 0 0 0 0
\r
5543 net: "Xff$XSlave$X_Xlatch$NI" 2 1 0 0 0 0 1
\r
5544 pin: 1 IC_4_CD4007_1.4
\r
5545 pin: 2 IC_4_CD4007_1.8
\r
5546 connect: 1 1 0 1 0
\r
5547 vtx: 1 -460375000 514350000 11 0 0 0 0
\r
5548 seg: 1 12 254000 0 0
\r
5549 vtx: 2 -467995000 521970000 11 0 0 0 0
\r
5551 net: "Xff$NC_01" 3 2 0 0 0 0 1
\r
5552 pin: 1 IC_0_CD4007_1.6
\r
5555 connect: 1 2 0 3 0
\r
5556 vtx: 1 -537845000 496570000 11 0 0 0 0
\r
5557 seg: 1 12 254000 0 0
\r
5558 vtx: 2 -552704000 511429000 0 0 0 0 0
\r
5559 seg: 2 12 254000 0 0
\r
5560 vtx: 3 -552704000 513969000 0 0 0 0 0
\r
5561 seg: 3 12 254000 0 0
\r
5562 vtx: 4 -555625000 516890000 11 0 0 0 0
\r
5563 connect: 2 2 1 4 0
\r
5564 vtx: 1 -537845000 496570000 11 0 0 0 0
\r
5565 seg: 1 12 254000 0 0
\r
5566 vtx: 2 -537845000 495429032 0 0 0 0 0
\r
5567 seg: 2 12 254000 0 0
\r
5568 vtx: 3 -526921222 484505254 0 0 0 0 0
\r
5569 seg: 3 12 254000 0 0
\r
5570 vtx: 4 -490219746 484505254 0 0 0 0 0
\r
5571 seg: 4 12 254000 0 0
\r
5572 vtx: 5 -485775000 488950000 11 0 0 0 0
\r
5574 net: "Xff$XMaster$X_Xlatch$NP_$G1" 3 2 0 0 0 0 1
\r
5575 pin: 1 IC_6_CD4007_2.1
\r
5576 pin: 2 IC_6_CD4007_2.13
\r
5578 connect: 1 1 0 3 0
\r
5579 vtx: 1 -481965000 400050000 11 0 0 0 0
\r
5580 seg: 1 13 254000 0 0
\r
5581 vtx: 2 -485584500 400050000 0 0 0 0 0
\r
5582 seg: 2 13 254000 0 0
\r
5583 vtx: 3 -488124500 402590000 0 0 0 0 0
\r
5584 seg: 3 13 254000 0 0
\r
5585 vtx: 4 -489585000 402590000 11 0 0 0 0
\r
5586 connect: 2 2 0 3 0
\r
5587 vtx: 1 -473075000 412750000 11 0 0 0 0
\r
5588 seg: 1 12 254000 0 0
\r
5589 vtx: 2 -477964500 412750000 0 0 0 0 0
\r
5590 seg: 2 12 254000 0 0
\r
5591 vtx: 3 -488124500 402590000 0 0 0 0 0
\r
5592 seg: 3 12 254000 0 0
\r
5593 vtx: 4 -489585000 402590000 11 0 0 0 0
\r
5595 net: "Xff$XSlave$XXlatch$NN_$G1" 2 1 0 0 0 0 1
\r
5596 pin: 1 IC_3_CD4007_2.9
\r
5598 connect: 1 1 0 2 0
\r
5599 vtx: 1 -502285000 427990000 11 0 0 0 0
\r
5600 seg: 1 12 254000 0 0
\r
5601 vtx: 2 -495935000 427990000 0 0 0 0 0
\r
5602 seg: 2 12 254000 0 0
\r
5603 vtx: 3 -483235000 440690000 11 0 0 0 0
\r
5605 net: "Xff$XSlave$_Q_storage_$G1" 3 2 0 0 0 0 1
\r
5606 pin: 1 IC_4_CD4007_2.6
\r
5609 connect: 1 1 0 5 0
\r
5610 vtx: 1 -499745000 420370000 11 0 0 0 0
\r
5611 seg: 1 13 254000 0 0
\r
5612 vtx: 2 -498475000 419100000 0 0 0 0 14949
\r
5613 seg: 2 13 254000 0 0
\r
5614 vtx: 3 -495375184 422199816 0 0 0 0 0
\r
5615 seg: 3 13 254000 0 0
\r
5616 vtx: 4 -489132118 422199816 0 0 0 0 0
\r
5617 seg: 4 13 254000 0 0
\r
5618 vtx: 5 -470641680 440690000 0 0 0 0 0
\r
5619 seg: 5 13 254000 0 0
\r
5620 vtx: 6 -467995000 440690000 11 0 0 0 0
\r
5621 connect: 2 2 -1 1 0
\r
5622 vtx: 1 -498475000 402590000 11 0 0 0 0
\r
5623 seg: 1 13 254000 0 0
\r
5624 vtx: 2 -498475000 419100000 0 0 0 0 14949
\r
5626 net: "Xff$XSlave$XXgatetop$NI_$G1" 2 1 0 0 0 0 1
\r
5627 pin: 1 IC_8_CD4007_2.4
\r
5628 pin: 2 IC_8_CD4007_2.8
\r
5629 connect: 1 1 0 1 0
\r
5630 vtx: 1 -526415000 387350000 11 0 0 0 0
\r
5631 seg: 1 13 254000 0 0
\r
5632 vtx: 2 -534035000 394970000 11 0 0 0 0
\r
5634 net: "Xff$XMaster$XXgatetop$NN_$G1" 2 1 0 0 0 0 1
\r
5635 pin: 1 IC_5_CD4007_2.9
\r
5637 connect: 1 1 0 3 0
\r
5638 vtx: 1 -475615000 389890000 11 0 0 0 0
\r
5639 seg: 1 13 254000 0 0
\r
5640 vtx: 2 -471610182 385885436 0 0 0 0 0
\r
5641 seg: 2 13 254000 0 0
\r
5642 vtx: 3 -464379564 385885436 0 0 0 0 0
\r
5643 seg: 3 13 254000 0 0
\r
5644 vtx: 4 -460375000 389890000 11 0 0 0 0
\r
5646 net: "CLK_$G1" 4 3 0 0 0 0 1
\r
5647 pin: 1 IC_8_CD4007_2.6
\r
5648 pin: 2 IC_7_CD4007_2.3
\r
5649 pin: 3 X_IC_9_CD4007_2.6
\r
5651 connect: 1 1 0 5 0
\r
5652 vtx: 1 -512445000 397510000 11 0 0 0 0
\r
5653 seg: 1 13 254000 0 0
\r
5654 vtx: 2 -516393684 393561316 0 0 0 0 0
\r
5655 seg: 2 13 254000 0 0
\r
5656 vtx: 3 -516393684 391135108 0 0 0 0 0
\r
5657 seg: 3 13 254000 0 0
\r
5658 vtx: 4 -521642086 385886706 0 0 0 0 0
\r
5659 seg: 4 13 254000 0 0
\r
5660 vtx: 5 -530031706 385886706 0 0 0 0 0
\r
5661 seg: 5 13 254000 0 0
\r
5662 vtx: 6 -534035000 389890000 11 0 0 0 0
\r
5663 connect: 2 2 0 3 0
\r
5664 vtx: 1 -555625000 389890000 11 0 0 0 0
\r
5665 seg: 1 12 254000 0 0
\r
5666 vtx: 2 -551623738 385888992 0 0 0 0 0
\r
5667 seg: 2 12 254000 0 0
\r
5668 vtx: 3 -538036008 385888992 0 0 0 0 0
\r
5669 seg: 3 12 254000 0 0
\r
5670 vtx: 4 -534035000 389890000 11 0 0 0 0
\r
5671 connect: 3 3 1 7 0
\r
5672 vtx: 1 -463550000 419100000 11 0 0 0 0
\r
5673 seg: 1 12 254000 0 0
\r
5674 vtx: 2 -467870540 414779460 0 0 0 0 0
\r
5675 seg: 2 12 254000 0 0
\r
5676 vtx: 3 -481217478 414779460 0 0 0 0 0
\r
5677 seg: 3 12 254000 0 0
\r
5678 vtx: 4 -489344462 406652476 0 0 0 0 0
\r
5679 seg: 4 12 254000 0 0
\r
5680 vtx: 5 -510860040 406652476 0 0 0 0 0
\r
5681 seg: 5 12 254000 0 0
\r
5682 vtx: 6 -513916168 403596348 0 0 0 0 0
\r
5683 seg: 6 12 254000 0 0
\r
5684 vtx: 7 -513916168 398981168 0 0 0 0 0
\r
5685 seg: 7 12 254000 0 0
\r
5686 vtx: 8 -512445000 397510000 11 0 0 0 0
\r
5688 net: "Q_$G1_$G2" 4 3 0 0 0 0 1
\r
5689 pin: 1 IC_4_CD4007_3.3
\r
5693 connect: 1 2 0 3 0
\r
5694 vtx: 1 -387985000 504190000 11 0 0 0 0
\r
5695 seg: 1 12 254000 0 0
\r
5696 vtx: 2 -387985000 504462542 0 0 0 0 0
\r
5697 seg: 2 12 254000 0 0
\r
5698 vtx: 3 -367937542 524510000 0 0 0 0 0
\r
5699 seg: 3 12 254000 0 0
\r
5700 vtx: 4 -366395000 524510000 11 0 0 0 0
\r
5701 connect: 2 2 1 2 0
\r
5702 vtx: 1 -387985000 504190000 11 0 0 0 0
\r
5703 seg: 1 13 254000 0 0
\r
5704 vtx: 2 -395605000 511810000 0 0 0 0 0
\r
5705 seg: 2 13 254000 0 0
\r
5706 vtx: 3 -395605000 516890000 11 0 0 0 0
\r
5707 connect: 3 3 2 3 0
\r
5708 vtx: 1 -359410000 497840000 11 0 0 0 0
\r
5709 seg: 1 12 254000 0 0
\r
5710 vtx: 2 -363152436 501582690 0 0 0 0 0
\r
5711 seg: 2 12 254000 0 0
\r
5712 vtx: 3 -385377436 501582690 0 0 0 0 0
\r
5713 seg: 3 12 254000 0 0
\r
5714 vtx: 4 -387985000 504190000 11 0 0 0 0
\r
5716 net: "Xff$XXstiCLK$NTI_Out_$G1_$G2" 2 1 0 0 0 0 1
\r
5717 pin: 1 X_IC_9_CD4007_3.8
\r
5719 connect: 1 1 0 2 0
\r
5720 vtx: 1 -438785000 466090000 11 0 0 0 0
\r
5721 seg: 1 12 254000 0 0
\r
5722 vtx: 2 -441325000 463550000 0 0 0 0 0
\r
5723 seg: 2 12 254000 0 0
\r
5724 vtx: 3 -446405000 463550000 11 0 0 0 0
\r
5726 net: "Xff$XSlave$XXlatch$NI_$G1_$G2" 2 1 0 0 0 0 1
\r
5727 pin: 1 IC_3_CD4007_3.4
\r
5728 pin: 2 IC_3_CD4007_3.8
\r
5729 connect: 1 1 0 1 0
\r
5730 vtx: 1 -381635000 514350000 11 0 0 0 0
\r
5731 seg: 1 13 254000 0 0
\r
5732 vtx: 2 -389255000 521970000 11 0 0 0 0
\r
5734 net: "Xff$XXstiCLK$PTI_Out_$G1_$G2" 2 1 0 0 0 0 1
\r
5735 pin: 1 X_IC_9_CD4007_3.13
\r
5737 connect: 1 1 0 2 0
\r
5738 vtx: 1 -454025000 488950000 11 0 0 0 0
\r
5739 seg: 1 12 254000 0 0
\r
5740 vtx: 2 -454025000 483870000 0 0 0 0 0
\r
5741 seg: 2 12 254000 0 0
\r
5742 vtx: 3 -446405000 476250000 11 0 0 0 0
\r
5744 net: "Xff$between_$G1_$G2" 5 4 0 0 0 0 1
\r
5745 pin: 1 IC_6_CD4007_3.3
\r
5746 pin: 2 IC_2_CD4007_3.3
\r
5747 pin: 3 IC_8_CD4007_3.3
\r
5750 connect: 1 4 0 3 0
\r
5751 vtx: 1 -405765000 488950000 11 0 0 0 0
\r
5752 seg: 1 13 254000 0 0
\r
5753 vtx: 2 -405765000 485255062 0 0 0 0 0
\r
5754 seg: 2 13 254000 0 0
\r
5755 vtx: 3 -394219938 473710000 0 0 0 0 0
\r
5756 seg: 3 13 254000 0 0
\r
5757 vtx: 4 -387985000 473710000 11 0 0 0 0
\r
5758 connect: 2 3 1 10 0
\r
5759 vtx: 1 -454025000 504190000 11 0 0 0 0
\r
5760 seg: 1 13 254000 0 0
\r
5761 vtx: 2 -454025000 499220744 0 0 0 0 0
\r
5762 seg: 2 13 254000 0 0
\r
5763 vtx: 3 -442031120 487226864 0 0 0 0 0
\r
5764 seg: 3 13 254000 0 0
\r
5765 vtx: 4 -439752740 487226864 0 0 0 0 24065
\r
5766 seg: 4 13 254000 0 0
\r
5767 vtx: 5 -439752740 487879898 0 0 0 0 0
\r
5768 seg: 5 13 254000 0 0
\r
5769 vtx: 6 -436828692 490803692 0 0 0 0 0
\r
5770 seg: 6 13 254000 0 0
\r
5771 vtx: 7 -429311308 490803692 0 0 0 0 0
\r
5772 seg: 7 13 254000 0 0
\r
5773 vtx: 8 -421640254 498474746 0 0 0 0 0
\r
5774 seg: 8 13 254000 0 0
\r
5775 vtx: 9 -410636974 498474746 0 0 0 0 15016
\r
5776 seg: 9 13 254000 0 0
\r
5777 vtx: 10 -410636974 523031974 0 0 0 0 0
\r
5778 seg: 10 13 254000 0 0
\r
5779 vtx: 11 -412115000 524510000 11 0 0 0 0
\r
5780 connect: 3 4 -1 3 0
\r
5781 vtx: 1 -405765000 488950000 11 0 0 0 0
\r
5782 seg: 1 13 254000 0 0
\r
5783 vtx: 2 -405765000 493928146 0 0 0 0 0
\r
5784 seg: 2 13 254000 0 0
\r
5785 vtx: 3 -410311346 498474746 0 0 0 0 0
\r
5786 seg: 3 13 254000 0 0
\r
5787 vtx: 4 -410636974 498474746 0 0 0 0 15016
\r
5788 connect: 4 2 -1 3 0
\r
5789 vtx: 1 -432435000 473710000 11 0 0 0 0
\r
5790 seg: 1 13 254000 0 0
\r
5791 vtx: 2 -435326028 476601028 0 0 0 0 0
\r
5792 seg: 2 13 254000 0 0
\r
5793 vtx: 3 -435326028 482800152 0 0 0 0 0
\r
5794 seg: 3 13 254000 0 0
\r
5795 vtx: 4 -439752740 487226864 0 0 0 0 24065
\r
5797 net: "Xff$XSlave$XXlatch$NN_$G1_$G2" 2 1 0 0 0 0 1
\r
5798 pin: 1 IC_3_CD4007_3.9
\r
5800 connect: 1 1 0 2 0
\r
5801 vtx: 1 -400685000 504190000 11 0 0 0 0
\r
5802 seg: 1 12 254000 0 0
\r
5803 vtx: 2 -394335000 504190000 0 0 0 0 0
\r
5804 seg: 2 12 254000 0 0
\r
5805 vtx: 3 -381635000 516890000 11 0 0 0 0
\r
5807 net: "Xff$XMaster$XXlatch$NP_$G1_$G3" 3 2 0 0 0 0 1
\r
5808 pin: 1 IC_0_CD4007_4.1
\r
5809 pin: 2 IC_0_CD4007_4.13
\r
5811 connect: 1 1 0 3 0
\r
5812 vtx: 1 -446405000 450850000 11 0 0 0 0
\r
5813 seg: 1 13 254000 0 0
\r
5814 vtx: 2 -448707764 453152764 0 0 0 0 0
\r
5815 seg: 2 13 254000 0 0
\r
5816 vtx: 3 -454025000 453152764 0 0 0 0 25034
\r
5817 seg: 3 13 254000 0 0
\r
5818 vtx: 4 -454025000 453390000 11 0 0 0 0
\r
5819 connect: 2 2 -1 4 0
\r
5820 vtx: 1 -441325000 427990000 11 0 0 0 0
\r
5821 seg: 1 13 254000 0 0
\r
5822 vtx: 2 -445934592 427990000 0 0 0 0 0
\r
5823 seg: 2 13 254000 0 0
\r
5824 vtx: 3 -455501248 437556910 0 0 0 0 0
\r
5825 seg: 3 13 254000 0 0
\r
5826 vtx: 4 -455501248 451676516 0 0 0 0 0
\r
5827 seg: 4 13 254000 0 0
\r
5828 vtx: 5 -454025000 453152764 0 0 0 0 25034
\r
5830 net: "Xff$XMaster$Q_storage_$G1_$G3" 3 2 0 0 0 0 1
\r
5831 pin: 1 IC_0_CD4007_4.3
\r
5834 connect: 1 1 0 11 0
\r
5835 vtx: 1 -389255000 420370000 11 0 0 0 0
\r
5836 seg: 1 12 254000 0 0
\r
5837 vtx: 2 -387535928 418650928 0 0 0 0 0
\r
5838 seg: 2 12 254000 0 0
\r
5839 vtx: 3 -387535928 412029656 0 0 0 0 0
\r
5840 seg: 3 12 254000 0 0
\r
5841 vtx: 4 -390371330 409194254 0 0 0 0 0
\r
5842 seg: 4 12 254000 0 0
\r
5843 vtx: 5 -424951398 409194254 0 0 0 0 0
\r
5844 seg: 5 12 254000 0 0
\r
5845 vtx: 6 -430850548 415093404 0 0 0 0 0
\r
5846 seg: 6 12 254000 0 0
\r
5847 vtx: 7 -430850548 417400486 0 0 0 0 0
\r
5848 seg: 7 12 254000 0 0
\r
5849 vtx: 8 -438785000 425334684 0 0 0 0 0
\r
5850 seg: 8 12 254000 0 0
\r
5851 vtx: 9 -438785000 427887892 0 0 0 0 0
\r
5852 seg: 9 12 254000 0 0
\r
5853 vtx: 10 -450215000 439317892 0 0 0 0 0
\r
5854 seg: 10 12 254000 0 0
\r
5855 vtx: 11 -450215000 444500000 0 0 0 0 0
\r
5856 seg: 11 12 254000 0 0
\r
5857 vtx: 12 -454025000 448310000 11 0 0 0 0
\r
5858 connect: 2 2 1 2 0
\r
5859 vtx: 1 -374015000 402590000 11 0 0 0 0
\r
5860 seg: 1 13 254000 0 0
\r
5861 vtx: 2 -374015000 405130000 0 0 0 0 0
\r
5862 seg: 2 13 254000 0 0
\r
5863 vtx: 3 -389255000 420370000 11 0 0 0 0
\r
5865 net: "Xff$XMaster$XXgatetop$NP_$G1_$G3" 3 2 0 0 0 0 1
\r
5866 pin: 1 IC_5_CD4007_4.1
\r
5867 pin: 2 IC_5_CD4007_4.13
\r
5869 connect: 1 2 0 3 0
\r
5870 vtx: 1 -376555000 420370000 11 0 0 0 0
\r
5871 seg: 1 13 254000 0 0
\r
5872 vtx: 2 -376555000 414210500 0 0 0 0 0
\r
5873 seg: 2 13 254000 0 0
\r
5874 vtx: 3 -366395000 404050500 0 0 0 0 0
\r
5875 seg: 3 13 254000 0 0
\r
5876 vtx: 4 -366395000 402590000 11 0 0 0 0
\r
5877 connect: 2 1 0 3 0
\r
5878 vtx: 1 -358775000 400050000 11 0 0 0 0
\r
5879 seg: 1 12 254000 0 0
\r
5880 vtx: 2 -362394500 400050000 0 0 0 0 0
\r
5881 seg: 2 12 254000 0 0
\r
5882 vtx: 3 -364934500 402590000 0 0 0 0 0
\r
5883 seg: 3 12 254000 0 0
\r
5884 vtx: 4 -366395000 402590000 11 0 0 0 0
\r
5886 net: "Xff$_CLK_$G1_$G3" 4 3 0 0 0 0 1
\r
5887 pin: 1 IC_5_CD4007_4.6
\r
5888 pin: 2 IC_1_CD4007_4.3
\r
5891 connect: 1 3 0 7 0
\r
5892 vtx: 1 -438785000 402590000 11 0 0 0 0
\r
5893 seg: 1 12 254000 0 0
\r
5894 vtx: 2 -436430928 404944072 0 0 0 0 2334
\r
5895 seg: 2 12 254000 0 0
\r
5896 vtx: 3 -425103036 404944072 0 0 0 0 0
\r
5897 seg: 3 12 254000 0 0
\r
5898 vtx: 4 -416750500 396591536 0 0 0 0 0
\r
5899 seg: 4 12 254000 0 0
\r
5900 vtx: 5 -416750500 389918956 0 0 0 0 0
\r
5901 seg: 5 12 254000 0 0
\r
5902 vtx: 6 -410935170 384103626 0 0 0 0 0
\r
5903 seg: 6 12 254000 0 0
\r
5904 vtx: 7 -372181374 384103626 0 0 0 0 0
\r
5905 seg: 7 12 254000 0 0
\r
5906 vtx: 8 -366395000 389890000 11 0 0 0 0
\r
5907 connect: 2 2 1 3 0
\r
5908 vtx: 1 -441325000 412750000 11 0 0 0 0
\r
5909 seg: 1 13 254000 0 0
\r
5910 vtx: 2 -430971452 423103548 0 0 0 0 0
\r
5911 seg: 2 13 254000 0 0
\r
5912 vtx: 3 -430971452 446846452 0 0 0 0 0
\r
5913 seg: 3 13 254000 0 0
\r
5914 vtx: 4 -432435000 448310000 11 0 0 0 0
\r
5915 connect: 3 2 -1 2 0
\r
5916 vtx: 1 -441325000 412750000 11 0 0 0 0
\r
5917 seg: 1 12 254000 0 0
\r
5918 vtx: 2 -441325000 409838144 0 0 0 0 0
\r
5919 seg: 2 12 254000 0 0
\r
5920 vtx: 3 -436430928 404944072 0 0 0 0 2334
\r
5922 net: "Xff$XSlave$XXstiD$PTI_Out_$G1_$G3" 2 1 0 0 0 0 1
\r
5923 pin: 1 IC_2_CD4007_4.1
\r
5925 connect: 1 1 0 4 0
\r
5926 vtx: 1 -401955000 412750000 11 0 0 0 0
\r
5927 seg: 1 13 254000 0 0
\r
5928 vtx: 2 -401955000 419739826 0 0 0 0 0
\r
5929 seg: 2 13 254000 0 0
\r
5930 vtx: 3 -408756612 426541438 0 0 0 0 0
\r
5931 seg: 3 13 254000 0 0
\r
5932 vtx: 4 -408756612 450031612 0 0 0 0 0
\r
5933 seg: 4 13 254000 0 0
\r
5934 vtx: 5 -412115000 453390000 11 0 0 0 0
\r
5936 net: "Xff$XSlave$XXgatebot$NP_$G1_$G3" 3 2 0 0 0 0 1
\r
5937 pin: 1 IC_7_CD4007_4.1
\r
5938 pin: 2 IC_7_CD4007_4.13
\r
5940 connect: 1 1 0 3 0
\r
5941 vtx: 1 -403225000 400050000 11 0 0 0 0
\r
5942 seg: 1 13 254000 0 0
\r
5943 vtx: 2 -406844500 400050000 0 0 0 0 0
\r
5944 seg: 2 13 254000 0 0
\r
5945 vtx: 3 -409384500 402590000 0 0 0 0 0
\r
5946 seg: 3 13 254000 0 0
\r
5947 vtx: 4 -410845000 402590000 11 0 0 0 0
\r
5948 connect: 2 2 0 1 0
\r
5949 vtx: 1 -410845000 420370000 11 0 0 0 0
\r
5950 seg: 1 13 254000 0 0
\r
5951 vtx: 2 -410845000 402590000 11 0 0 0 0
\r
5953 net: "Xff$XSlave$XXstiD$NTI_Out_$G1_$G3" 2 1 0 0 0 0 1
\r
5954 pin: 1 IC_2_CD4007_4.5
\r
5956 connect: 1 1 0 4 0
\r
5957 vtx: 1 -431165000 420370000 11 0 0 0 0
\r
5958 seg: 1 13 254000 0 0
\r
5959 vtx: 2 -424921172 420370000 0 0 0 0 0
\r
5960 seg: 2 13 254000 0 0
\r
5961 vtx: 3 -414475422 430815750 0 0 0 0 0
\r
5962 seg: 3 13 254000 0 0
\r
5963 vtx: 4 -414475422 440869578 0 0 0 0 0
\r
5964 seg: 4 13 254000 0 0
\r
5965 vtx: 5 -412115000 443230000 11 0 0 0 0
\r
5969 text: "+" -472440000 494030000 7 0 0 2540000 254000 0
\r
5971 text: "-" -472440000 496570000 7 0 0 2540000 254000 0
\r
5973 text: "CLK" -466090000 492125000 7 0 0 1270000 254000 0
\r
5975 text: "D" -465455000 500380000 7 0 0 1270000 254000 0
\r
5977 text: "Q" -462915000 500380000 7 0 0 1270000 254000 0
\r
5979 text: "Q" -461645000 492125000 7 0 0 1270000 254000 0
\r
5981 text: "_" -461645000 494030000 7 0 0 1270000 254000 0
\r
5983 text: "+" -472440000 417830000 7 0 0 2540000 254000 0
\r
5985 text: "-" -472440000 420370000 7 0 0 2540000 254000 0
\r
5987 text: "CLK" -466090000 415925000 7 0 0 1270000 254000 0
\r
5989 text: "D" -465455000 424180000 7 0 0 1270000 254000 0
\r
5991 text: "Q" -462915000 424180000 7 0 0 1270000 254000 0
\r
5993 text: "Q" -461645000 415925000 7 0 0 1270000 254000 0
\r
5995 text: "_" -461645000 417830000 7 0 0 1270000 254000 0
\r
5997 text: "+" -370840000 494030000 7 0 0 2540000 254000 0
\r
5999 text: "-" -370840000 496570000 7 0 0 2540000 254000 0
\r
6001 text: "CLK" -364490000 492125000 7 0 0 1270000 254000 0
\r
6003 text: "D" -363855000 500380000 7 0 0 1270000 254000 0
\r
6005 text: "Q" -361315000 500380000 7 0 0 1270000 254000 0
\r
6007 text: "Q" -360045000 492125000 7 0 0 1270000 254000 0
\r
6009 text: "_" -360045000 494030000 7 0 0 1270000 254000 0
\r
6011 text: "+" -370840000 417830000 7 0 0 2540000 254000 0
\r
6013 text: "-" -370840000 420370000 7 0 0 2540000 254000 0
\r
6015 text: "CLK" -364490000 415925000 7 0 0 1270000 254000 0
\r
6017 text: "D" -363855000 424180000 7 0 0 1270000 254000 0
\r
6019 text: "Q" -361315000 424180000 7 0 0 1270000 254000 0
\r
6021 text: "Q" -360045000 415925000 7 0 0 1270000 254000 0
\r
6023 text: "_" -360045000 417830000 7 0 0 1270000 254000 0
\r
6025 text: "J. Connelly, C. Patel, A. Chavez - Spring 2008" -408940000 381000000 7 0 0 1270000 177800 0
\r
6027 text: "http://jeff.tk/wiki/Trinary" -403860000 377190000 7 0 0 1270000 190500 0
\r
6029 text: "1" -419735000 382905000 7 0 0 1270000 127000 0
\r
6031 text: "2" -417576000 382905000 7 0 0 1270000 127000 0
\r
6033 text: "3" -415036000 382905000 7 0 0 1270000 127000 0
\r
6035 text: "4" -412750000 382905000 7 0 0 1270000 127000 0
\r
6037 text: "1" -429895000 382905000 7 0 0 1270000 127000 0
\r
6039 text: "2" -427736000 382905000 7 0 0 1270000 127000 0
\r
6041 text: "3" -425196000 382905000 7 0 0 1270000 127000 0
\r
6043 text: "4" -422910000 382905000 7 0 0 1270000 127000 0
\r
6045 text: "1" -440055000 382905000 7 0 0 1270000 127000 0
\r
6047 text: "2" -437896000 382905000 7 0 0 1270000 127000 0
\r
6049 text: "3" -435356000 382905000 7 0 0 1270000 127000 0
\r
6051 text: "4" -433070000 382905000 7 0 0 1270000 127000 0
\r
6053 text: "1" -450215000 382905000 7 0 0 1270000 127000 0
\r
6055 text: "2" -448056000 382905000 7 0 0 1270000 127000 0
\r
6057 text: "3" -445516000 382905000 7 0 0 1270000 127000 0
\r
6059 text: "4" -443230000 382905000 7 0 0 1270000 127000 0
\r
6061 text: "|" -421005000 379730000 7 0 0 2540000 127000 0
\r
6063 text: "|" -431165000 379730000 7 0 0 2540000 254000 0
\r
6065 text: "|" -441325000 379730000 7 0 0 2540000 254000 0
\r
6067 text: "|" -451485000 379730000 7 0 0 2540000 254000 0
\r
6069 text: "+" -482600000 379730000 7 0 0 1905000 254000 0
\r
6071 text: "0" -477520000 379730000 7 0 0 1905000 254000 0
\r
6073 text: "-" -472694000 379476000 7 0 0 1905000 254000 0
\r
6075 text: "GND" -455295000 382905000 7 0 0 1270000 254000 0
\r
6077 text: "+" -457835000 378460000 7 0 0 1270000 254000 0
\r
6079 text: "-" -457835000 382270000 7 0 0 1270000 254000 0
\r
6081 text: "4-TRIT MASTER-SLAVE TRI-FLOP BOARD" -553085000 379095000 7 0 0 1905000 254000 0
\r
6083 text: "CLK" -448945000 376555000 7 0 0 1270000 254000 0
\r
6085 text: "D" -436245000 376555000 7 0 0 1270000 254000 0
\r
6087 text: "Q" -426085000 376555000 7 0 0 1270000 254000 0
\r
6089 text: "Q" -415925000 376555000 7 0 0 1270000 127000 0
\r
6091 text: "_" -415925000 377952000 7 0 0 1270000 127000 0
\r
6093 text: "MEMORY" -464566000 458470000 7 0 0 2540000 254000 0
\r
6095 text: "(or, better yet, connect pin 5 to where 9 is connected, and disconnect 9)" -530860000 538480000 7 0 0 2540000 254000 0
\r
6097 text: "WARNING: THIS BOARD HAS AN ERROR. QUICK FIX: SHORT PIN 9 AND 5 ON ALL CHIPS" -540258000 543814000 7 0 0 2540000 254000 0
\r