6 full_library_folder: "c:\program files\freepcb\lib"
\r
9 SMT_connect_copper: "0"
\r
11 dsn_bounds_poly: "0"
\r
12 dsn_signals_poly: "0"
\r
13 autosave_interval: 0
\r
14 netlist_import_flags: 451
\r
17 visible_grid_spacing: 5080000.000000
\r
18 visible_grid_item: 100MIL
\r
19 visible_grid_item: 125MIL
\r
20 visible_grid_item: 200MIL
\r
21 visible_grid_item: 250MIL
\r
22 visible_grid_item: 400MIL
\r
23 visible_grid_item: 500MIL
\r
24 visible_grid_item: 1000MIL
\r
25 visible_grid_item: 1MM
\r
26 visible_grid_item: 2MM
\r
27 visible_grid_item: 2.5MM
\r
28 visible_grid_item: 4MM
\r
29 visible_grid_item: 5MM
\r
30 visible_grid_item: 10MM
\r
31 visible_grid_item: 20MM
\r
32 visible_grid_item: 25MM
\r
33 visible_grid_item: 40MM
\r
34 visible_grid_item: 50MM
\r
35 visible_grid_item: 100MM
\r
37 placement_grid_spacing: 2540000.000000
\r
38 placement_grid_item: 10MIL
\r
39 placement_grid_item: 20MIL
\r
40 placement_grid_item: 25MIL
\r
41 placement_grid_item: 40MIL
\r
42 placement_grid_item: 50MIL
\r
43 placement_grid_item: 100MIL
\r
44 placement_grid_item: 200MIL
\r
45 placement_grid_item: 250MIL
\r
46 placement_grid_item: 400MIL
\r
47 placement_grid_item: 500MIL
\r
48 placement_grid_item: 1000MIL
\r
49 placement_grid_item: 0.1MM
\r
50 placement_grid_item: 0.2MM
\r
51 placement_grid_item: 0.25MM
\r
52 placement_grid_item: 0.4MM
\r
53 placement_grid_item: 0.5MM
\r
54 placement_grid_item: 1MM
\r
55 placement_grid_item: 2MM
\r
56 placement_grid_item: 2.5MM
\r
57 placement_grid_item: 4MM
\r
58 placement_grid_item: 5MM
\r
59 placement_grid_item: 10MM
\r
61 routing_grid_spacing: 508000.000000
\r
62 routing_grid_item: 1MIL
\r
63 routing_grid_item: 2MIL
\r
64 routing_grid_item: 2.5MIL
\r
65 routing_grid_item: 3.33330709MIL
\r
66 routing_grid_item: 4MIL
\r
67 routing_grid_item: 5MIL
\r
68 routing_grid_item: 6.66665354MIL
\r
69 routing_grid_item: 10MIL
\r
70 routing_grid_item: 12.5MIL
\r
71 routing_grid_item: 16.66665354MIL
\r
72 routing_grid_item: 20MIL
\r
73 routing_grid_item: 25MIL
\r
74 routing_grid_item: 40MIL
\r
75 routing_grid_item: 50MIL
\r
76 routing_grid_item: 0.01MM
\r
77 routing_grid_item: 0.02MM
\r
78 routing_grid_item: 0.04MM
\r
79 routing_grid_item: 0.05MM
\r
80 routing_grid_item: 0.1MM
\r
81 routing_grid_item: 0.2MM
\r
82 routing_grid_item: 0.25MM
\r
83 routing_grid_item: 0.4MM
\r
84 routing_grid_item: 0.5MM
\r
85 routing_grid_item: 1MM
\r
86 routing_grid_item: 2MM
\r
87 routing_grid_item: 2.5MM
\r
88 routing_grid_item: 4MM
\r
89 routing_grid_item: 5MM
\r
90 routing_grid_item: 10MM
\r
94 fp_visible_grid_spacing: 5080000.000000
\r
95 fp_visible_grid_item: 100MIL
\r
96 fp_visible_grid_item: 125MIL
\r
97 fp_visible_grid_item: 200MIL
\r
98 fp_visible_grid_item: 250MIL
\r
99 fp_visible_grid_item: 400MIL
\r
100 fp_visible_grid_item: 500MIL
\r
101 fp_visible_grid_item: 1000MIL
\r
102 fp_visible_grid_item: 1MM
\r
103 fp_visible_grid_item: 2MM
\r
104 fp_visible_grid_item: 2.5MM
\r
105 fp_visible_grid_item: 4MM
\r
106 fp_visible_grid_item: 5MM
\r
107 fp_visible_grid_item: 10MM
\r
108 fp_visible_grid_item: 20MM
\r
109 fp_visible_grid_item: 25MM
\r
110 fp_visible_grid_item: 40MM
\r
111 fp_visible_grid_item: 50MM
\r
112 fp_visible_grid_item: 100MM
\r
114 fp_placement_grid_spacing: 2540000.000000
\r
115 fp_placement_grid_item: 10MIL
\r
116 fp_placement_grid_item: 20MIL
\r
117 fp_placement_grid_item: 25MIL
\r
118 fp_placement_grid_item: 40MIL
\r
119 fp_placement_grid_item: 50MIL
\r
120 fp_placement_grid_item: 100MIL
\r
121 fp_placement_grid_item: 200MIL
\r
122 fp_placement_grid_item: 250MIL
\r
123 fp_placement_grid_item: 400MIL
\r
124 fp_placement_grid_item: 500MIL
\r
125 fp_placement_grid_item: 1000MIL
\r
126 fp_placement_grid_item: 0.1MM
\r
127 fp_placement_grid_item: 0.2MM
\r
128 fp_placement_grid_item: 0.25MM
\r
129 fp_placement_grid_item: 0.4MM
\r
130 fp_placement_grid_item: 0.5MM
\r
131 fp_placement_grid_item: 1MM
\r
132 fp_placement_grid_item: 2MM
\r
133 fp_placement_grid_item: 2.5MM
\r
134 fp_placement_grid_item: 4MM
\r
135 fp_placement_grid_item: 5MM
\r
136 fp_placement_grid_item: 10MM
\r
140 fill_clearance: 254000
\r
141 mask_clearance: 203200
\r
142 thermal_width: 254000
\r
143 min_silkscreen_width: 127000
\r
144 board_outline_width: 127000
\r
145 hole_clearance: 381000
\r
146 pilot_diameter: 254000
\r
147 annular_ring_for_pins: 177800
\r
148 annular_ring_for_vias: 127000
\r
149 shrink_paste_mask: 0
\r
151 cam_layers: 15732735
\r
160 drc_check_unrouted: 0
\r
161 drc_trace_width: 254000
\r
162 drc_pad_pad: 254000
\r
163 drc_pad_trace: 254000
\r
164 drc_trace_trace: 254000
\r
165 drc_hole_copper: 381000
\r
166 drc_annular_ring_pins: 177800
\r
167 drc_annular_ring_vias: 127000
\r
168 drc_board_edge_copper: 635000
\r
169 drc_board_edge_hole: 635000
\r
170 drc_hole_hole: 635000
\r
171 drc_copper_copper: 254000
\r
173 default_trace_width: 254000
\r
174 default_via_pad_width: 711200
\r
175 default_via_hole_width: 355600
\r
177 width_menu_item: 1 152400 711200 355600
\r
178 width_menu_item: 2 203200 711200 355600
\r
179 width_menu_item: 3 254000 711200 355600
\r
180 width_menu_item: 4 304800 711200 355600
\r
181 width_menu_item: 5 381000 711200 355600
\r
182 width_menu_item: 6 508000 711200 355600
\r
183 width_menu_item: 7 635000 711200 355600
\r
186 layer_info: "selection" 0 255 255 255 1
\r
187 layer_info: "background" 1 0 0 0 1
\r
188 layer_info: "visible grid" 2 255 255 255 1
\r
189 layer_info: "highlight" 3 255 255 255 1
\r
190 layer_info: "DRC error" 4 255 128 64 1
\r
191 layer_info: "board outline" 5 0 0 255 1
\r
192 layer_info: "rat line" 6 255 0 255 1
\r
193 layer_info: "top silk" 7 255 255 0 1
\r
194 layer_info: "bottom silk" 8 255 192 192 1
\r
195 layer_info: "top sm cutout" 9 160 160 160 1
\r
196 layer_info: "bot sm cutout" 10 95 95 95 1
\r
197 layer_info: "thru pad" 11 0 0 255 1
\r
198 layer_info: "top copper" 12 0 255 0 1
\r
199 layer_info: "bottom copper" 13 255 0 0 1
\r
205 source: "PRINTED CIRCUIT DESIGN METHODS PAGE 411"
\r
207 sel_rect: -33 -33 33 133
\r
208 ref_text: 50 0 160 0 7
\r
212 top_pad: 2 50 25 25 0
\r
213 inner_pad: 1 50 25 25 0
\r
214 bottom_pad: 2 50 25 25 0
\r
215 pin: "2" 28 0 100 0
\r
216 top_pad: 1 50 25 25 0
\r
217 inner_pad: 1 50 25 25 0
\r
218 bottom_pad: 1 50 25 25 0
\r
221 author: "Jeff Connelly"
\r
222 source: "http://www.nkkswitches.com/pdf/SSnonilluminated.pdf"
\r
223 description: "NKK SP3T Switch"
\r
225 sel_rect: -15 -15 215 715
\r
226 ref_text: 100 0 800 0 10
\r
227 centroid: -842150451 -33155.529528 -33155.529528
\r
228 outline_polyline: 10 0 0
\r
229 next_corner: 200 0 0
\r
230 next_corner: 200 700 0
\r
231 next_corner: 0 700 0
\r
234 pin: "1" 45 100 100 0
\r
235 top_pad: 1 75 0 0 0
\r
236 inner_pad: 0 75 0 0 0
\r
237 bottom_pad: 1 75 0 0 0
\r
238 pin: "2" 45 100 200 0
\r
239 top_pad: 1 75 0 0 0
\r
240 inner_pad: 0 75 0 0 0
\r
241 bottom_pad: 1 75 0 0 0
\r
242 pin: "3" 45 100 300 0
\r
243 top_pad: 1 75 0 0 0
\r
244 inner_pad: 0 75 0 0 0
\r
245 bottom_pad: 1 75 0 0 0
\r
246 pin: "4" 45 100 500 0
\r
247 top_pad: 1 75 0 0 0
\r
248 inner_pad: 0 75 0 0 0
\r
249 bottom_pad: 1 75 0 0 0
\r
253 [solder_mask_cutouts]
\r
258 part: X$Xtrit_i$XX1
\r
259 ref_text: 2540000 254000 0 0 20320000
\r
260 package: "SS14MDP2"
\r
262 pos: 55880000 38100000 0 0 0
\r
265 ref_text: 1270000 177800 0 0 4064000
\r
266 package: "1X2HDR-100"
\r
267 shape: "1X2HDR-100"
\r
268 pos: 78740000 48260000 0 180 0
\r
271 ref_text: 1270000 177800 0 0 4064000
\r
272 package: "1X2HDR-100"
\r
273 shape: "1X2HDR-100"
\r
274 pos: 78740000 40640000 0 180 0
\r
276 part: X$Xtrit_0$XX1
\r
277 ref_text: 2540000 254000 0 0 20320000
\r
278 package: "SS14MDP2"
\r
280 pos: -9779000 37973000 0 0 0
\r
282 part: X$Xtrit_1$XX1
\r
283 ref_text: 2540000 254000 0 0 20320000
\r
284 package: "SS14MDP2"
\r
286 pos: 22860000 38100000 0 0 0
\r
290 net: "TRIT_i" 1 0 0 0 0 0 1
\r
291 pin: 1 X$Xtrit_i$XX1.4
\r
293 net: "$G_Vss" 4 3 0 0 0 0 1
\r
294 pin: 1 X$Xtrit_i$XX1.1
\r
295 pin: 2 V$Xpower$Vss.2
\r
296 pin: 3 X$Xtrit_0$XX1.1
\r
297 pin: 4 X$Xtrit_1$XX1.1
\r
299 vtx: 1 78740000 38100000 11 0 0 0 0
\r
300 seg: 1 12 254000 0 0
\r
301 vtx: 2 60960000 38100000 0 0 0 0 0
\r
302 seg: 2 12 254000 0 0
\r
303 vtx: 3 58420000 40640000 11 0 0 0 0
\r
305 vtx: 1 25400000 40640000 11 0 0 0 0
\r
306 seg: 1 12 254000 0 0
\r
307 vtx: 2 25400000 40640000 0 0 0 0 0
\r
308 seg: 2 12 254000 0 0
\r
309 vtx: 3 -7112000 40640000 0 0 0 0 0
\r
310 seg: 3 12 254000 0 0
\r
311 vtx: 4 -7239000 40513000 11 0 0 0 0
\r
313 vtx: 1 25400000 40640000 11 0 0 0 0
\r
314 seg: 1 12 254000 0 0
\r
315 vtx: 2 57912000 40640000 0 0 0 0 0
\r
316 seg: 2 12 254000 0 0
\r
317 vtx: 3 58420000 40640000 11 0 0 0 0
\r
319 net: "$G_Vdd" 4 3 0 0 0 0 1
\r
320 pin: 1 X$Xtrit_i$XX1.3
\r
321 pin: 2 V$Xpower$Vdd.1
\r
322 pin: 3 X$Xtrit_0$XX1.3
\r
323 pin: 4 X$Xtrit_1$XX1.3
\r
325 vtx: 1 78740000 48260000 11 0 0 0 0
\r
326 seg: 1 12 254000 0 0
\r
327 vtx: 2 78232000 48260000 0 0 0 0 0
\r
328 seg: 2 12 254000 0 0
\r
329 vtx: 3 60960000 48260000 0 0 0 0 0
\r
330 seg: 3 12 254000 0 0
\r
331 vtx: 4 58420000 45720000 11 0 0 0 0
\r
333 vtx: 1 25400000 45720000 11 0 0 0 0
\r
334 seg: 1 12 254000 0 0
\r
335 vtx: 2 25908000 45720000 0 0 0 0 0
\r
336 seg: 2 12 254000 0 0
\r
337 vtx: 3 25781000 45593000 0 0 0 0 0
\r
338 seg: 3 12 254000 0 0
\r
339 vtx: 4 -7239000 45593000 11 0 0 0 0
\r
341 vtx: 1 25400000 45720000 11 0 0 0 0
\r
342 seg: 1 12 254000 0 0
\r
343 vtx: 2 58928000 45720000 0 0 0 0 0
\r
344 seg: 2 12 254000 0 0
\r
345 vtx: 3 58420000 45720000 11 0 0 0 0
\r
347 net: "TRIT_0" 1 0 0 0 0 0 1
\r
348 pin: 1 X$Xtrit_0$XX1.4
\r
350 net: "0" 5 4 0 0 0 0 1
\r
351 pin: 1 X$Xtrit_i$XX1.2
\r
352 pin: 2 V$Xpower$Vdd.2
\r
353 pin: 3 V$Xpower$Vss.1
\r
354 pin: 4 X$Xtrit_0$XX1.2
\r
355 pin: 5 X$Xtrit_1$XX1.2
\r
357 vtx: 1 78740000 40640000 11 0 0 0 0
\r
358 seg: 1 12 254000 0 0
\r
359 vtx: 2 81280000 40640000 0 0 0 0 0
\r
360 seg: 2 12 254000 0 0
\r
361 vtx: 3 81280000 45720000 0 0 0 0 0
\r
362 seg: 3 12 254000 0 0
\r
363 vtx: 4 78740000 45720000 11 0 0 0 0
\r
365 vtx: 1 78740000 40640000 11 0 0 0 0
\r
366 seg: 1 12 254000 0 0
\r
367 vtx: 2 64008000 40640000 0 0 0 0 0
\r
368 seg: 2 12 254000 0 0
\r
369 vtx: 3 61976000 40640000 0 0 0 0 0
\r
370 seg: 3 12 254000 0 0
\r
371 vtx: 4 58928000 43688000 0 0 0 0 0
\r
372 seg: 4 12 254000 0 0
\r
373 vtx: 5 58420000 43180000 11 0 0 0 0
\r
375 vtx: 1 25400000 43180000 11 0 0 0 0
\r
376 seg: 1 12 254000 0 0
\r
377 vtx: 2 25908000 43688000 0 0 0 0 0
\r
378 seg: 2 12 254000 0 0
\r
379 vtx: 3 25273000 43053000 0 0 0 0 0
\r
380 seg: 3 12 254000 0 0
\r
381 vtx: 4 -7239000 43053000 11 0 0 0 0
\r
383 vtx: 1 25400000 43180000 11 0 0 0 0
\r
384 seg: 1 12 254000 0 0
\r
385 vtx: 2 57912000 43180000 0 0 0 0 0
\r
386 seg: 2 12 254000 0 0
\r
387 vtx: 3 58420000 43180000 11 0 0 0 0
\r
389 net: "TRIT_1" 1 0 0 0 0 0 1
\r
390 pin: 1 X$Xtrit_1$XX1.4
\r