6 full_library_folder: "c:\program files\freepcb\lib"
\r
8 ses_file_path: "Z:\trinary\code\bb\sign_detector.ses"
\r
9 SMT_connect_copper: "0"
\r
11 dsn_bounds_poly: "0"
\r
12 dsn_signals_poly: "0"
\r
13 autosave_interval: 0
\r
14 netlist_import_flags: 455
\r
17 visible_grid_spacing: 5080000.000000
\r
18 visible_grid_item: 100MIL
\r
19 visible_grid_item: 125MIL
\r
20 visible_grid_item: 200MIL
\r
21 visible_grid_item: 250MIL
\r
22 visible_grid_item: 400MIL
\r
23 visible_grid_item: 500MIL
\r
24 visible_grid_item: 1000MIL
\r
25 visible_grid_item: 1MM
\r
26 visible_grid_item: 2MM
\r
27 visible_grid_item: 2.5MM
\r
28 visible_grid_item: 4MM
\r
29 visible_grid_item: 5MM
\r
30 visible_grid_item: 10MM
\r
31 visible_grid_item: 20MM
\r
32 visible_grid_item: 25MM
\r
33 visible_grid_item: 40MM
\r
34 visible_grid_item: 50MM
\r
35 visible_grid_item: 100MM
\r
37 placement_grid_spacing: 1270000.000000
\r
38 placement_grid_item: 10MIL
\r
39 placement_grid_item: 20MIL
\r
40 placement_grid_item: 25MIL
\r
41 placement_grid_item: 40MIL
\r
42 placement_grid_item: 50MIL
\r
43 placement_grid_item: 100MIL
\r
44 placement_grid_item: 200MIL
\r
45 placement_grid_item: 250MIL
\r
46 placement_grid_item: 400MIL
\r
47 placement_grid_item: 500MIL
\r
48 placement_grid_item: 1000MIL
\r
49 placement_grid_item: 0.1MM
\r
50 placement_grid_item: 0.2MM
\r
51 placement_grid_item: 0.25MM
\r
52 placement_grid_item: 0.4MM
\r
53 placement_grid_item: 0.5MM
\r
54 placement_grid_item: 1MM
\r
55 placement_grid_item: 2MM
\r
56 placement_grid_item: 2.5MM
\r
57 placement_grid_item: 4MM
\r
58 placement_grid_item: 5MM
\r
59 placement_grid_item: 10MM
\r
61 routing_grid_spacing: 508000.000000
\r
62 routing_grid_item: 1MIL
\r
63 routing_grid_item: 2MIL
\r
64 routing_grid_item: 2.5MIL
\r
65 routing_grid_item: 3.33330709MIL
\r
66 routing_grid_item: 4MIL
\r
67 routing_grid_item: 5MIL
\r
68 routing_grid_item: 6.6665748MIL
\r
69 routing_grid_item: 10MIL
\r
70 routing_grid_item: 12.5MIL
\r
71 routing_grid_item: 16.6665748MIL
\r
72 routing_grid_item: 20MIL
\r
73 routing_grid_item: 25MIL
\r
74 routing_grid_item: 40MIL
\r
75 routing_grid_item: 50MIL
\r
76 routing_grid_item: 0.01MM
\r
77 routing_grid_item: 0.02MM
\r
78 routing_grid_item: 0.04MM
\r
79 routing_grid_item: 0.05MM
\r
80 routing_grid_item: 0.1MM
\r
81 routing_grid_item: 0.2MM
\r
82 routing_grid_item: 0.25MM
\r
83 routing_grid_item: 0.4MM
\r
84 routing_grid_item: 0.5MM
\r
85 routing_grid_item: 1MM
\r
86 routing_grid_item: 2MM
\r
87 routing_grid_item: 2.5MM
\r
88 routing_grid_item: 4MM
\r
89 routing_grid_item: 5MM
\r
90 routing_grid_item: 10MM
\r
94 fp_visible_grid_spacing: 5080000.000000
\r
95 fp_visible_grid_item: 100MIL
\r
96 fp_visible_grid_item: 125MIL
\r
97 fp_visible_grid_item: 200MIL
\r
98 fp_visible_grid_item: 250MIL
\r
99 fp_visible_grid_item: 400MIL
\r
100 fp_visible_grid_item: 500MIL
\r
101 fp_visible_grid_item: 1000MIL
\r
102 fp_visible_grid_item: 1MM
\r
103 fp_visible_grid_item: 2MM
\r
104 fp_visible_grid_item: 2.5MM
\r
105 fp_visible_grid_item: 4MM
\r
106 fp_visible_grid_item: 5MM
\r
107 fp_visible_grid_item: 10MM
\r
108 fp_visible_grid_item: 20MM
\r
109 fp_visible_grid_item: 25MM
\r
110 fp_visible_grid_item: 40MM
\r
111 fp_visible_grid_item: 50MM
\r
112 fp_visible_grid_item: 100MM
\r
114 fp_placement_grid_spacing: 2540000.000000
\r
115 fp_placement_grid_item: 10MIL
\r
116 fp_placement_grid_item: 20MIL
\r
117 fp_placement_grid_item: 25MIL
\r
118 fp_placement_grid_item: 40MIL
\r
119 fp_placement_grid_item: 50MIL
\r
120 fp_placement_grid_item: 100MIL
\r
121 fp_placement_grid_item: 200MIL
\r
122 fp_placement_grid_item: 250MIL
\r
123 fp_placement_grid_item: 400MIL
\r
124 fp_placement_grid_item: 500MIL
\r
125 fp_placement_grid_item: 1000MIL
\r
126 fp_placement_grid_item: 0.1MM
\r
127 fp_placement_grid_item: 0.2MM
\r
128 fp_placement_grid_item: 0.25MM
\r
129 fp_placement_grid_item: 0.4MM
\r
130 fp_placement_grid_item: 0.5MM
\r
131 fp_placement_grid_item: 1MM
\r
132 fp_placement_grid_item: 2MM
\r
133 fp_placement_grid_item: 2.5MM
\r
134 fp_placement_grid_item: 4MM
\r
135 fp_placement_grid_item: 5MM
\r
136 fp_placement_grid_item: 10MM
\r
140 fill_clearance: 254000
\r
141 mask_clearance: 203200
\r
142 thermal_width: 254000
\r
143 min_silkscreen_width: 127000
\r
144 board_outline_width: 127000
\r
145 hole_clearance: 381000
\r
146 pilot_diameter: 254000
\r
147 annular_ring_for_pins: 177800
\r
148 annular_ring_for_vias: 127000
\r
149 shrink_paste_mask: 0
\r
151 cam_layers: 15732735
\r
160 drc_check_unrouted: 1
\r
161 drc_trace_width: 254000
\r
162 drc_pad_pad: 254000
\r
163 drc_pad_trace: 254000
\r
164 drc_trace_trace: 254000
\r
165 drc_hole_copper: 381000
\r
166 drc_annular_ring_pins: 177800
\r
167 drc_annular_ring_vias: 127000
\r
168 drc_board_edge_copper: 635000
\r
169 drc_board_edge_hole: 635000
\r
170 drc_hole_hole: 635000
\r
171 drc_copper_copper: 254000
\r
173 default_trace_width: 254000
\r
174 default_via_pad_width: 711200
\r
175 default_via_hole_width: 355600
\r
177 width_menu_item: 1 152400 711200 355600
\r
178 width_menu_item: 2 203200 711200 355600
\r
179 width_menu_item: 3 254000 711200 355600
\r
180 width_menu_item: 4 304800 711200 355600
\r
181 width_menu_item: 5 381000 711200 355600
\r
182 width_menu_item: 6 508000 711200 355600
\r
183 width_menu_item: 7 635000 711200 355600
\r
186 layer_info: "selection" 0 255 255 255 1
\r
187 layer_info: "background" 1 0 0 0 1
\r
188 layer_info: "visible grid" 2 255 255 255 1
\r
189 layer_info: "highlight" 3 255 255 255 1
\r
190 layer_info: "DRC error" 4 255 128 64 1
\r
191 layer_info: "board outline" 5 0 0 255 1
\r
192 layer_info: "rat line" 6 255 0 255 1
\r
193 layer_info: "top silk" 7 255 255 0 1
\r
194 layer_info: "bottom silk" 8 255 192 192 1
\r
195 layer_info: "top sm cutout" 9 160 160 160 1
\r
196 layer_info: "bot sm cutout" 10 95 95 95 1
\r
197 layer_info: "thru pad" 11 0 0 255 1
\r
198 layer_info: "top copper" 12 0 255 0 1
\r
199 layer_info: "bottom copper" 13 255 0 0 1
\r
203 name: "4X2HDR-100-40"
\r
204 author: "Coupillie Rudy"
\r
206 sel_rect: -45 -45 345 145
\r
207 ref_text: 50 150 160 0 7
\r
211 top_pad: 4 70 35 35 15
\r
212 inner_pad: 1 70 25 25 0
\r
213 bottom_pad: 4 70 35 35 15
\r
214 pin: "2" 40 0 100 0
\r
215 top_pad: 1 70 25 25 0
\r
216 inner_pad: 1 70 25 25 0
\r
217 bottom_pad: 1 70 25 25 0
\r
218 pin: "3" 40 100 0 0
\r
219 top_pad: 1 70 25 25 0
\r
220 inner_pad: 1 70 25 25 0
\r
221 bottom_pad: 1 70 25 25 0
\r
222 pin: "4" 40 100 100 0
\r
223 top_pad: 1 70 25 25 0
\r
224 inner_pad: 1 70 25 25 0
\r
225 bottom_pad: 1 70 25 25 0
\r
226 pin: "5" 40 200 0 0
\r
227 top_pad: 1 70 25 25 0
\r
228 inner_pad: 1 70 25 25 0
\r
229 bottom_pad: 1 70 25 25 0
\r
230 pin: "6" 40 200 100 0
\r
231 top_pad: 1 70 25 25 0
\r
232 inner_pad: 1 70 25 25 0
\r
233 bottom_pad: 1 70 25 25 0
\r
234 pin: "7" 40 300 0 0
\r
235 top_pad: 1 70 25 25 0
\r
236 inner_pad: 1 70 25 25 0
\r
237 bottom_pad: 1 70 25 25 0
\r
238 pin: "8" 40 300 100 0
\r
239 top_pad: 1 70 25 25 0
\r
240 inner_pad: 1 70 25 25 0
\r
241 bottom_pad: 1 70 25 25 0
\r
245 source: "DIGIKEY CATALOG NO. 941, PAGE 64"
\r
247 sel_rect: -58 -35 658 335
\r
248 ref_text: 50 -100 150 270 7
\r
249 centroid: 0 300 150
\r
250 outline_polyline: 7 -50 50
\r
251 next_corner: 650 50 0
\r
252 next_corner: 650 250 0
\r
253 next_corner: -50 250 0
\r
255 outline_polyline: 7 -50 100
\r
256 next_corner: 0 100 0
\r
257 next_corner: 0 200 0
\r
258 next_corner: -50 200 0
\r
262 top_pad: 2 55 27 27 0
\r
263 inner_pad: 1 55 27 27 0
\r
264 bottom_pad: 2 55 27 27 0
\r
265 pin: "2" 28 100 0 0
\r
266 top_pad: 1 55 27 27 0
\r
267 inner_pad: 1 55 27 27 0
\r
268 bottom_pad: 1 55 27 27 0
\r
269 pin: "3" 28 200 0 0
\r
270 top_pad: 1 55 27 27 0
\r
271 inner_pad: 1 55 27 27 0
\r
272 bottom_pad: 1 55 27 27 0
\r
273 pin: "4" 28 300 0 0
\r
274 top_pad: 1 55 27 27 0
\r
275 inner_pad: 1 55 27 27 0
\r
276 bottom_pad: 1 55 27 27 0
\r
277 pin: "5" 28 400 0 0
\r
278 top_pad: 1 55 27 27 0
\r
279 inner_pad: 1 55 27 27 0
\r
280 bottom_pad: 1 55 27 27 0
\r
281 pin: "6" 28 500 0 0
\r
282 top_pad: 1 55 27 27 0
\r
283 inner_pad: 1 55 27 27 0
\r
284 bottom_pad: 1 55 27 27 0
\r
285 pin: "7" 28 600 0 0
\r
286 top_pad: 1 55 27 27 0
\r
287 inner_pad: 1 55 27 27 0
\r
288 bottom_pad: 1 55 27 27 0
\r
289 pin: "8" 28 600 300 0
\r
290 top_pad: 1 55 27 27 0
\r
291 inner_pad: 1 55 27 27 0
\r
292 bottom_pad: 1 55 27 27 0
\r
293 pin: "9" 28 500 300 0
\r
294 top_pad: 1 55 27 27 0
\r
295 inner_pad: 1 55 27 27 0
\r
296 bottom_pad: 1 55 27 27 0
\r
297 pin: "10" 28 400 300 0
\r
298 top_pad: 1 55 27 27 0
\r
299 inner_pad: 1 55 27 27 0
\r
300 bottom_pad: 1 55 27 27 0
\r
301 pin: "11" 28 300 300 0
\r
302 top_pad: 1 55 27 27 0
\r
303 inner_pad: 1 55 27 27 0
\r
304 bottom_pad: 1 55 27 27 0
\r
305 pin: "12" 28 200 300 0
\r
306 top_pad: 1 55 27 27 0
\r
307 inner_pad: 1 55 27 27 0
\r
308 bottom_pad: 1 55 27 27 0
\r
309 pin: "13" 28 100 300 0
\r
310 top_pad: 1 55 27 27 0
\r
311 inner_pad: 1 55 27 27 0
\r
312 bottom_pad: 1 55 27 27 0
\r
313 pin: "14" 28 0 300 0
\r
314 top_pad: 1 55 27 27 0
\r
315 inner_pad: 1 55 27 27 0
\r
316 bottom_pad: 1 55 27 27 0
\r
320 source: "DIGITAL PRINTED CIRCUIT DESIGN & DRAFTING, PAGE 408"
\r
322 sel_rect: -45 -57 545 57
\r
323 ref_text: 50 250 99 0 7
\r
325 outline_polyline: 7 109 49
\r
326 next_corner: 391 49 0
\r
327 next_corner: 391 -49 0
\r
328 next_corner: 109 -49 0
\r
332 top_pad: 1 75 37 37 0
\r
333 inner_pad: 1 75 37 37 0
\r
334 bottom_pad: 1 75 37 37 0
\r
335 pin: "2" 35 500 0 0
\r
336 top_pad: 1 75 37 37 0
\r
337 inner_pad: 1 75 37 37 0
\r
338 bottom_pad: 1 75 37 37 0
\r
344 corner: 2 0 93980000 0
\r
345 corner: 3 115570000 93980000 0
\r
346 corner: 4 115570000 0 0
\r
348 [solder_mask_cutouts]
\r
354 ref_text: 1270000 177800 270 -2540000 -1270000
\r
355 package: "14DIP300"
\r
357 pos: 30099000 26466800 0 90 0
\r
360 ref_text: 1270000 177800 270 -2540000 -1270000
\r
361 package: "14DIP300"
\r
363 pos: 80899000 26466800 0 90 0
\r
366 ref_text: 1270000 177800 270 -2540000 -1270000
\r
367 package: "14DIP300"
\r
369 pos: 106299000 56946800 0 90 0
\r
372 ref_text: 1270000 177800 270 -2540000 -1270000
\r
373 package: "14DIP300"
\r
375 pos: 55499000 56946800 0 90 0
\r
378 ref_text: 1270000 177800 270 -2540000 -1270000
\r
379 package: "14DIP300"
\r
381 pos: 80899000 56946800 0 90 0
\r
384 ref_text: 1270000 177800 270 -2540000 -1270000
\r
385 package: "14DIP300"
\r
387 pos: 55499000 26466800 0 90 0
\r
390 ref_text: 1270000 177800 270 -2540000 -1270000
\r
391 package: "14DIP300"
\r
393 pos: 4699000 56946800 0 90 0
\r
396 ref_text: 1270000 177800 270 -2540000 -1270000
\r
397 package: "14DIP300"
\r
399 pos: 30099000 56946800 0 90 0
\r
402 ref_text: 1270000 177800 270 -2540000 -1270000
\r
403 package: "14DIP300"
\r
405 pos: 4699000 26466800 0 90 0
\r
408 ref_text: 1270000 177800 270 -3810000 -1270000
\r
409 package: "14DIP300"
\r
411 pos: 4699000 87426800 0 90 0
\r
414 ref_text: 1270000 177800 270 -2540000 -5080000
\r
415 package: "14DIP300"
\r
417 pos: 106299000 26466800 0 90 0
\r
420 ref_text: 1270000 177800 270 -3810000 -1270000
\r
421 package: "14DIP300"
\r
423 pos: 30099000 87426800 0 90 0
\r
426 ref_text: 1270000 177800 270 -3810000 -1270000
\r
427 package: "14DIP300"
\r
429 pos: 55499000 87426800 0 90 0
\r
432 ref_text: 1270000 177800 270 -3810000 -6350000
\r
433 package: "14DIP300"
\r
435 pos: 106299000 87426800 0 90 0
\r
438 ref_text: 1270000 177800 0 2540000 7874000
\r
440 shape: "4X2HDR-100-40"
\r
441 pos: 67310000 3810000 0 0 0
\r
444 ref_text: 1270000 177800 0 6350000 2514600
\r
447 pos: 78740000 86360000 0 0 0
\r
450 ref_text: 1270000 177800 0 6350000 2514600
\r
453 pos: 78740000 78740000 0 0 0
\r
456 ref_text: 1270000 177800 0 6350000 2514600
\r
459 pos: 78740000 71120000 0 0 0
\r
463 net: "XX2$XXcheckI2$XXdecoder$XX1sti$PTI_Out" 2 1 0 0 0 0 1
\r
464 pin: 1 IC_CD4007_2.1
\r
467 vtx: 1 106299000 51866800 11 0 0 0 0
\r
468 seg: 1 13 254000 0 0
\r
469 vtx: 2 106234230 51866800 0 0 0 0 0
\r
470 seg: 2 13 254000 0 0
\r
471 vtx: 3 93420946 39053516 0 0 0 0 0
\r
472 seg: 3 13 254000 0 0
\r
473 vtx: 4 93420946 36938966 0 0 711200 355600 0
\r
474 seg: 4 12 254000 0 0
\r
475 vtx: 5 82948780 26466800 0 0 0 0 0
\r
476 seg: 5 12 254000 0 0
\r
477 vtx: 6 80899000 26466800 11 0 0 0 0
\r
479 net: "XX2$XXcheckI2$CTRL_C" 4 3 0 0 0 0 1
\r
480 pin: 1 IC_CD4016_1.5
\r
483 pin: 4 IC_CD4007_5.6
\r
484 connect: 1 1 0 18 0
\r
485 vtx: 1 113919000 49326800 11 0 0 0 0
\r
486 seg: 1 12 254000 0 0
\r
487 vtx: 2 113835180 49326800 0 0 0 0 0
\r
488 seg: 2 12 254000 0 0
\r
489 vtx: 3 110537244 46028864 0 0 0 0 0
\r
490 seg: 3 12 254000 0 0
\r
491 vtx: 4 110537244 43337988 0 0 0 0 0
\r
492 seg: 4 12 254000 0 0
\r
493 vtx: 5 107062778 39863776 0 0 0 0 0
\r
494 seg: 5 12 254000 0 0
\r
495 vtx: 6 85355938 39863776 0 0 0 0 0
\r
496 seg: 6 12 254000 0 0
\r
497 vtx: 7 83510374 41709594 0 0 0 0 21897
\r
498 seg: 7 12 254000 0 0
\r
499 vtx: 8 80970882 39170102 0 0 0 0 0
\r
500 seg: 8 12 254000 0 0
\r
501 vtx: 9 75103736 39170102 0 0 0 0 0
\r
502 seg: 9 12 254000 0 0
\r
503 vtx: 10 64645286 29219398 0 0 0 0 0
\r
504 seg: 10 12 254000 0 0
\r
505 vtx: 11 62750954 28711398 0 0 0 0 0
\r
506 seg: 11 12 254000 0 0
\r
507 vtx: 12 58212990 24173688 0 0 0 0 0
\r
508 seg: 12 12 254000 0 0
\r
509 vtx: 13 58212990 11329670 0 0 0 0 0
\r
510 seg: 13 12 254000 0 0
\r
511 vtx: 14 56267350 9384030 0 0 0 0 0
\r
512 seg: 14 12 254000 0 0
\r
513 vtx: 15 36957508 9384030 0 0 0 0 0
\r
514 seg: 15 12 254000 0 0
\r
515 vtx: 16 33231074 13110464 0 0 0 0 0
\r
516 seg: 16 12 254000 0 0
\r
517 vtx: 17 33231074 13250926 0 0 0 0 0
\r
518 seg: 17 12 254000 0 0
\r
519 vtx: 18 30175200 16306800 0 0 0 0 0
\r
520 seg: 18 12 254000 0 0
\r
521 vtx: 19 30099000 16306800 11 0 0 0 0
\r
523 vtx: 1 113919000 51866800 11 0 0 0 0
\r
524 seg: 1 13 254000 0 0
\r
525 vtx: 2 113919000 49326800 11 0 0 0 0
\r
526 connect: 3 3 -1 2 0
\r
527 vtx: 1 80899000 44246800 11 0 0 0 0
\r
528 seg: 1 12 254000 0 0
\r
529 vtx: 2 80972914 44246800 0 0 0 0 0
\r
530 seg: 2 12 254000 0 0
\r
531 vtx: 3 83510374 41709594 0 0 0 0 21897
\r
533 net: "XX2$XXcheckI2$XXdecoder$XX0nor$NI" 2 1 0 0 0 0 1
\r
534 pin: 1 IC_CD4007_5.2
\r
535 pin: 2 IC_CD4007_5.13
\r
537 vtx: 1 88519000 54406800 11 0 0 0 0
\r
538 seg: 1 13 254000 0 0
\r
539 vtx: 2 80899000 54406800 11 0 0 0 0
\r
541 net: "Vss" 22 22 1 508000 711200 355600 1
\r
542 pin: 1 IC_CD4016_1.1
\r
543 pin: 2 IC_CD4016_1.7
\r
544 pin: 3 IC_CD4016_1.11
\r
545 pin: 4 IC_CD4007_2.4
\r
546 pin: 5 IC_CD4007_2.7
\r
547 pin: 6 IC_CD4007_4.4
\r
548 pin: 7 IC_CD4007_4.7
\r
549 pin: 8 IC_CD4007_5.4
\r
550 pin: 9 IC_CD4007_5.7
\r
551 pin: 10 IC_CD4016_7.7
\r
552 pin: 11 IC_CD4016_7.8
\r
553 pin: 12 IC_CD4007_8.4
\r
554 pin: 13 IC_CD4007_8.7
\r
555 pin: 14 IC_CD4007_9.4
\r
556 pin: 15 IC_CD4007_9.7
\r
557 pin: 16 IC_CD4016_11.7
\r
558 pin: 17 IC_CD4007_12.4
\r
559 pin: 18 IC_CD4007_12.7
\r
560 pin: 19 IC_CD4007_13.7
\r
561 pin: 20 IC_CD4007_15.4
\r
562 pin: 21 IC_CD4007_15.7
\r
564 connect: 1 1 -1 2 0
\r
565 vtx: 1 30099000 11226800 11 0 0 0 0
\r
566 seg: 1 12 508000 0 0
\r
567 vtx: 2 30099000 6570980 0 0 0 0 0
\r
568 seg: 2 12 508000 0 0
\r
569 vtx: 3 30564836 6105398 0 0 0 0 0
\r
570 connect: 2 12 0 4 0
\r
571 vtx: 1 30099000 41706800 11 0 0 0 0
\r
572 seg: 1 12 508000 0 0
\r
573 vtx: 2 32590486 39215314 0 0 0 0 12560
\r
574 seg: 2 12 508000 0 0
\r
575 vtx: 3 32590486 26989786 0 0 0 0 0
\r
576 seg: 3 12 508000 0 0
\r
577 vtx: 4 32067500 26466800 0 0 0 0 29185
\r
578 seg: 4 12 508000 0 0
\r
579 vtx: 5 30099000 26466800 11 0 0 0 0
\r
581 vtx: 1 37719000 18846800 11 0 0 0 0
\r
582 seg: 1 13 508000 0 0
\r
583 vtx: 2 37459666 18846800 0 0 0 0 0
\r
584 seg: 2 13 508000 0 0
\r
585 vtx: 3 34593276 15980664 0 0 0 0 0
\r
586 seg: 3 13 508000 0 0
\r
587 vtx: 4 34593276 15476474 0 0 0 0 0
\r
588 seg: 4 13 508000 0 0
\r
589 vtx: 5 30343602 11226800 0 0 0 0 0
\r
590 seg: 5 13 508000 0 0
\r
591 vtx: 6 30099000 11226800 11 0 0 0 0
\r
593 vtx: 1 80899000 11226800 11 0 0 0 0
\r
594 seg: 1 12 508000 0 0
\r
595 vtx: 2 81149444 11226800 0 0 0 0 0
\r
596 seg: 2 12 508000 0 0
\r
597 vtx: 3 82879184 12956794 0 0 0 0 7799
\r
598 seg: 3 12 508000 0 0
\r
599 vtx: 4 82879184 17130014 0 0 0 0 0
\r
600 seg: 4 12 508000 0 0
\r
601 vtx: 5 81162652 18846800 0 0 0 0 0
\r
602 seg: 5 12 508000 0 0
\r
603 vtx: 6 80899000 18846800 11 0 0 0 0
\r
605 vtx: 1 80899000 41706800 11 0 0 0 0
\r
606 seg: 1 13 508000 0 0
\r
607 vtx: 2 78923896 39731696 0 0 0 0 0
\r
608 seg: 2 13 508000 0 0
\r
609 vtx: 3 78923896 20577048 0 0 0 0 0
\r
610 seg: 3 13 508000 0 0
\r
611 vtx: 4 80654398 18846800 0 0 0 0 0
\r
612 seg: 4 13 508000 0 0
\r
613 vtx: 5 80899000 18846800 11 0 0 0 0
\r
614 connect: 6 21 4 5 0
\r
615 vtx: 1 72390000 3810000 11 0 0 0 0
\r
616 seg: 1 12 508000 0 0
\r
617 vtx: 2 72390000 3278124 0 0 0 0 0
\r
618 seg: 2 12 508000 0 0
\r
619 vtx: 3 74020426 1647444 0 0 0 0 0
\r
620 seg: 3 12 508000 0 0
\r
621 vtx: 4 75822302 1647444 0 0 0 0 0
\r
622 seg: 4 12 508000 0 0
\r
623 vtx: 5 80899000 6724142 0 0 0 0 0
\r
624 seg: 5 12 508000 0 0
\r
625 vtx: 6 80899000 11226800 11 0 0 0 0
\r
626 connect: 7 7 5 11 0
\r
627 vtx: 1 80899000 49326800 11 0 0 0 0
\r
628 seg: 1 12 508000 0 0
\r
629 vtx: 2 80644746 49326800 0 0 0 0 0
\r
630 seg: 2 12 508000 0 0
\r
631 vtx: 3 78922372 47604426 0 0 0 0 0
\r
632 seg: 3 12 508000 0 0
\r
633 vtx: 4 78922372 43433238 0 0 0 0 25678
\r
634 seg: 4 12 508000 0 0
\r
635 vtx: 5 75993244 43433238 0 0 0 0 0
\r
636 seg: 5 12 508000 0 0
\r
637 vtx: 6 72297798 39737538 0 0 0 0 0
\r
638 seg: 6 12 508000 0 0
\r
639 vtx: 7 61959998 39737538 0 0 0 0 0
\r
640 seg: 7 12 508000 0 0
\r
641 vtx: 8 58270648 43426888 0 0 0 0 0
\r
642 seg: 8 12 508000 0 0
\r
643 vtx: 9 57468262 43426888 0 0 0 0 11448
\r
644 seg: 9 12 508000 0 0
\r
645 vtx: 10 57468262 47621190 0 0 0 0 0
\r
646 seg: 10 12 508000 0 0
\r
647 vtx: 11 55762652 49326800 0 0 0 0 0
\r
648 seg: 11 12 508000 0 0
\r
649 vtx: 12 55499000 49326800 11 0 0 0 0
\r
650 connect: 8 20 7 7 0
\r
651 vtx: 1 106299000 72186800 11 0 0 0 0
\r
652 seg: 1 12 508000 0 0
\r
653 vtx: 2 94963234 60851034 0 0 0 0 0
\r
654 seg: 2 12 508000 0 0
\r
655 vtx: 3 82498438 60851034 0 0 711200 355600 0
\r
656 seg: 3 13 508000 0 0
\r
657 vtx: 4 81605882 60851034 0 0 0 0 0
\r
658 seg: 4 13 508000 0 0
\r
659 vtx: 5 78930500 58175906 0 0 0 0 0
\r
660 seg: 5 13 508000 0 0
\r
661 vtx: 6 78930500 51049174 0 0 0 0 0
\r
662 seg: 6 13 508000 0 0
\r
663 vtx: 7 80652874 49326800 0 0 0 0 0
\r
664 seg: 7 13 508000 0 0
\r
665 vtx: 8 80899000 49326800 11 0 0 0 0
\r
666 connect: 9 13 9 4 0
\r
667 vtx: 1 4699000 18846800 11 0 0 0 0
\r
668 seg: 1 12 508000 0 0
\r
669 vtx: 2 4431030 18846800 0 0 0 0 0
\r
670 seg: 2 12 508000 0 0
\r
671 vtx: 3 2219198 21058886 0 0 0 0 0
\r
672 seg: 3 12 508000 0 0
\r
673 vtx: 4 2219198 39226998 0 0 0 0 0
\r
674 seg: 4 12 508000 0 0
\r
675 vtx: 5 4699000 41706800 11 0 0 0 0
\r
676 connect: 10 10 9 1 0
\r
677 vtx: 1 12319000 41706800 11 0 0 0 0
\r
678 seg: 1 12 508000 0 0
\r
679 vtx: 2 4699000 41706800 11 0 0 0 0
\r
680 connect: 11 11 10 3 0
\r
681 vtx: 1 30099000 49326800 11 0 0 0 0
\r
682 seg: 1 12 508000 0 0
\r
683 vtx: 2 23643590 49326800 0 0 0 0 0
\r
684 seg: 2 12 508000 0 0
\r
685 vtx: 3 16023590 41706800 0 0 0 0 0
\r
686 seg: 3 12 508000 0 0
\r
687 vtx: 4 12319000 41706800 11 0 0 0 0
\r
688 connect: 12 17 11 6 0
\r
689 vtx: 1 30099000 72186800 11 0 0 0 0
\r
690 seg: 1 13 508000 0 0
\r
691 vtx: 2 30346904 72186800 0 0 0 0 21863
\r
692 seg: 2 13 508000 0 0
\r
693 vtx: 3 32067500 70466204 0 0 0 0 0
\r
694 seg: 3 13 508000 0 0
\r
695 vtx: 4 32067500 70216268 0 0 0 0 31097
\r
696 seg: 4 13 508000 0 0
\r
697 vtx: 5 32067500 51049174 0 0 0 0 0
\r
698 seg: 5 13 508000 0 0
\r
699 vtx: 6 30345126 49326800 0 0 0 0 0
\r
700 seg: 6 13 508000 0 0
\r
701 vtx: 7 30099000 49326800 11 0 0 0 0
\r
702 connect: 13 12 11 5 0
\r
703 vtx: 1 30099000 41706800 11 0 0 0 0
\r
704 seg: 1 12 508000 0 0
\r
705 vtx: 2 30345634 41706800 0 0 0 0 0
\r
706 seg: 2 12 508000 0 0
\r
707 vtx: 3 32072072 43433238 0 0 0 0 0
\r
708 seg: 3 12 508000 0 0
\r
709 vtx: 4 32072072 47608998 0 0 0 0 0
\r
710 seg: 4 12 508000 0 0
\r
711 vtx: 5 30354524 49326800 0 0 0 0 0
\r
712 seg: 5 12 508000 0 0
\r
713 vtx: 6 30099000 49326800 11 0 0 0 0
\r
714 connect: 14 14 13 5 0
\r
715 vtx: 1 4699000 11226800 11 0 0 0 0
\r
716 seg: 1 13 508000 0 0
\r
717 vtx: 2 4455160 11226800 0 0 0 0 0
\r
718 seg: 2 13 508000 0 0
\r
719 vtx: 3 2717292 12964668 0 0 0 0 0
\r
720 seg: 3 13 508000 0 0
\r
721 vtx: 4 2717292 17132808 0 0 0 0 0
\r
722 seg: 4 13 508000 0 0
\r
723 vtx: 5 4431030 18846800 0 0 0 0 0
\r
724 seg: 5 13 508000 0 0
\r
725 vtx: 6 4699000 18846800 11 0 0 0 0
\r
726 connect: 15 20 19 5 0
\r
727 vtx: 1 106299000 72186800 11 0 0 0 0
\r
728 seg: 1 13 508000 0 0
\r
729 vtx: 2 106560366 72186800 0 0 0 0 0
\r
730 seg: 2 13 508000 0 0
\r
731 vtx: 3 108268262 73894696 0 0 0 0 0
\r
732 seg: 3 13 508000 0 0
\r
733 vtx: 4 108268262 78101190 0 0 0 0 0
\r
734 seg: 4 13 508000 0 0
\r
735 vtx: 5 106562652 79806800 0 0 0 0 0
\r
736 seg: 5 13 508000 0 0
\r
737 vtx: 6 106299000 79806800 11 0 0 0 0
\r
738 connect: 16 6 -1 2 0
\r
739 vtx: 1 55499000 41706800 11 0 0 0 0
\r
740 seg: 1 12 508000 0 0
\r
741 vtx: 2 53007514 39215314 0 0 0 0 0
\r
742 seg: 2 12 508000 0 0
\r
743 vtx: 3 32590486 39215314 0 0 0 0 12560
\r
744 connect: 17 2 -1 3 0
\r
745 vtx: 1 37719000 18846800 11 0 0 0 0
\r
746 seg: 1 12 508000 0 0
\r
747 vtx: 2 37472874 18846800 0 0 0 0 0
\r
748 seg: 2 12 508000 0 0
\r
749 vtx: 3 32067500 24252174 0 0 0 0 0
\r
750 seg: 3 12 508000 0 0
\r
751 vtx: 4 32067500 26466800 0 0 0 0 29185
\r
752 connect: 18 8 -1 2 0
\r
753 vtx: 1 80899000 41706800 11 0 0 0 0
\r
754 seg: 1 12 508000 0 0
\r
755 vtx: 2 80648810 41706800 0 0 0 0 0
\r
756 seg: 2 12 508000 0 0
\r
757 vtx: 3 78922372 43433238 0 0 0 0 25678
\r
758 connect: 19 6 -1 2 0
\r
759 vtx: 1 55499000 41706800 11 0 0 0 0
\r
760 seg: 1 12 508000 0 0
\r
761 vtx: 2 55748174 41706800 0 0 0 0 0
\r
762 seg: 2 12 508000 0 0
\r
763 vtx: 3 57468262 43426888 0 0 0 0 11448
\r
764 connect: 20 18 -1 2 0
\r
765 vtx: 1 55499000 72186800 11 0 0 0 0
\r
766 seg: 1 13 508000 0 0
\r
767 vtx: 2 53528468 70216268 0 0 0 0 0
\r
768 seg: 2 13 508000 0 0
\r
769 vtx: 3 32067500 70216268 0 0 0 0 31097
\r
770 connect: 21 16 -1 4 0
\r
771 vtx: 1 30099000 79806800 11 0 0 0 0
\r
772 seg: 1 13 508000 0 0
\r
773 vtx: 2 30345126 79806800 0 0 0 0 0
\r
774 seg: 2 13 508000 0 0
\r
775 vtx: 3 32071564 78080108 0 0 0 0 0
\r
776 seg: 3 13 508000 0 0
\r
777 vtx: 4 32071564 73911460 0 0 0 0 0
\r
778 seg: 4 13 508000 0 0
\r
779 vtx: 5 30346904 72186800 0 0 0 0 21863
\r
780 connect: 22 15 -1 3 0
\r
781 vtx: 1 106299000 11226800 11 0 0 0 0
\r
782 seg: 1 12 508000 0 0
\r
783 vtx: 2 104326436 9254236 0 0 0 0 0
\r
784 seg: 2 12 508000 0 0
\r
785 vtx: 3 86581742 9254236 0 0 0 0 0
\r
786 seg: 3 12 508000 0 0
\r
787 vtx: 4 82879184 12956794 0 0 0 0 7799
\r
789 corner: 1 34290000 5080000 0 0
\r
790 corner: 2 27940000 5080000 0 0
\r
791 corner: 3 27940000 6350000 0 0
\r
792 corner: 4 34290000 6350000 0 1
\r
794 net: "XX2$XXcheckI3$XXdecoder$XX0nor$NN" 3 2 0 0 0 0 1
\r
795 pin: 1 IC_CD4007_9.5
\r
796 pin: 2 IC_CD4007_9.8
\r
799 vtx: 1 12319000 11226800 11 0 0 0 0
\r
800 seg: 1 12 254000 0 0
\r
801 vtx: 2 10396982 11226800 0 0 0 0 0
\r
802 seg: 2 12 254000 0 0
\r
803 vtx: 3 5316982 16306800 0 0 0 0 0
\r
804 seg: 3 12 254000 0 0
\r
805 vtx: 4 4699000 16306800 11 0 0 0 0
\r
807 vtx: 1 4699000 84886800 11 0 0 0 0
\r
808 seg: 1 13 254000 0 0
\r
809 vtx: 2 4634484 84886800 0 0 0 0 0
\r
810 seg: 2 13 254000 0 0
\r
811 vtx: 3 2329434 82581750 0 0 0 0 0
\r
812 seg: 3 13 254000 0 0
\r
813 vtx: 4 2329434 38482270 0 0 0 0 0
\r
814 seg: 4 13 254000 0 0
\r
815 vtx: 5 6541008 34270696 0 0 0 0 0
\r
816 seg: 5 13 254000 0 0
\r
817 vtx: 6 6541008 18071592 0 0 0 0 0
\r
818 seg: 6 13 254000 0 0
\r
819 vtx: 7 4775962 16306800 0 0 0 0 0
\r
820 seg: 7 13 254000 0 0
\r
821 vtx: 8 4699000 16306800 11 0 0 0 0
\r
823 net: "Vdd" 19 19 1 508000 711200 355600 1
\r
824 pin: 1 IC_CD4016_1.4
\r
825 pin: 2 IC_CD4016_1.14
\r
826 pin: 3 IC_CD4007_2.2
\r
827 pin: 4 IC_CD4007_2.14
\r
828 pin: 5 IC_CD4007_4.2
\r
829 pin: 6 IC_CD4007_4.14
\r
830 pin: 7 IC_CD4007_5.14
\r
831 pin: 8 IC_CD4016_7.1
\r
832 pin: 9 IC_CD4016_7.11
\r
833 pin: 10 IC_CD4016_7.14
\r
834 pin: 11 IC_CD4007_8.2
\r
835 pin: 12 IC_CD4007_8.14
\r
836 pin: 13 IC_CD4007_9.14
\r
837 pin: 14 IC_CD4016_11.14
\r
838 pin: 15 IC_CD4007_12.2
\r
839 pin: 16 IC_CD4007_12.14
\r
840 pin: 17 IC_CD4007_13.14
\r
841 pin: 18 IC_CD4007_15.14
\r
843 connect: 1 0 -1 2 0
\r
844 vtx: 1 30099000 18846800 11 0 0 0 0
\r
845 seg: 1 12 508000 0 0
\r
846 vtx: 2 20574000 18846800 0 0 0 0 1396
\r
847 seg: 2 12 508000 0 0
\r
848 vtx: 3 20574000 8636000 0 0 0 0 0
\r
850 vtx: 1 37719000 26466800 11 0 0 0 0
\r
851 seg: 1 13 508000 0 0
\r
852 vtx: 2 37458904 26466800 0 0 0 0 0
\r
853 seg: 2 13 508000 0 0
\r
854 vtx: 3 34374074 23381970 0 0 0 0 0
\r
855 seg: 3 13 508000 0 0
\r
856 vtx: 4 34374074 22877780 0 0 0 0 0
\r
857 seg: 4 13 508000 0 0
\r
858 vtx: 5 30342840 18846800 0 0 0 0 0
\r
859 seg: 5 13 508000 0 0
\r
860 vtx: 6 30099000 18846800 11 0 0 0 0
\r
861 connect: 3 18 2 5 0
\r
862 vtx: 1 67310000 3810000 11 0 0 0 0
\r
863 seg: 1 12 508000 0 0
\r
864 vtx: 2 66793364 3810000 0 0 0 0 0
\r
865 seg: 2 12 508000 0 0
\r
866 vtx: 3 65143126 5459984 0 0 0 0 0
\r
867 seg: 3 12 508000 0 0
\r
868 vtx: 4 65143126 8912352 0 0 0 0 0
\r
869 seg: 4 12 508000 0 0
\r
870 vtx: 5 80157574 23926800 0 0 0 0 0
\r
871 seg: 5 12 508000 0 0
\r
872 vtx: 6 80899000 23926800 11 0 0 0 0
\r
874 vtx: 1 88519000 26466800 11 0 0 0 0
\r
875 seg: 1 12 508000 0 0
\r
876 vtx: 2 87534750 26466800 0 0 0 0 0
\r
877 seg: 2 12 508000 0 0
\r
878 vtx: 3 84994750 23926800 0 0 0 0 0
\r
879 seg: 3 12 508000 0 0
\r
880 vtx: 4 80899000 23926800 11 0 0 0 0
\r
881 connect: 5 13 3 3 0
\r
882 vtx: 1 113919000 26466800 11 0 0 0 0
\r
883 seg: 1 12 508000 0 0
\r
884 vtx: 2 111950500 28435300 0 0 0 0 0
\r
885 seg: 2 12 508000 0 0
\r
886 vtx: 3 90487500 28435300 0 0 0 0 0
\r
887 seg: 3 12 508000 0 0
\r
888 vtx: 4 88519000 26466800 11 0 0 0 0
\r
890 vtx: 1 88519000 56946800 11 0 0 0 0
\r
891 seg: 1 13 508000 0 0
\r
892 vtx: 2 88766904 56946800 0 0 0 0 0
\r
893 seg: 2 13 508000 0 0
\r
894 vtx: 3 90488008 55225696 0 0 0 0 0
\r
895 seg: 3 13 508000 0 0
\r
896 vtx: 4 90488008 28435808 0 0 0 0 0
\r
897 seg: 4 13 508000 0 0
\r
898 vtx: 5 88519000 26466800 11 0 0 0 0
\r
900 vtx: 1 63119000 56946800 11 0 0 0 0
\r
901 seg: 1 12 508000 0 0
\r
902 vtx: 2 61314330 56946800 0 0 0 0 0
\r
903 seg: 2 12 508000 0 0
\r
904 vtx: 3 58774330 54406800 0 0 0 0 0
\r
905 seg: 3 12 508000 0 0
\r
906 vtx: 4 55499000 54406800 11 0 0 0 0
\r
907 connect: 8 11 4 3 0
\r
908 vtx: 1 37719000 56946800 11 0 0 0 0
\r
909 seg: 1 12 508000 0 0
\r
910 vtx: 2 45863764 56946800 0 0 0 0 0
\r
911 seg: 2 12 508000 0 0
\r
912 vtx: 3 48403764 54406800 0 0 0 0 0
\r
913 seg: 3 12 508000 0 0
\r
914 vtx: 4 55499000 54406800 11 0 0 0 0
\r
915 connect: 9 17 5 5 0
\r
916 vtx: 1 113919000 87426800 11 0 0 0 0
\r
917 seg: 1 13 508000 0 0
\r
918 vtx: 2 111950500 89395300 0 0 0 0 0
\r
919 seg: 2 13 508000 0 0
\r
920 vtx: 3 74376280 89395300 0 0 0 0 0
\r
921 seg: 3 13 508000 0 0
\r
922 vtx: 4 67893946 82913220 0 0 0 0 9422
\r
923 seg: 4 13 508000 0 0
\r
924 vtx: 5 67893946 61721746 0 0 0 0 30613
\r
925 seg: 5 13 508000 0 0
\r
926 vtx: 6 63119000 56946800 11 0 0 0 0
\r
927 connect: 10 9 7 5 0
\r
928 vtx: 1 12319000 56946800 11 0 0 0 0
\r
929 seg: 1 12 508000 0 0
\r
930 vtx: 2 10822686 56946800 0 0 0 0 0
\r
931 seg: 2 12 508000 0 0
\r
932 vtx: 3 10346436 56470550 0 0 0 0 2802
\r
933 seg: 3 12 508000 0 0
\r
934 vtx: 4 7143750 56470550 0 0 0 0 0
\r
935 seg: 4 12 508000 0 0
\r
936 vtx: 5 6667500 56946800 0 0 0 0 0
\r
937 seg: 5 12 508000 0 0
\r
938 vtx: 6 4699000 56946800 11 0 0 0 0
\r
939 connect: 11 12 8 4 0
\r
940 vtx: 1 12319000 26466800 11 0 0 0 0
\r
941 seg: 1 13 508000 0 0
\r
942 vtx: 2 10349484 28436316 0 0 0 0 0
\r
943 seg: 2 13 508000 0 0
\r
944 vtx: 3 10349484 47603156 0 0 0 0 0
\r
945 seg: 3 13 508000 0 0
\r
946 vtx: 4 12073128 49326800 0 0 0 0 0
\r
947 seg: 4 13 508000 0 0
\r
948 vtx: 5 12319000 49326800 11 0 0 0 0
\r
949 connect: 12 10 8 3 0
\r
950 vtx: 1 30099000 54406800 11 0 0 0 0
\r
951 seg: 1 12 508000 0 0
\r
952 vtx: 2 23520654 54406800 0 0 0 0 0
\r
953 seg: 2 12 508000 0 0
\r
954 vtx: 3 18440654 49326800 0 0 0 0 0
\r
955 seg: 3 12 508000 0 0
\r
956 vtx: 4 12319000 49326800 11 0 0 0 0
\r
957 connect: 13 11 10 3 0
\r
958 vtx: 1 37719000 56946800 11 0 0 0 0
\r
959 seg: 1 12 508000 0 0
\r
960 vtx: 2 35715448 56946800 0 0 0 0 0
\r
961 seg: 2 12 508000 0 0
\r
962 vtx: 3 33175448 54406800 0 0 0 0 0
\r
963 seg: 3 12 508000 0 0
\r
964 vtx: 4 30099000 54406800 11 0 0 0 0
\r
965 connect: 14 15 14 3 0
\r
966 vtx: 1 37719000 87426800 11 0 0 0 0
\r
967 seg: 1 12 508000 0 0
\r
968 vtx: 2 36734750 87426800 0 0 0 0 0
\r
969 seg: 2 12 508000 0 0
\r
970 vtx: 3 34194750 84886800 0 0 0 0 0
\r
971 seg: 3 12 508000 0 0
\r
972 vtx: 4 30099000 84886800 11 0 0 0 0
\r
973 connect: 15 16 15 3 0
\r
974 vtx: 1 63119000 87426800 11 0 0 0 0
\r
975 seg: 1 12 508000 0 0
\r
976 vtx: 2 61150500 89395300 0 0 0 0 0
\r
977 seg: 2 12 508000 0 0
\r
978 vtx: 3 39687500 89395300 0 0 0 0 0
\r
979 seg: 3 12 508000 0 0
\r
980 vtx: 4 37719000 87426800 11 0 0 0 0
\r
981 connect: 16 16 -1 2 0
\r
982 vtx: 1 63119000 87426800 11 0 0 0 0
\r
983 seg: 1 13 508000 0 0
\r
984 vtx: 2 63380366 87426800 0 0 0 0 0
\r
985 seg: 2 13 508000 0 0
\r
986 vtx: 3 67893946 82913220 0 0 0 0 9422
\r
987 connect: 17 6 -1 2 0
\r
988 vtx: 1 88519000 56946800 11 0 0 0 0
\r
989 seg: 1 13 508000 0 0
\r
990 vtx: 2 83744054 61721746 0 0 0 0 0
\r
991 seg: 2 13 508000 0 0
\r
992 vtx: 3 67893946 61721746 0 0 0 0 30613
\r
993 connect: 18 8 -1 3 0
\r
994 vtx: 1 12319000 49326800 11 0 0 0 0
\r
995 seg: 1 12 508000 0 0
\r
996 vtx: 2 12072874 49326800 0 0 0 0 0
\r
997 seg: 2 12 508000 0 0
\r
998 vtx: 3 10346436 51053238 0 0 0 0 0
\r
999 seg: 3 12 508000 0 0
\r
1000 vtx: 4 10346436 56470550 0 0 0 0 2802
\r
1001 connect: 19 12 -1 2 0
\r
1002 vtx: 1 12319000 26466800 11 0 0 0 0
\r
1003 seg: 1 12 508000 0 0
\r
1004 vtx: 2 12954000 26466800 0 0 0 0 0
\r
1005 seg: 2 12 508000 0 0
\r
1006 vtx: 3 20574000 18846800 0 0 0 0 1396
\r
1008 corner: 1 21590000 6350000 0 0
\r
1009 corner: 2 24130000 6350000 0 0
\r
1010 corner: 3 24130000 5080000 0 0
\r
1011 corner: 4 21590000 5080000 0 0
\r
1012 corner: 5 21590000 2540000 0 0
\r
1013 corner: 6 20320000 2540000 0 0
\r
1014 corner: 7 20320000 5080000 0 0
\r
1015 corner: 8 17780000 5080000 0 0
\r
1016 corner: 9 17780000 6350000 0 0
\r
1017 corner: 10 20320000 6350000 0 0
\r
1018 corner: 11 20320000 8890000 0 0
\r
1019 corner: 12 21590000 8890000 0 1
\r
1021 net: "XX2$XXcheckI3$XXdecoder$XX1pti$NTI_Out" 2 1 0 0 0 0 1
\r
1022 pin: 1 IC_CD4007_4.5
\r
1024 connect: 1 1 0 7 0
\r
1025 vtx: 1 55499000 21386800 11 0 0 0 0
\r
1026 seg: 1 13 254000 0 0
\r
1027 vtx: 2 55563770 21386800 0 0 0 0 0
\r
1028 seg: 2 13 254000 0 0
\r
1029 vtx: 3 57340500 23163530 0 0 0 0 0
\r
1030 seg: 3 13 254000 0 0
\r
1031 vtx: 4 57340500 35030918 0 0 0 0 0
\r
1032 seg: 4 13 254000 0 0
\r
1033 vtx: 5 53655722 38715950 0 0 0 0 0
\r
1034 seg: 5 13 254000 0 0
\r
1035 vtx: 6 53655722 45015912 0 0 0 0 0
\r
1036 seg: 6 13 254000 0 0
\r
1037 vtx: 7 55426610 46786800 0 0 0 0 0
\r
1038 seg: 7 13 254000 0 0
\r
1039 vtx: 8 55499000 46786800 11 0 0 0 0
\r
1041 net: "XX2$XXcheckI2$XXdecoder$XX1pti$STI_Out" 2 1 0 0 0 0 1
\r
1044 connect: 1 1 0 1 0
\r
1045 vtx: 1 113919000 56946800 11 0 0 0 0
\r
1046 seg: 1 13 254000 0 0
\r
1047 vtx: 2 113919000 54406800 11 0 0 0 0
\r
1049 net: "XX2$XXcheckI3$XXdecoder$XX0nor$NP" 2 1 0 0 0 0 1
\r
1050 pin: 1 IC_CD4007_9.1
\r
1052 connect: 1 1 0 5 0
\r
1053 vtx: 1 4699000 87426800 11 0 0 0 0
\r
1054 seg: 1 13 254000 0 0
\r
1055 vtx: 2 2857500 87426800 0 0 0 0 0
\r
1056 seg: 2 13 254000 0 0
\r
1057 vtx: 3 1821434 86390734 0 0 0 0 0
\r
1058 seg: 3 13 254000 0 0
\r
1059 vtx: 4 1821434 31185866 0 0 0 0 0
\r
1060 seg: 4 13 254000 0 0
\r
1061 vtx: 5 4699000 28308300 0 0 0 0 0
\r
1062 seg: 5 13 254000 0 0
\r
1063 vtx: 6 4699000 26466800 11 0 0 0 0
\r
1065 net: "XX2$XXcheckI3$XXdecoder$XX1sti$NTI_Out" 2 1 0 0 0 0 1
\r
1067 pin: 2 IC_CD4007_8.8
\r
1068 connect: 1 1 0 3 0
\r
1069 vtx: 1 37719000 41706800 11 0 0 0 0
\r
1070 seg: 1 13 254000 0 0
\r
1071 vtx: 2 37719000 34022538 0 0 0 0 0
\r
1072 seg: 2 13 254000 0 0
\r
1073 vtx: 3 55434738 16306800 0 0 0 0 0
\r
1074 seg: 3 13 254000 0 0
\r
1075 vtx: 4 55499000 16306800 11 0 0 0 0
\r
1077 net: "XX2$XXcheckI1$XXdecoder$XXinti$PTI_Out" 2 1 0 0 0 0 1
\r
1079 pin: 2 IC_CD4007_13.13
\r
1080 connect: 1 1 0 6 0
\r
1081 vtx: 1 63119000 84886800 11 0 0 0 0
\r
1082 seg: 1 12 254000 0 0
\r
1083 vtx: 2 63054230 84886800 0 0 0 0 0
\r
1084 seg: 2 12 254000 0 0
\r
1085 vtx: 3 58664348 80496918 0 0 0 0 0
\r
1086 seg: 3 12 254000 0 0
\r
1087 vtx: 4 58664348 72745092 0 0 0 0 0
\r
1088 seg: 4 12 254000 0 0
\r
1089 vtx: 5 55246778 69327268 0 0 0 0 0
\r
1090 seg: 5 12 254000 0 0
\r
1091 vtx: 6 7558532 69327268 0 0 0 0 0
\r
1092 seg: 6 12 254000 0 0
\r
1093 vtx: 7 4699000 72186800 11 0 0 0 0
\r
1095 net: "XX2$XXcheckI3$CTRL_A" 4 3 0 0 0 0 1
\r
1096 pin: 1 IC_CD4016_1.12
\r
1098 pin: 3 IC_CD4007_8.5
\r
1099 pin: 4 IC_CD4007_9.3
\r
1100 connect: 1 3 0 10 0
\r
1101 vtx: 1 4699000 21386800 11 0 0 0 0
\r
1102 seg: 1 12 254000 0 0
\r
1103 vtx: 2 4621530 21386800 0 0 0 0 0
\r
1104 seg: 2 12 254000 0 0
\r
1105 vtx: 3 2857500 23150830 0 0 0 0 0
\r
1106 seg: 3 12 254000 0 0
\r
1107 vtx: 4 2857500 27641550 0 0 0 0 0
\r
1108 seg: 4 12 254000 0 0
\r
1109 vtx: 5 13777722 38561772 0 0 0 0 0
\r
1110 seg: 5 12 254000 0 0
\r
1111 vtx: 6 29169106 36529772 0 0 711200 355600 22546
\r
1112 seg: 6 13 254000 0 0
\r
1113 vtx: 7 28243530 38561772 0 0 0 0 0
\r
1114 seg: 7 13 254000 0 0
\r
1115 vtx: 8 39566088 27239214 0 0 0 0 0
\r
1116 seg: 8 13 254000 0 0
\r
1117 vtx: 9 39566088 23169372 0 0 0 0 0
\r
1118 seg: 9 13 254000 0 0
\r
1119 vtx: 10 37783262 21386800 0 0 0 0 0
\r
1120 seg: 10 13 254000 0 0
\r
1121 vtx: 11 37719000 21386800 11 0 0 0 0
\r
1122 connect: 2 1 0 3 0
\r
1123 vtx: 1 55499000 11226800 11 0 0 0 0
\r
1124 seg: 1 12 254000 0 0
\r
1125 vtx: 2 55419498 11226800 0 0 0 0 0
\r
1126 seg: 2 12 254000 0 0
\r
1127 vtx: 3 45259498 21386800 0 0 0 0 0
\r
1128 seg: 3 12 254000 0 0
\r
1129 vtx: 4 37719000 21386800 11 0 0 0 0
\r
1130 connect: 3 2 -1 3 0
\r
1131 vtx: 1 30099000 46786800 11 0 0 0 0
\r
1132 seg: 1 12 254000 0 0
\r
1133 vtx: 2 30027880 46786800 0 0 0 0 0
\r
1134 seg: 2 12 254000 0 0
\r
1135 vtx: 3 28153106 44912026 0 0 0 0 0
\r
1136 seg: 3 12 254000 0 0
\r
1137 vtx: 4 29169106 36529772 0 0 0 0 22546
\r
1139 net: "SIGN4" 4 3 0 0 0 0 1
\r
1140 pin: 1 IC_CD4016_1.10
\r
1141 pin: 2 IC_CD4016_7.2
\r
1142 pin: 3 IC_CD4016_7.3
\r
1144 connect: 1 1 0 9 0
\r
1145 vtx: 1 4699000 54406800 11 0 0 0 0
\r
1146 seg: 1 13 254000 0 0
\r
1147 vtx: 2 6168644 54406800 0 0 0 0 0
\r
1148 seg: 2 13 254000 0 0
\r
1149 vtx: 3 11058652 59296808 0 0 0 0 0
\r
1150 seg: 3 13 254000 0 0
\r
1151 vtx: 4 13309346 59296808 0 0 0 0 0
\r
1152 seg: 4 13 254000 0 0
\r
1153 vtx: 5 15378938 57226962 0 0 0 0 0
\r
1154 seg: 5 13 254000 0 0
\r
1155 vtx: 6 15378938 52377594 0 0 0 0 0
\r
1156 seg: 6 13 254000 0 0
\r
1157 vtx: 7 40076120 27680666 0 0 0 0 0
\r
1158 seg: 7 13 254000 0 0
\r
1159 vtx: 8 40076120 18591022 0 0 0 0 620
\r
1160 seg: 8 13 254000 0 0
\r
1161 vtx: 9 37791898 16306800 0 0 0 0 0
\r
1162 seg: 9 13 254000 0 0
\r
1163 vtx: 10 37719000 16306800 11 0 0 0 0
\r
1164 connect: 2 2 1 1 0
\r
1165 vtx: 1 4699000 51866800 11 0 0 0 0
\r
1166 seg: 1 13 254000 0 0
\r
1167 vtx: 2 4699000 54406800 11 0 0 0 0
\r
1168 connect: 3 3 -1 4 0
\r
1169 vtx: 1 74930000 3810000 11 0 0 0 0
\r
1170 seg: 1 13 254000 0 0
\r
1171 vtx: 2 74930000 3464814 0 0 0 0 0
\r
1172 seg: 2 13 254000 0 0
\r
1173 vtx: 3 73243186 1778000 0 0 0 0 0
\r
1174 seg: 3 13 254000 0 0
\r
1175 vtx: 4 56889142 1778000 0 0 0 0 0
\r
1176 seg: 4 13 254000 0 0
\r
1177 vtx: 5 40076120 18591022 0 0 0 0 620
\r
1179 net: "XX2$XXcheckI3$XXdecoder$XX1sti$PTI_Out" 2 1 0 0 0 0 1
\r
1181 pin: 2 IC_CD4007_8.13
\r
1182 connect: 1 1 0 5 0
\r
1183 vtx: 1 37719000 54406800 11 0 0 0 0
\r
1184 seg: 1 13 254000 0 0
\r
1185 vtx: 2 37783770 54406800 0 0 0 0 0
\r
1186 seg: 2 13 254000 0 0
\r
1187 vtx: 3 47247556 44943014 0 0 0 0 0
\r
1188 seg: 3 13 254000 0 0
\r
1189 vtx: 4 47247556 27029918 0 0 0 0 0
\r
1190 seg: 4 13 254000 0 0
\r
1191 vtx: 5 55430674 18846800 0 0 0 0 0
\r
1192 seg: 5 13 254000 0 0
\r
1193 vtx: 6 55499000 18846800 11 0 0 0 0
\r
1195 net: "XX2$XXcheckI1$XXdecoder$XX0nor$NI" 2 1 0 0 0 0 1
\r
1196 pin: 1 IC_CD4007_15.2
\r
1197 pin: 2 IC_CD4007_15.13
\r
1198 connect: 1 1 0 1 0
\r
1199 vtx: 1 113919000 84886800 11 0 0 0 0
\r
1200 seg: 1 12 254000 0 0
\r
1201 vtx: 2 106299000 84886800 11 0 0 0 0
\r
1203 net: "XX2$XXcheckI3$CTRL_B" 3 2 0 0 0 0 1
\r
1204 pin: 1 IC_CD4016_7.5
\r
1205 pin: 2 R_12K_10.13
\r
1206 pin: 3 R_12K_10.14
\r
1207 connect: 1 1 0 7 0
\r
1208 vtx: 1 12319000 84886800 11 0 0 0 0
\r
1209 seg: 1 13 254000 0 0
\r
1210 vtx: 2 12254738 84886800 0 0 0 0 0
\r
1211 seg: 2 13 254000 0 0
\r
1212 vtx: 3 10265664 82897980 0 0 0 0 0
\r
1213 seg: 3 13 254000 0 0
\r
1214 vtx: 4 10265664 74554080 0 0 0 0 0
\r
1215 seg: 4 13 254000 0 0
\r
1216 vtx: 5 2849372 67137788 0 0 0 0 0
\r
1217 seg: 5 13 254000 0 0
\r
1218 vtx: 6 2849372 48572166 0 0 0 0 0
\r
1219 seg: 6 13 254000 0 0
\r
1220 vtx: 7 4634738 46786800 0 0 0 0 0
\r
1221 seg: 7 13 254000 0 0
\r
1222 vtx: 8 4699000 46786800 11 0 0 0 0
\r
1223 connect: 2 2 1 1 0
\r
1224 vtx: 1 12319000 87426800 11 0 0 0 0
\r
1225 seg: 1 13 254000 0 0
\r
1226 vtx: 2 12319000 84886800 11 0 0 0 0
\r
1228 net: "XX2$XXcheckI2$XXdecoder$XX0nor$NN" 3 2 0 0 0 0 1
\r
1229 pin: 1 IC_CD4007_5.5
\r
1230 pin: 2 IC_CD4007_5.8
\r
1232 connect: 1 1 0 3 0
\r
1233 vtx: 1 88519000 41706800 11 0 0 0 0
\r
1234 seg: 1 12 254000 0 0
\r
1235 vtx: 2 86088982 41706800 0 0 0 0 0
\r
1236 seg: 2 12 254000 0 0
\r
1237 vtx: 3 81008982 46786800 0 0 0 0 0
\r
1238 seg: 3 12 254000 0 0
\r
1239 vtx: 4 80899000 46786800 11 0 0 0 0
\r
1240 connect: 2 2 0 6 0
\r
1241 vtx: 1 55499000 26466800 11 0 0 0 0
\r
1242 seg: 1 12 254000 0 0
\r
1243 vtx: 2 57340500 26466800 0 0 0 0 0
\r
1244 seg: 2 12 254000 0 0
\r
1245 vtx: 3 69230748 38357048 0 0 0 0 0
\r
1246 seg: 3 12 254000 0 0
\r
1247 vtx: 4 72841866 38357048 0 0 711200 355600 0
\r
1248 seg: 4 13 254000 0 0
\r
1249 vtx: 5 72841866 38794182 0 0 0 0 0
\r
1250 seg: 5 13 254000 0 0
\r
1251 vtx: 6 80834484 46786800 0 0 0 0 0
\r
1252 seg: 6 13 254000 0 0
\r
1253 vtx: 7 80899000 46786800 11 0 0 0 0
\r
1255 net: "XX2$XXcheckI1$XXdecoder$XXinti$STI_Out" 2 1 0 0 0 0 1
\r
1258 connect: 1 1 0 6 0
\r
1259 vtx: 1 78740000 86360000 11 0 0 0 0
\r
1260 seg: 1 12 254000 0 0
\r
1261 vtx: 2 75060048 90039952 0 0 0 0 0
\r
1262 seg: 2 12 254000 0 0
\r
1263 vtx: 3 29696156 90039952 0 0 0 0 0
\r
1264 seg: 3 12 254000 0 0
\r
1265 vtx: 4 20781010 81124806 0 0 0 0 0
\r
1266 seg: 4 12 254000 0 0
\r
1267 vtx: 5 20781010 80580484 0 0 0 0 0
\r
1268 seg: 5 12 254000 0 0
\r
1269 vtx: 6 12387326 72186800 0 0 0 0 0
\r
1270 seg: 6 12 254000 0 0
\r
1271 vtx: 7 12319000 72186800 11 0 0 0 0
\r
1273 net: "XX2$XXcheckI3$CTRL_C" 4 3 0 0 0 0 1
\r
1276 pin: 3 IC_CD4016_7.13
\r
1277 pin: 4 IC_CD4007_9.6
\r
1278 connect: 1 3 0 16 0
\r
1279 vtx: 1 4699000 13766800 11 0 0 0 0
\r
1280 seg: 1 12 254000 0 0
\r
1281 vtx: 2 4318000 13716000 0 0 0 0 0
\r
1282 seg: 2 12 254000 0 0
\r
1283 vtx: 3 5842000 13716000 0 0 0 0 0
\r
1284 seg: 3 12 254000 0 0
\r
1285 vtx: 4 8890000 10668000 0 0 711200 355600 0
\r
1286 seg: 4 13 254000 0 0
\r
1287 vtx: 5 18542000 1016000 0 0 0 0 0
\r
1288 seg: 5 13 254000 0 0
\r
1289 vtx: 6 37338000 1016000 0 0 0 0 0
\r
1290 seg: 6 13 254000 0 0
\r
1291 vtx: 7 40894000 4572000 0 0 711200 355600 0
\r
1292 seg: 7 12 254000 0 0
\r
1293 vtx: 8 41781222 5459222 0 0 0 0 0
\r
1294 seg: 8 12 254000 0 0
\r
1295 vtx: 9 42797222 5459222 0 0 0 0 0
\r
1296 seg: 9 12 254000 0 0
\r
1297 vtx: 10 53779420 5459222 0 0 0 0 0
\r
1298 seg: 10 12 254000 0 0
\r
1299 vtx: 11 55245000 5461000 0 0 0 0 0
\r
1300 seg: 11 12 254000 0 0
\r
1301 vtx: 12 60452000 10668000 0 0 0 0 0
\r
1302 seg: 12 12 254000 0 0
\r
1303 vtx: 13 60720732 10936732 0 0 0 0 0
\r
1304 seg: 13 12 254000 0 0
\r
1305 vtx: 14 60720732 12400534 0 0 0 0 0
\r
1306 seg: 14 12 254000 0 0
\r
1307 vtx: 15 60720732 13988288 0 0 0 0 0
\r
1308 seg: 15 12 254000 0 0
\r
1309 vtx: 16 63039244 16306800 0 0 0 0 0
\r
1310 seg: 16 12 254000 0 0
\r
1311 vtx: 17 63119000 16306800 11 0 0 0 0
\r
1312 connect: 2 1 0 1 0
\r
1313 vtx: 1 63119000 18846800 11 0 0 0 0
\r
1314 seg: 1 13 254000 0 0
\r
1315 vtx: 2 63119000 16306800 11 0 0 0 0
\r
1316 connect: 3 3 2 5 0
\r
1317 vtx: 1 4699000 13766800 11 0 0 0 0
\r
1318 seg: 1 13 254000 0 0
\r
1319 vtx: 2 4770374 13766800 0 0 0 0 0
\r
1320 seg: 2 13 254000 0 0
\r
1321 vtx: 3 8837422 17833848 0 0 0 0 0
\r
1322 seg: 3 13 254000 0 0
\r
1323 vtx: 4 8837422 50995326 0 0 0 0 0
\r
1324 seg: 4 13 254000 0 0
\r
1325 vtx: 5 12248896 54406800 0 0 0 0 0
\r
1326 seg: 5 13 254000 0 0
\r
1327 vtx: 6 12319000 54406800 11 0 0 0 0
\r
1329 net: "XX2$XXcheckI3$XXdecoder$XX1pti$STI_Out" 2 1 0 0 0 0 1
\r
1332 connect: 1 1 0 1 0
\r
1333 vtx: 1 63119000 23926800 11 0 0 0 0
\r
1334 seg: 1 13 254000 0 0
\r
1335 vtx: 2 63119000 21386800 11 0 0 0 0
\r
1337 net: "XX2$XXcheckI2$XXdecoder$XX0nor$NP" 2 1 0 0 0 0 1
\r
1339 pin: 2 IC_CD4007_5.1
\r
1340 connect: 1 1 0 7 0
\r
1341 vtx: 1 80899000 56946800 11 0 0 0 0
\r
1342 seg: 1 12 254000 0 0
\r
1343 vtx: 2 82740500 56946800 0 0 0 0 0
\r
1344 seg: 2 12 254000 0 0
\r
1345 vtx: 3 84583778 58790078 0 0 0 0 0
\r
1346 seg: 3 12 254000 0 0
\r
1347 vtx: 4 89281762 58790078 0 0 0 0 0
\r
1348 seg: 4 12 254000 0 0
\r
1349 vtx: 5 97837244 50234596 0 0 0 0 0
\r
1350 seg: 5 12 254000 0 0
\r
1351 vtx: 6 97837244 50100484 0 0 0 0 0
\r
1352 seg: 6 12 254000 0 0
\r
1353 vtx: 7 106230674 41706800 0 0 0 0 0
\r
1354 seg: 7 12 254000 0 0
\r
1355 vtx: 8 106299000 41706800 11 0 0 0 0
\r
1357 net: "XX2$XXcheckI2$XXdecoder$XXinti$PTI_Out" 2 1 0 0 0 0 1
\r
1359 pin: 2 IC_CD4007_4.13
\r
1360 connect: 1 1 0 5 0
\r
1361 vtx: 1 63119000 54406800 11 0 0 0 0
\r
1362 seg: 1 12 254000 0 0
\r
1363 vtx: 2 72529192 54406800 0 0 0 0 0
\r
1364 seg: 2 12 254000 0 0
\r
1365 vtx: 3 77930248 59807856 0 0 0 0 0
\r
1366 seg: 3 12 254000 0 0
\r
1367 vtx: 4 90735404 59807856 0 0 0 0 0
\r
1368 seg: 4 12 254000 0 0
\r
1369 vtx: 5 103756460 46786800 0 0 0 0 0
\r
1370 seg: 5 12 254000 0 0
\r
1371 vtx: 6 106299000 46786800 11 0 0 0 0
\r
1373 net: "XX2$XXcheckI1$CTRL_A" 4 3 0 0 0 0 1
\r
1374 pin: 1 IC_CD4016_7.6
\r
1375 pin: 2 IC_CD4007_13.8
\r
1376 pin: 3 IC_CD4007_15.3
\r
1378 connect: 1 1 0 6 0
\r
1379 vtx: 1 63119000 72186800 11 0 0 0 0
\r
1380 seg: 1 12 254000 0 0
\r
1381 vtx: 2 55581804 64649604 0 0 0 0 0
\r
1382 seg: 2 12 254000 0 0
\r
1383 vtx: 3 9384538 64649604 0 0 0 0 0
\r
1384 seg: 3 12 254000 0 0
\r
1385 vtx: 4 2850642 58115454 0 0 0 0 0
\r
1386 seg: 4 12 254000 0 0
\r
1387 vtx: 5 2850642 46015148 0 0 0 0 0
\r
1388 seg: 5 12 254000 0 0
\r
1389 vtx: 6 4618990 44246800 0 0 0 0 0
\r
1390 seg: 6 12 254000 0 0
\r
1391 vtx: 7 4699000 44246800 11 0 0 0 0
\r
1392 connect: 2 3 1 3 0
\r
1393 vtx: 1 91440000 86360000 11 0 0 0 0
\r
1394 seg: 1 12 254000 0 0
\r
1395 vtx: 2 83389978 86360000 0 0 0 0 0
\r
1396 seg: 2 12 254000 0 0
\r
1397 vtx: 3 69216778 72186800 0 0 0 0 0
\r
1398 seg: 3 12 254000 0 0
\r
1399 vtx: 4 63119000 72186800 11 0 0 0 0
\r
1400 connect: 3 3 2 2 0
\r
1401 vtx: 1 91440000 86360000 11 0 0 0 0
\r
1402 seg: 1 13 254000 0 0
\r
1403 vtx: 2 95453200 82346800 0 0 0 0 0
\r
1404 seg: 2 13 254000 0 0
\r
1405 vtx: 3 106299000 82346800 11 0 0 0 0
\r
1407 net: "XX2$N001" 4 3 0 0 0 0 1
\r
1408 pin: 1 IC_CD4016_1.8
\r
1409 pin: 2 IC_CD4016_7.9
\r
1410 pin: 3 IC_CD4016_7.10
\r
1411 pin: 4 IC_CD4016_11.2
\r
1412 connect: 1 1 0 6 0
\r
1413 vtx: 1 12319000 44246800 11 0 0 0 0
\r
1414 seg: 1 13 254000 0 0
\r
1415 vtx: 2 12398502 44246800 0 0 0 0 0
\r
1416 seg: 2 13 254000 0 0
\r
1417 vtx: 3 27302460 29342588 0 0 0 0 0
\r
1418 seg: 3 13 254000 0 0
\r
1419 vtx: 4 27302460 11410188 0 0 0 0 0
\r
1420 seg: 4 13 254000 0 0
\r
1421 vtx: 5 29329126 9383522 0 0 0 0 0
\r
1422 seg: 5 13 254000 0 0
\r
1423 vtx: 6 35875722 9383522 0 0 0 0 0
\r
1424 seg: 6 13 254000 0 0
\r
1425 vtx: 7 37719000 11226800 11 0 0 0 0
\r
1426 connect: 2 3 0 4 0
\r
1427 vtx: 1 106299000 23926800 11 0 0 0 0
\r
1428 seg: 1 13 254000 0 0
\r
1429 vtx: 2 106234738 23926800 0 0 0 0 0
\r
1430 seg: 2 13 254000 0 0
\r
1431 vtx: 3 83573874 1265936 0 0 0 0 0
\r
1432 seg: 3 13 254000 0 0
\r
1433 vtx: 4 47679864 1265936 0 0 0 0 0
\r
1434 seg: 4 13 254000 0 0
\r
1435 vtx: 5 37719000 11226800 11 0 0 0 0
\r
1436 connect: 3 2 1 1 0
\r
1437 vtx: 1 12319000 46786800 11 0 0 0 0
\r
1438 seg: 1 13 254000 0 0
\r
1439 vtx: 2 12319000 44246800 11 0 0 0 0
\r
1441 net: "I0" 2 1 0 0 0 0 1
\r
1442 pin: 1 IC_CD4016_11.1
\r
1444 connect: 1 1 0 4 0
\r
1445 vtx: 1 74930000 6350000 11 0 0 0 0
\r
1446 seg: 1 13 254000 0 0
\r
1447 vtx: 2 86984840 6350000 0 0 0 0 0
\r
1448 seg: 2 13 254000 0 0
\r
1449 vtx: 3 104457500 23822660 0 0 0 0 0
\r
1450 seg: 3 13 254000 0 0
\r
1451 vtx: 4 104457500 26466800 0 0 0 0 0
\r
1452 seg: 4 13 254000 0 0
\r
1453 vtx: 5 106299000 26466800 11 0 0 0 0
\r
1455 net: "XX2$XXcheckI1$CTRL_B" 3 2 0 0 0 0 1
\r
1456 pin: 1 IC_CD4016_11.13
\r
1459 connect: 1 1 0 6 0
\r
1460 vtx: 1 78740000 71120000 11 0 0 0 0
\r
1461 seg: 1 13 254000 0 0
\r
1462 vtx: 2 89499440 60360560 0 0 0 0 0
\r
1463 seg: 2 13 254000 0 0
\r
1464 vtx: 3 105903268 60360560 0 0 0 0 0
\r
1465 seg: 3 13 254000 0 0
\r
1466 vtx: 4 111385096 54878732 0 0 0 0 0
\r
1467 seg: 4 13 254000 0 0
\r
1468 vtx: 5 111385096 26396188 0 0 0 0 0
\r
1469 seg: 5 13 254000 0 0
\r
1470 vtx: 6 113854484 23926800 0 0 0 0 0
\r
1471 seg: 6 13 254000 0 0
\r
1472 vtx: 7 113919000 23926800 11 0 0 0 0
\r
1473 connect: 2 2 1 1 0
\r
1474 vtx: 1 78740000 78740000 11 0 0 0 0
\r
1475 seg: 1 12 254000 0 0
\r
1476 vtx: 2 78740000 71120000 11 0 0 0 0
\r
1478 net: "XX2$XXcheckI1$XXdecoder$IN_pti" 3 2 0 0 0 0 1
\r
1480 pin: 2 IC_CD4007_12.3
\r
1481 pin: 3 IC_CD4007_12.13
\r
1482 connect: 1 1 0 7 0
\r
1483 vtx: 1 30099000 82346800 11 0 0 0 0
\r
1484 seg: 1 12 254000 0 0
\r
1485 vtx: 2 25676606 82346800 0 0 0 0 0
\r
1486 seg: 2 12 254000 0 0
\r
1487 vtx: 3 13675106 70345300 0 0 0 0 0
\r
1488 seg: 3 12 254000 0 0
\r
1489 vtx: 4 11549126 70345300 0 0 0 0 0
\r
1490 seg: 4 12 254000 0 0
\r
1491 vtx: 5 10477500 71416926 0 0 0 0 0
\r
1492 seg: 5 12 254000 0 0
\r
1493 vtx: 6 10477500 76652120 0 0 0 0 0
\r
1494 seg: 6 12 254000 0 0
\r
1495 vtx: 7 4782820 82346800 0 0 0 0 0
\r
1496 seg: 7 12 254000 0 0
\r
1497 vtx: 8 4699000 82346800 11 0 0 0 0
\r
1498 connect: 2 2 1 3 0
\r
1499 vtx: 1 37719000 84886800 11 0 0 0 0
\r
1500 seg: 1 12 254000 0 0
\r
1501 vtx: 2 35322510 84886800 0 0 0 0 0
\r
1502 seg: 2 12 254000 0 0
\r
1503 vtx: 3 32782510 82346800 0 0 0 0 0
\r
1504 seg: 3 12 254000 0 0
\r
1505 vtx: 4 30099000 82346800 11 0 0 0 0
\r
1507 net: "XX2$XXcheckI1$XXdecoder$XX0nor$NN" 3 2 0 0 0 0 1
\r
1508 pin: 1 IC_CD4007_15.5
\r
1509 pin: 2 IC_CD4007_15.8
\r
1511 connect: 1 1 0 3 0
\r
1512 vtx: 1 113919000 72186800 11 0 0 0 0
\r
1513 seg: 1 12 254000 0 0
\r
1514 vtx: 2 113853214 72186800 0 0 0 0 0
\r
1515 seg: 2 12 254000 0 0
\r
1516 vtx: 3 108773214 77266800 0 0 0 0 0
\r
1517 seg: 3 12 254000 0 0
\r
1518 vtx: 4 106299000 77266800 11 0 0 0 0
\r
1519 connect: 2 2 0 2 0
\r
1520 vtx: 1 91440000 71120000 11 0 0 0 0
\r
1521 seg: 1 12 254000 0 0
\r
1522 vtx: 2 97586800 77266800 0 0 0 0 0
\r
1523 seg: 2 12 254000 0 0
\r
1524 vtx: 3 106299000 77266800 11 0 0 0 0
\r
1526 net: "XX2$N002" 4 3 0 0 0 0 1
\r
1527 pin: 1 IC_CD4016_1.2
\r
1528 pin: 2 IC_CD4016_1.3
\r
1529 pin: 3 IC_CD4016_1.9
\r
1530 pin: 4 IC_CD4016_7.4
\r
1531 connect: 1 3 0 11 0
\r
1532 vtx: 1 4699000 49326800 11 0 0 0 0
\r
1533 seg: 1 13 254000 0 0
\r
1534 vtx: 2 4781042 49326800 0 0 0 0 0
\r
1535 seg: 2 13 254000 0 0
\r
1536 vtx: 3 8329422 52875180 0 0 0 0 0
\r
1537 seg: 3 13 254000 0 0
\r
1538 vtx: 4 8329422 55576470 0 0 0 0 0
\r
1539 seg: 4 13 254000 0 0
\r
1540 vtx: 5 11541506 58788808 0 0 0 0 0
\r
1541 seg: 5 13 254000 0 0
\r
1542 vtx: 6 13098780 58788808 0 0 0 0 0
\r
1543 seg: 6 13 254000 0 0
\r
1544 vtx: 7 14160500 56203088 0 0 0 0 0
\r
1545 seg: 7 13 254000 0 0
\r
1546 vtx: 8 14160500 51512724 0 0 0 0 0
\r
1547 seg: 8 13 254000 0 0
\r
1548 vtx: 9 27872182 37801042 0 0 0 0 0
\r
1549 seg: 9 13 254000 0 0
\r
1550 vtx: 10 27872182 25676098 0 0 0 0 0
\r
1551 seg: 10 13 254000 0 0
\r
1552 vtx: 11 29621480 23926800 0 0 0 0 0
\r
1553 seg: 11 13 254000 0 0
\r
1554 vtx: 12 30099000 23926800 11 0 0 0 0
\r
1555 connect: 2 1 0 1 0
\r
1556 vtx: 1 30099000 21386800 11 0 0 0 0
\r
1557 seg: 1 13 254000 0 0
\r
1558 vtx: 2 30099000 23926800 11 0 0 0 0
\r
1559 connect: 3 2 1 5 0
\r
1560 vtx: 1 37719000 13766800 11 0 0 0 0
\r
1561 seg: 1 12 254000 0 0
\r
1562 vtx: 2 37652198 13766800 0 0 0 0 0
\r
1563 seg: 2 12 254000 0 0
\r
1564 vtx: 3 32752030 18666968 0 0 0 0 0
\r
1565 seg: 3 12 254000 0 0
\r
1566 vtx: 4 32752030 18804128 0 0 0 0 0
\r
1567 seg: 4 12 254000 0 0
\r
1568 vtx: 5 30169358 21386800 0 0 0 0 0
\r
1569 seg: 5 12 254000 0 0
\r
1570 vtx: 6 30099000 21386800 11 0 0 0 0
\r
1572 net: "XX2$XXcheckI2$XXdecoder$XXinti$STI_Out" 2 1 0 0 0 0 1
\r
1575 connect: 1 1 0 1 0
\r
1576 vtx: 1 113919000 46786800 11 0 0 0 0
\r
1577 seg: 1 13 254000 0 0
\r
1578 vtx: 2 113919000 44246800 11 0 0 0 0
\r
1580 net: "I1" 3 2 0 0 0 0 1
\r
1581 pin: 1 IC_CD4007_12.6
\r
1582 pin: 2 IC_CD4007_13.6
\r
1584 connect: 1 1 0 5 0
\r
1585 vtx: 1 55499000 74726800 11 0 0 0 0
\r
1586 seg: 1 12 254000 0 0
\r
1587 vtx: 2 45291756 74726800 0 0 0 0 0
\r
1588 seg: 2 12 254000 0 0
\r
1589 vtx: 3 40910256 70345300 0 0 0 0 0
\r
1590 seg: 3 12 254000 0 0
\r
1591 vtx: 4 36949126 70345300 0 0 0 0 0
\r
1592 seg: 4 12 254000 0 0
\r
1593 vtx: 5 32567626 74726800 0 0 0 0 0
\r
1594 seg: 5 12 254000 0 0
\r
1595 vtx: 6 30099000 74726800 11 0 0 0 0
\r
1596 connect: 2 2 1 5 0
\r
1597 vtx: 1 72390000 6350000 11 0 0 0 0
\r
1598 seg: 1 13 254000 0 0
\r
1599 vtx: 2 72390000 26337514 0 0 0 0 0
\r
1600 seg: 2 13 254000 0 0
\r
1601 vtx: 3 59190128 39537386 0 0 0 0 0
\r
1602 seg: 3 13 254000 0 0
\r
1603 vtx: 4 59190128 71100442 0 0 0 0 0
\r
1604 seg: 4 13 254000 0 0
\r
1605 vtx: 5 55563770 74726800 0 0 0 0 0
\r
1606 seg: 5 13 254000 0 0
\r
1607 vtx: 6 55499000 74726800 11 0 0 0 0
\r
1609 net: "XX2$XXcheckI1$CTRL_C" 4 3 0 0 0 0 1
\r
1610 pin: 1 IC_CD4016_7.12
\r
1612 pin: 3 R_12K_10.10
\r
1613 pin: 4 IC_CD4007_15.6
\r
1614 connect: 1 3 0 6 0
\r
1615 vtx: 1 106299000 74726800 11 0 0 0 0
\r
1616 seg: 1 12 254000 0 0
\r
1617 vtx: 2 98406712 74726800 0 0 0 0 0
\r
1618 seg: 2 12 254000 0 0
\r
1619 vtx: 3 87272368 63592456 0 0 0 0 0
\r
1620 seg: 3 12 254000 0 0
\r
1621 vtx: 4 23768304 63592456 0 1 711200 355600 21948
\r
1622 seg: 4 12 254000 0 0
\r
1623 vtx: 5 23768304 63247778 0 0 0 0 0
\r
1624 seg: 5 12 254000 0 0
\r
1625 vtx: 6 12387580 51866800 0 0 0 0 0
\r
1626 seg: 6 12 254000 0 0
\r
1627 vtx: 7 12319000 51866800 11 0 0 0 0
\r
1628 connect: 2 2 1 1 0
\r
1629 vtx: 1 12319000 77266800 11 0 0 0 0
\r
1630 seg: 1 13 254000 0 0
\r
1631 vtx: 2 12319000 74726800 11 0 0 0 0
\r
1632 connect: 3 1 -1 2 0
\r
1633 vtx: 1 12319000 74726800 11 0 0 0 0
\r
1634 seg: 1 13 254000 0 0
\r
1635 vtx: 2 12633960 74726800 0 0 0 0 0
\r
1636 seg: 2 13 254000 0 0
\r
1637 vtx: 3 23768304 63592456 0 0 0 0 21948
\r
1639 net: "XX2$XXcheckI1$XXdecoder$XX1pti$NTI_Out" 2 1 0 0 0 0 1
\r
1641 pin: 2 IC_CD4007_12.8
\r
1642 connect: 1 1 0 9 0
\r
1643 vtx: 1 37719000 72186800 11 0 0 0 0
\r
1644 seg: 1 13 254000 0 0
\r
1645 vtx: 2 37639498 72186800 0 0 0 0 0
\r
1646 seg: 2 13 254000 0 0
\r
1647 vtx: 3 33562798 76263500 0 0 0 0 0
\r
1648 seg: 3 13 254000 0 0
\r
1649 vtx: 4 33562798 86979506 0 0 0 0 0
\r
1650 seg: 4 13 254000 0 0
\r
1651 vtx: 5 30764734 89777570 0 0 0 0 0
\r
1652 seg: 5 13 254000 0 0
\r
1653 vtx: 6 11334242 89777570 0 0 0 0 0
\r
1654 seg: 6 13 254000 0 0
\r
1655 vtx: 7 7236460 85679788 0 0 0 0 0
\r
1656 seg: 7 13 254000 0 0
\r
1657 vtx: 8 7236460 82279490 0 0 0 0 0
\r
1658 seg: 8 13 254000 0 0
\r
1659 vtx: 9 4763770 79806800 0 0 0 0 0
\r
1660 seg: 9 13 254000 0 0
\r
1661 vtx: 10 4699000 79806800 11 0 0 0 0
\r
1663 net: "I2" 3 2 0 0 0 0 1
\r
1664 pin: 1 IC_CD4007_2.6
\r
1665 pin: 2 IC_CD4007_4.6
\r
1667 connect: 1 2 0 3 0
\r
1668 vtx: 1 69850000 6350000 11 0 0 0 0
\r
1669 seg: 1 12 254000 0 0
\r
1670 vtx: 2 69850000 6687058 0 0 0 0 5983
\r
1671 seg: 2 12 254000 0 0
\r
1672 vtx: 3 76929742 13766800 0 0 0 0 0
\r
1673 seg: 3 12 254000 0 0
\r
1674 vtx: 4 80899000 13766800 11 0 0 0 0
\r
1675 connect: 2 1 -1 7 0
\r
1676 vtx: 1 55499000 44246800 11 0 0 0 0
\r
1677 seg: 1 13 254000 0 0
\r
1678 vtx: 2 55563262 44246800 0 0 0 0 0
\r
1679 seg: 2 13 254000 0 0
\r
1680 vtx: 3 57855358 41954958 0 0 0 0 0
\r
1681 seg: 3 13 254000 0 0
\r
1682 vtx: 4 57855358 34905442 0 0 0 0 0
\r
1683 seg: 4 13 254000 0 0
\r
1684 vtx: 5 66528696 26232104 0 0 0 0 0
\r
1685 seg: 5 13 254000 0 0
\r
1686 vtx: 6 66528696 9074150 0 0 711200 355600 0
\r
1687 seg: 6 12 254000 0 0
\r
1688 vtx: 7 67462908 9074150 0 0 0 0 0
\r
1689 seg: 7 12 254000 0 0
\r
1690 vtx: 8 69850000 6687058 0 0 0 0 5983
\r
1692 net: "XX2$XXcheckI1$XXdecoder$XX0nor$NP" 2 1 0 0 0 0 1
\r
1693 pin: 1 IC_CD4007_15.1
\r
1695 connect: 1 1 0 2 0
\r
1696 vtx: 1 91440000 78740000 11 0 0 0 0
\r
1697 seg: 1 12 254000 0 0
\r
1698 vtx: 2 100126800 87426800 0 0 0 0 0
\r
1699 seg: 2 12 254000 0 0
\r
1700 vtx: 3 106299000 87426800 11 0 0 0 0
\r
1702 net: "XX2$XXcheckI1$XXdecoder$XX1sti$NTI_Out" 2 1 0 0 0 0 1
\r
1704 pin: 2 IC_CD4007_12.5
\r
1705 connect: 1 1 0 5 0
\r
1706 vtx: 1 30099000 77266800 11 0 0 0 0
\r
1707 seg: 1 12 254000 0 0
\r
1708 vtx: 2 23834344 77266800 0 0 0 0 0
\r
1709 seg: 2 12 254000 0 0
\r
1710 vtx: 3 16403066 69835522 0 0 0 0 0
\r
1711 seg: 3 12 254000 0 0
\r
1712 vtx: 4 11337290 69835522 0 0 0 0 0
\r
1713 seg: 4 12 254000 0 0
\r
1714 vtx: 5 6446012 74726800 0 0 0 0 0
\r
1715 seg: 5 12 254000 0 0
\r
1716 vtx: 6 4699000 74726800 11 0 0 0 0
\r
1718 net: "XX2$XXcheckI3$XXdecoder$XXinti$PTI_Out" 2 1 0 0 0 0 1
\r
1720 pin: 2 IC_CD4007_8.1
\r
1721 connect: 1 1 0 4 0
\r
1722 vtx: 1 30099000 56946800 11 0 0 0 0
\r
1723 seg: 1 13 254000 0 0
\r
1724 vtx: 2 28257500 56946800 0 0 0 0 0
\r
1725 seg: 2 13 254000 0 0
\r
1726 vtx: 3 28257500 40944038 0 0 0 0 0
\r
1727 seg: 3 13 254000 0 0
\r
1728 vtx: 4 55434738 13766800 0 0 0 0 0
\r
1729 seg: 4 13 254000 0 0
\r
1730 vtx: 5 55499000 13766800 11 0 0 0 0
\r
1732 net: "I3" 3 2 0 0 0 0 1
\r
1733 pin: 1 IC_CD4007_4.3
\r
1734 pin: 2 IC_CD4007_8.3
\r
1736 connect: 1 2 0 5 0
\r
1737 vtx: 1 67310000 6350000 11 0 0 0 0
\r
1738 seg: 1 13 254000 0 0
\r
1739 vtx: 2 67310000 28485846 0 0 0 0 0
\r
1740 seg: 2 13 254000 0 0
\r
1741 vtx: 3 58363358 37432488 0 0 0 0 0
\r
1742 seg: 3 13 254000 0 0
\r
1743 vtx: 4 58363358 49067212 0 0 0 0 0
\r
1744 seg: 4 13 254000 0 0
\r
1745 vtx: 5 55563770 51866800 0 0 0 0 0
\r
1746 seg: 5 13 254000 0 0
\r
1747 vtx: 6 55499000 51866800 11 0 0 0 0
\r
1748 connect: 2 1 0 7 0
\r
1749 vtx: 1 30099000 51866800 11 0 0 0 0
\r
1750 seg: 1 12 254000 0 0
\r
1751 vtx: 2 30163770 51866800 0 0 0 0 0
\r
1752 seg: 2 12 254000 0 0
\r
1753 vtx: 3 35111182 46919388 0 0 0 0 0
\r
1754 seg: 3 12 254000 0 0
\r
1755 vtx: 4 35111182 41710102 0 0 0 0 0
\r
1756 seg: 4 12 254000 0 0
\r
1757 vtx: 5 36969954 39851076 0 0 0 0 0
\r
1758 seg: 5 12 254000 0 0
\r
1759 vtx: 6 38467538 39851076 0 0 0 0 0
\r
1760 seg: 6 12 254000 0 0
\r
1761 vtx: 7 50483262 51866800 0 0 0 0 0
\r
1762 seg: 7 12 254000 0 0
\r
1763 vtx: 8 55499000 51866800 11 0 0 0 0
\r
1765 net: "XX2$XXcheckI1$XXdecoder$XX1sti$PTI_Out" 2 1 0 0 0 0 1
\r
1767 pin: 2 IC_CD4007_12.1
\r
1768 connect: 1 1 0 7 0
\r
1769 vtx: 1 30099000 87426800 11 0 0 0 0
\r
1770 seg: 1 13 254000 0 0
\r
1771 vtx: 2 28257500 87426800 0 0 0 0 0
\r
1772 seg: 2 13 254000 0 0
\r
1773 vtx: 3 26414730 88761570 0 0 0 0 0
\r
1774 seg: 3 13 254000 0 0
\r
1775 vtx: 4 12052554 88761570 0 0 0 0 0
\r
1776 seg: 4 13 254000 0 0
\r
1777 vtx: 5 8275828 84984844 0 0 0 0 0
\r
1778 seg: 5 13 254000 0 0
\r
1779 vtx: 6 7767828 80264254 0 0 0 0 0
\r
1780 seg: 6 13 254000 0 0
\r
1781 vtx: 7 4770374 77266800 0 0 0 0 0
\r
1782 seg: 7 13 254000 0 0
\r
1783 vtx: 8 4699000 77266800 11 0 0 0 0
\r
1785 net: "XX2$XXcheckI3$XXdecoder$XX0nor$NI" 2 1 0 0 0 0 1
\r
1786 pin: 1 IC_CD4007_9.2
\r
1787 pin: 2 IC_CD4007_9.13
\r
1788 connect: 1 1 0 1 0
\r
1789 vtx: 1 12319000 23926800 11 0 0 0 0
\r
1790 seg: 1 12 254000 0 0
\r
1791 vtx: 2 4699000 23926800 11 0 0 0 0
\r
1793 net: "XX2$XXcheckI2$XXdecoder$IN_pti" 3 2 0 0 0 0 1
\r
1794 pin: 1 IC_CD4007_2.3
\r
1795 pin: 2 IC_CD4007_2.13
\r
1797 connect: 1 1 0 3 0
\r
1798 vtx: 1 88519000 23926800 11 0 0 0 0
\r
1799 seg: 1 13 254000 0 0
\r
1800 vtx: 2 86122510 23926800 0 0 0 0 0
\r
1801 seg: 2 13 254000 0 0
\r
1802 vtx: 3 83582510 21386800 0 0 0 0 0
\r
1803 seg: 3 13 254000 0 0
\r
1804 vtx: 4 80899000 21386800 11 0 0 0 0
\r
1805 connect: 2 2 1 5 0
\r
1806 vtx: 1 106299000 56946800 11 0 0 0 0
\r
1807 seg: 1 13 254000 0 0
\r
1808 vtx: 2 104457500 56946800 0 0 0 0 0
\r
1809 seg: 2 13 254000 0 0
\r
1810 vtx: 3 91431618 43920918 0 0 0 0 0
\r
1811 seg: 3 13 254000 0 0
\r
1812 vtx: 4 91431618 26766012 0 0 0 0 0
\r
1813 seg: 4 13 254000 0 0
\r
1814 vtx: 5 88592660 23926800 0 0 0 0 0
\r
1815 seg: 5 13 254000 0 0
\r
1816 vtx: 6 88519000 23926800 11 0 0 0 0
\r
1818 net: "0" 1 0 0 0 0 0 1
\r
1821 net: "XX2$XXcheckI3$XXdecoder$XXinti$STI_Out" 2 1 0 0 0 0 1
\r
1824 connect: 1 1 0 1 0
\r
1825 vtx: 1 63119000 13766800 11 0 0 0 0
\r
1826 seg: 1 12 254000 0 0
\r
1827 vtx: 2 63119000 11226800 11 0 0 0 0
\r
1829 net: "XX2$XXcheckI2$XXdecoder$XX1pti$NTI_Out" 2 1 0 0 0 0 1
\r
1830 pin: 1 IC_CD4007_2.8
\r
1832 connect: 1 1 0 5 0
\r
1833 vtx: 1 106299000 54406800 11 0 0 0 0
\r
1834 seg: 1 13 254000 0 0
\r
1835 vtx: 2 106234484 54406800 0 0 0 0 0
\r
1836 seg: 2 13 254000 0 0
\r
1837 vtx: 3 92651580 40823896 0 0 0 0 0
\r
1838 seg: 3 13 254000 0 0
\r
1839 vtx: 4 92651580 15282164 0 0 0 0 0
\r
1840 seg: 4 13 254000 0 0
\r
1841 vtx: 5 88596216 11226800 0 0 0 0 0
\r
1842 seg: 5 13 254000 0 0
\r
1843 vtx: 6 88519000 11226800 11 0 0 0 0
\r
1845 net: "XX2$XXcheckI1$XXdecoder$XX1pti$STI_Out" 2 1 0 0 0 0 1
\r
1846 pin: 1 R_12K_10.11
\r
1847 pin: 2 R_12K_10.12
\r
1848 connect: 1 1 0 1 0
\r
1849 vtx: 1 12319000 82346800 11 0 0 0 0
\r
1850 seg: 1 13 254000 0 0
\r
1851 vtx: 2 12319000 79806800 11 0 0 0 0
\r
1853 net: "XX2$XXcheckI2$CTRL_A" 4 3 0 0 0 0 1
\r
1854 pin: 1 IC_CD4016_1.13
\r
1856 pin: 3 IC_CD4007_4.8
\r
1857 pin: 4 IC_CD4007_5.3
\r
1858 connect: 1 2 0 4 0
\r
1859 vtx: 1 63119000 41706800 11 0 0 0 0
\r
1860 seg: 1 13 254000 0 0
\r
1861 vtx: 2 61791088 41706800 0 0 0 0 0
\r
1862 seg: 2 13 254000 0 0
\r
1863 vtx: 3 61958728 38318440 0 0 711200 355600 0
\r
1864 seg: 3 12 254000 0 0
\r
1865 vtx: 4 44011088 23926800 0 0 0 0 0
\r
1866 seg: 4 12 254000 0 0
\r
1867 vtx: 5 37719000 23926800 11 0 0 0 0
\r
1868 connect: 2 3 1 6 0
\r
1869 vtx: 1 80899000 51866800 11 0 0 0 0
\r
1870 seg: 1 12 254000 0 0
\r
1871 vtx: 2 79051912 51866800 0 0 0 0 16199
\r
1872 seg: 2 12 254000 0 0
\r
1873 vtx: 3 79051912 58113676 0 0 0 0 0
\r
1874 seg: 3 12 254000 0 0
\r
1875 vtx: 4 80238092 59299856 0 0 0 0 0
\r
1876 seg: 4 12 254000 0 0
\r
1877 vtx: 5 90014806 59299856 0 0 0 0 0
\r
1878 seg: 5 12 254000 0 0
\r
1879 vtx: 6 105067862 44246800 0 0 0 0 0
\r
1880 seg: 6 12 254000 0 0
\r
1881 vtx: 7 106299000 44246800 11 0 0 0 0
\r
1882 connect: 3 2 -1 2 0
\r
1883 vtx: 1 63119000 41706800 11 0 0 0 0
\r
1884 seg: 1 12 254000 0 0
\r
1885 vtx: 2 68891912 41706800 0 0 0 0 0
\r
1886 seg: 2 12 254000 0 0
\r
1887 vtx: 3 79051912 51866800 0 0 0 0 16199
\r
1889 net: "XX2$XXcheckI2$XXdecoder$XX1sti$NTI_Out" 2 1 0 0 0 0 1
\r
1890 pin: 1 IC_CD4007_2.5
\r
1892 connect: 1 1 0 9 0
\r
1893 vtx: 1 106299000 49326800 11 0 0 0 0
\r
1894 seg: 1 13 254000 0 0
\r
1895 vtx: 2 106234230 49326800 0 0 0 0 0
\r
1896 seg: 2 13 254000 0 0
\r
1897 vtx: 3 94649798 37742368 0 0 0 0 0
\r
1898 seg: 3 13 254000 0 0
\r
1899 vtx: 4 94649798 14738604 0 0 0 0 0
\r
1900 seg: 4 13 254000 0 0
\r
1901 vtx: 5 89287858 9376664 0 0 0 0 0
\r
1902 seg: 5 13 254000 0 0
\r
1903 vtx: 6 87750650 9376664 0 0 0 0 0
\r
1904 seg: 6 13 254000 0 0
\r
1905 vtx: 7 84281010 12846050 0 0 0 0 0
\r
1906 seg: 7 13 254000 0 0
\r
1907 vtx: 8 84281010 13008864 0 0 0 0 0
\r
1908 seg: 8 13 254000 0 0
\r
1909 vtx: 9 80982820 16306800 0 0 0 0 0
\r
1910 seg: 9 13 254000 0 0
\r
1911 vtx: 10 80899000 16306800 11 0 0 0 0
\r
1913 net: "XX2$XXcheckI3$XXdecoder$IN_pti" 3 2 0 0 0 0 1
\r
1914 pin: 1 IC_CD4007_4.1
\r
1916 pin: 3 IC_CD4007_8.6
\r
1917 connect: 1 1 0 5 0
\r
1918 vtx: 1 55499000 23926800 11 0 0 0 0
\r
1919 seg: 1 13 254000 0 0
\r
1920 vtx: 2 55018432 23926800 0 0 0 0 0
\r
1921 seg: 2 13 254000 0 0
\r
1922 vtx: 3 53133752 25811480 0 0 0 0 0
\r
1923 seg: 3 13 254000 0 0
\r
1924 vtx: 4 53133752 56423052 0 0 0 0 0
\r
1925 seg: 4 13 254000 0 0
\r
1926 vtx: 5 53657500 56946800 0 0 0 0 27401
\r
1927 seg: 5 13 254000 0 0
\r
1928 vtx: 6 55499000 56946800 11 0 0 0 0
\r
1929 connect: 2 2 -1 6 0
\r
1930 vtx: 1 30099000 44246800 11 0 0 0 0
\r
1931 seg: 1 13 254000 0 0
\r
1932 vtx: 2 30178502 44246800 0 0 0 0 0
\r
1933 seg: 2 13 254000 0 0
\r
1934 vtx: 3 35486848 49555146 0 0 0 0 0
\r
1935 seg: 3 13 254000 0 0
\r
1936 vtx: 4 35486848 57328054 0 0 0 0 0
\r
1937 seg: 4 13 254000 0 0
\r
1938 vtx: 5 36947094 58788300 0 0 0 0 0
\r
1939 seg: 5 13 254000 0 0
\r
1940 vtx: 6 51816000 58788300 0 0 0 0 0
\r
1941 seg: 6 13 254000 0 0
\r
1942 vtx: 7 53657500 56946800 0 0 0 0 27401
\r
1944 net: "XX2$XXcheckI2$CTRL_B" 3 2 0 0 0 0 1
\r
1945 pin: 1 IC_CD4016_1.6
\r
1948 connect: 1 2 0 7 0
\r
1949 vtx: 1 63119000 26466800 11 0 0 0 0
\r
1950 seg: 1 12 254000 0 0
\r
1951 vtx: 2 63037466 26466800 0 0 0 0 0
\r
1952 seg: 2 12 254000 0 0
\r
1953 vtx: 3 59742070 23171658 0 0 0 0 0
\r
1954 seg: 3 12 254000 0 0
\r
1955 vtx: 4 59742070 11632184 0 0 0 0 0
\r
1956 seg: 4 12 254000 0 0
\r
1957 vtx: 5 56477916 8368030 0 0 0 0 0
\r
1958 seg: 5 12 254000 0 0
\r
1959 vtx: 6 36728654 8368030 0 0 0 0 0
\r
1960 seg: 6 12 254000 0 0
\r
1961 vtx: 7 31837884 13766800 0 0 0 0 0
\r
1962 seg: 7 12 254000 0 0
\r
1963 vtx: 8 30099000 13766800 11 0 0 0 0
\r
1964 connect: 2 2 1 3 0
\r
1965 vtx: 1 63119000 26466800 11 0 0 0 0
\r
1966 seg: 1 12 254000 0 0
\r
1967 vtx: 2 74412094 37759894 0 0 0 0 0
\r
1968 seg: 2 12 254000 0 0
\r
1969 vtx: 3 109972094 37759894 0 0 0 0 0
\r
1970 seg: 3 12 254000 0 0
\r
1971 vtx: 4 113919000 41706800 11 0 0 0 0
\r
1975 text: "+ 0 - SIGN" 66802000 1270000 7 0 0 1270000 127000 0
\r
1977 text: "I3 I2 I1 I0" 66548000 7620000 7 0 0 1270000 127000 0
\r
1979 text: "4-TRIT SIGN DETECTOR" 6350000 1270000 7 0 0 2540000 127000 0
\r
1981 text: "J. Connelly, C. Patel, A. Chavez" 81280000 6350000 7 0 0 1270000 127000 0
\r
1983 text: "Spring 2008" 92710000 3810000 7 0 0 1270000 127000 0
\r
1985 text: "http://jeff.tk/wiki/Trinary" 83820000 1270000 7 0 0 1270000 127000 0
\r